1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 984c856d0SVinod Koul#include <dt-bindings/interconnect/qcom,sm8350.h> 10b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 11b7e8f433SVinod Koul#include <dt-bindings/power/qcom-aoss-qmp.h> 12b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 13b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1420f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 15f11d3e7dSAlex Elder#include <dt-bindings/interconnect/qcom,sm8350.h> 16b7e8f433SVinod Koul 17b7e8f433SVinod Koul/ { 18b7e8f433SVinod Koul interrupt-parent = <&intc>; 19b7e8f433SVinod Koul 20b7e8f433SVinod Koul #address-cells = <2>; 21b7e8f433SVinod Koul #size-cells = <2>; 22b7e8f433SVinod Koul 23b7e8f433SVinod Koul chosen { }; 24b7e8f433SVinod Koul 25b7e8f433SVinod Koul clocks { 26b7e8f433SVinod Koul xo_board: xo-board { 27b7e8f433SVinod Koul compatible = "fixed-clock"; 28b7e8f433SVinod Koul #clock-cells = <0>; 29b7e8f433SVinod Koul clock-frequency = <38400000>; 30b7e8f433SVinod Koul clock-output-names = "xo_board"; 31b7e8f433SVinod Koul }; 32b7e8f433SVinod Koul 33b7e8f433SVinod Koul sleep_clk: sleep-clk { 34b7e8f433SVinod Koul compatible = "fixed-clock"; 35b7e8f433SVinod Koul clock-frequency = <32000>; 36b7e8f433SVinod Koul #clock-cells = <0>; 37b7e8f433SVinod Koul }; 38b7e8f433SVinod Koul }; 39b7e8f433SVinod Koul 40b7e8f433SVinod Koul cpus { 41b7e8f433SVinod Koul #address-cells = <2>; 42b7e8f433SVinod Koul #size-cells = <0>; 43b7e8f433SVinod Koul 44b7e8f433SVinod Koul CPU0: cpu@0 { 45b7e8f433SVinod Koul device_type = "cpu"; 46b7e8f433SVinod Koul compatible = "qcom,kryo685"; 47b7e8f433SVinod Koul reg = <0x0 0x0>; 48b7e8f433SVinod Koul enable-method = "psci"; 49b7e8f433SVinod Koul next-level-cache = <&L2_0>; 50ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 5120f9d94eSRobert Foss #cooling-cells = <2>; 52b7e8f433SVinod Koul L2_0: l2-cache { 53b7e8f433SVinod Koul compatible = "cache"; 54b7e8f433SVinod Koul next-level-cache = <&L3_0>; 55b7e8f433SVinod Koul L3_0: l3-cache { 56b7e8f433SVinod Koul compatible = "cache"; 57b7e8f433SVinod Koul }; 58b7e8f433SVinod Koul }; 59b7e8f433SVinod Koul }; 60b7e8f433SVinod Koul 61b7e8f433SVinod Koul CPU1: cpu@100 { 62b7e8f433SVinod Koul device_type = "cpu"; 63b7e8f433SVinod Koul compatible = "qcom,kryo685"; 64b7e8f433SVinod Koul reg = <0x0 0x100>; 65b7e8f433SVinod Koul enable-method = "psci"; 66b7e8f433SVinod Koul next-level-cache = <&L2_100>; 67ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 6820f9d94eSRobert Foss #cooling-cells = <2>; 69b7e8f433SVinod Koul L2_100: l2-cache { 70b7e8f433SVinod Koul compatible = "cache"; 71b7e8f433SVinod Koul next-level-cache = <&L3_0>; 72b7e8f433SVinod Koul }; 73b7e8f433SVinod Koul }; 74b7e8f433SVinod Koul 75b7e8f433SVinod Koul CPU2: cpu@200 { 76b7e8f433SVinod Koul device_type = "cpu"; 77b7e8f433SVinod Koul compatible = "qcom,kryo685"; 78b7e8f433SVinod Koul reg = <0x0 0x200>; 79b7e8f433SVinod Koul enable-method = "psci"; 80b7e8f433SVinod Koul next-level-cache = <&L2_200>; 81ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 8220f9d94eSRobert Foss #cooling-cells = <2>; 83b7e8f433SVinod Koul L2_200: l2-cache { 84b7e8f433SVinod Koul compatible = "cache"; 85b7e8f433SVinod Koul next-level-cache = <&L3_0>; 86b7e8f433SVinod Koul }; 87b7e8f433SVinod Koul }; 88b7e8f433SVinod Koul 89b7e8f433SVinod Koul CPU3: cpu@300 { 90b7e8f433SVinod Koul device_type = "cpu"; 91b7e8f433SVinod Koul compatible = "qcom,kryo685"; 92b7e8f433SVinod Koul reg = <0x0 0x300>; 93b7e8f433SVinod Koul enable-method = "psci"; 94b7e8f433SVinod Koul next-level-cache = <&L2_300>; 95ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 9620f9d94eSRobert Foss #cooling-cells = <2>; 97b7e8f433SVinod Koul L2_300: l2-cache { 98b7e8f433SVinod Koul compatible = "cache"; 99b7e8f433SVinod Koul next-level-cache = <&L3_0>; 100b7e8f433SVinod Koul }; 101b7e8f433SVinod Koul }; 102b7e8f433SVinod Koul 103b7e8f433SVinod Koul CPU4: cpu@400 { 104b7e8f433SVinod Koul device_type = "cpu"; 105b7e8f433SVinod Koul compatible = "qcom,kryo685"; 106b7e8f433SVinod Koul reg = <0x0 0x400>; 107b7e8f433SVinod Koul enable-method = "psci"; 108b7e8f433SVinod Koul next-level-cache = <&L2_400>; 109ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 11020f9d94eSRobert Foss #cooling-cells = <2>; 111b7e8f433SVinod Koul L2_400: l2-cache { 112b7e8f433SVinod Koul compatible = "cache"; 113b7e8f433SVinod Koul next-level-cache = <&L3_0>; 114b7e8f433SVinod Koul }; 115b7e8f433SVinod Koul }; 116b7e8f433SVinod Koul 117b7e8f433SVinod Koul CPU5: cpu@500 { 118b7e8f433SVinod Koul device_type = "cpu"; 119b7e8f433SVinod Koul compatible = "qcom,kryo685"; 120b7e8f433SVinod Koul reg = <0x0 0x500>; 121b7e8f433SVinod Koul enable-method = "psci"; 122b7e8f433SVinod Koul next-level-cache = <&L2_500>; 123ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 12420f9d94eSRobert Foss #cooling-cells = <2>; 125b7e8f433SVinod Koul L2_500: l2-cache { 126b7e8f433SVinod Koul compatible = "cache"; 127b7e8f433SVinod Koul next-level-cache = <&L3_0>; 128b7e8f433SVinod Koul }; 129b7e8f433SVinod Koul 130b7e8f433SVinod Koul }; 131b7e8f433SVinod Koul 132b7e8f433SVinod Koul CPU6: cpu@600 { 133b7e8f433SVinod Koul device_type = "cpu"; 134b7e8f433SVinod Koul compatible = "qcom,kryo685"; 135b7e8f433SVinod Koul reg = <0x0 0x600>; 136b7e8f433SVinod Koul enable-method = "psci"; 137b7e8f433SVinod Koul next-level-cache = <&L2_600>; 138ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13920f9d94eSRobert Foss #cooling-cells = <2>; 140b7e8f433SVinod Koul L2_600: l2-cache { 141b7e8f433SVinod Koul compatible = "cache"; 142b7e8f433SVinod Koul next-level-cache = <&L3_0>; 143b7e8f433SVinod Koul }; 144b7e8f433SVinod Koul }; 145b7e8f433SVinod Koul 146b7e8f433SVinod Koul CPU7: cpu@700 { 147b7e8f433SVinod Koul device_type = "cpu"; 148b7e8f433SVinod Koul compatible = "qcom,kryo685"; 149b7e8f433SVinod Koul reg = <0x0 0x700>; 150b7e8f433SVinod Koul enable-method = "psci"; 151b7e8f433SVinod Koul next-level-cache = <&L2_700>; 152ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 15320f9d94eSRobert Foss #cooling-cells = <2>; 154b7e8f433SVinod Koul L2_700: l2-cache { 155b7e8f433SVinod Koul compatible = "cache"; 156b7e8f433SVinod Koul next-level-cache = <&L3_0>; 157b7e8f433SVinod Koul }; 158b7e8f433SVinod Koul }; 159b7e8f433SVinod Koul }; 160b7e8f433SVinod Koul 161b7e8f433SVinod Koul firmware { 162b7e8f433SVinod Koul scm: scm { 163b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 164b7e8f433SVinod Koul #reset-cells = <1>; 165b7e8f433SVinod Koul }; 166b7e8f433SVinod Koul }; 167b7e8f433SVinod Koul 168b7e8f433SVinod Koul memory@80000000 { 169b7e8f433SVinod Koul device_type = "memory"; 170b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 171b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 172b7e8f433SVinod Koul }; 173b7e8f433SVinod Koul 174b7e8f433SVinod Koul pmu { 175b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 176794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 177b7e8f433SVinod Koul }; 178b7e8f433SVinod Koul 179b7e8f433SVinod Koul psci { 180b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 181b7e8f433SVinod Koul method = "smc"; 182b7e8f433SVinod Koul }; 183b7e8f433SVinod Koul 184b7e8f433SVinod Koul reserved_memory: reserved-memory { 185b7e8f433SVinod Koul #address-cells = <2>; 186b7e8f433SVinod Koul #size-cells = <2>; 187b7e8f433SVinod Koul ranges; 188b7e8f433SVinod Koul 189b7e8f433SVinod Koul hyp_mem: memory@80000000 { 190b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 191b7e8f433SVinod Koul no-map; 192b7e8f433SVinod Koul }; 193b7e8f433SVinod Koul 194b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 195b7e8f433SVinod Koul no-map; 196b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 197b7e8f433SVinod Koul }; 198b7e8f433SVinod Koul 199b7e8f433SVinod Koul cmd_db: memory@80860000 { 200b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 201b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 202b7e8f433SVinod Koul no-map; 203b7e8f433SVinod Koul }; 204b7e8f433SVinod Koul 205b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 206b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 207b7e8f433SVinod Koul no-map; 208b7e8f433SVinod Koul }; 209b7e8f433SVinod Koul 210b7e8f433SVinod Koul smem_mem: memory@80900000 { 211b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 212b7e8f433SVinod Koul no-map; 213b7e8f433SVinod Koul }; 214b7e8f433SVinod Koul 215b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 216b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 217b7e8f433SVinod Koul no-map; 218b7e8f433SVinod Koul }; 219b7e8f433SVinod Koul 220b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 221b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 222b7e8f433SVinod Koul no-map; 223b7e8f433SVinod Koul }; 224b7e8f433SVinod Koul 225b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 226b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 227b7e8f433SVinod Koul no-map; 228b7e8f433SVinod Koul }; 229b7e8f433SVinod Koul 230b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 231b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 232b7e8f433SVinod Koul no-map; 233b7e8f433SVinod Koul }; 234b7e8f433SVinod Koul 235b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 236b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 237b7e8f433SVinod Koul no-map; 238b7e8f433SVinod Koul }; 239b7e8f433SVinod Koul 240b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 241b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 242b7e8f433SVinod Koul no-map; 243b7e8f433SVinod Koul }; 244b7e8f433SVinod Koul 245b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 246b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 247b7e8f433SVinod Koul no-map; 248b7e8f433SVinod Koul }; 249b7e8f433SVinod Koul 250b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 251b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 252b7e8f433SVinod Koul no-map; 253b7e8f433SVinod Koul }; 254b7e8f433SVinod Koul 255b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 256b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 257b7e8f433SVinod Koul no-map; 258b7e8f433SVinod Koul }; 259b7e8f433SVinod Koul 260b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 261b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 262b7e8f433SVinod Koul no-map; 263b7e8f433SVinod Koul }; 264b7e8f433SVinod Koul 265b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 266b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 267b7e8f433SVinod Koul no-map; 268b7e8f433SVinod Koul }; 269b7e8f433SVinod Koul 270b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 271b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 272b7e8f433SVinod Koul no-map; 273b7e8f433SVinod Koul }; 274b7e8f433SVinod Koul 275b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 276b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 277b7e8f433SVinod Koul no-map; 278b7e8f433SVinod Koul }; 279b7e8f433SVinod Koul 280774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 281774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 282774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 283774890c9SVinod Koul no-map; 284774890c9SVinod Koul 285774890c9SVinod Koul qcom,client-id = <1>; 286774890c9SVinod Koul qcom,vmid = <15>; 287774890c9SVinod Koul }; 288774890c9SVinod Koul 289b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 290b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 291b7e8f433SVinod Koul no-map; 292b7e8f433SVinod Koul }; 293b7e8f433SVinod Koul 294b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 295b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 296b7e8f433SVinod Koul no-map; 297b7e8f433SVinod Koul }; 298b7e8f433SVinod Koul 299b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 300b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 301b7e8f433SVinod Koul no-map; 302b7e8f433SVinod Koul }; 303b7e8f433SVinod Koul 304b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 305b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 306b7e8f433SVinod Koul no-map; 307b7e8f433SVinod Koul }; 308b7e8f433SVinod Koul 309b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 310b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 311b7e8f433SVinod Koul no-map; 312b7e8f433SVinod Koul }; 313b7e8f433SVinod Koul 314b7e8f433SVinod Koul removed_mem: memory@d8800000 { 315b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 316b7e8f433SVinod Koul no-map; 317b7e8f433SVinod Koul }; 318b7e8f433SVinod Koul }; 319b7e8f433SVinod Koul 320b7e8f433SVinod Koul smem: qcom,smem { 321b7e8f433SVinod Koul compatible = "qcom,smem"; 322b7e8f433SVinod Koul memory-region = <&smem_mem>; 323b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 324b7e8f433SVinod Koul }; 325b7e8f433SVinod Koul 32603a41991SVinod Koul smp2p-adsp { 32703a41991SVinod Koul compatible = "qcom,smp2p"; 32803a41991SVinod Koul qcom,smem = <443>, <429>; 32903a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 33003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 33103a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 33203a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 33303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 33403a41991SVinod Koul 33503a41991SVinod Koul qcom,local-pid = <0>; 33603a41991SVinod Koul qcom,remote-pid = <2>; 33703a41991SVinod Koul 33803a41991SVinod Koul smp2p_adsp_out: master-kernel { 33903a41991SVinod Koul qcom,entry-name = "master-kernel"; 34003a41991SVinod Koul #qcom,smem-state-cells = <1>; 34103a41991SVinod Koul }; 34203a41991SVinod Koul 34303a41991SVinod Koul smp2p_adsp_in: slave-kernel { 34403a41991SVinod Koul qcom,entry-name = "slave-kernel"; 34503a41991SVinod Koul interrupt-controller; 34603a41991SVinod Koul #interrupt-cells = <2>; 34703a41991SVinod Koul }; 34803a41991SVinod Koul }; 34903a41991SVinod Koul 35003a41991SVinod Koul smp2p-cdsp { 35103a41991SVinod Koul compatible = "qcom,smp2p"; 35203a41991SVinod Koul qcom,smem = <94>, <432>; 35303a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 35403a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 35503a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 35603a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 35703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 35803a41991SVinod Koul 35903a41991SVinod Koul qcom,local-pid = <0>; 36003a41991SVinod Koul qcom,remote-pid = <5>; 36103a41991SVinod Koul 36203a41991SVinod Koul smp2p_cdsp_out: master-kernel { 36303a41991SVinod Koul qcom,entry-name = "master-kernel"; 36403a41991SVinod Koul #qcom,smem-state-cells = <1>; 36503a41991SVinod Koul }; 36603a41991SVinod Koul 36703a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 36803a41991SVinod Koul qcom,entry-name = "slave-kernel"; 36903a41991SVinod Koul interrupt-controller; 37003a41991SVinod Koul #interrupt-cells = <2>; 37103a41991SVinod Koul }; 37203a41991SVinod Koul }; 37303a41991SVinod Koul 37403a41991SVinod Koul smp2p-modem { 37503a41991SVinod Koul compatible = "qcom,smp2p"; 37603a41991SVinod Koul qcom,smem = <435>, <428>; 37703a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 37803a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 37903a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 38003a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 38103a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 38203a41991SVinod Koul 38303a41991SVinod Koul qcom,local-pid = <0>; 38403a41991SVinod Koul qcom,remote-pid = <1>; 38503a41991SVinod Koul 38603a41991SVinod Koul smp2p_modem_out: master-kernel { 38703a41991SVinod Koul qcom,entry-name = "master-kernel"; 38803a41991SVinod Koul #qcom,smem-state-cells = <1>; 38903a41991SVinod Koul }; 39003a41991SVinod Koul 39103a41991SVinod Koul smp2p_modem_in: slave-kernel { 39203a41991SVinod Koul qcom,entry-name = "slave-kernel"; 39303a41991SVinod Koul interrupt-controller; 39403a41991SVinod Koul #interrupt-cells = <2>; 39503a41991SVinod Koul }; 396f11d3e7dSAlex Elder 397f11d3e7dSAlex Elder ipa_smp2p_out: ipa-ap-to-modem { 398f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 399f11d3e7dSAlex Elder #qcom,smem-state-cells = <1>; 400f11d3e7dSAlex Elder }; 401f11d3e7dSAlex Elder 402f11d3e7dSAlex Elder ipa_smp2p_in: ipa-modem-to-ap { 403f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 404f11d3e7dSAlex Elder interrupt-controller; 405f11d3e7dSAlex Elder #interrupt-cells = <2>; 406f11d3e7dSAlex Elder }; 40703a41991SVinod Koul }; 40803a41991SVinod Koul 40903a41991SVinod Koul smp2p-slpi { 41003a41991SVinod Koul compatible = "qcom,smp2p"; 41103a41991SVinod Koul qcom,smem = <481>, <430>; 41203a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 41303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 41403a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 41503a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 41603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 41703a41991SVinod Koul 41803a41991SVinod Koul qcom,local-pid = <0>; 41903a41991SVinod Koul qcom,remote-pid = <3>; 42003a41991SVinod Koul 42103a41991SVinod Koul smp2p_slpi_out: master-kernel { 42203a41991SVinod Koul qcom,entry-name = "master-kernel"; 42303a41991SVinod Koul #qcom,smem-state-cells = <1>; 42403a41991SVinod Koul }; 42503a41991SVinod Koul 42603a41991SVinod Koul smp2p_slpi_in: slave-kernel { 42703a41991SVinod Koul qcom,entry-name = "slave-kernel"; 42803a41991SVinod Koul interrupt-controller; 42903a41991SVinod Koul #interrupt-cells = <2>; 43003a41991SVinod Koul }; 43103a41991SVinod Koul }; 43203a41991SVinod Koul 433b7e8f433SVinod Koul soc: soc@0 { 434b7e8f433SVinod Koul #address-cells = <2>; 435b7e8f433SVinod Koul #size-cells = <2>; 436b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 437b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 438b7e8f433SVinod Koul compatible = "simple-bus"; 439b7e8f433SVinod Koul 440b7e8f433SVinod Koul gcc: clock-controller@100000 { 441b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 442b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 443b7e8f433SVinod Koul #clock-cells = <1>; 444b7e8f433SVinod Koul #reset-cells = <1>; 445b7e8f433SVinod Koul #power-domain-cells = <1>; 446b7e8f433SVinod Koul clock-names = "bi_tcxo", "sleep_clk"; 447b7e8f433SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; 448b7e8f433SVinod Koul }; 449b7e8f433SVinod Koul 450b7e8f433SVinod Koul ipcc: mailbox@408000 { 451b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 452b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 453b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 454b7e8f433SVinod Koul interrupt-controller; 455b7e8f433SVinod Koul #interrupt-cells = <3>; 456b7e8f433SVinod Koul #mbox-cells = <2>; 457b7e8f433SVinod Koul }; 458b7e8f433SVinod Koul 45987f0b434SRobert Foss qupv3_id_0: geniqup@9c0000 { 460b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 461b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 462b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 4636d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 4646d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 465b7e8f433SVinod Koul #address-cells = <2>; 466b7e8f433SVinod Koul #size-cells = <2>; 467b7e8f433SVinod Koul ranges; 468b7e8f433SVinod Koul status = "disabled"; 469b7e8f433SVinod Koul 470b7e8f433SVinod Koul uart2: serial@98c000 { 471b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 472b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 473b7e8f433SVinod Koul clock-names = "se"; 4746d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 475b7e8f433SVinod Koul pinctrl-names = "default"; 476b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 477b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 478b7e8f433SVinod Koul #address-cells = <1>; 479b7e8f433SVinod Koul #size-cells = <0>; 480b7e8f433SVinod Koul status = "disabled"; 481b7e8f433SVinod Koul }; 482b7e8f433SVinod Koul }; 483b7e8f433SVinod Koul 484*06bf656eSJonathan Marek qupv3_id_1: geniqup@ac0000 { 485*06bf656eSJonathan Marek compatible = "qcom,geni-se-qup"; 486*06bf656eSJonathan Marek reg = <0x0 0x00ac0000 0x0 0x6000>; 487*06bf656eSJonathan Marek clock-names = "m-ahb", "s-ahb"; 488*06bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 489*06bf656eSJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 490*06bf656eSJonathan Marek #address-cells = <2>; 491*06bf656eSJonathan Marek #size-cells = <2>; 492*06bf656eSJonathan Marek ranges; 493*06bf656eSJonathan Marek status = "disabled"; 494*06bf656eSJonathan Marek 495*06bf656eSJonathan Marek i2c13: i2c@a94000 { 496*06bf656eSJonathan Marek compatible = "qcom,geni-i2c"; 497*06bf656eSJonathan Marek reg = <0 0x00a94000 0 0x4000>; 498*06bf656eSJonathan Marek clock-names = "se"; 499*06bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 500*06bf656eSJonathan Marek pinctrl-names = "default"; 501*06bf656eSJonathan Marek pinctrl-0 = <&qup_i2c13_default_state>; 502*06bf656eSJonathan Marek interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 503*06bf656eSJonathan Marek #address-cells = <1>; 504*06bf656eSJonathan Marek #size-cells = <0>; 505*06bf656eSJonathan Marek status = "disabled"; 506*06bf656eSJonathan Marek }; 507*06bf656eSJonathan Marek }; 508*06bf656eSJonathan Marek 509187f65b7SVinod Koul apps_smmu: iommu@15000000 { 510187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 511187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 512187f65b7SVinod Koul #iommu-cells = <2>; 513187f65b7SVinod Koul #global-interrupts = <2>; 514187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 515187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 516187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 517187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 518187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 519187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 520187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 521187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 522187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 523187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 524187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 525187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 526187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 527187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 528187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 529187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 530187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 531187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 532187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 533187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 534187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 535187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 536187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 537187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 538187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 539187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 540187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 541187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 542187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 543187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 544187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 545187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 546187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 547187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 548187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 549187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 550187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 551187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 552187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 553187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 554187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 555187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 556187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 557187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 558187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 559187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 560187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 561187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 562187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 563187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 564187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 565187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 566187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 567187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 568187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 569187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 570187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 571187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 572187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 573187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 574187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 575187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 576187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 577187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 578187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 579187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 580187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 581187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 582187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 583187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 584187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 585187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 586187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 587187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 588187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 589187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 590187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 591187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 592187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 593187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 594187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 595187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 596187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 597187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 598187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 599187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 600187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 601187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 602187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 603187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 604187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 605187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 606187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 607187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 608187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 609187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 610187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 611187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 612187f65b7SVinod Koul }; 613187f65b7SVinod Koul 614da6b2482SVinod Koul config_noc: interconnect@1500000 { 615da6b2482SVinod Koul compatible = "qcom,sm8350-config-noc"; 616da6b2482SVinod Koul reg = <0 0x01500000 0 0xa580>; 617da6b2482SVinod Koul #interconnect-cells = <1>; 618da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 619da6b2482SVinod Koul }; 620da6b2482SVinod Koul 621da6b2482SVinod Koul mc_virt: interconnect@1580000 { 622da6b2482SVinod Koul compatible = "qcom,sm8350-mc-virt"; 623da6b2482SVinod Koul reg = <0 0x01580000 0 0x1000>; 624da6b2482SVinod Koul #interconnect-cells = <1>; 625da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 626da6b2482SVinod Koul }; 627da6b2482SVinod Koul 628da6b2482SVinod Koul system_noc: interconnect@1680000 { 629da6b2482SVinod Koul compatible = "qcom,sm8350-system-noc"; 630da6b2482SVinod Koul reg = <0 0x01680000 0 0x1c200>; 631da6b2482SVinod Koul #interconnect-cells = <1>; 632da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 633da6b2482SVinod Koul }; 634da6b2482SVinod Koul 635da6b2482SVinod Koul aggre1_noc: interconnect@16e0000 { 636da6b2482SVinod Koul compatible = "qcom,sm8350-aggre1-noc"; 637da6b2482SVinod Koul reg = <0 0x016e0000 0 0x1f180>; 638da6b2482SVinod Koul #interconnect-cells = <1>; 639da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 640da6b2482SVinod Koul }; 641da6b2482SVinod Koul 642da6b2482SVinod Koul aggre2_noc: interconnect@1700000 { 643da6b2482SVinod Koul compatible = "qcom,sm8350-aggre2-noc"; 644da6b2482SVinod Koul reg = <0 0x01700000 0 0x33000>; 645da6b2482SVinod Koul #interconnect-cells = <1>; 646da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 647da6b2482SVinod Koul }; 648da6b2482SVinod Koul 649da6b2482SVinod Koul mmss_noc: interconnect@1740000 { 650da6b2482SVinod Koul compatible = "qcom,sm8350-mmss-noc"; 651da6b2482SVinod Koul reg = <0 0x01740000 0 0x1f080>; 652da6b2482SVinod Koul #interconnect-cells = <1>; 653da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 654da6b2482SVinod Koul }; 655da6b2482SVinod Koul 656da6b2482SVinod Koul lpass_ag_noc: interconnect@3c40000 { 657da6b2482SVinod Koul compatible = "qcom,sm8350-lpass-ag-noc"; 658da6b2482SVinod Koul reg = <0 0x03c40000 0 0xf080>; 659da6b2482SVinod Koul #interconnect-cells = <1>; 660da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 661da6b2482SVinod Koul }; 662da6b2482SVinod Koul 663da6b2482SVinod Koul compute_noc: interconnect@a0c0000{ 664da6b2482SVinod Koul compatible = "qcom,sm8350-compute-noc"; 665da6b2482SVinod Koul reg = <0 0x0a0c0000 0 0xa180>; 666da6b2482SVinod Koul #interconnect-cells = <1>; 667da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 668da6b2482SVinod Koul }; 669da6b2482SVinod Koul 670f11d3e7dSAlex Elder ipa: ipa@1e40000 { 671f11d3e7dSAlex Elder compatible = "qcom,sm8350-ipa"; 672f11d3e7dSAlex Elder 673f11d3e7dSAlex Elder iommus = <&apps_smmu 0x5c0 0x0>, 674f11d3e7dSAlex Elder <&apps_smmu 0x5c2 0x0>; 675f11d3e7dSAlex Elder reg = <0 0x1e40000 0 0x8000>, 676f11d3e7dSAlex Elder <0 0x1e50000 0 0x4b20>, 677f11d3e7dSAlex Elder <0 0x1e04000 0 0x23000>; 678f11d3e7dSAlex Elder reg-names = "ipa-reg", 679f11d3e7dSAlex Elder "ipa-shared", 680f11d3e7dSAlex Elder "gsi"; 681f11d3e7dSAlex Elder 682f11d3e7dSAlex Elder interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>, 683f11d3e7dSAlex Elder <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 684f11d3e7dSAlex Elder <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 685f11d3e7dSAlex Elder <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 686f11d3e7dSAlex Elder interrupt-names = "ipa", 687f11d3e7dSAlex Elder "gsi", 688f11d3e7dSAlex Elder "ipa-clock-query", 689f11d3e7dSAlex Elder "ipa-setup-ready"; 690f11d3e7dSAlex Elder 691f11d3e7dSAlex Elder clocks = <&rpmhcc RPMH_IPA_CLK>; 692f11d3e7dSAlex Elder clock-names = "core"; 693f11d3e7dSAlex Elder 694f11d3e7dSAlex Elder interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>, 695f11d3e7dSAlex Elder <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, 696f11d3e7dSAlex Elder <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; 697f11d3e7dSAlex Elder interconnect-names = "ipa_to_llcc", 698f11d3e7dSAlex Elder "llcc_to_ebi1", 699f11d3e7dSAlex Elder "appss_to_ipa"; 700f11d3e7dSAlex Elder 701f11d3e7dSAlex Elder qcom,smem-states = <&ipa_smp2p_out 0>, 702f11d3e7dSAlex Elder <&ipa_smp2p_out 1>; 703f11d3e7dSAlex Elder qcom,smem-state-names = "ipa-clock-enabled-valid", 704f11d3e7dSAlex Elder "ipa-clock-enabled"; 705f11d3e7dSAlex Elder 706f11d3e7dSAlex Elder status = "disabled"; 707f11d3e7dSAlex Elder }; 708f11d3e7dSAlex Elder 709b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 710b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 711b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 712b7e8f433SVinod Koul #hwlock-cells = <1>; 713b7e8f433SVinod Koul }; 714b7e8f433SVinod Koul 715177fcf0aSVinod Koul mpss: remoteproc@4080000 { 716177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 717177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 718177fcf0aSVinod Koul 719177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 720177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 721177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 722177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 723177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 724177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 725177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 726177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 727177fcf0aSVinod Koul 728177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 729177fcf0aSVinod Koul clock-names = "xo"; 730177fcf0aSVinod Koul 731177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, 732177fcf0aSVinod Koul <&rpmhpd 0>, 733177fcf0aSVinod Koul <&rpmhpd 12>; 734177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mss"; 735177fcf0aSVinod Koul 73684c856d0SVinod Koul interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; 737da6b2482SVinod Koul 738177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 739177fcf0aSVinod Koul 740177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 741177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 742177fcf0aSVinod Koul 743177fcf0aSVinod Koul status = "disabled"; 744177fcf0aSVinod Koul 745177fcf0aSVinod Koul glink-edge { 746177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 747177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 748177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 749177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 750177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 751177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 752177fcf0aSVinod Koul label = "modem"; 753177fcf0aSVinod Koul qcom,remote-pid = <1>; 754177fcf0aSVinod Koul }; 755177fcf0aSVinod Koul }; 756177fcf0aSVinod Koul 757b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 758b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 759b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 760b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 761b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 762b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 763b7e8f433SVinod Koul <156 716 12>; 764b7e8f433SVinod Koul #interrupt-cells = <2>; 765b7e8f433SVinod Koul interrupt-parent = <&intc>; 766b7e8f433SVinod Koul interrupt-controller; 767b7e8f433SVinod Koul }; 768b7e8f433SVinod Koul 7691dee9e3bSVinod Koul tsens0: thermal-sensor@c263000 { 77020f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 77120f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 77220f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 77320f9d94eSRobert Foss #qcom,sensors = <15>; 77420f9d94eSRobert Foss interrupts = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 77520f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 77620f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 77720f9d94eSRobert Foss #thermal-sensor-cells = <1>; 77820f9d94eSRobert Foss }; 77920f9d94eSRobert Foss 7801dee9e3bSVinod Koul tsens1: thermal-sensor@c265000 { 78120f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 78220f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 78320f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 78420f9d94eSRobert Foss #qcom,sensors = <14>; 78520f9d94eSRobert Foss interrupts = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 78620f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 78720f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 78820f9d94eSRobert Foss #thermal-sensor-cells = <1>; 78920f9d94eSRobert Foss }; 79020f9d94eSRobert Foss 79197832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 792b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 793b7e8f433SVinod Koul reg = <0 0x0c300000 0 0x100000>; 794b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 795b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 796b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 797b7e8f433SVinod Koul 798b7e8f433SVinod Koul #clock-cells = <0>; 799b7e8f433SVinod Koul #power-domain-cells = <1>; 800b7e8f433SVinod Koul }; 801b7e8f433SVinod Koul 802389cd7acSVinod Koul spmi_bus: spmi@c440000 { 803389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 804389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 805389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 806389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 807389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 808389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 809389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 810389cd7acSVinod Koul interrupt-names = "periph_irq"; 811389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 812389cd7acSVinod Koul qcom,ee = <0>; 813389cd7acSVinod Koul qcom,channel = <0>; 814389cd7acSVinod Koul #address-cells = <2>; 815389cd7acSVinod Koul #size-cells = <0>; 816389cd7acSVinod Koul interrupt-controller; 817389cd7acSVinod Koul #interrupt-cells = <4>; 818389cd7acSVinod Koul }; 819389cd7acSVinod Koul 820b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 821b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 822b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 823b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 824b7e8f433SVinod Koul gpio-controller; 825b7e8f433SVinod Koul #gpio-cells = <2>; 826b7e8f433SVinod Koul interrupt-controller; 827b7e8f433SVinod Koul #interrupt-cells = <2>; 82879015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 82967146f07SBjorn Andersson wakeup-parent = <&pdc>; 830b7e8f433SVinod Koul 831b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 832b7e8f433SVinod Koul rx { 833b7e8f433SVinod Koul pins = "gpio18"; 834b7e8f433SVinod Koul function = "qup3"; 835b7e8f433SVinod Koul }; 836b7e8f433SVinod Koul tx { 837b7e8f433SVinod Koul pins = "gpio19"; 838b7e8f433SVinod Koul function = "qup3"; 839b7e8f433SVinod Koul }; 840b7e8f433SVinod Koul }; 841*06bf656eSJonathan Marek 842*06bf656eSJonathan Marek qup_i2c13_default_state: qup-i2c13-default-state { 843*06bf656eSJonathan Marek mux { 844*06bf656eSJonathan Marek pins = "gpio0", "gpio1"; 845*06bf656eSJonathan Marek function = "qup13"; 846*06bf656eSJonathan Marek }; 847*06bf656eSJonathan Marek 848*06bf656eSJonathan Marek config { 849*06bf656eSJonathan Marek pins = "gpio0", "gpio1"; 850*06bf656eSJonathan Marek drive-strength = <2>; 851*06bf656eSJonathan Marek bias-pull-up; 852*06bf656eSJonathan Marek }; 853*06bf656eSJonathan Marek }; 854b7e8f433SVinod Koul }; 855b7e8f433SVinod Koul 85624e3eb2eSRobert Foss rng: rng@10d3000 { 85724e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 85824e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 85924e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 86024e3eb2eSRobert Foss clock-names = "core"; 86124e3eb2eSRobert Foss }; 86224e3eb2eSRobert Foss 863b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 864b7e8f433SVinod Koul compatible = "arm,gic-v3"; 865b7e8f433SVinod Koul #interrupt-cells = <3>; 866b7e8f433SVinod Koul interrupt-controller; 867b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 868b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 869b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 870b7e8f433SVinod Koul }; 871b7e8f433SVinod Koul 872b7e8f433SVinod Koul timer@17c20000 { 873b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 874b7e8f433SVinod Koul #address-cells = <2>; 875b7e8f433SVinod Koul #size-cells = <2>; 876b7e8f433SVinod Koul ranges; 877b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 878b7e8f433SVinod Koul clock-frequency = <19200000>; 879b7e8f433SVinod Koul 880b7e8f433SVinod Koul frame@17c21000 { 881b7e8f433SVinod Koul frame-number = <0>; 882b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 883b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 884b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 885b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 886b7e8f433SVinod Koul }; 887b7e8f433SVinod Koul 888b7e8f433SVinod Koul frame@17c23000 { 889b7e8f433SVinod Koul frame-number = <1>; 890b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 891b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 892b7e8f433SVinod Koul status = "disabled"; 893b7e8f433SVinod Koul }; 894b7e8f433SVinod Koul 895b7e8f433SVinod Koul frame@17c25000 { 896b7e8f433SVinod Koul frame-number = <2>; 897b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 898b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 899b7e8f433SVinod Koul status = "disabled"; 900b7e8f433SVinod Koul }; 901b7e8f433SVinod Koul 902b7e8f433SVinod Koul frame@17c27000 { 903b7e8f433SVinod Koul frame-number = <3>; 904b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 905b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 906b7e8f433SVinod Koul status = "disabled"; 907b7e8f433SVinod Koul }; 908b7e8f433SVinod Koul 909b7e8f433SVinod Koul frame@17c29000 { 910b7e8f433SVinod Koul frame-number = <4>; 911b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 912b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 913b7e8f433SVinod Koul status = "disabled"; 914b7e8f433SVinod Koul }; 915b7e8f433SVinod Koul 916b7e8f433SVinod Koul frame@17c2b000 { 917b7e8f433SVinod Koul frame-number = <5>; 918b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 919b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 920b7e8f433SVinod Koul status = "disabled"; 921b7e8f433SVinod Koul }; 922b7e8f433SVinod Koul 923b7e8f433SVinod Koul frame@17c2d000 { 924b7e8f433SVinod Koul frame-number = <6>; 925b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 926b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 927b7e8f433SVinod Koul status = "disabled"; 928b7e8f433SVinod Koul }; 929b7e8f433SVinod Koul }; 930b7e8f433SVinod Koul 931b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 932b7e8f433SVinod Koul label = "apps_rsc"; 933b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 934b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 935b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 936b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 937b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 938b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 939b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 940b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 941b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 942b7e8f433SVinod Koul qcom,drv-id = <2>; 943b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 944b7e8f433SVinod Koul <WAKE_TCS 3>, <CONTROL_TCS 1>; 945b7e8f433SVinod Koul 946b7e8f433SVinod Koul rpmhcc: clock-controller { 947b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 948b7e8f433SVinod Koul #clock-cells = <1>; 949b7e8f433SVinod Koul clock-names = "xo"; 950b7e8f433SVinod Koul clocks = <&xo_board>; 951b7e8f433SVinod Koul }; 952b7e8f433SVinod Koul 95390f57509SVinod Koul rpmhpd: power-controller { 95490f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 95590f57509SVinod Koul #power-domain-cells = <1>; 95690f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 95790f57509SVinod Koul 95890f57509SVinod Koul rpmhpd_opp_table: opp-table { 95990f57509SVinod Koul compatible = "operating-points-v2"; 96090f57509SVinod Koul 96190f57509SVinod Koul rpmhpd_opp_ret: opp1 { 96290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 96390f57509SVinod Koul }; 96490f57509SVinod Koul 96590f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 96690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 96790f57509SVinod Koul }; 96890f57509SVinod Koul 96990f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 97090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 97190f57509SVinod Koul }; 97290f57509SVinod Koul 97390f57509SVinod Koul rpmhpd_opp_svs: opp4 { 97490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 97590f57509SVinod Koul }; 97690f57509SVinod Koul 97790f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 97890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 97990f57509SVinod Koul }; 98090f57509SVinod Koul 98190f57509SVinod Koul rpmhpd_opp_nom: opp6 { 98290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 98390f57509SVinod Koul }; 98490f57509SVinod Koul 98590f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 98690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 98790f57509SVinod Koul }; 98890f57509SVinod Koul 98990f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 99090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 99190f57509SVinod Koul }; 99290f57509SVinod Koul 99390f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 99490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 99590f57509SVinod Koul }; 99690f57509SVinod Koul 99790f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 99890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 99990f57509SVinod Koul }; 100090f57509SVinod Koul }; 100190f57509SVinod Koul }; 1002da6b2482SVinod Koul 1003da6b2482SVinod Koul apps_bcm_voter: bcm_voter { 1004da6b2482SVinod Koul compatible = "qcom,bcm-voter"; 1005da6b2482SVinod Koul }; 1006b7e8f433SVinod Koul }; 1007e780fb31SJack Pham 1008ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 1009ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 1010ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 1011ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 1012ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 1013ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 1014ccbb3abbSVinod Koul 1015ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 1016ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 1017ccbb3abbSVinod Koul 1018ccbb3abbSVinod Koul #freq-domain-cells = <1>; 1019ccbb3abbSVinod Koul }; 1020ccbb3abbSVinod Koul 102159c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 102259c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 102359c7cf81SVinod Koul "jedec,ufs-2.0"; 102459c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 102559c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 102659c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 102759c7cf81SVinod Koul phy-names = "ufsphy"; 102859c7cf81SVinod Koul lanes-per-direction = <2>; 102959c7cf81SVinod Koul #reset-cells = <1>; 10306d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 103159c7cf81SVinod Koul reset-names = "rst"; 103259c7cf81SVinod Koul 10336d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 103459c7cf81SVinod Koul 103559c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 103659c7cf81SVinod Koul 103759c7cf81SVinod Koul clock-names = 103859c7cf81SVinod Koul "ref_clk", 103959c7cf81SVinod Koul "core_clk", 104059c7cf81SVinod Koul "bus_aggr_clk", 104159c7cf81SVinod Koul "iface_clk", 104259c7cf81SVinod Koul "core_clk_unipro", 104359c7cf81SVinod Koul "ref_clk", 104459c7cf81SVinod Koul "tx_lane0_sync_clk", 104559c7cf81SVinod Koul "rx_lane0_sync_clk", 104659c7cf81SVinod Koul "rx_lane1_sync_clk"; 104759c7cf81SVinod Koul clocks = 104859c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 10496d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 10506d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 10516d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 10526d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 105359c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 10546d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 10556d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 10566d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 105759c7cf81SVinod Koul freq-table-hz = 105859c7cf81SVinod Koul <75000000 300000000>, 105959c7cf81SVinod Koul <75000000 300000000>, 106059c7cf81SVinod Koul <0 0>, 106159c7cf81SVinod Koul <0 0>, 106259c7cf81SVinod Koul <75000000 300000000>, 106359c7cf81SVinod Koul <0 0>, 106459c7cf81SVinod Koul <0 0>, 106559c7cf81SVinod Koul <75000000 300000000>, 106659c7cf81SVinod Koul <75000000 300000000>; 106759c7cf81SVinod Koul status = "disabled"; 106859c7cf81SVinod Koul }; 106959c7cf81SVinod Koul 107059c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 107159c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 107259c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 107359c7cf81SVinod Koul #address-cells = <2>; 107459c7cf81SVinod Koul #size-cells = <2>; 107559c7cf81SVinod Koul #clock-cells = <1>; 107659c7cf81SVinod Koul ranges; 107759c7cf81SVinod Koul clock-names = "ref", 107859c7cf81SVinod Koul "ref_aux"; 107959c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 10806d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 108159c7cf81SVinod Koul 108259c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 108359c7cf81SVinod Koul reset-names = "ufsphy"; 108459c7cf81SVinod Koul status = "disabled"; 108559c7cf81SVinod Koul 108659c7cf81SVinod Koul ufs_mem_phy_lanes: lanes@1d87400 { 108759c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 108859c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 108959c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 109059c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 109159c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 109259c7cf81SVinod Koul #phy-cells = <0>; 109359c7cf81SVinod Koul #clock-cells = <0>; 109459c7cf81SVinod Koul }; 109559c7cf81SVinod Koul }; 109659c7cf81SVinod Koul 1097177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 1098177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 1099177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 1100177fcf0aSVinod Koul 1101177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 1102177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 1103177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 1104177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 1105177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 1106177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1107177fcf0aSVinod Koul "handover", "stop-ack"; 1108177fcf0aSVinod Koul 1109177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1110177fcf0aSVinod Koul clock-names = "xo"; 1111177fcf0aSVinod Koul 1112177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 1113177fcf0aSVinod Koul <&rpmhpd 4>, 1114177fcf0aSVinod Koul <&rpmhpd 5>; 1115177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1116177fcf0aSVinod Koul 1117177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 1118177fcf0aSVinod Koul 1119177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 1120177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1121177fcf0aSVinod Koul 1122177fcf0aSVinod Koul status = "disabled"; 1123177fcf0aSVinod Koul 1124177fcf0aSVinod Koul glink-edge { 1125177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 1126177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1127177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1128177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 1129177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1130177fcf0aSVinod Koul 1131177fcf0aSVinod Koul label = "slpi"; 1132177fcf0aSVinod Koul qcom,remote-pid = <3>; 1133177fcf0aSVinod Koul 1134177fcf0aSVinod Koul }; 1135177fcf0aSVinod Koul }; 1136177fcf0aSVinod Koul 1137177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 1138177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 1139177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 1140177fcf0aSVinod Koul 1141177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 1142177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 1143177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 1144177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 1145177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 1146177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1147177fcf0aSVinod Koul "handover", "stop-ack"; 1148177fcf0aSVinod Koul 1149177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1150177fcf0aSVinod Koul clock-names = "xo"; 1151177fcf0aSVinod Koul 1152177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 1153177fcf0aSVinod Koul <&rpmhpd 0>, 1154177fcf0aSVinod Koul <&rpmhpd 10>; 1155177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mxc"; 1156177fcf0aSVinod Koul 115784c856d0SVinod Koul interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; 1158da6b2482SVinod Koul 1159177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 1160177fcf0aSVinod Koul 1161177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 1162177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1163177fcf0aSVinod Koul 1164177fcf0aSVinod Koul status = "disabled"; 1165177fcf0aSVinod Koul 1166177fcf0aSVinod Koul glink-edge { 1167177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 1168177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1169177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1170177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 1171177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1172177fcf0aSVinod Koul 1173177fcf0aSVinod Koul label = "cdsp"; 1174177fcf0aSVinod Koul qcom,remote-pid = <5>; 1175177fcf0aSVinod Koul }; 1176177fcf0aSVinod Koul }; 1177177fcf0aSVinod Koul 1178e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 1179e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 1180e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1181e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 1182e780fb31SJack Pham status = "disabled"; 1183e780fb31SJack Pham #phy-cells = <0>; 1184e780fb31SJack Pham 1185e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1186e780fb31SJack Pham clock-names = "ref"; 1187e780fb31SJack Pham 11886d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 1189e780fb31SJack Pham }; 1190e780fb31SJack Pham 1191e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 1192e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 1193e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1194e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 1195e780fb31SJack Pham status = "disabled"; 1196e780fb31SJack Pham #phy-cells = <0>; 1197e780fb31SJack Pham 1198e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1199e780fb31SJack Pham clock-names = "ref"; 1200e780fb31SJack Pham 12016d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 1202e780fb31SJack Pham }; 1203e780fb31SJack Pham 1204e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 1205e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 1206e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 1207e780fb31SJack Pham <0 0x088e8000 0 0x20>; 1208e780fb31SJack Pham reg-names = "reg-base", "dp_com"; 1209e780fb31SJack Pham status = "disabled"; 1210e780fb31SJack Pham #clock-cells = <1>; 1211e780fb31SJack Pham #address-cells = <2>; 1212e780fb31SJack Pham #size-cells = <2>; 1213e780fb31SJack Pham ranges; 1214e780fb31SJack Pham 12156d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 1216e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 12176d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 1218e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 1219e780fb31SJack Pham 12206d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 12216d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 1222e780fb31SJack Pham reset-names = "phy", "common"; 1223e780fb31SJack Pham 1224e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 1225e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 1226e780fb31SJack Pham <0 0x088e9400 0 0x200>, 1227e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 1228e780fb31SJack Pham <0 0x088e9600 0 0x200>, 1229e780fb31SJack Pham <0 0x088e9800 0 0x200>, 1230e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 1231e780fb31SJack Pham #phy-cells = <0>; 1232e780fb31SJack Pham #clock-cells = <1>; 12336d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 1234e780fb31SJack Pham clock-names = "pipe0"; 1235e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 1236e780fb31SJack Pham }; 1237e780fb31SJack Pham }; 1238e780fb31SJack Pham 1239e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 1240e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 1241e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 1242e780fb31SJack Pham status = "disabled"; 1243e780fb31SJack Pham #clock-cells = <1>; 1244e780fb31SJack Pham #address-cells = <2>; 1245e780fb31SJack Pham #size-cells = <2>; 1246e780fb31SJack Pham ranges; 1247e780fb31SJack Pham 12486d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 1249e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 12506d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 12516d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 1252e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 1253e780fb31SJack Pham 12546d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 12556d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 1256e780fb31SJack Pham reset-names = "phy", "common"; 1257e780fb31SJack Pham 1258e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 1259e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 1260e780fb31SJack Pham <0 0x088ec000 0 0x200>, 1261e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 1262e780fb31SJack Pham #phy-cells = <0>; 1263e780fb31SJack Pham #clock-cells = <1>; 12646d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 1265e780fb31SJack Pham clock-names = "pipe0"; 1266e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 1267e780fb31SJack Pham }; 1268e780fb31SJack Pham }; 1269e780fb31SJack Pham 12701dee9e3bSVinod Koul dc_noc: interconnect@90c0000 { 1271da6b2482SVinod Koul compatible = "qcom,sm8350-dc-noc"; 1272da6b2482SVinod Koul reg = <0 0x090c0000 0 0x4200>; 1273da6b2482SVinod Koul #interconnect-cells = <1>; 1274da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1275da6b2482SVinod Koul }; 1276da6b2482SVinod Koul 1277da6b2482SVinod Koul gem_noc: interconnect@9100000 { 1278da6b2482SVinod Koul compatible = "qcom,sm8350-gem-noc"; 1279da6b2482SVinod Koul reg = <0 0x09100000 0 0xb4000>; 1280da6b2482SVinod Koul #interconnect-cells = <1>; 1281da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1282da6b2482SVinod Koul }; 1283da6b2482SVinod Koul 1284e780fb31SJack Pham usb_1: usb@a6f8800 { 1285e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1286e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 1287e780fb31SJack Pham status = "disabled"; 1288e780fb31SJack Pham #address-cells = <2>; 1289e780fb31SJack Pham #size-cells = <2>; 1290e780fb31SJack Pham ranges; 1291e780fb31SJack Pham 12926d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 12936d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 12946d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 12956d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 12966d91e201SVinod Koul <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 1297e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1298e780fb31SJack Pham "sleep"; 1299e780fb31SJack Pham 13006d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 13016d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1302e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1303e780fb31SJack Pham 1304e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 1305e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 1306e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 1307e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 1308e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1309e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1310e780fb31SJack Pham 13116d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 1312e780fb31SJack Pham 13136d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 1314e780fb31SJack Pham 13152aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 1316e780fb31SJack Pham compatible = "snps,dwc3"; 1317e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 1318e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 1319e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 1320e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1321e780fb31SJack Pham snps,dis_enblslpm_quirk; 1322e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 1323e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1324e780fb31SJack Pham }; 1325e780fb31SJack Pham }; 1326e780fb31SJack Pham 1327e780fb31SJack Pham usb_2: usb@a8f8800 { 1328e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1329e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 1330e780fb31SJack Pham status = "disabled"; 1331e780fb31SJack Pham #address-cells = <2>; 1332e780fb31SJack Pham #size-cells = <2>; 1333e780fb31SJack Pham ranges; 1334e780fb31SJack Pham 13356d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 13366d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 13376d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 13386d91e201SVinod Koul <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 13396d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 13406d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 1341e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1342e780fb31SJack Pham "sleep", "xo"; 1343e780fb31SJack Pham 13446d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 13456d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 1346e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1347e780fb31SJack Pham 1348e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 1349e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 1350e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 1351e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 1352e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1353e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1354e780fb31SJack Pham 13556d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 1356e780fb31SJack Pham 13576d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 1358e780fb31SJack Pham 13592aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 1360e780fb31SJack Pham compatible = "snps,dwc3"; 1361e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 1362e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 1363e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 1364e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1365e780fb31SJack Pham snps,dis_enblslpm_quirk; 1366e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 1367e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1368e780fb31SJack Pham }; 1369e780fb31SJack Pham }; 1370177fcf0aSVinod Koul 1371177fcf0aSVinod Koul adsp: remoteproc@17300000 { 1372177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 1373177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 1374177fcf0aSVinod Koul 1375177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 1376177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 1377177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 1378177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 1379177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 1380177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1381177fcf0aSVinod Koul "handover", "stop-ack"; 1382177fcf0aSVinod Koul 1383177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1384177fcf0aSVinod Koul clock-names = "xo"; 1385177fcf0aSVinod Koul 1386177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 1387177fcf0aSVinod Koul <&rpmhpd 4>, 1388177fcf0aSVinod Koul <&rpmhpd 5>; 1389177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1390177fcf0aSVinod Koul 1391177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 1392177fcf0aSVinod Koul 1393177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 1394177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1395177fcf0aSVinod Koul 1396177fcf0aSVinod Koul status = "disabled"; 1397177fcf0aSVinod Koul 1398177fcf0aSVinod Koul glink-edge { 1399177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 1400177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1401177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1402177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 1403177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1404177fcf0aSVinod Koul 1405177fcf0aSVinod Koul label = "lpass"; 1406177fcf0aSVinod Koul qcom,remote-pid = <2>; 1407177fcf0aSVinod Koul }; 1408177fcf0aSVinod Koul }; 1409b7e8f433SVinod Koul }; 1410b7e8f433SVinod Koul 14114dcaa68eSsatya priya thermal_zones: thermal-zones { 141220f9d94eSRobert Foss cpu0-thermal { 141320f9d94eSRobert Foss polling-delay-passive = <250>; 141420f9d94eSRobert Foss polling-delay = <1000>; 141520f9d94eSRobert Foss 141620f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 141720f9d94eSRobert Foss 141820f9d94eSRobert Foss trips { 141920f9d94eSRobert Foss cpu0_alert0: trip-point0 { 142020f9d94eSRobert Foss temperature = <90000>; 142120f9d94eSRobert Foss hysteresis = <2000>; 142220f9d94eSRobert Foss type = "passive"; 142320f9d94eSRobert Foss }; 142420f9d94eSRobert Foss 142520f9d94eSRobert Foss cpu0_alert1: trip-point1 { 142620f9d94eSRobert Foss temperature = <95000>; 142720f9d94eSRobert Foss hysteresis = <2000>; 142820f9d94eSRobert Foss type = "passive"; 142920f9d94eSRobert Foss }; 143020f9d94eSRobert Foss 143120f9d94eSRobert Foss cpu0_crit: cpu_crit { 143220f9d94eSRobert Foss temperature = <110000>; 143320f9d94eSRobert Foss hysteresis = <1000>; 143420f9d94eSRobert Foss type = "critical"; 143520f9d94eSRobert Foss }; 143620f9d94eSRobert Foss }; 143720f9d94eSRobert Foss 143820f9d94eSRobert Foss cooling-maps { 143920f9d94eSRobert Foss map0 { 144020f9d94eSRobert Foss trip = <&cpu0_alert0>; 144120f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144220f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144320f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144420f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 144520f9d94eSRobert Foss }; 144620f9d94eSRobert Foss map1 { 144720f9d94eSRobert Foss trip = <&cpu0_alert1>; 144820f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144920f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145020f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145120f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 145220f9d94eSRobert Foss }; 145320f9d94eSRobert Foss }; 145420f9d94eSRobert Foss }; 145520f9d94eSRobert Foss 145620f9d94eSRobert Foss cpu1-thermal { 145720f9d94eSRobert Foss polling-delay-passive = <250>; 145820f9d94eSRobert Foss polling-delay = <1000>; 145920f9d94eSRobert Foss 146020f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 146120f9d94eSRobert Foss 146220f9d94eSRobert Foss trips { 146320f9d94eSRobert Foss cpu1_alert0: trip-point0 { 146420f9d94eSRobert Foss temperature = <90000>; 146520f9d94eSRobert Foss hysteresis = <2000>; 146620f9d94eSRobert Foss type = "passive"; 146720f9d94eSRobert Foss }; 146820f9d94eSRobert Foss 146920f9d94eSRobert Foss cpu1_alert1: trip-point1 { 147020f9d94eSRobert Foss temperature = <95000>; 147120f9d94eSRobert Foss hysteresis = <2000>; 147220f9d94eSRobert Foss type = "passive"; 147320f9d94eSRobert Foss }; 147420f9d94eSRobert Foss 147520f9d94eSRobert Foss cpu1_crit: cpu_crit { 147620f9d94eSRobert Foss temperature = <110000>; 147720f9d94eSRobert Foss hysteresis = <1000>; 147820f9d94eSRobert Foss type = "critical"; 147920f9d94eSRobert Foss }; 148020f9d94eSRobert Foss }; 148120f9d94eSRobert Foss 148220f9d94eSRobert Foss cooling-maps { 148320f9d94eSRobert Foss map0 { 148420f9d94eSRobert Foss trip = <&cpu1_alert0>; 148520f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 148620f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 148720f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 148820f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 148920f9d94eSRobert Foss }; 149020f9d94eSRobert Foss map1 { 149120f9d94eSRobert Foss trip = <&cpu1_alert1>; 149220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 149620f9d94eSRobert Foss }; 149720f9d94eSRobert Foss }; 149820f9d94eSRobert Foss }; 149920f9d94eSRobert Foss 150020f9d94eSRobert Foss cpu2-thermal { 150120f9d94eSRobert Foss polling-delay-passive = <250>; 150220f9d94eSRobert Foss polling-delay = <1000>; 150320f9d94eSRobert Foss 150420f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 150520f9d94eSRobert Foss 150620f9d94eSRobert Foss trips { 150720f9d94eSRobert Foss cpu2_alert0: trip-point0 { 150820f9d94eSRobert Foss temperature = <90000>; 150920f9d94eSRobert Foss hysteresis = <2000>; 151020f9d94eSRobert Foss type = "passive"; 151120f9d94eSRobert Foss }; 151220f9d94eSRobert Foss 151320f9d94eSRobert Foss cpu2_alert1: trip-point1 { 151420f9d94eSRobert Foss temperature = <95000>; 151520f9d94eSRobert Foss hysteresis = <2000>; 151620f9d94eSRobert Foss type = "passive"; 151720f9d94eSRobert Foss }; 151820f9d94eSRobert Foss 151920f9d94eSRobert Foss cpu2_crit: cpu_crit { 152020f9d94eSRobert Foss temperature = <110000>; 152120f9d94eSRobert Foss hysteresis = <1000>; 152220f9d94eSRobert Foss type = "critical"; 152320f9d94eSRobert Foss }; 152420f9d94eSRobert Foss }; 152520f9d94eSRobert Foss 152620f9d94eSRobert Foss cooling-maps { 152720f9d94eSRobert Foss map0 { 152820f9d94eSRobert Foss trip = <&cpu2_alert0>; 152920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 153320f9d94eSRobert Foss }; 153420f9d94eSRobert Foss map1 { 153520f9d94eSRobert Foss trip = <&cpu2_alert1>; 153620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 154020f9d94eSRobert Foss }; 154120f9d94eSRobert Foss }; 154220f9d94eSRobert Foss }; 154320f9d94eSRobert Foss 154420f9d94eSRobert Foss cpu3-thermal { 154520f9d94eSRobert Foss polling-delay-passive = <250>; 154620f9d94eSRobert Foss polling-delay = <1000>; 154720f9d94eSRobert Foss 154820f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 154920f9d94eSRobert Foss 155020f9d94eSRobert Foss trips { 155120f9d94eSRobert Foss cpu3_alert0: trip-point0 { 155220f9d94eSRobert Foss temperature = <90000>; 155320f9d94eSRobert Foss hysteresis = <2000>; 155420f9d94eSRobert Foss type = "passive"; 155520f9d94eSRobert Foss }; 155620f9d94eSRobert Foss 155720f9d94eSRobert Foss cpu3_alert1: trip-point1 { 155820f9d94eSRobert Foss temperature = <95000>; 155920f9d94eSRobert Foss hysteresis = <2000>; 156020f9d94eSRobert Foss type = "passive"; 156120f9d94eSRobert Foss }; 156220f9d94eSRobert Foss 156320f9d94eSRobert Foss cpu3_crit: cpu_crit { 156420f9d94eSRobert Foss temperature = <110000>; 156520f9d94eSRobert Foss hysteresis = <1000>; 156620f9d94eSRobert Foss type = "critical"; 156720f9d94eSRobert Foss }; 156820f9d94eSRobert Foss }; 156920f9d94eSRobert Foss 157020f9d94eSRobert Foss cooling-maps { 157120f9d94eSRobert Foss map0 { 157220f9d94eSRobert Foss trip = <&cpu3_alert0>; 157320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 157420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 157520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 157620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 157720f9d94eSRobert Foss }; 157820f9d94eSRobert Foss map1 { 157920f9d94eSRobert Foss trip = <&cpu3_alert1>; 158020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 158420f9d94eSRobert Foss }; 158520f9d94eSRobert Foss }; 158620f9d94eSRobert Foss }; 158720f9d94eSRobert Foss 158820f9d94eSRobert Foss cpu4-top-thermal { 158920f9d94eSRobert Foss polling-delay-passive = <250>; 159020f9d94eSRobert Foss polling-delay = <1000>; 159120f9d94eSRobert Foss 159220f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 159320f9d94eSRobert Foss 159420f9d94eSRobert Foss trips { 159520f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 159620f9d94eSRobert Foss temperature = <90000>; 159720f9d94eSRobert Foss hysteresis = <2000>; 159820f9d94eSRobert Foss type = "passive"; 159920f9d94eSRobert Foss }; 160020f9d94eSRobert Foss 160120f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 160220f9d94eSRobert Foss temperature = <95000>; 160320f9d94eSRobert Foss hysteresis = <2000>; 160420f9d94eSRobert Foss type = "passive"; 160520f9d94eSRobert Foss }; 160620f9d94eSRobert Foss 160720f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 160820f9d94eSRobert Foss temperature = <110000>; 160920f9d94eSRobert Foss hysteresis = <1000>; 161020f9d94eSRobert Foss type = "critical"; 161120f9d94eSRobert Foss }; 161220f9d94eSRobert Foss }; 161320f9d94eSRobert Foss 161420f9d94eSRobert Foss cooling-maps { 161520f9d94eSRobert Foss map0 { 161620f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 161720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 161820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 161920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 162120f9d94eSRobert Foss }; 162220f9d94eSRobert Foss map1 { 162320f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 162420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 162820f9d94eSRobert Foss }; 162920f9d94eSRobert Foss }; 163020f9d94eSRobert Foss }; 163120f9d94eSRobert Foss 163220f9d94eSRobert Foss cpu5-top-thermal { 163320f9d94eSRobert Foss polling-delay-passive = <250>; 163420f9d94eSRobert Foss polling-delay = <1000>; 163520f9d94eSRobert Foss 163620f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 163720f9d94eSRobert Foss 163820f9d94eSRobert Foss trips { 163920f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 164020f9d94eSRobert Foss temperature = <90000>; 164120f9d94eSRobert Foss hysteresis = <2000>; 164220f9d94eSRobert Foss type = "passive"; 164320f9d94eSRobert Foss }; 164420f9d94eSRobert Foss 164520f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 164620f9d94eSRobert Foss temperature = <95000>; 164720f9d94eSRobert Foss hysteresis = <2000>; 164820f9d94eSRobert Foss type = "passive"; 164920f9d94eSRobert Foss }; 165020f9d94eSRobert Foss 165120f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 165220f9d94eSRobert Foss temperature = <110000>; 165320f9d94eSRobert Foss hysteresis = <1000>; 165420f9d94eSRobert Foss type = "critical"; 165520f9d94eSRobert Foss }; 165620f9d94eSRobert Foss }; 165720f9d94eSRobert Foss 165820f9d94eSRobert Foss cooling-maps { 165920f9d94eSRobert Foss map0 { 166020f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 166120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 166520f9d94eSRobert Foss }; 166620f9d94eSRobert Foss map1 { 166720f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 166820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 167220f9d94eSRobert Foss }; 167320f9d94eSRobert Foss }; 167420f9d94eSRobert Foss }; 167520f9d94eSRobert Foss 167620f9d94eSRobert Foss cpu6-top-thermal { 167720f9d94eSRobert Foss polling-delay-passive = <250>; 167820f9d94eSRobert Foss polling-delay = <1000>; 167920f9d94eSRobert Foss 168020f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 168120f9d94eSRobert Foss 168220f9d94eSRobert Foss trips { 168320f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 168420f9d94eSRobert Foss temperature = <90000>; 168520f9d94eSRobert Foss hysteresis = <2000>; 168620f9d94eSRobert Foss type = "passive"; 168720f9d94eSRobert Foss }; 168820f9d94eSRobert Foss 168920f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 169020f9d94eSRobert Foss temperature = <95000>; 169120f9d94eSRobert Foss hysteresis = <2000>; 169220f9d94eSRobert Foss type = "passive"; 169320f9d94eSRobert Foss }; 169420f9d94eSRobert Foss 169520f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 169620f9d94eSRobert Foss temperature = <110000>; 169720f9d94eSRobert Foss hysteresis = <1000>; 169820f9d94eSRobert Foss type = "critical"; 169920f9d94eSRobert Foss }; 170020f9d94eSRobert Foss }; 170120f9d94eSRobert Foss 170220f9d94eSRobert Foss cooling-maps { 170320f9d94eSRobert Foss map0 { 170420f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 170520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 170620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 170720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 170820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 170920f9d94eSRobert Foss }; 171020f9d94eSRobert Foss map1 { 171120f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 171220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 171620f9d94eSRobert Foss }; 171720f9d94eSRobert Foss }; 171820f9d94eSRobert Foss }; 171920f9d94eSRobert Foss 172020f9d94eSRobert Foss cpu7-top-thermal { 172120f9d94eSRobert Foss polling-delay-passive = <250>; 172220f9d94eSRobert Foss polling-delay = <1000>; 172320f9d94eSRobert Foss 172420f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 172520f9d94eSRobert Foss 172620f9d94eSRobert Foss trips { 172720f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 172820f9d94eSRobert Foss temperature = <90000>; 172920f9d94eSRobert Foss hysteresis = <2000>; 173020f9d94eSRobert Foss type = "passive"; 173120f9d94eSRobert Foss }; 173220f9d94eSRobert Foss 173320f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 173420f9d94eSRobert Foss temperature = <95000>; 173520f9d94eSRobert Foss hysteresis = <2000>; 173620f9d94eSRobert Foss type = "passive"; 173720f9d94eSRobert Foss }; 173820f9d94eSRobert Foss 173920f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 174020f9d94eSRobert Foss temperature = <110000>; 174120f9d94eSRobert Foss hysteresis = <1000>; 174220f9d94eSRobert Foss type = "critical"; 174320f9d94eSRobert Foss }; 174420f9d94eSRobert Foss }; 174520f9d94eSRobert Foss 174620f9d94eSRobert Foss cooling-maps { 174720f9d94eSRobert Foss map0 { 174820f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 174920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 175320f9d94eSRobert Foss }; 175420f9d94eSRobert Foss map1 { 175520f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 175620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 176020f9d94eSRobert Foss }; 176120f9d94eSRobert Foss }; 176220f9d94eSRobert Foss }; 176320f9d94eSRobert Foss 176420f9d94eSRobert Foss cpu4-bottom-thermal { 176520f9d94eSRobert Foss polling-delay-passive = <250>; 176620f9d94eSRobert Foss polling-delay = <1000>; 176720f9d94eSRobert Foss 176820f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 176920f9d94eSRobert Foss 177020f9d94eSRobert Foss trips { 177120f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 177220f9d94eSRobert Foss temperature = <90000>; 177320f9d94eSRobert Foss hysteresis = <2000>; 177420f9d94eSRobert Foss type = "passive"; 177520f9d94eSRobert Foss }; 177620f9d94eSRobert Foss 177720f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 177820f9d94eSRobert Foss temperature = <95000>; 177920f9d94eSRobert Foss hysteresis = <2000>; 178020f9d94eSRobert Foss type = "passive"; 178120f9d94eSRobert Foss }; 178220f9d94eSRobert Foss 178320f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 178420f9d94eSRobert Foss temperature = <110000>; 178520f9d94eSRobert Foss hysteresis = <1000>; 178620f9d94eSRobert Foss type = "critical"; 178720f9d94eSRobert Foss }; 178820f9d94eSRobert Foss }; 178920f9d94eSRobert Foss 179020f9d94eSRobert Foss cooling-maps { 179120f9d94eSRobert Foss map0 { 179220f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 179320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 179420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 179520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 179620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 179720f9d94eSRobert Foss }; 179820f9d94eSRobert Foss map1 { 179920f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 180020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 180420f9d94eSRobert Foss }; 180520f9d94eSRobert Foss }; 180620f9d94eSRobert Foss }; 180720f9d94eSRobert Foss 180820f9d94eSRobert Foss cpu5-bottom-thermal { 180920f9d94eSRobert Foss polling-delay-passive = <250>; 181020f9d94eSRobert Foss polling-delay = <1000>; 181120f9d94eSRobert Foss 181220f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 181320f9d94eSRobert Foss 181420f9d94eSRobert Foss trips { 181520f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 181620f9d94eSRobert Foss temperature = <90000>; 181720f9d94eSRobert Foss hysteresis = <2000>; 181820f9d94eSRobert Foss type = "passive"; 181920f9d94eSRobert Foss }; 182020f9d94eSRobert Foss 182120f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 182220f9d94eSRobert Foss temperature = <95000>; 182320f9d94eSRobert Foss hysteresis = <2000>; 182420f9d94eSRobert Foss type = "passive"; 182520f9d94eSRobert Foss }; 182620f9d94eSRobert Foss 182720f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 182820f9d94eSRobert Foss temperature = <110000>; 182920f9d94eSRobert Foss hysteresis = <1000>; 183020f9d94eSRobert Foss type = "critical"; 183120f9d94eSRobert Foss }; 183220f9d94eSRobert Foss }; 183320f9d94eSRobert Foss 183420f9d94eSRobert Foss cooling-maps { 183520f9d94eSRobert Foss map0 { 183620f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 183720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 183820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 183920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 184120f9d94eSRobert Foss }; 184220f9d94eSRobert Foss map1 { 184320f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 184420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 184820f9d94eSRobert Foss }; 184920f9d94eSRobert Foss }; 185020f9d94eSRobert Foss }; 185120f9d94eSRobert Foss 185220f9d94eSRobert Foss cpu6-bottom-thermal { 185320f9d94eSRobert Foss polling-delay-passive = <250>; 185420f9d94eSRobert Foss polling-delay = <1000>; 185520f9d94eSRobert Foss 185620f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 185720f9d94eSRobert Foss 185820f9d94eSRobert Foss trips { 185920f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 186020f9d94eSRobert Foss temperature = <90000>; 186120f9d94eSRobert Foss hysteresis = <2000>; 186220f9d94eSRobert Foss type = "passive"; 186320f9d94eSRobert Foss }; 186420f9d94eSRobert Foss 186520f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 186620f9d94eSRobert Foss temperature = <95000>; 186720f9d94eSRobert Foss hysteresis = <2000>; 186820f9d94eSRobert Foss type = "passive"; 186920f9d94eSRobert Foss }; 187020f9d94eSRobert Foss 187120f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 187220f9d94eSRobert Foss temperature = <110000>; 187320f9d94eSRobert Foss hysteresis = <1000>; 187420f9d94eSRobert Foss type = "critical"; 187520f9d94eSRobert Foss }; 187620f9d94eSRobert Foss }; 187720f9d94eSRobert Foss 187820f9d94eSRobert Foss cooling-maps { 187920f9d94eSRobert Foss map0 { 188020f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 188120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 188520f9d94eSRobert Foss }; 188620f9d94eSRobert Foss map1 { 188720f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 188820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 189020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 189120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 189220f9d94eSRobert Foss }; 189320f9d94eSRobert Foss }; 189420f9d94eSRobert Foss }; 189520f9d94eSRobert Foss 189620f9d94eSRobert Foss cpu7-bottom-thermal { 189720f9d94eSRobert Foss polling-delay-passive = <250>; 189820f9d94eSRobert Foss polling-delay = <1000>; 189920f9d94eSRobert Foss 190020f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 190120f9d94eSRobert Foss 190220f9d94eSRobert Foss trips { 190320f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 190420f9d94eSRobert Foss temperature = <90000>; 190520f9d94eSRobert Foss hysteresis = <2000>; 190620f9d94eSRobert Foss type = "passive"; 190720f9d94eSRobert Foss }; 190820f9d94eSRobert Foss 190920f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 191020f9d94eSRobert Foss temperature = <95000>; 191120f9d94eSRobert Foss hysteresis = <2000>; 191220f9d94eSRobert Foss type = "passive"; 191320f9d94eSRobert Foss }; 191420f9d94eSRobert Foss 191520f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 191620f9d94eSRobert Foss temperature = <110000>; 191720f9d94eSRobert Foss hysteresis = <1000>; 191820f9d94eSRobert Foss type = "critical"; 191920f9d94eSRobert Foss }; 192020f9d94eSRobert Foss }; 192120f9d94eSRobert Foss 192220f9d94eSRobert Foss cooling-maps { 192320f9d94eSRobert Foss map0 { 192420f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 192520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 192620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 192720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 192820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 192920f9d94eSRobert Foss }; 193020f9d94eSRobert Foss map1 { 193120f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 193220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 193320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 193420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 193520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 193620f9d94eSRobert Foss }; 193720f9d94eSRobert Foss }; 193820f9d94eSRobert Foss }; 193920f9d94eSRobert Foss 194020f9d94eSRobert Foss aoss0-thermal { 194120f9d94eSRobert Foss polling-delay-passive = <250>; 194220f9d94eSRobert Foss polling-delay = <1000>; 194320f9d94eSRobert Foss 194420f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 194520f9d94eSRobert Foss 194620f9d94eSRobert Foss trips { 194720f9d94eSRobert Foss aoss0_alert0: trip-point0 { 194820f9d94eSRobert Foss temperature = <90000>; 194920f9d94eSRobert Foss hysteresis = <2000>; 195020f9d94eSRobert Foss type = "hot"; 195120f9d94eSRobert Foss }; 195220f9d94eSRobert Foss }; 195320f9d94eSRobert Foss }; 195420f9d94eSRobert Foss 195520f9d94eSRobert Foss cluster0-thermal { 195620f9d94eSRobert Foss polling-delay-passive = <250>; 195720f9d94eSRobert Foss polling-delay = <1000>; 195820f9d94eSRobert Foss 195920f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 196020f9d94eSRobert Foss 196120f9d94eSRobert Foss trips { 196220f9d94eSRobert Foss cluster0_alert0: trip-point0 { 196320f9d94eSRobert Foss temperature = <90000>; 196420f9d94eSRobert Foss hysteresis = <2000>; 196520f9d94eSRobert Foss type = "hot"; 196620f9d94eSRobert Foss }; 196720f9d94eSRobert Foss cluster0_crit: cluster0_crit { 196820f9d94eSRobert Foss temperature = <110000>; 196920f9d94eSRobert Foss hysteresis = <2000>; 197020f9d94eSRobert Foss type = "critical"; 197120f9d94eSRobert Foss }; 197220f9d94eSRobert Foss }; 197320f9d94eSRobert Foss }; 197420f9d94eSRobert Foss 197520f9d94eSRobert Foss cluster1-thermal { 197620f9d94eSRobert Foss polling-delay-passive = <250>; 197720f9d94eSRobert Foss polling-delay = <1000>; 197820f9d94eSRobert Foss 197920f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 198020f9d94eSRobert Foss 198120f9d94eSRobert Foss trips { 198220f9d94eSRobert Foss cluster1_alert0: trip-point0 { 198320f9d94eSRobert Foss temperature = <90000>; 198420f9d94eSRobert Foss hysteresis = <2000>; 198520f9d94eSRobert Foss type = "hot"; 198620f9d94eSRobert Foss }; 198720f9d94eSRobert Foss cluster1_crit: cluster1_crit { 198820f9d94eSRobert Foss temperature = <110000>; 198920f9d94eSRobert Foss hysteresis = <2000>; 199020f9d94eSRobert Foss type = "critical"; 199120f9d94eSRobert Foss }; 199220f9d94eSRobert Foss }; 199320f9d94eSRobert Foss }; 199420f9d94eSRobert Foss 199520f9d94eSRobert Foss aoss1-thermal { 199620f9d94eSRobert Foss polling-delay-passive = <250>; 199720f9d94eSRobert Foss polling-delay = <1000>; 199820f9d94eSRobert Foss 199920f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 200020f9d94eSRobert Foss 200120f9d94eSRobert Foss trips { 200220f9d94eSRobert Foss aoss1_alert0: trip-point0 { 200320f9d94eSRobert Foss temperature = <90000>; 200420f9d94eSRobert Foss hysteresis = <2000>; 200520f9d94eSRobert Foss type = "hot"; 200620f9d94eSRobert Foss }; 200720f9d94eSRobert Foss }; 200820f9d94eSRobert Foss }; 200920f9d94eSRobert Foss 201020f9d94eSRobert Foss gpu-thermal-top { 201120f9d94eSRobert Foss polling-delay-passive = <250>; 201220f9d94eSRobert Foss polling-delay = <1000>; 201320f9d94eSRobert Foss 201420f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 201520f9d94eSRobert Foss 201620f9d94eSRobert Foss trips { 201720f9d94eSRobert Foss gpu1_alert0: trip-point0 { 201820f9d94eSRobert Foss temperature = <90000>; 201920f9d94eSRobert Foss hysteresis = <1000>; 202020f9d94eSRobert Foss type = "hot"; 202120f9d94eSRobert Foss }; 202220f9d94eSRobert Foss }; 202320f9d94eSRobert Foss }; 202420f9d94eSRobert Foss 202520f9d94eSRobert Foss gpu-thermal-bottom { 202620f9d94eSRobert Foss polling-delay-passive = <250>; 202720f9d94eSRobert Foss polling-delay = <1000>; 202820f9d94eSRobert Foss 202920f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 203020f9d94eSRobert Foss 203120f9d94eSRobert Foss trips { 203220f9d94eSRobert Foss gpu2_alert0: trip-point0 { 203320f9d94eSRobert Foss temperature = <90000>; 203420f9d94eSRobert Foss hysteresis = <1000>; 203520f9d94eSRobert Foss type = "hot"; 203620f9d94eSRobert Foss }; 203720f9d94eSRobert Foss }; 203820f9d94eSRobert Foss }; 203920f9d94eSRobert Foss 204020f9d94eSRobert Foss nspss1-thermal { 204120f9d94eSRobert Foss polling-delay-passive = <250>; 204220f9d94eSRobert Foss polling-delay = <1000>; 204320f9d94eSRobert Foss 204420f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 204520f9d94eSRobert Foss 204620f9d94eSRobert Foss trips { 204720f9d94eSRobert Foss nspss1_alert0: trip-point0 { 204820f9d94eSRobert Foss temperature = <90000>; 204920f9d94eSRobert Foss hysteresis = <1000>; 205020f9d94eSRobert Foss type = "hot"; 205120f9d94eSRobert Foss }; 205220f9d94eSRobert Foss }; 205320f9d94eSRobert Foss }; 205420f9d94eSRobert Foss 205520f9d94eSRobert Foss nspss2-thermal { 205620f9d94eSRobert Foss polling-delay-passive = <250>; 205720f9d94eSRobert Foss polling-delay = <1000>; 205820f9d94eSRobert Foss 205920f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 206020f9d94eSRobert Foss 206120f9d94eSRobert Foss trips { 206220f9d94eSRobert Foss nspss2_alert0: trip-point0 { 206320f9d94eSRobert Foss temperature = <90000>; 206420f9d94eSRobert Foss hysteresis = <1000>; 206520f9d94eSRobert Foss type = "hot"; 206620f9d94eSRobert Foss }; 206720f9d94eSRobert Foss }; 206820f9d94eSRobert Foss }; 206920f9d94eSRobert Foss 207020f9d94eSRobert Foss nspss3-thermal { 207120f9d94eSRobert Foss polling-delay-passive = <250>; 207220f9d94eSRobert Foss polling-delay = <1000>; 207320f9d94eSRobert Foss 207420f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 207520f9d94eSRobert Foss 207620f9d94eSRobert Foss trips { 207720f9d94eSRobert Foss nspss3_alert0: trip-point0 { 207820f9d94eSRobert Foss temperature = <90000>; 207920f9d94eSRobert Foss hysteresis = <1000>; 208020f9d94eSRobert Foss type = "hot"; 208120f9d94eSRobert Foss }; 208220f9d94eSRobert Foss }; 208320f9d94eSRobert Foss }; 208420f9d94eSRobert Foss 208520f9d94eSRobert Foss video-thermal { 208620f9d94eSRobert Foss polling-delay-passive = <250>; 208720f9d94eSRobert Foss polling-delay = <1000>; 208820f9d94eSRobert Foss 208920f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 209020f9d94eSRobert Foss 209120f9d94eSRobert Foss trips { 209220f9d94eSRobert Foss video_alert0: trip-point0 { 209320f9d94eSRobert Foss temperature = <90000>; 209420f9d94eSRobert Foss hysteresis = <2000>; 209520f9d94eSRobert Foss type = "hot"; 209620f9d94eSRobert Foss }; 209720f9d94eSRobert Foss }; 209820f9d94eSRobert Foss }; 209920f9d94eSRobert Foss 210020f9d94eSRobert Foss mem-thermal { 210120f9d94eSRobert Foss polling-delay-passive = <250>; 210220f9d94eSRobert Foss polling-delay = <1000>; 210320f9d94eSRobert Foss 210420f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 210520f9d94eSRobert Foss 210620f9d94eSRobert Foss trips { 210720f9d94eSRobert Foss mem_alert0: trip-point0 { 210820f9d94eSRobert Foss temperature = <90000>; 210920f9d94eSRobert Foss hysteresis = <2000>; 211020f9d94eSRobert Foss type = "hot"; 211120f9d94eSRobert Foss }; 211220f9d94eSRobert Foss }; 211320f9d94eSRobert Foss }; 211420f9d94eSRobert Foss 211520f9d94eSRobert Foss modem1-thermal-top { 211620f9d94eSRobert Foss polling-delay-passive = <250>; 211720f9d94eSRobert Foss polling-delay = <1000>; 211820f9d94eSRobert Foss 211920f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 212020f9d94eSRobert Foss 212120f9d94eSRobert Foss trips { 212220f9d94eSRobert Foss modem1_alert0: trip-point0 { 212320f9d94eSRobert Foss temperature = <90000>; 212420f9d94eSRobert Foss hysteresis = <2000>; 212520f9d94eSRobert Foss type = "hot"; 212620f9d94eSRobert Foss }; 212720f9d94eSRobert Foss }; 212820f9d94eSRobert Foss }; 212920f9d94eSRobert Foss 213020f9d94eSRobert Foss modem2-thermal-top { 213120f9d94eSRobert Foss polling-delay-passive = <250>; 213220f9d94eSRobert Foss polling-delay = <1000>; 213320f9d94eSRobert Foss 213420f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 213520f9d94eSRobert Foss 213620f9d94eSRobert Foss trips { 213720f9d94eSRobert Foss modem2_alert0: trip-point0 { 213820f9d94eSRobert Foss temperature = <90000>; 213920f9d94eSRobert Foss hysteresis = <2000>; 214020f9d94eSRobert Foss type = "hot"; 214120f9d94eSRobert Foss }; 214220f9d94eSRobert Foss }; 214320f9d94eSRobert Foss }; 214420f9d94eSRobert Foss 214520f9d94eSRobert Foss modem3-thermal-top { 214620f9d94eSRobert Foss polling-delay-passive = <250>; 214720f9d94eSRobert Foss polling-delay = <1000>; 214820f9d94eSRobert Foss 214920f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 215020f9d94eSRobert Foss 215120f9d94eSRobert Foss trips { 215220f9d94eSRobert Foss modem3_alert0: trip-point0 { 215320f9d94eSRobert Foss temperature = <90000>; 215420f9d94eSRobert Foss hysteresis = <2000>; 215520f9d94eSRobert Foss type = "hot"; 215620f9d94eSRobert Foss }; 215720f9d94eSRobert Foss }; 215820f9d94eSRobert Foss }; 215920f9d94eSRobert Foss 216020f9d94eSRobert Foss modem4-thermal-top { 216120f9d94eSRobert Foss polling-delay-passive = <250>; 216220f9d94eSRobert Foss polling-delay = <1000>; 216320f9d94eSRobert Foss 216420f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 216520f9d94eSRobert Foss 216620f9d94eSRobert Foss trips { 216720f9d94eSRobert Foss modem4_alert0: trip-point0 { 216820f9d94eSRobert Foss temperature = <90000>; 216920f9d94eSRobert Foss hysteresis = <2000>; 217020f9d94eSRobert Foss type = "hot"; 217120f9d94eSRobert Foss }; 217220f9d94eSRobert Foss }; 217320f9d94eSRobert Foss }; 217420f9d94eSRobert Foss 217520f9d94eSRobert Foss camera-thermal-top { 217620f9d94eSRobert Foss polling-delay-passive = <250>; 217720f9d94eSRobert Foss polling-delay = <1000>; 217820f9d94eSRobert Foss 217920f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 218020f9d94eSRobert Foss 218120f9d94eSRobert Foss trips { 218220f9d94eSRobert Foss camera1_alert0: trip-point0 { 218320f9d94eSRobert Foss temperature = <90000>; 218420f9d94eSRobert Foss hysteresis = <2000>; 218520f9d94eSRobert Foss type = "hot"; 218620f9d94eSRobert Foss }; 218720f9d94eSRobert Foss }; 218820f9d94eSRobert Foss }; 218920f9d94eSRobert Foss 219020f9d94eSRobert Foss camera-thermal-bottom { 219120f9d94eSRobert Foss polling-delay-passive = <250>; 219220f9d94eSRobert Foss polling-delay = <1000>; 219320f9d94eSRobert Foss 219420f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 219520f9d94eSRobert Foss 219620f9d94eSRobert Foss trips { 219720f9d94eSRobert Foss camera2_alert0: trip-point0 { 219820f9d94eSRobert Foss temperature = <90000>; 219920f9d94eSRobert Foss hysteresis = <2000>; 220020f9d94eSRobert Foss type = "hot"; 220120f9d94eSRobert Foss }; 220220f9d94eSRobert Foss }; 220320f9d94eSRobert Foss }; 220420f9d94eSRobert Foss }; 220520f9d94eSRobert Foss 2206b7e8f433SVinod Koul timer { 2207b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 2208b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2209b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2210b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2211b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 2212b7e8f433SVinod Koul }; 2213b7e8f433SVinod Koul}; 2214