xref: /openbmc/linux/arch/arm64/boot/dts/qcom/sm8350-hdk.dts (revision 5ebfa90bdd3d78f4967dc0095daf755989a999e0)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020-2021, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9#include "sm8350.dtsi"
10
11/ {
12	model = "Qualcomm Technologies, Inc. SM8350 HDK";
13	compatible = "qcom,sm8350-hdk", "qcom,sm8350";
14
15	aliases {
16		serial0 = &uart2;
17	};
18
19	chosen {
20		stdout-path = "serial0:115200n8";
21	};
22
23	hdmi-connector {
24		compatible = "hdmi-connector";
25		type = "a";
26
27		port {
28			hdmi_con: endpoint {
29				remote-endpoint = <&lt9611_out>;
30			};
31		};
32	};
33
34	vph_pwr: vph-pwr-regulator {
35		compatible = "regulator-fixed";
36		regulator-name = "vph_pwr";
37		regulator-min-microvolt = <3700000>;
38		regulator-max-microvolt = <3700000>;
39
40		regulator-always-on;
41		regulator-boot-on;
42	};
43
44	lt9611_1v2: lt9611-1v2-regulator {
45		compatible = "regulator-fixed";
46		regulator-name = "LT9611_1V2";
47
48		vin-supply = <&vph_pwr>;
49		regulator-min-microvolt = <1200000>;
50		regulator-max-microvolt = <1200000>;
51		gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53		regulator-boot-on;
54	};
55
56	lt9611_3v3: lt9611-3v3-regulator {
57		compatible = "regulator-fixed";
58		regulator-name = "LT9611_3V3";
59
60		vin-supply = <&vreg_bob>;
61		gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
62		regulator-min-microvolt = <3300000>;
63		regulator-max-microvolt = <3300000>;
64		enable-active-high;
65		regulator-boot-on;
66		regulator-always-on;
67	};
68};
69
70&adsp {
71	status = "okay";
72	firmware-name = "qcom/sm8350/adsp.mbn";
73};
74
75&apps_rsc {
76	pm8350-rpmh-regulators {
77		compatible = "qcom,pm8350-rpmh-regulators";
78		qcom,pmic-id = "b";
79
80		vdd-s1-supply = <&vph_pwr>;
81		vdd-s2-supply = <&vph_pwr>;
82		vdd-s3-supply = <&vph_pwr>;
83		vdd-s4-supply = <&vph_pwr>;
84		vdd-s5-supply = <&vph_pwr>;
85		vdd-s6-supply = <&vph_pwr>;
86		vdd-s7-supply = <&vph_pwr>;
87		vdd-s8-supply = <&vph_pwr>;
88		vdd-s9-supply = <&vph_pwr>;
89		vdd-s10-supply = <&vph_pwr>;
90		vdd-s11-supply = <&vph_pwr>;
91		vdd-s12-supply = <&vph_pwr>;
92
93		vdd-l1-l4-supply = <&vreg_s11b_0p95>;
94		vdd-l2-l7-supply = <&vreg_bob>;
95		vdd-l3-l5-supply = <&vreg_bob>;
96		vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
97
98		vreg_s10b_1p8: smps10 {
99			regulator-name = "vreg_s10b_1p8";
100			regulator-min-microvolt = <1800000>;
101			regulator-max-microvolt = <1800000>;
102			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
103		};
104
105		vreg_s11b_0p95: smps11 {
106			regulator-name = "vreg_s11b_0p95";
107			regulator-min-microvolt = <952000>;
108			regulator-max-microvolt = <952000>;
109			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
110		};
111
112		vreg_s12b_1p25: smps12 {
113			regulator-name = "vreg_s12b_1p25";
114			regulator-min-microvolt = <1256000>;
115			regulator-max-microvolt = <1256000>;
116			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
117		};
118
119		vreg_l1b_0p88: ldo1 {
120			regulator-name = "vreg_l1b_0p88";
121			regulator-min-microvolt = <912000>;
122			regulator-max-microvolt = <920000>;
123			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
124		};
125
126		vreg_l2b_3p07: ldo2 {
127			regulator-name = "vreg_l2b_3p07";
128			regulator-min-microvolt = <3072000>;
129			regulator-max-microvolt = <3072000>;
130			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131		};
132
133		vreg_l3b_0p9: ldo3 {
134			regulator-name = "vreg_l3b_0p9";
135			regulator-min-microvolt = <904000>;
136			regulator-max-microvolt = <904000>;
137			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
138		};
139
140		vreg_l5b_0p88: ldo5 {
141			regulator-name = "vreg_l5b_0p88";
142			regulator-min-microvolt = <880000>;
143			regulator-max-microvolt = <888000>;
144			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145			regulator-allow-set-load;
146			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
147						   RPMH_REGULATOR_MODE_HPM>;
148		};
149
150		vreg_l6b_1p2: ldo6 {
151			regulator-name = "vreg_l6b_1p2";
152			regulator-min-microvolt = <1200000>;
153			regulator-max-microvolt = <1208000>;
154			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
155			regulator-allow-set-load;
156			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
157						   RPMH_REGULATOR_MODE_HPM>;
158		};
159
160		vreg_l7b_2p96: ldo7 {
161			regulator-name = "vreg_l7b_2p96";
162			regulator-min-microvolt = <2504000>;
163			regulator-max-microvolt = <2504000>;
164			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165			regulator-allow-set-load;
166			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
167						   RPMH_REGULATOR_MODE_HPM>;
168		};
169
170		vreg_l9b_1p2: ldo9 {
171			regulator-name = "vreg_l9b_1p2";
172			regulator-min-microvolt = <1200000>;
173			regulator-max-microvolt = <1200000>;
174			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
175			regulator-allow-set-load;
176			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
177						   RPMH_REGULATOR_MODE_HPM>;
178		};
179	};
180
181	pm8350c-rpmh-regulators {
182		compatible = "qcom,pm8350c-rpmh-regulators";
183		qcom,pmic-id = "c";
184
185		vdd-s1-supply = <&vph_pwr>;
186		vdd-s2-supply = <&vph_pwr>;
187		vdd-s3-supply = <&vph_pwr>;
188		vdd-s4-supply = <&vph_pwr>;
189		vdd-s5-supply = <&vph_pwr>;
190		vdd-s6-supply = <&vph_pwr>;
191		vdd-s7-supply = <&vph_pwr>;
192		vdd-s8-supply = <&vph_pwr>;
193		vdd-s9-supply = <&vph_pwr>;
194		vdd-s10-supply = <&vph_pwr>;
195
196		vdd-l1-l12-supply = <&vreg_s1c_1p86>;
197		vdd-l2-l8-supply = <&vreg_s1c_1p86>;
198		vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
199		vdd-l6-l9-l11-supply = <&vreg_bob>;
200		vdd-l10-supply = <&vreg_s12b_1p25>;
201
202		vdd-bob-supply = <&vph_pwr>;
203
204		vreg_s1c_1p86: smps1 {
205			regulator-name = "vreg_s1c_1p86";
206			regulator-min-microvolt = <1856000>;
207			regulator-max-microvolt = <1880000>;
208			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
209		};
210
211		vreg_bob: bob {
212			regulator-name = "vreg_bob";
213			regulator-min-microvolt = <3008000>;
214			regulator-max-microvolt = <3960000>;
215			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
216		};
217
218		vreg_l1c_1p8: ldo1 {
219			regulator-name = "vreg_l1c_1p8";
220			regulator-min-microvolt = <1800000>;
221			regulator-max-microvolt = <1800000>;
222			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223		};
224
225		vreg_l2c_1p8: ldo2 {
226			regulator-name = "vreg_l2c_1p8";
227			regulator-min-microvolt = <1800000>;
228			regulator-max-microvolt = <1800000>;
229			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
230		};
231
232		vreg_l6c_1p8: ldo6 {
233			regulator-name = "vreg_l6c_1p8";
234			regulator-min-microvolt = <1800000>;
235			regulator-max-microvolt = <2960000>;
236			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237		};
238
239		vreg_l9c_2p96: ldo9 {
240			regulator-name = "vreg_l9c_2p96";
241			regulator-min-microvolt = <2960000>;
242			regulator-max-microvolt = <3008000>;
243			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
244		};
245
246		vreg_l10c_1p2: ldo10 {
247			regulator-name = "vreg_l10c_1p2";
248			regulator-min-microvolt = <1200000>;
249			regulator-max-microvolt = <1200000>;
250			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
251		};
252	};
253};
254
255&cdsp {
256	status = "okay";
257	firmware-name = "qcom/sm8350/cdsp.mbn";
258};
259
260&dispcc {
261	status = "okay";
262};
263
264&mdss_dsi0 {
265	vdda-supply = <&vreg_l6b_1p2>;
266	status = "okay";
267
268	ports {
269		port@1 {
270			endpoint {
271				remote-endpoint = <&lt9611_a>;
272				data-lanes = <0 1 2 3>;
273			};
274		};
275	};
276};
277
278&mdss_dsi0_phy  {
279	vdds-supply = <&vreg_l5b_0p88>;
280	status = "okay";
281};
282
283&gpi_dma1 {
284	status = "okay";
285};
286
287&i2c15 {
288	clock-frequency = <400000>;
289	status = "okay";
290
291	lt9611_codec: hdmi-bridge@2b {
292		compatible = "lontium,lt9611uxc";
293		reg = <0x2b>;
294
295		interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
296		reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
297
298		vdd-supply = <&lt9611_1v2>;
299		vcc-supply = <&lt9611_3v3>;
300
301		pinctrl-names = "default";
302		pinctrl-0 = <&lt9611_state>;
303
304		ports {
305			#address-cells = <1>;
306			#size-cells = <0>;
307
308			port@0 {
309				reg = <0>;
310
311				lt9611_a: endpoint {
312					remote-endpoint = <&dsi0_out>;
313				};
314			};
315
316			port@2 {
317				reg = <2>;
318
319				lt9611_out: endpoint {
320					remote-endpoint = <&hdmi_con>;
321				};
322			};
323		};
324	};
325};
326
327&mdss {
328	status = "okay";
329};
330
331&mdss_mdp {
332	status = "okay";
333};
334
335&mpss {
336	status = "okay";
337	firmware-name = "qcom/sm8350/modem.mbn";
338};
339
340&pcie0 {
341	pinctrl-names = "default";
342	pinctrl-0 = <&pcie0_default_state>;
343
344	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
345	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
346
347	status = "okay";
348};
349
350&pcie0_phy {
351	vdda-phy-supply = <&vreg_l5b_0p88>;
352	vdda-pll-supply = <&vreg_l6b_1p2>;
353
354	status = "okay";
355};
356
357&pcie1 {
358	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
359	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
360
361	pinctrl-names = "default";
362	pinctrl-0 = <&pcie1_default_state>;
363
364	status = "okay";
365};
366
367&pcie1_phy {
368	status = "okay";
369	vdda-phy-supply = <&vreg_l5b_0p88>;
370	vdda-pll-supply = <&vreg_l6b_1p2>;
371};
372
373&qupv3_id_0 {
374	status = "okay";
375};
376
377&qupv3_id_2 {
378	status = "okay";
379};
380
381&slpi {
382	status = "okay";
383	firmware-name = "qcom/sm8350/slpi.mbn";
384};
385
386&tlmm {
387	gpio-reserved-ranges = <52 8>;
388
389	gpio-line-names =
390		"APPS_I2C_SDA", /* GPIO_0 */
391		"APPS_I2C_SCL",
392		"FSA_INT_N",
393		"USER_LED3_EN",
394		"SMBUS_SDA_1P8",
395		"SMBUS_SCL_1P8",
396		"2M2_3P3_EN",
397		"ALERT_DUAL_M2_N",
398		"EXP_UART_CTS",
399		"EXP_UART_RFR",
400		"EXP_UART_TX", /* GPIO_10 */
401		"EXP_UART_RX",
402		"NC",
403		"NC",
404		"RCM_MARKER1",
405		"WSA0_EN",
406		"CAM1_RESET_N",
407		"CAM0_RESET_N",
408		"DEBUG_UART_TX",
409		"DEBUG_UART_RX",
410		"TS_I2C_SDA", /* GPIO_20 */
411		"TS_I2C_SCL",
412		"TS_RESET_N",
413		"TS_INT_N",
414		"DISP0_RESET_N",
415		"DISP1_RESET_N",
416		"ETH_RESET",
417		"RCM_MARKER2",
418		"CAM_DC_MIPI_MUX_EN",
419		"CAM_DC_MIPI_MUX_SEL",
420		"AFC_PHY_TA_D_PLUS", /* GPIO_30 */
421		"AFC_PHY_TA_D_MINUS",
422		"PM8008_1_IRQ",
423		"PM8008_1_RESET_N",
424		"PM8008_2_IRQ",
425		"PM8008_2_RESET_N",
426		"CAM_DC_I3C_SDA",
427		"CAM_DC_I3C_SCL",
428		"FP_INT_N",
429		"FP_WUHB_INT_N",
430		"SMB_SPMI_DATA", /* GPIO_40 */
431		"SMB_SPMI_CLK",
432		"USB_HUB_RESET",
433		"FORCE_USB_BOOT",
434		"LRF_IRQ",
435		"NC",
436		"IMU2_INT",
437		"HDMI_3P3_EN",
438		"HDMI_RSTN",
439		"HDMI_1P2_EN",
440		"HDMI_INT", /* GPIO_50 */
441		"USB1_ID",
442		"FP_SPI_MISO",
443		"FP_SPI_MOSI",
444		"FP_SPI_CLK",
445		"FP_SPI_CS_N",
446		"NFC_ESE_SPI_MISO",
447		"NFC_ESE_SPI_MOSI",
448		"NFC_ESE_SPI_CLK",
449		"NFC_ESE_SPI_CS",
450		"NFC_I2C_SDA", /* GPIO_60 */
451		"NFC_I2C_SCLC",
452		"NFC_EN",
453		"NFC_CLK_REQ",
454		"HST_WLAN_EN",
455		"HST_BT_EN",
456		"HST_SW_CTRL",
457		"NC",
458		"HST_BT_UART_CTS",
459		"HST_BT_UART_RFR",
460		"HST_BT_UART_TX", /* GPIO_70 */
461		"HST_BT_UART_RX",
462		"CAM_DC_SPI0_MISO",
463		"CAM_DC_SPI0_MOSI",
464		"CAM_DC_SPI0_CLK",
465		"CAM_DC_SPI0_CS_N",
466		"CAM_DC_SPI1_MISO",
467		"CAM_DC_SPI1_MOSI",
468		"CAM_DC_SPI1_CLK",
469		"CAM_DC_SPI1_CS_N",
470		"HALL_INT_N", /* GPIO_80 */
471		"USB_PHY_PS",
472		"MDP_VSYNC_P",
473		"MDP_VSYNC_S",
474		"ETH_3P3_EN",
475		"RADAR_INT",
476		"NFC_DWL_REQ",
477		"SM_GPIO_87",
478		"WCD_RESET_N",
479		"ALSP_INT_N",
480		"PRESS_INT", /* GPIO_90 */
481		"SAR_INT_N",
482		"SD_CARD_DET_N",
483		"NC",
484		"PCIE0_RESET_N",
485		"PCIE0_CLK_REQ_N",
486		"PCIE0_WAKE_N",
487		"PCIE1_RESET_N",
488		"PCIE1_CLK_REQ_N",
489		"PCIE1_WAKE_N",
490		"CAM_MCLK0", /* GPIO_100 */
491		"CAM_MCLK1",
492		"CAM_MCLK2",
493		"CAM_MCLK3",
494		"CAM_MCLK4",
495		"CAM_MCLK5",
496		"CAM2_RESET_N",
497		"CCI_I2C0_SDA",
498		"CCI_I2C0_SCL",
499		"CCI_I2C1_SDA",
500		"CCI_I2C1_SCL", /* GPIO_110 */
501		"CCI_I2C2_SDA",
502		"CCI_I2C2_SCL",
503		"CCI_I2C3_SDA",
504		"CCI_I2C3_SCL",
505		"CAM5_RESET_N",
506		"CAM4_RESET_N",
507		"CAM3_RESET_N",
508		"IMU1_INT",
509		"MAG_INT_N",
510		"MI2S2_I2S_SCK", /* GPIO_120 */
511		"MI2S2_I2S_DAT0",
512		"MI2S2_I2S_WS",
513		"HIFI_DAC_I2S_MCLK",
514		"MI2S2_I2S_DAT1",
515		"HIFI_DAC_I2S_SCK",
516		"HIFI_DAC_I2S_DAT0",
517		"NC",
518		"HIFI_DAC_I2S_WS",
519		"HST_BT_WLAN_SLIMBUS_CLK",
520		"HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
521		"BT_LED_EN",
522		"WLAN_LED_EN",
523		"NC",
524		"NC",
525		"NC",
526		"UIM2_PRESENT",
527		"NC",
528		"NC",
529		"NC",
530		"UIM1_PRESENT", /* GPIO_140 */
531		"NC",
532		"SM_RFFE0_DATA",
533		"NC",
534		"SM_RFFE1_DATA",
535		"SM_MSS_GRFC4",
536		"SM_MSS_GRFC5",
537		"SM_MSS_GRFC6",
538		"SM_MSS_GRFC7",
539		"SM_RFFE4_CLK",
540		"SM_RFFE4_DATA", /* GPIO_150 */
541		"WLAN_COEX_UART1_RX",
542		"WLAN_COEX_UART1_TX",
543		"HST_SW_CTRL",
544		"DSI0_STATUS",
545		"DSI1_STATUS",
546		"APPS_PBL_BOOT_SPEED_1",
547		"APPS_BOOT_FROM_ROM",
548		"APPS_PBL_BOOT_SPEED_0",
549		"QLINK0_REQ",
550		"QLINK0_EN", /* GPIO_160 */
551		"QLINK0_WMSS_RESET_N",
552		"NC",
553		"NC",
554		"NC",
555		"NC",
556		"NC",
557		"NC",
558		"WCD_SWR_TX_CLK",
559		"WCD_SWR_TX_DATA0",
560		"WCD_SWR_TX_DATA1", /* GPIO_170 */
561		"WCD_SWR_RX_CLK",
562		"WCD_SWR_RX_DATA0",
563		"WCD_SWR_RX_DATA1",
564		"DMIC01_CLK",
565		"DMIC01_DATA",
566		"DMIC23_CLK",
567		"DMIC23_DATA",
568		"WSA_SWR_CLK",
569		"WSA_SWR_DATA",
570		"DMIC45_CLK", /* GPIO_180 */
571		"DMIC45_DATA",
572		"WCD_SWR_TX_DATA2",
573		"SENSOR_I3C_SDA",
574		"SENSOR_I3C_SCL",
575		"CAM_OIS0_I3C_SDA",
576		"CAM_OIS0_I3C_SCL",
577		"IMU_SPI_MISO",
578		"IMU_SPI_MOSI",
579		"IMU_SPI_CLK",
580		"IMU_SPI_CS_N", /* GPIO_190 */
581		"MAG_I2C_SDA",
582		"MAG_I2C_SCL",
583		"SENSOR_I2C_SDA",
584		"SENSOR_I2C_SCL",
585		"RADAR_SPI_MISO",
586		"RADAR_SPI_MOSI",
587		"RADAR_SPI_CLK",
588		"RADAR_SPI_CS_N",
589		"HST_BLE_UART_TX",
590		"HST_BLE_UART_RX", /* GPIO_200 */
591		"HST_WLAN_UART_TX",
592		"HST_WLAN_UART_RX";
593
594	pcie0_default_state: pcie0-default-state {
595		perst-pins {
596			pins = "gpio94";
597			function = "gpio";
598			drive-strength = <2>;
599			bias-pull-down;
600		};
601
602		clkreq-pins {
603			pins = "gpio95";
604			function = "pcie0_clkreqn";
605			drive-strength = <2>;
606			bias-pull-up;
607		};
608
609		wake-pins {
610			pins = "gpio96";
611			function = "gpio";
612			drive-strength = <2>;
613			bias-pull-up;
614		};
615	};
616
617	pcie1_default_state: pcie1-default-state {
618		perst-pins {
619			pins = "gpio97";
620			function = "gpio";
621			drive-strength = <2>;
622			bias-pull-down;
623		};
624
625		clkreq-pins {
626			pins = "gpio98";
627			function = "pcie1_clkreqn";
628			drive-strength = <2>;
629			bias-pull-up;
630		};
631
632		wake-pins {
633			pins = "gpio99";
634			function = "gpio";
635			drive-strength = <2>;
636			bias-pull-up;
637		};
638	};
639
640};
641
642&uart2 {
643	status = "okay";
644};
645
646&ufs_mem_hc {
647	status = "okay";
648
649	reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
650
651	vcc-supply = <&vreg_l7b_2p96>;
652	vcc-max-microamp = <800000>;
653	vccq-supply = <&vreg_l9b_1p2>;
654	vccq-max-microamp = <900000>;
655};
656
657&ufs_mem_phy {
658	status = "okay";
659
660	vdda-phy-supply = <&vreg_l5b_0p88>;
661	vdda-pll-supply = <&vreg_l6b_1p2>;
662};
663
664&usb_1 {
665	status = "okay";
666};
667
668&usb_1_dwc3 {
669	/* TODO: Define USB-C connector properly */
670	dr_mode = "peripheral";
671};
672
673&usb_1_hsphy {
674	status = "okay";
675
676	vdda-pll-supply = <&vreg_l5b_0p88>;
677	vdda18-supply = <&vreg_l1c_1p8>;
678	vdda33-supply = <&vreg_l2b_3p07>;
679};
680
681&usb_1_qmpphy {
682	status = "okay";
683
684	vdda-phy-supply = <&vreg_l6b_1p2>;
685	vdda-pll-supply = <&vreg_l1b_0p88>;
686};
687
688&usb_2 {
689	status = "okay";
690};
691
692&usb_2_dwc3 {
693	dr_mode = "host";
694
695	pinctrl-names = "default";
696	pinctrl-0 = <&usb_hub_enabled_state>;
697};
698
699&usb_2_hsphy {
700	status = "okay";
701
702	vdda-pll-supply = <&vreg_l5b_0p88>;
703	vdda18-supply = <&vreg_l1c_1p8>;
704	vdda33-supply = <&vreg_l2b_3p07>;
705};
706
707&usb_2_qmpphy {
708	status = "okay";
709
710	vdda-phy-supply = <&vreg_l6b_1p2>;
711	vdda-pll-supply = <&vreg_l5b_0p88>;
712};
713
714/* PINCTRL - additions to nodes defined in sm8350.dtsi */
715
716&tlmm {
717	usb_hub_enabled_state: usb-hub-enabled-state {
718		pins = "gpio42";
719		function = "gpio";
720
721		drive-strength = <2>;
722		output-low;
723	};
724
725	lt9611_state: lt9611-state {
726		rst {
727			pins = "gpio48";
728			function = "normal";
729
730			output-high;
731			input-disable;
732		};
733
734		irq {
735			pins = "gpio50";
736			function = "gpio";
737			bias-disable;
738		};
739	};
740};
741