1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10#include "pmk8350.dtsi" 11 12/ { 13 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 14 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 15 chassis-type = "embedded"; 16 17 aliases { 18 serial0 = &uart2; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 hdmi-connector { 26 compatible = "hdmi-connector"; 27 type = "a"; 28 29 port { 30 hdmi_con: endpoint { 31 remote-endpoint = <<9611_out>; 32 }; 33 }; 34 }; 35 36 pmic-glink { 37 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; 38 #address-cells = <1>; 39 #size-cells = <0>; 40 41 connector@0 { 42 compatible = "usb-c-connector"; 43 reg = <0>; 44 power-role = "dual"; 45 data-role = "dual"; 46 47 ports { 48 #address-cells = <1>; 49 #size-cells = <0>; 50 51 port@0 { 52 reg = <0>; 53 54 pmic_glink_hs_in: endpoint { 55 remote-endpoint = <&usb_1_dwc3_hs>; 56 }; 57 }; 58 59 port@1 { 60 reg = <1>; 61 62 pmic_glink_ss_in: endpoint { 63 remote-endpoint = <&usb_1_qmpphy_out>; 64 }; 65 }; 66 67 port@2 { 68 reg = <2>; 69 70 pmic_glink_sbu: endpoint { 71 remote-endpoint = <&fsa4480_sbu_mux>; 72 }; 73 }; 74 }; 75 }; 76 }; 77 78 vph_pwr: vph-pwr-regulator { 79 compatible = "regulator-fixed"; 80 regulator-name = "vph_pwr"; 81 regulator-min-microvolt = <3700000>; 82 regulator-max-microvolt = <3700000>; 83 84 regulator-always-on; 85 regulator-boot-on; 86 }; 87 88 lt9611_1v2: lt9611-1v2-regulator { 89 compatible = "regulator-fixed"; 90 regulator-name = "LT9611_1V2"; 91 92 vin-supply = <&vph_pwr>; 93 regulator-min-microvolt = <1200000>; 94 regulator-max-microvolt = <1200000>; 95 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 96 enable-active-high; 97 regulator-boot-on; 98 }; 99 100 lt9611_3v3: lt9611-3v3-regulator { 101 compatible = "regulator-fixed"; 102 regulator-name = "LT9611_3V3"; 103 104 vin-supply = <&vreg_bob>; 105 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 106 regulator-min-microvolt = <3300000>; 107 regulator-max-microvolt = <3300000>; 108 enable-active-high; 109 regulator-boot-on; 110 regulator-always-on; 111 }; 112}; 113 114&adsp { 115 status = "okay"; 116 firmware-name = "qcom/sm8350/adsp.mbn"; 117}; 118 119&apps_rsc { 120 regulators-0 { 121 compatible = "qcom,pm8350-rpmh-regulators"; 122 qcom,pmic-id = "b"; 123 124 vdd-s1-supply = <&vph_pwr>; 125 vdd-s2-supply = <&vph_pwr>; 126 vdd-s3-supply = <&vph_pwr>; 127 vdd-s4-supply = <&vph_pwr>; 128 vdd-s5-supply = <&vph_pwr>; 129 vdd-s6-supply = <&vph_pwr>; 130 vdd-s7-supply = <&vph_pwr>; 131 vdd-s8-supply = <&vph_pwr>; 132 vdd-s9-supply = <&vph_pwr>; 133 vdd-s10-supply = <&vph_pwr>; 134 vdd-s11-supply = <&vph_pwr>; 135 vdd-s12-supply = <&vph_pwr>; 136 137 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 138 vdd-l2-l7-supply = <&vreg_bob>; 139 vdd-l3-l5-supply = <&vreg_bob>; 140 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 141 142 vreg_s10b_1p8: smps10 { 143 regulator-name = "vreg_s10b_1p8"; 144 regulator-min-microvolt = <1800000>; 145 regulator-max-microvolt = <1800000>; 146 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 147 }; 148 149 vreg_s11b_0p95: smps11 { 150 regulator-name = "vreg_s11b_0p95"; 151 regulator-min-microvolt = <952000>; 152 regulator-max-microvolt = <952000>; 153 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 154 }; 155 156 vreg_s12b_1p25: smps12 { 157 regulator-name = "vreg_s12b_1p25"; 158 regulator-min-microvolt = <1256000>; 159 regulator-max-microvolt = <1256000>; 160 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 161 }; 162 163 vreg_l1b_0p88: ldo1 { 164 regulator-name = "vreg_l1b_0p88"; 165 regulator-min-microvolt = <912000>; 166 regulator-max-microvolt = <920000>; 167 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 168 }; 169 170 vreg_l2b_3p07: ldo2 { 171 regulator-name = "vreg_l2b_3p07"; 172 regulator-min-microvolt = <3072000>; 173 regulator-max-microvolt = <3072000>; 174 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 175 }; 176 177 vreg_l3b_0p9: ldo3 { 178 regulator-name = "vreg_l3b_0p9"; 179 regulator-min-microvolt = <904000>; 180 regulator-max-microvolt = <904000>; 181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 182 }; 183 184 vreg_l5b_0p88: ldo5 { 185 regulator-name = "vreg_l5b_0p88"; 186 regulator-min-microvolt = <880000>; 187 regulator-max-microvolt = <888000>; 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 189 regulator-allow-set-load; 190 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 191 RPMH_REGULATOR_MODE_HPM>; 192 }; 193 194 vreg_l6b_1p2: ldo6 { 195 regulator-name = "vreg_l6b_1p2"; 196 regulator-min-microvolt = <1200000>; 197 regulator-max-microvolt = <1208000>; 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 199 regulator-allow-set-load; 200 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 201 RPMH_REGULATOR_MODE_HPM>; 202 }; 203 204 vreg_l7b_2p96: ldo7 { 205 regulator-name = "vreg_l7b_2p96"; 206 regulator-min-microvolt = <2504000>; 207 regulator-max-microvolt = <2504000>; 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 209 regulator-allow-set-load; 210 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 211 RPMH_REGULATOR_MODE_HPM>; 212 }; 213 214 vreg_l9b_1p2: ldo9 { 215 regulator-name = "vreg_l9b_1p2"; 216 regulator-min-microvolt = <1200000>; 217 regulator-max-microvolt = <1200000>; 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 219 regulator-allow-set-load; 220 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 221 RPMH_REGULATOR_MODE_HPM>; 222 }; 223 }; 224 225 regulators-1 { 226 compatible = "qcom,pm8350c-rpmh-regulators"; 227 qcom,pmic-id = "c"; 228 229 vdd-s1-supply = <&vph_pwr>; 230 vdd-s2-supply = <&vph_pwr>; 231 vdd-s3-supply = <&vph_pwr>; 232 vdd-s4-supply = <&vph_pwr>; 233 vdd-s5-supply = <&vph_pwr>; 234 vdd-s6-supply = <&vph_pwr>; 235 vdd-s7-supply = <&vph_pwr>; 236 vdd-s8-supply = <&vph_pwr>; 237 vdd-s9-supply = <&vph_pwr>; 238 vdd-s10-supply = <&vph_pwr>; 239 240 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 241 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 242 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 243 vdd-l6-l9-l11-supply = <&vreg_bob>; 244 vdd-l10-supply = <&vreg_s12b_1p25>; 245 246 vdd-bob-supply = <&vph_pwr>; 247 248 vreg_s1c_1p86: smps1 { 249 regulator-name = "vreg_s1c_1p86"; 250 regulator-min-microvolt = <1856000>; 251 regulator-max-microvolt = <1880000>; 252 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 253 }; 254 255 vreg_bob: bob { 256 regulator-name = "vreg_bob"; 257 regulator-min-microvolt = <3008000>; 258 regulator-max-microvolt = <3960000>; 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 260 }; 261 262 vreg_l1c_1p8: ldo1 { 263 regulator-name = "vreg_l1c_1p8"; 264 regulator-min-microvolt = <1800000>; 265 regulator-max-microvolt = <1800000>; 266 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 267 }; 268 269 vreg_l2c_1p8: ldo2 { 270 regulator-name = "vreg_l2c_1p8"; 271 regulator-min-microvolt = <1800000>; 272 regulator-max-microvolt = <1800000>; 273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 274 }; 275 276 vreg_l6c_1p8: ldo6 { 277 regulator-name = "vreg_l6c_1p8"; 278 regulator-min-microvolt = <1800000>; 279 regulator-max-microvolt = <2960000>; 280 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 281 }; 282 283 vreg_l9c_2p96: ldo9 { 284 regulator-name = "vreg_l9c_2p96"; 285 regulator-min-microvolt = <2960000>; 286 regulator-max-microvolt = <3008000>; 287 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 288 }; 289 290 vreg_l10c_1p2: ldo10 { 291 regulator-name = "vreg_l10c_1p2"; 292 regulator-min-microvolt = <1200000>; 293 regulator-max-microvolt = <1200000>; 294 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 295 }; 296 }; 297}; 298 299&cdsp { 300 status = "okay"; 301 firmware-name = "qcom/sm8350/cdsp.mbn"; 302}; 303 304&dispcc { 305 status = "okay"; 306}; 307 308&mdss_dsi0 { 309 vdda-supply = <&vreg_l6b_1p2>; 310 status = "okay"; 311 312 ports { 313 port@1 { 314 endpoint { 315 remote-endpoint = <<9611_a>; 316 data-lanes = <0 1 2 3>; 317 }; 318 }; 319 }; 320}; 321 322&mdss_dsi0_phy { 323 vdds-supply = <&vreg_l5b_0p88>; 324 status = "okay"; 325}; 326 327&gpi_dma1 { 328 status = "okay"; 329}; 330 331&gpu { 332 status = "okay"; 333 334 zap-shader { 335 firmware-name = "qcom/sm8350/a660_zap.mbn"; 336 }; 337}; 338 339&i2c13 { 340 clock-frequency = <100000>; 341 342 status = "okay"; 343 344 typec-mux@42 { 345 compatible = "fcs,fsa4480"; 346 reg = <0x42>; 347 348 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; 349 350 vcc-supply = <&vreg_bob>; 351 mode-switch; 352 orientation-switch; 353 354 port { 355 fsa4480_sbu_mux: endpoint { 356 remote-endpoint = <&pmic_glink_sbu>; 357 }; 358 }; 359 }; 360}; 361 362&i2c15 { 363 clock-frequency = <400000>; 364 status = "okay"; 365 366 lt9611_codec: hdmi-bridge@2b { 367 compatible = "lontium,lt9611uxc"; 368 reg = <0x2b>; 369 370 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 371 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 372 373 vdd-supply = <<9611_1v2>; 374 vcc-supply = <<9611_3v3>; 375 376 pinctrl-names = "default"; 377 pinctrl-0 = <<9611_state>; 378 379 ports { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 383 port@0 { 384 reg = <0>; 385 386 lt9611_a: endpoint { 387 remote-endpoint = <&mdss_dsi0_out>; 388 }; 389 }; 390 391 port@2 { 392 reg = <2>; 393 394 lt9611_out: endpoint { 395 remote-endpoint = <&hdmi_con>; 396 }; 397 }; 398 }; 399 }; 400}; 401 402&mdss { 403 status = "okay"; 404}; 405 406&mdss_dp { 407 status = "okay"; 408 409 ports { 410 port@1 { 411 reg = <1>; 412 413 mdss_dp0_out: endpoint { 414 data-lanes = <0 1>; 415 remote-endpoint = <&usb_1_qmpphy_dp_in>; 416 }; 417 }; 418 }; 419}; 420 421&mpss { 422 status = "okay"; 423 firmware-name = "qcom/sm8350/modem.mbn"; 424}; 425 426&pcie0 { 427 pinctrl-names = "default"; 428 pinctrl-0 = <&pcie0_default_state>; 429 430 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 431 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 432 433 status = "okay"; 434}; 435 436&pcie0_phy { 437 vdda-phy-supply = <&vreg_l5b_0p88>; 438 vdda-pll-supply = <&vreg_l6b_1p2>; 439 440 status = "okay"; 441}; 442 443&pcie1 { 444 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 445 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 446 447 pinctrl-names = "default"; 448 pinctrl-0 = <&pcie1_default_state>; 449 450 status = "okay"; 451}; 452 453&pcie1_phy { 454 status = "okay"; 455 vdda-phy-supply = <&vreg_l5b_0p88>; 456 vdda-pll-supply = <&vreg_l6b_1p2>; 457}; 458 459&qupv3_id_0 { 460 status = "okay"; 461}; 462 463&qupv3_id_1 { 464 status = "okay"; 465}; 466 467&qupv3_id_2 { 468 status = "okay"; 469}; 470 471&sdhc_2 { 472 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; 473 pinctrl-names = "default", "sleep"; 474 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 475 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; 476 vmmc-supply = <&vreg_l9c_2p96>; 477 vqmmc-supply = <&vreg_l6c_1p8>; 478 no-sdio; 479 no-mmc; 480 status = "okay"; 481}; 482 483&slpi { 484 status = "okay"; 485 firmware-name = "qcom/sm8350/slpi.mbn"; 486}; 487 488&tlmm { 489 gpio-reserved-ranges = <52 8>; 490 491 gpio-line-names = 492 "APPS_I2C_SDA", /* GPIO_0 */ 493 "APPS_I2C_SCL", 494 "FSA_INT_N", 495 "USER_LED3_EN", 496 "SMBUS_SDA_1P8", 497 "SMBUS_SCL_1P8", 498 "2M2_3P3_EN", 499 "ALERT_DUAL_M2_N", 500 "EXP_UART_CTS", 501 "EXP_UART_RFR", 502 "EXP_UART_TX", /* GPIO_10 */ 503 "EXP_UART_RX", 504 "NC", 505 "NC", 506 "RCM_MARKER1", 507 "WSA0_EN", 508 "CAM1_RESET_N", 509 "CAM0_RESET_N", 510 "DEBUG_UART_TX", 511 "DEBUG_UART_RX", 512 "TS_I2C_SDA", /* GPIO_20 */ 513 "TS_I2C_SCL", 514 "TS_RESET_N", 515 "TS_INT_N", 516 "DISP0_RESET_N", 517 "DISP1_RESET_N", 518 "ETH_RESET", 519 "RCM_MARKER2", 520 "CAM_DC_MIPI_MUX_EN", 521 "CAM_DC_MIPI_MUX_SEL", 522 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 523 "AFC_PHY_TA_D_MINUS", 524 "PM8008_1_IRQ", 525 "PM8008_1_RESET_N", 526 "PM8008_2_IRQ", 527 "PM8008_2_RESET_N", 528 "CAM_DC_I3C_SDA", 529 "CAM_DC_I3C_SCL", 530 "FP_INT_N", 531 "FP_WUHB_INT_N", 532 "SMB_SPMI_DATA", /* GPIO_40 */ 533 "SMB_SPMI_CLK", 534 "USB_HUB_RESET", 535 "FORCE_USB_BOOT", 536 "LRF_IRQ", 537 "NC", 538 "IMU2_INT", 539 "HDMI_3P3_EN", 540 "HDMI_RSTN", 541 "HDMI_1P2_EN", 542 "HDMI_INT", /* GPIO_50 */ 543 "USB1_ID", 544 "FP_SPI_MISO", 545 "FP_SPI_MOSI", 546 "FP_SPI_CLK", 547 "FP_SPI_CS_N", 548 "NFC_ESE_SPI_MISO", 549 "NFC_ESE_SPI_MOSI", 550 "NFC_ESE_SPI_CLK", 551 "NFC_ESE_SPI_CS", 552 "NFC_I2C_SDA", /* GPIO_60 */ 553 "NFC_I2C_SCLC", 554 "NFC_EN", 555 "NFC_CLK_REQ", 556 "HST_WLAN_EN", 557 "HST_BT_EN", 558 "HST_SW_CTRL", 559 "NC", 560 "HST_BT_UART_CTS", 561 "HST_BT_UART_RFR", 562 "HST_BT_UART_TX", /* GPIO_70 */ 563 "HST_BT_UART_RX", 564 "CAM_DC_SPI0_MISO", 565 "CAM_DC_SPI0_MOSI", 566 "CAM_DC_SPI0_CLK", 567 "CAM_DC_SPI0_CS_N", 568 "CAM_DC_SPI1_MISO", 569 "CAM_DC_SPI1_MOSI", 570 "CAM_DC_SPI1_CLK", 571 "CAM_DC_SPI1_CS_N", 572 "HALL_INT_N", /* GPIO_80 */ 573 "USB_PHY_PS", 574 "MDP_VSYNC_P", 575 "MDP_VSYNC_S", 576 "ETH_3P3_EN", 577 "RADAR_INT", 578 "NFC_DWL_REQ", 579 "SM_GPIO_87", 580 "WCD_RESET_N", 581 "ALSP_INT_N", 582 "PRESS_INT", /* GPIO_90 */ 583 "SAR_INT_N", 584 "SD_CARD_DET_N", 585 "NC", 586 "PCIE0_RESET_N", 587 "PCIE0_CLK_REQ_N", 588 "PCIE0_WAKE_N", 589 "PCIE1_RESET_N", 590 "PCIE1_CLK_REQ_N", 591 "PCIE1_WAKE_N", 592 "CAM_MCLK0", /* GPIO_100 */ 593 "CAM_MCLK1", 594 "CAM_MCLK2", 595 "CAM_MCLK3", 596 "CAM_MCLK4", 597 "CAM_MCLK5", 598 "CAM2_RESET_N", 599 "CCI_I2C0_SDA", 600 "CCI_I2C0_SCL", 601 "CCI_I2C1_SDA", 602 "CCI_I2C1_SCL", /* GPIO_110 */ 603 "CCI_I2C2_SDA", 604 "CCI_I2C2_SCL", 605 "CCI_I2C3_SDA", 606 "CCI_I2C3_SCL", 607 "CAM5_RESET_N", 608 "CAM4_RESET_N", 609 "CAM3_RESET_N", 610 "IMU1_INT", 611 "MAG_INT_N", 612 "MI2S2_I2S_SCK", /* GPIO_120 */ 613 "MI2S2_I2S_DAT0", 614 "MI2S2_I2S_WS", 615 "HIFI_DAC_I2S_MCLK", 616 "MI2S2_I2S_DAT1", 617 "HIFI_DAC_I2S_SCK", 618 "HIFI_DAC_I2S_DAT0", 619 "NC", 620 "HIFI_DAC_I2S_WS", 621 "HST_BT_WLAN_SLIMBUS_CLK", 622 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 623 "BT_LED_EN", 624 "WLAN_LED_EN", 625 "NC", 626 "NC", 627 "NC", 628 "UIM2_PRESENT", 629 "NC", 630 "NC", 631 "NC", 632 "UIM1_PRESENT", /* GPIO_140 */ 633 "NC", 634 "SM_RFFE0_DATA", 635 "NC", 636 "SM_RFFE1_DATA", 637 "SM_MSS_GRFC4", 638 "SM_MSS_GRFC5", 639 "SM_MSS_GRFC6", 640 "SM_MSS_GRFC7", 641 "SM_RFFE4_CLK", 642 "SM_RFFE4_DATA", /* GPIO_150 */ 643 "WLAN_COEX_UART1_RX", 644 "WLAN_COEX_UART1_TX", 645 "HST_SW_CTRL", 646 "DSI0_STATUS", 647 "DSI1_STATUS", 648 "APPS_PBL_BOOT_SPEED_1", 649 "APPS_BOOT_FROM_ROM", 650 "APPS_PBL_BOOT_SPEED_0", 651 "QLINK0_REQ", 652 "QLINK0_EN", /* GPIO_160 */ 653 "QLINK0_WMSS_RESET_N", 654 "NC", 655 "NC", 656 "NC", 657 "NC", 658 "NC", 659 "NC", 660 "WCD_SWR_TX_CLK", 661 "WCD_SWR_TX_DATA0", 662 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 663 "WCD_SWR_RX_CLK", 664 "WCD_SWR_RX_DATA0", 665 "WCD_SWR_RX_DATA1", 666 "DMIC01_CLK", 667 "DMIC01_DATA", 668 "DMIC23_CLK", 669 "DMIC23_DATA", 670 "WSA_SWR_CLK", 671 "WSA_SWR_DATA", 672 "DMIC45_CLK", /* GPIO_180 */ 673 "DMIC45_DATA", 674 "WCD_SWR_TX_DATA2", 675 "SENSOR_I3C_SDA", 676 "SENSOR_I3C_SCL", 677 "CAM_OIS0_I3C_SDA", 678 "CAM_OIS0_I3C_SCL", 679 "IMU_SPI_MISO", 680 "IMU_SPI_MOSI", 681 "IMU_SPI_CLK", 682 "IMU_SPI_CS_N", /* GPIO_190 */ 683 "MAG_I2C_SDA", 684 "MAG_I2C_SCL", 685 "SENSOR_I2C_SDA", 686 "SENSOR_I2C_SCL", 687 "RADAR_SPI_MISO", 688 "RADAR_SPI_MOSI", 689 "RADAR_SPI_CLK", 690 "RADAR_SPI_CS_N", 691 "HST_BLE_UART_TX", 692 "HST_BLE_UART_RX", /* GPIO_200 */ 693 "HST_WLAN_UART_TX", 694 "HST_WLAN_UART_RX"; 695 696 pcie0_default_state: pcie0-default-state { 697 perst-pins { 698 pins = "gpio94"; 699 function = "gpio"; 700 drive-strength = <2>; 701 bias-pull-down; 702 }; 703 704 clkreq-pins { 705 pins = "gpio95"; 706 function = "pcie0_clkreqn"; 707 drive-strength = <2>; 708 bias-pull-up; 709 }; 710 711 wake-pins { 712 pins = "gpio96"; 713 function = "gpio"; 714 drive-strength = <2>; 715 bias-pull-up; 716 }; 717 }; 718 719 pcie1_default_state: pcie1-default-state { 720 perst-pins { 721 pins = "gpio97"; 722 function = "gpio"; 723 drive-strength = <2>; 724 bias-pull-down; 725 }; 726 727 clkreq-pins { 728 pins = "gpio98"; 729 function = "pcie1_clkreqn"; 730 drive-strength = <2>; 731 bias-pull-up; 732 }; 733 734 wake-pins { 735 pins = "gpio99"; 736 function = "gpio"; 737 drive-strength = <2>; 738 bias-pull-up; 739 }; 740 }; 741 742 sdc2_card_det_n: sd-card-det-n-state { 743 pins = "gpio92"; 744 function = "gpio"; 745 drive-strength = <2>; 746 bias-pull-up; 747 }; 748}; 749 750&uart2 { 751 status = "okay"; 752}; 753 754&ufs_mem_hc { 755 status = "okay"; 756 757 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 758 759 vcc-supply = <&vreg_l7b_2p96>; 760 vcc-max-microamp = <800000>; 761 vccq-supply = <&vreg_l9b_1p2>; 762 vccq-max-microamp = <900000>; 763}; 764 765&ufs_mem_phy { 766 status = "okay"; 767 768 vdda-phy-supply = <&vreg_l5b_0p88>; 769 vdda-pll-supply = <&vreg_l6b_1p2>; 770}; 771 772&usb_1 { 773 status = "okay"; 774}; 775 776&usb_1_dwc3 { 777 dr_mode = "otg"; 778 usb-role-switch; 779}; 780 781&usb_1_dwc3_hs { 782 remote-endpoint = <&pmic_glink_hs_in>; 783}; 784 785&usb_1_dwc3_ss { 786 remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; 787}; 788 789&usb_1_hsphy { 790 status = "okay"; 791 792 vdda-pll-supply = <&vreg_l5b_0p88>; 793 vdda18-supply = <&vreg_l1c_1p8>; 794 vdda33-supply = <&vreg_l2b_3p07>; 795}; 796 797&usb_1_qmpphy { 798 status = "okay"; 799 800 vdda-phy-supply = <&vreg_l6b_1p2>; 801 vdda-pll-supply = <&vreg_l1b_0p88>; 802 803 orientation-switch; 804}; 805 806&usb_1_qmpphy_dp_in { 807 remote-endpoint = <&mdss_dp0_out>; 808}; 809 810&usb_1_qmpphy_out { 811 remote-endpoint = <&pmic_glink_ss_in>; 812}; 813 814&usb_1_qmpphy_usb_ss_in { 815 remote-endpoint = <&usb_1_dwc3_ss>; 816}; 817 818&usb_2 { 819 status = "okay"; 820}; 821 822&usb_2_dwc3 { 823 dr_mode = "host"; 824 825 pinctrl-names = "default"; 826 pinctrl-0 = <&usb_hub_enabled_state>; 827}; 828 829&usb_2_hsphy { 830 status = "okay"; 831 832 vdda-pll-supply = <&vreg_l5b_0p88>; 833 vdda18-supply = <&vreg_l1c_1p8>; 834 vdda33-supply = <&vreg_l2b_3p07>; 835}; 836 837&usb_2_qmpphy { 838 status = "okay"; 839 840 vdda-phy-supply = <&vreg_l6b_1p2>; 841 vdda-pll-supply = <&vreg_l5b_0p88>; 842}; 843 844/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 845 846&tlmm { 847 usb_hub_enabled_state: usb-hub-enabled-state { 848 pins = "gpio42"; 849 function = "gpio"; 850 851 drive-strength = <2>; 852 output-low; 853 }; 854 855 lt9611_state: lt9611-state { 856 rst-pins { 857 pins = "gpio48"; 858 function = "gpio"; 859 860 output-high; 861 input-disable; 862 }; 863 864 irq-pins { 865 pins = "gpio50"; 866 function = "gpio"; 867 bias-disable; 868 }; 869 }; 870}; 871