1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10 11/ { 12 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 13 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 14 15 aliases { 16 serial0 = &uart2; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 hdmi-connector { 24 compatible = "hdmi-connector"; 25 type = "a"; 26 27 port { 28 hdmi_con: endpoint { 29 remote-endpoint = <<9611_out>; 30 }; 31 }; 32 }; 33 34 pmic-glink { 35 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 connector@0 { 40 compatible = "usb-c-connector"; 41 reg = <0>; 42 power-role = "dual"; 43 data-role = "dual"; 44 45 ports { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 port@0 { 50 reg = <0>; 51 52 pmic_glink_hs_in: endpoint { 53 remote-endpoint = <&usb_1_dwc3_hs>; 54 }; 55 }; 56 57 port@1 { 58 reg = <1>; 59 60 pmic_glink_ss_in: endpoint { 61 remote-endpoint = <&usb_1_qmpphy_out>; 62 }; 63 }; 64 65 port@2 { 66 reg = <2>; 67 68 pmic_glink_sbu: endpoint { 69 remote-endpoint = <&fsa4480_sbu_mux>; 70 }; 71 }; 72 }; 73 }; 74 }; 75 76 vph_pwr: vph-pwr-regulator { 77 compatible = "regulator-fixed"; 78 regulator-name = "vph_pwr"; 79 regulator-min-microvolt = <3700000>; 80 regulator-max-microvolt = <3700000>; 81 82 regulator-always-on; 83 regulator-boot-on; 84 }; 85 86 lt9611_1v2: lt9611-1v2-regulator { 87 compatible = "regulator-fixed"; 88 regulator-name = "LT9611_1V2"; 89 90 vin-supply = <&vph_pwr>; 91 regulator-min-microvolt = <1200000>; 92 regulator-max-microvolt = <1200000>; 93 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 94 enable-active-high; 95 regulator-boot-on; 96 }; 97 98 lt9611_3v3: lt9611-3v3-regulator { 99 compatible = "regulator-fixed"; 100 regulator-name = "LT9611_3V3"; 101 102 vin-supply = <&vreg_bob>; 103 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 104 regulator-min-microvolt = <3300000>; 105 regulator-max-microvolt = <3300000>; 106 enable-active-high; 107 regulator-boot-on; 108 regulator-always-on; 109 }; 110}; 111 112&adsp { 113 status = "okay"; 114 firmware-name = "qcom/sm8350/adsp.mbn"; 115}; 116 117&apps_rsc { 118 regulators-0 { 119 compatible = "qcom,pm8350-rpmh-regulators"; 120 qcom,pmic-id = "b"; 121 122 vdd-s1-supply = <&vph_pwr>; 123 vdd-s2-supply = <&vph_pwr>; 124 vdd-s3-supply = <&vph_pwr>; 125 vdd-s4-supply = <&vph_pwr>; 126 vdd-s5-supply = <&vph_pwr>; 127 vdd-s6-supply = <&vph_pwr>; 128 vdd-s7-supply = <&vph_pwr>; 129 vdd-s8-supply = <&vph_pwr>; 130 vdd-s9-supply = <&vph_pwr>; 131 vdd-s10-supply = <&vph_pwr>; 132 vdd-s11-supply = <&vph_pwr>; 133 vdd-s12-supply = <&vph_pwr>; 134 135 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 136 vdd-l2-l7-supply = <&vreg_bob>; 137 vdd-l3-l5-supply = <&vreg_bob>; 138 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 139 140 vreg_s10b_1p8: smps10 { 141 regulator-name = "vreg_s10b_1p8"; 142 regulator-min-microvolt = <1800000>; 143 regulator-max-microvolt = <1800000>; 144 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 145 }; 146 147 vreg_s11b_0p95: smps11 { 148 regulator-name = "vreg_s11b_0p95"; 149 regulator-min-microvolt = <952000>; 150 regulator-max-microvolt = <952000>; 151 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 152 }; 153 154 vreg_s12b_1p25: smps12 { 155 regulator-name = "vreg_s12b_1p25"; 156 regulator-min-microvolt = <1256000>; 157 regulator-max-microvolt = <1256000>; 158 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 159 }; 160 161 vreg_l1b_0p88: ldo1 { 162 regulator-name = "vreg_l1b_0p88"; 163 regulator-min-microvolt = <912000>; 164 regulator-max-microvolt = <920000>; 165 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 166 }; 167 168 vreg_l2b_3p07: ldo2 { 169 regulator-name = "vreg_l2b_3p07"; 170 regulator-min-microvolt = <3072000>; 171 regulator-max-microvolt = <3072000>; 172 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 173 }; 174 175 vreg_l3b_0p9: ldo3 { 176 regulator-name = "vreg_l3b_0p9"; 177 regulator-min-microvolt = <904000>; 178 regulator-max-microvolt = <904000>; 179 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 180 }; 181 182 vreg_l5b_0p88: ldo5 { 183 regulator-name = "vreg_l5b_0p88"; 184 regulator-min-microvolt = <880000>; 185 regulator-max-microvolt = <888000>; 186 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 187 regulator-allow-set-load; 188 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 189 RPMH_REGULATOR_MODE_HPM>; 190 }; 191 192 vreg_l6b_1p2: ldo6 { 193 regulator-name = "vreg_l6b_1p2"; 194 regulator-min-microvolt = <1200000>; 195 regulator-max-microvolt = <1208000>; 196 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 197 regulator-allow-set-load; 198 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 199 RPMH_REGULATOR_MODE_HPM>; 200 }; 201 202 vreg_l7b_2p96: ldo7 { 203 regulator-name = "vreg_l7b_2p96"; 204 regulator-min-microvolt = <2504000>; 205 regulator-max-microvolt = <2504000>; 206 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 207 regulator-allow-set-load; 208 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 209 RPMH_REGULATOR_MODE_HPM>; 210 }; 211 212 vreg_l9b_1p2: ldo9 { 213 regulator-name = "vreg_l9b_1p2"; 214 regulator-min-microvolt = <1200000>; 215 regulator-max-microvolt = <1200000>; 216 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 217 regulator-allow-set-load; 218 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 219 RPMH_REGULATOR_MODE_HPM>; 220 }; 221 }; 222 223 regulators-1 { 224 compatible = "qcom,pm8350c-rpmh-regulators"; 225 qcom,pmic-id = "c"; 226 227 vdd-s1-supply = <&vph_pwr>; 228 vdd-s2-supply = <&vph_pwr>; 229 vdd-s3-supply = <&vph_pwr>; 230 vdd-s4-supply = <&vph_pwr>; 231 vdd-s5-supply = <&vph_pwr>; 232 vdd-s6-supply = <&vph_pwr>; 233 vdd-s7-supply = <&vph_pwr>; 234 vdd-s8-supply = <&vph_pwr>; 235 vdd-s9-supply = <&vph_pwr>; 236 vdd-s10-supply = <&vph_pwr>; 237 238 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 239 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 240 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 241 vdd-l6-l9-l11-supply = <&vreg_bob>; 242 vdd-l10-supply = <&vreg_s12b_1p25>; 243 244 vdd-bob-supply = <&vph_pwr>; 245 246 vreg_s1c_1p86: smps1 { 247 regulator-name = "vreg_s1c_1p86"; 248 regulator-min-microvolt = <1856000>; 249 regulator-max-microvolt = <1880000>; 250 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 251 }; 252 253 vreg_bob: bob { 254 regulator-name = "vreg_bob"; 255 regulator-min-microvolt = <3008000>; 256 regulator-max-microvolt = <3960000>; 257 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 258 }; 259 260 vreg_l1c_1p8: ldo1 { 261 regulator-name = "vreg_l1c_1p8"; 262 regulator-min-microvolt = <1800000>; 263 regulator-max-microvolt = <1800000>; 264 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 265 }; 266 267 vreg_l2c_1p8: ldo2 { 268 regulator-name = "vreg_l2c_1p8"; 269 regulator-min-microvolt = <1800000>; 270 regulator-max-microvolt = <1800000>; 271 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 272 }; 273 274 vreg_l6c_1p8: ldo6 { 275 regulator-name = "vreg_l6c_1p8"; 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <2960000>; 278 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 279 }; 280 281 vreg_l9c_2p96: ldo9 { 282 regulator-name = "vreg_l9c_2p96"; 283 regulator-min-microvolt = <2960000>; 284 regulator-max-microvolt = <3008000>; 285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 286 }; 287 288 vreg_l10c_1p2: ldo10 { 289 regulator-name = "vreg_l10c_1p2"; 290 regulator-min-microvolt = <1200000>; 291 regulator-max-microvolt = <1200000>; 292 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 293 }; 294 }; 295}; 296 297&cdsp { 298 status = "okay"; 299 firmware-name = "qcom/sm8350/cdsp.mbn"; 300}; 301 302&dispcc { 303 status = "okay"; 304}; 305 306&mdss_dsi0 { 307 vdda-supply = <&vreg_l6b_1p2>; 308 status = "okay"; 309 310 ports { 311 port@1 { 312 endpoint { 313 remote-endpoint = <<9611_a>; 314 data-lanes = <0 1 2 3>; 315 }; 316 }; 317 }; 318}; 319 320&mdss_dsi0_phy { 321 vdds-supply = <&vreg_l5b_0p88>; 322 status = "okay"; 323}; 324 325&gpi_dma1 { 326 status = "okay"; 327}; 328 329&gpu { 330 status = "okay"; 331 332 zap-shader { 333 firmware-name = "qcom/sm8350/a660_zap.mbn"; 334 }; 335}; 336 337&i2c13 { 338 clock-frequency = <100000>; 339 340 status = "okay"; 341 342 typec-mux@42 { 343 compatible = "fcs,fsa4480"; 344 reg = <0x42>; 345 346 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; 347 348 vcc-supply = <&vreg_bob>; 349 mode-switch; 350 orientation-switch; 351 svid = /bits/ 16 <0xff01>; 352 353 ports { 354 #address-cells = <1>; 355 #size-cells = <0>; 356 357 port@0 { 358 reg = <0>; 359 360 fsa4480_sbu_mux: endpoint { 361 remote-endpoint = <&pmic_glink_sbu>; 362 }; 363 }; 364 }; 365 }; 366}; 367 368&i2c15 { 369 clock-frequency = <400000>; 370 status = "okay"; 371 372 lt9611_codec: hdmi-bridge@2b { 373 compatible = "lontium,lt9611uxc"; 374 reg = <0x2b>; 375 376 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 377 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 378 379 vdd-supply = <<9611_1v2>; 380 vcc-supply = <<9611_3v3>; 381 382 pinctrl-names = "default"; 383 pinctrl-0 = <<9611_state>; 384 385 ports { 386 #address-cells = <1>; 387 #size-cells = <0>; 388 389 port@0 { 390 reg = <0>; 391 392 lt9611_a: endpoint { 393 remote-endpoint = <&mdss_dsi0_out>; 394 }; 395 }; 396 397 port@2 { 398 reg = <2>; 399 400 lt9611_out: endpoint { 401 remote-endpoint = <&hdmi_con>; 402 }; 403 }; 404 }; 405 }; 406}; 407 408&mdss { 409 status = "okay"; 410}; 411 412&mdss_dp { 413 status = "okay"; 414 415 ports { 416 port@1 { 417 reg = <1>; 418 419 mdss_dp0_out: endpoint { 420 data-lanes = <0 1>; 421 remote-endpoint = <&usb_1_qmpphy_dp_in>; 422 }; 423 }; 424 }; 425}; 426 427&mpss { 428 status = "okay"; 429 firmware-name = "qcom/sm8350/modem.mbn"; 430}; 431 432&pcie0 { 433 pinctrl-names = "default"; 434 pinctrl-0 = <&pcie0_default_state>; 435 436 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 437 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 438 439 status = "okay"; 440}; 441 442&pcie0_phy { 443 vdda-phy-supply = <&vreg_l5b_0p88>; 444 vdda-pll-supply = <&vreg_l6b_1p2>; 445 446 status = "okay"; 447}; 448 449&pcie1 { 450 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 451 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 452 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pcie1_default_state>; 455 456 status = "okay"; 457}; 458 459&pcie1_phy { 460 status = "okay"; 461 vdda-phy-supply = <&vreg_l5b_0p88>; 462 vdda-pll-supply = <&vreg_l6b_1p2>; 463}; 464 465&qupv3_id_0 { 466 status = "okay"; 467}; 468 469&qupv3_id_1 { 470 status = "okay"; 471}; 472 473&qupv3_id_2 { 474 status = "okay"; 475}; 476 477&slpi { 478 status = "okay"; 479 firmware-name = "qcom/sm8350/slpi.mbn"; 480}; 481 482&tlmm { 483 gpio-reserved-ranges = <52 8>; 484 485 gpio-line-names = 486 "APPS_I2C_SDA", /* GPIO_0 */ 487 "APPS_I2C_SCL", 488 "FSA_INT_N", 489 "USER_LED3_EN", 490 "SMBUS_SDA_1P8", 491 "SMBUS_SCL_1P8", 492 "2M2_3P3_EN", 493 "ALERT_DUAL_M2_N", 494 "EXP_UART_CTS", 495 "EXP_UART_RFR", 496 "EXP_UART_TX", /* GPIO_10 */ 497 "EXP_UART_RX", 498 "NC", 499 "NC", 500 "RCM_MARKER1", 501 "WSA0_EN", 502 "CAM1_RESET_N", 503 "CAM0_RESET_N", 504 "DEBUG_UART_TX", 505 "DEBUG_UART_RX", 506 "TS_I2C_SDA", /* GPIO_20 */ 507 "TS_I2C_SCL", 508 "TS_RESET_N", 509 "TS_INT_N", 510 "DISP0_RESET_N", 511 "DISP1_RESET_N", 512 "ETH_RESET", 513 "RCM_MARKER2", 514 "CAM_DC_MIPI_MUX_EN", 515 "CAM_DC_MIPI_MUX_SEL", 516 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 517 "AFC_PHY_TA_D_MINUS", 518 "PM8008_1_IRQ", 519 "PM8008_1_RESET_N", 520 "PM8008_2_IRQ", 521 "PM8008_2_RESET_N", 522 "CAM_DC_I3C_SDA", 523 "CAM_DC_I3C_SCL", 524 "FP_INT_N", 525 "FP_WUHB_INT_N", 526 "SMB_SPMI_DATA", /* GPIO_40 */ 527 "SMB_SPMI_CLK", 528 "USB_HUB_RESET", 529 "FORCE_USB_BOOT", 530 "LRF_IRQ", 531 "NC", 532 "IMU2_INT", 533 "HDMI_3P3_EN", 534 "HDMI_RSTN", 535 "HDMI_1P2_EN", 536 "HDMI_INT", /* GPIO_50 */ 537 "USB1_ID", 538 "FP_SPI_MISO", 539 "FP_SPI_MOSI", 540 "FP_SPI_CLK", 541 "FP_SPI_CS_N", 542 "NFC_ESE_SPI_MISO", 543 "NFC_ESE_SPI_MOSI", 544 "NFC_ESE_SPI_CLK", 545 "NFC_ESE_SPI_CS", 546 "NFC_I2C_SDA", /* GPIO_60 */ 547 "NFC_I2C_SCLC", 548 "NFC_EN", 549 "NFC_CLK_REQ", 550 "HST_WLAN_EN", 551 "HST_BT_EN", 552 "HST_SW_CTRL", 553 "NC", 554 "HST_BT_UART_CTS", 555 "HST_BT_UART_RFR", 556 "HST_BT_UART_TX", /* GPIO_70 */ 557 "HST_BT_UART_RX", 558 "CAM_DC_SPI0_MISO", 559 "CAM_DC_SPI0_MOSI", 560 "CAM_DC_SPI0_CLK", 561 "CAM_DC_SPI0_CS_N", 562 "CAM_DC_SPI1_MISO", 563 "CAM_DC_SPI1_MOSI", 564 "CAM_DC_SPI1_CLK", 565 "CAM_DC_SPI1_CS_N", 566 "HALL_INT_N", /* GPIO_80 */ 567 "USB_PHY_PS", 568 "MDP_VSYNC_P", 569 "MDP_VSYNC_S", 570 "ETH_3P3_EN", 571 "RADAR_INT", 572 "NFC_DWL_REQ", 573 "SM_GPIO_87", 574 "WCD_RESET_N", 575 "ALSP_INT_N", 576 "PRESS_INT", /* GPIO_90 */ 577 "SAR_INT_N", 578 "SD_CARD_DET_N", 579 "NC", 580 "PCIE0_RESET_N", 581 "PCIE0_CLK_REQ_N", 582 "PCIE0_WAKE_N", 583 "PCIE1_RESET_N", 584 "PCIE1_CLK_REQ_N", 585 "PCIE1_WAKE_N", 586 "CAM_MCLK0", /* GPIO_100 */ 587 "CAM_MCLK1", 588 "CAM_MCLK2", 589 "CAM_MCLK3", 590 "CAM_MCLK4", 591 "CAM_MCLK5", 592 "CAM2_RESET_N", 593 "CCI_I2C0_SDA", 594 "CCI_I2C0_SCL", 595 "CCI_I2C1_SDA", 596 "CCI_I2C1_SCL", /* GPIO_110 */ 597 "CCI_I2C2_SDA", 598 "CCI_I2C2_SCL", 599 "CCI_I2C3_SDA", 600 "CCI_I2C3_SCL", 601 "CAM5_RESET_N", 602 "CAM4_RESET_N", 603 "CAM3_RESET_N", 604 "IMU1_INT", 605 "MAG_INT_N", 606 "MI2S2_I2S_SCK", /* GPIO_120 */ 607 "MI2S2_I2S_DAT0", 608 "MI2S2_I2S_WS", 609 "HIFI_DAC_I2S_MCLK", 610 "MI2S2_I2S_DAT1", 611 "HIFI_DAC_I2S_SCK", 612 "HIFI_DAC_I2S_DAT0", 613 "NC", 614 "HIFI_DAC_I2S_WS", 615 "HST_BT_WLAN_SLIMBUS_CLK", 616 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 617 "BT_LED_EN", 618 "WLAN_LED_EN", 619 "NC", 620 "NC", 621 "NC", 622 "UIM2_PRESENT", 623 "NC", 624 "NC", 625 "NC", 626 "UIM1_PRESENT", /* GPIO_140 */ 627 "NC", 628 "SM_RFFE0_DATA", 629 "NC", 630 "SM_RFFE1_DATA", 631 "SM_MSS_GRFC4", 632 "SM_MSS_GRFC5", 633 "SM_MSS_GRFC6", 634 "SM_MSS_GRFC7", 635 "SM_RFFE4_CLK", 636 "SM_RFFE4_DATA", /* GPIO_150 */ 637 "WLAN_COEX_UART1_RX", 638 "WLAN_COEX_UART1_TX", 639 "HST_SW_CTRL", 640 "DSI0_STATUS", 641 "DSI1_STATUS", 642 "APPS_PBL_BOOT_SPEED_1", 643 "APPS_BOOT_FROM_ROM", 644 "APPS_PBL_BOOT_SPEED_0", 645 "QLINK0_REQ", 646 "QLINK0_EN", /* GPIO_160 */ 647 "QLINK0_WMSS_RESET_N", 648 "NC", 649 "NC", 650 "NC", 651 "NC", 652 "NC", 653 "NC", 654 "WCD_SWR_TX_CLK", 655 "WCD_SWR_TX_DATA0", 656 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 657 "WCD_SWR_RX_CLK", 658 "WCD_SWR_RX_DATA0", 659 "WCD_SWR_RX_DATA1", 660 "DMIC01_CLK", 661 "DMIC01_DATA", 662 "DMIC23_CLK", 663 "DMIC23_DATA", 664 "WSA_SWR_CLK", 665 "WSA_SWR_DATA", 666 "DMIC45_CLK", /* GPIO_180 */ 667 "DMIC45_DATA", 668 "WCD_SWR_TX_DATA2", 669 "SENSOR_I3C_SDA", 670 "SENSOR_I3C_SCL", 671 "CAM_OIS0_I3C_SDA", 672 "CAM_OIS0_I3C_SCL", 673 "IMU_SPI_MISO", 674 "IMU_SPI_MOSI", 675 "IMU_SPI_CLK", 676 "IMU_SPI_CS_N", /* GPIO_190 */ 677 "MAG_I2C_SDA", 678 "MAG_I2C_SCL", 679 "SENSOR_I2C_SDA", 680 "SENSOR_I2C_SCL", 681 "RADAR_SPI_MISO", 682 "RADAR_SPI_MOSI", 683 "RADAR_SPI_CLK", 684 "RADAR_SPI_CS_N", 685 "HST_BLE_UART_TX", 686 "HST_BLE_UART_RX", /* GPIO_200 */ 687 "HST_WLAN_UART_TX", 688 "HST_WLAN_UART_RX"; 689 690 pcie0_default_state: pcie0-default-state { 691 perst-pins { 692 pins = "gpio94"; 693 function = "gpio"; 694 drive-strength = <2>; 695 bias-pull-down; 696 }; 697 698 clkreq-pins { 699 pins = "gpio95"; 700 function = "pcie0_clkreqn"; 701 drive-strength = <2>; 702 bias-pull-up; 703 }; 704 705 wake-pins { 706 pins = "gpio96"; 707 function = "gpio"; 708 drive-strength = <2>; 709 bias-pull-up; 710 }; 711 }; 712 713 pcie1_default_state: pcie1-default-state { 714 perst-pins { 715 pins = "gpio97"; 716 function = "gpio"; 717 drive-strength = <2>; 718 bias-pull-down; 719 }; 720 721 clkreq-pins { 722 pins = "gpio98"; 723 function = "pcie1_clkreqn"; 724 drive-strength = <2>; 725 bias-pull-up; 726 }; 727 728 wake-pins { 729 pins = "gpio99"; 730 function = "gpio"; 731 drive-strength = <2>; 732 bias-pull-up; 733 }; 734 }; 735}; 736 737&uart2 { 738 status = "okay"; 739}; 740 741&ufs_mem_hc { 742 status = "okay"; 743 744 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 745 746 vcc-supply = <&vreg_l7b_2p96>; 747 vcc-max-microamp = <800000>; 748 vccq-supply = <&vreg_l9b_1p2>; 749 vccq-max-microamp = <900000>; 750}; 751 752&ufs_mem_phy { 753 status = "okay"; 754 755 vdda-phy-supply = <&vreg_l5b_0p88>; 756 vdda-pll-supply = <&vreg_l6b_1p2>; 757}; 758 759&usb_1 { 760 status = "okay"; 761}; 762 763&usb_1_dwc3 { 764 dr_mode = "otg"; 765 usb-role-switch; 766}; 767 768&usb_1_dwc3_hs { 769 remote-endpoint = <&pmic_glink_hs_in>; 770}; 771 772&usb_1_dwc3_ss { 773 remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; 774}; 775 776&usb_1_hsphy { 777 status = "okay"; 778 779 vdda-pll-supply = <&vreg_l5b_0p88>; 780 vdda18-supply = <&vreg_l1c_1p8>; 781 vdda33-supply = <&vreg_l2b_3p07>; 782}; 783 784&usb_1_qmpphy { 785 status = "okay"; 786 787 vdda-phy-supply = <&vreg_l6b_1p2>; 788 vdda-pll-supply = <&vreg_l1b_0p88>; 789 790 orientation-switch; 791}; 792 793&usb_1_qmpphy_dp_in { 794 remote-endpoint = <&mdss_dp0_out>; 795}; 796 797&usb_1_qmpphy_out { 798 remote-endpoint = <&pmic_glink_ss_in>; 799}; 800 801&usb_1_qmpphy_usb_ss_in { 802 remote-endpoint = <&usb_1_dwc3_ss>; 803}; 804 805&usb_2 { 806 status = "okay"; 807}; 808 809&usb_2_dwc3 { 810 dr_mode = "host"; 811 812 pinctrl-names = "default"; 813 pinctrl-0 = <&usb_hub_enabled_state>; 814}; 815 816&usb_2_hsphy { 817 status = "okay"; 818 819 vdda-pll-supply = <&vreg_l5b_0p88>; 820 vdda18-supply = <&vreg_l1c_1p8>; 821 vdda33-supply = <&vreg_l2b_3p07>; 822}; 823 824&usb_2_qmpphy { 825 status = "okay"; 826 827 vdda-phy-supply = <&vreg_l6b_1p2>; 828 vdda-pll-supply = <&vreg_l5b_0p88>; 829}; 830 831/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 832 833&tlmm { 834 usb_hub_enabled_state: usb-hub-enabled-state { 835 pins = "gpio42"; 836 function = "gpio"; 837 838 drive-strength = <2>; 839 output-low; 840 }; 841 842 lt9611_state: lt9611-state { 843 rst-pins { 844 pins = "gpio48"; 845 function = "gpio"; 846 847 output-high; 848 input-disable; 849 }; 850 851 irq-pins { 852 pins = "gpio50"; 853 function = "gpio"; 854 bias-disable; 855 }; 856 }; 857}; 858