160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 117858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> 127858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> 1315049bb5SKonrad Dybcio#include <dt-bindings/dma/qcom-gpi.h> 1475948800SKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1579a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 167c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 17e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 18b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1963e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 2060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 2163e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 22bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 23ca79a997SBryan O'Donoghue#include <dt-bindings/clock/qcom,camcc-sm8250.h> 245b9ec225Sjonathan@marek.ca#include <dt-bindings/clock/qcom,videocc-sm8250.h> 2560378f1aSVenkata Narendra Kumar Gutta 2660378f1aSVenkata Narendra Kumar Gutta/ { 2760378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2860378f1aSVenkata Narendra Kumar Gutta 2960378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 3060378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 3160378f1aSVenkata Narendra Kumar Gutta 32e5813b15SDmitry Baryshkov aliases { 33e5813b15SDmitry Baryshkov i2c0 = &i2c0; 34e5813b15SDmitry Baryshkov i2c1 = &i2c1; 35e5813b15SDmitry Baryshkov i2c2 = &i2c2; 36e5813b15SDmitry Baryshkov i2c3 = &i2c3; 37e5813b15SDmitry Baryshkov i2c4 = &i2c4; 38e5813b15SDmitry Baryshkov i2c5 = &i2c5; 39e5813b15SDmitry Baryshkov i2c6 = &i2c6; 40e5813b15SDmitry Baryshkov i2c7 = &i2c7; 41e5813b15SDmitry Baryshkov i2c8 = &i2c8; 42e5813b15SDmitry Baryshkov i2c9 = &i2c9; 43e5813b15SDmitry Baryshkov i2c10 = &i2c10; 44e5813b15SDmitry Baryshkov i2c11 = &i2c11; 45e5813b15SDmitry Baryshkov i2c12 = &i2c12; 46e5813b15SDmitry Baryshkov i2c13 = &i2c13; 47e5813b15SDmitry Baryshkov i2c14 = &i2c14; 48e5813b15SDmitry Baryshkov i2c15 = &i2c15; 49e5813b15SDmitry Baryshkov i2c16 = &i2c16; 50e5813b15SDmitry Baryshkov i2c17 = &i2c17; 51e5813b15SDmitry Baryshkov i2c18 = &i2c18; 52e5813b15SDmitry Baryshkov i2c19 = &i2c19; 53e5813b15SDmitry Baryshkov spi0 = &spi0; 54e5813b15SDmitry Baryshkov spi1 = &spi1; 55e5813b15SDmitry Baryshkov spi2 = &spi2; 56e5813b15SDmitry Baryshkov spi3 = &spi3; 57e5813b15SDmitry Baryshkov spi4 = &spi4; 58e5813b15SDmitry Baryshkov spi5 = &spi5; 59e5813b15SDmitry Baryshkov spi6 = &spi6; 60e5813b15SDmitry Baryshkov spi7 = &spi7; 61e5813b15SDmitry Baryshkov spi8 = &spi8; 62e5813b15SDmitry Baryshkov spi9 = &spi9; 63e5813b15SDmitry Baryshkov spi10 = &spi10; 64e5813b15SDmitry Baryshkov spi11 = &spi11; 65e5813b15SDmitry Baryshkov spi12 = &spi12; 66e5813b15SDmitry Baryshkov spi13 = &spi13; 67e5813b15SDmitry Baryshkov spi14 = &spi14; 68e5813b15SDmitry Baryshkov spi15 = &spi15; 69e5813b15SDmitry Baryshkov spi16 = &spi16; 70e5813b15SDmitry Baryshkov spi17 = &spi17; 71e5813b15SDmitry Baryshkov spi18 = &spi18; 72e5813b15SDmitry Baryshkov spi19 = &spi19; 73e5813b15SDmitry Baryshkov }; 74e5813b15SDmitry Baryshkov 7560378f1aSVenkata Narendra Kumar Gutta chosen { }; 7660378f1aSVenkata Narendra Kumar Gutta 7760378f1aSVenkata Narendra Kumar Gutta clocks { 7860378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7960378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 8060378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8160378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 8260378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 8360378f1aSVenkata Narendra Kumar Gutta }; 8460378f1aSVenkata Narendra Kumar Gutta 8560378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8660378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 879ff8b059SJonathan Marek clock-frequency = <32768>; 8860378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8960378f1aSVenkata Narendra Kumar Gutta }; 9060378f1aSVenkata Narendra Kumar Gutta }; 9160378f1aSVenkata Narendra Kumar Gutta 9260378f1aSVenkata Narendra Kumar Gutta cpus { 9360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 9460378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9560378f1aSVenkata Narendra Kumar Gutta 9660378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 100d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 10160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1026aabed55SDanny Lin capacity-dmips-mhz = <448>; 1036aabed55SDanny Lin dynamic-power-coefficient = <205>; 10460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 10532bc936dSMaulik Shah power-domains = <&CPU_PD0>; 10632bc936dSMaulik Shah power-domain-names = "psci"; 10702ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1088e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1098e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1108e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 111bac12f25SAmit Kucheria #cooling-cells = <2>; 11260378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 11360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1149435294cSPierre Gondois cache-level = <2>; 115ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 116ac1d8a8eSKrzysztof Kozlowski cache-unified; 11760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11860378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 11960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1209435294cSPierre Gondois cache-level = <3>; 121ac1d8a8eSKrzysztof Kozlowski cache-size = <0x400000>; 122ac1d8a8eSKrzysztof Kozlowski cache-unified; 12360378f1aSVenkata Narendra Kumar Gutta }; 12460378f1aSVenkata Narendra Kumar Gutta }; 12560378f1aSVenkata Narendra Kumar Gutta }; 12660378f1aSVenkata Narendra Kumar Gutta 12760378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 12860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 131d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 13260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1336aabed55SDanny Lin capacity-dmips-mhz = <448>; 1346aabed55SDanny Lin dynamic-power-coefficient = <205>; 13560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 13632bc936dSMaulik Shah power-domains = <&CPU_PD1>; 13732bc936dSMaulik Shah power-domain-names = "psci"; 13802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1398e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1408e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1418e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 142bac12f25SAmit Kucheria #cooling-cells = <2>; 14360378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 14460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1459435294cSPierre Gondois cache-level = <2>; 146ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 147ac1d8a8eSKrzysztof Kozlowski cache-unified; 14860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 14960378f1aSVenkata Narendra Kumar Gutta }; 15060378f1aSVenkata Narendra Kumar Gutta }; 15160378f1aSVenkata Narendra Kumar Gutta 15260378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 15360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 15460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 15560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 156d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 15760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1586aabed55SDanny Lin capacity-dmips-mhz = <448>; 1596aabed55SDanny Lin dynamic-power-coefficient = <205>; 16060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 16132bc936dSMaulik Shah power-domains = <&CPU_PD2>; 16232bc936dSMaulik Shah power-domain-names = "psci"; 16302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1648e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1658e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1668e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 167bac12f25SAmit Kucheria #cooling-cells = <2>; 16860378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 16960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1709435294cSPierre Gondois cache-level = <2>; 171ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 172ac1d8a8eSKrzysztof Kozlowski cache-unified; 17360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17460378f1aSVenkata Narendra Kumar Gutta }; 17560378f1aSVenkata Narendra Kumar Gutta }; 17660378f1aSVenkata Narendra Kumar Gutta 17760378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 17860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 17960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 181d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 18260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1836aabed55SDanny Lin capacity-dmips-mhz = <448>; 1846aabed55SDanny Lin dynamic-power-coefficient = <205>; 18560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 18632bc936dSMaulik Shah power-domains = <&CPU_PD3>; 18732bc936dSMaulik Shah power-domain-names = "psci"; 18802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1898e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1908e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1918e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 192bac12f25SAmit Kucheria #cooling-cells = <2>; 19360378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 19460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1959435294cSPierre Gondois cache-level = <2>; 196ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 197ac1d8a8eSKrzysztof Kozlowski cache-unified; 19860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 19960378f1aSVenkata Narendra Kumar Gutta }; 20060378f1aSVenkata Narendra Kumar Gutta }; 20160378f1aSVenkata Narendra Kumar Gutta 20260378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 20360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 20460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 20560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 206d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 20760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2086aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2096aabed55SDanny Lin dynamic-power-coefficient = <379>; 21060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 21132bc936dSMaulik Shah power-domains = <&CPU_PD4>; 21232bc936dSMaulik Shah power-domain-names = "psci"; 21302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2148e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 2158e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2168e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 217bac12f25SAmit Kucheria #cooling-cells = <2>; 21860378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 21960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2209435294cSPierre Gondois cache-level = <2>; 221ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 222ac1d8a8eSKrzysztof Kozlowski cache-unified; 22360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 22460378f1aSVenkata Narendra Kumar Gutta }; 22560378f1aSVenkata Narendra Kumar Gutta }; 22660378f1aSVenkata Narendra Kumar Gutta 22760378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 22860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 22960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 23060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 231d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 23260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2336aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2346aabed55SDanny Lin dynamic-power-coefficient = <379>; 23560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 23632bc936dSMaulik Shah power-domains = <&CPU_PD5>; 23732bc936dSMaulik Shah power-domain-names = "psci"; 23802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2398e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 2408e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2418e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 242bac12f25SAmit Kucheria #cooling-cells = <2>; 24360378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 24460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2459435294cSPierre Gondois cache-level = <2>; 246ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 247ac1d8a8eSKrzysztof Kozlowski cache-unified; 24860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 24960378f1aSVenkata Narendra Kumar Gutta }; 25060378f1aSVenkata Narendra Kumar Gutta 25160378f1aSVenkata Narendra Kumar Gutta }; 25260378f1aSVenkata Narendra Kumar Gutta 25360378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 25460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 25560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 25660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 257d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 25860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2596aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2606aabed55SDanny Lin dynamic-power-coefficient = <379>; 26160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 26232bc936dSMaulik Shah power-domains = <&CPU_PD6>; 26332bc936dSMaulik Shah power-domain-names = "psci"; 26402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2658e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 2668e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2678e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 268bac12f25SAmit Kucheria #cooling-cells = <2>; 26960378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 27060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2719435294cSPierre Gondois cache-level = <2>; 272ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 273ac1d8a8eSKrzysztof Kozlowski cache-unified; 27460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 27560378f1aSVenkata Narendra Kumar Gutta }; 27660378f1aSVenkata Narendra Kumar Gutta }; 27760378f1aSVenkata Narendra Kumar Gutta 27860378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 27960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 28060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 28160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 282d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 2>; 28360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2846aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2856aabed55SDanny Lin dynamic-power-coefficient = <444>; 28660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 28732bc936dSMaulik Shah power-domains = <&CPU_PD7>; 28832bc936dSMaulik Shah power-domain-names = "psci"; 28902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 2908e0e8016SThara Gopinath operating-points-v2 = <&cpu7_opp_table>; 2918e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2928e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 293bac12f25SAmit Kucheria #cooling-cells = <2>; 29460378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 29560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2969435294cSPierre Gondois cache-level = <2>; 297ac1d8a8eSKrzysztof Kozlowski cache-size = <0x80000>; 298ac1d8a8eSKrzysztof Kozlowski cache-unified; 29960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 30060378f1aSVenkata Narendra Kumar Gutta }; 30160378f1aSVenkata Narendra Kumar Gutta }; 302b4791e69SDanny Lin 303b4791e69SDanny Lin cpu-map { 304b4791e69SDanny Lin cluster0 { 305b4791e69SDanny Lin core0 { 306b4791e69SDanny Lin cpu = <&CPU0>; 307b4791e69SDanny Lin }; 308b4791e69SDanny Lin 309b4791e69SDanny Lin core1 { 310b4791e69SDanny Lin cpu = <&CPU1>; 311b4791e69SDanny Lin }; 312b4791e69SDanny Lin 313b4791e69SDanny Lin core2 { 314b4791e69SDanny Lin cpu = <&CPU2>; 315b4791e69SDanny Lin }; 316b4791e69SDanny Lin 317b4791e69SDanny Lin core3 { 318b4791e69SDanny Lin cpu = <&CPU3>; 319b4791e69SDanny Lin }; 320b4791e69SDanny Lin 321b4791e69SDanny Lin core4 { 322b4791e69SDanny Lin cpu = <&CPU4>; 323b4791e69SDanny Lin }; 324b4791e69SDanny Lin 325b4791e69SDanny Lin core5 { 326b4791e69SDanny Lin cpu = <&CPU5>; 327b4791e69SDanny Lin }; 328b4791e69SDanny Lin 329b4791e69SDanny Lin core6 { 330b4791e69SDanny Lin cpu = <&CPU6>; 331b4791e69SDanny Lin }; 332b4791e69SDanny Lin 333b4791e69SDanny Lin core7 { 334b4791e69SDanny Lin cpu = <&CPU7>; 335b4791e69SDanny Lin }; 336b4791e69SDanny Lin }; 337b4791e69SDanny Lin }; 33832bc936dSMaulik Shah 33932bc936dSMaulik Shah idle-states { 34032bc936dSMaulik Shah entry-method = "psci"; 34132bc936dSMaulik Shah 34232bc936dSMaulik Shah LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 34332bc936dSMaulik Shah compatible = "arm,idle-state"; 34432bc936dSMaulik Shah idle-state-name = "silver-rail-power-collapse"; 34532bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 34632bc936dSMaulik Shah entry-latency-us = <360>; 34732bc936dSMaulik Shah exit-latency-us = <531>; 34832bc936dSMaulik Shah min-residency-us = <3934>; 34932bc936dSMaulik Shah local-timer-stop; 35032bc936dSMaulik Shah }; 35132bc936dSMaulik Shah 35232bc936dSMaulik Shah BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 35332bc936dSMaulik Shah compatible = "arm,idle-state"; 35432bc936dSMaulik Shah idle-state-name = "gold-rail-power-collapse"; 35532bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 35632bc936dSMaulik Shah entry-latency-us = <702>; 35732bc936dSMaulik Shah exit-latency-us = <1061>; 35832bc936dSMaulik Shah min-residency-us = <4488>; 35932bc936dSMaulik Shah local-timer-stop; 36032bc936dSMaulik Shah }; 36132bc936dSMaulik Shah }; 36232bc936dSMaulik Shah 36332bc936dSMaulik Shah domain-idle-states { 36432bc936dSMaulik Shah CLUSTER_SLEEP_0: cluster-sleep-0 { 36532bc936dSMaulik Shah compatible = "domain-idle-state"; 36632bc936dSMaulik Shah idle-state-name = "cluster-llcc-off"; 36732bc936dSMaulik Shah arm,psci-suspend-param = <0x4100c244>; 36832bc936dSMaulik Shah entry-latency-us = <3264>; 36932bc936dSMaulik Shah exit-latency-us = <6562>; 37032bc936dSMaulik Shah min-residency-us = <9987>; 37132bc936dSMaulik Shah local-timer-stop; 37232bc936dSMaulik Shah }; 37332bc936dSMaulik Shah }; 37460378f1aSVenkata Narendra Kumar Gutta }; 37560378f1aSVenkata Narendra Kumar Gutta 3760e3e6546SKrzysztof Kozlowski cpu0_opp_table: opp-table-cpu0 { 3778e0e8016SThara Gopinath compatible = "operating-points-v2"; 3788e0e8016SThara Gopinath opp-shared; 3798e0e8016SThara Gopinath 3808e0e8016SThara Gopinath cpu0_opp1: opp-300000000 { 3818e0e8016SThara Gopinath opp-hz = /bits/ 64 <300000000>; 3828e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3838e0e8016SThara Gopinath }; 3848e0e8016SThara Gopinath 3858e0e8016SThara Gopinath cpu0_opp2: opp-403200000 { 3868e0e8016SThara Gopinath opp-hz = /bits/ 64 <403200000>; 3878e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3888e0e8016SThara Gopinath }; 3898e0e8016SThara Gopinath 3908e0e8016SThara Gopinath cpu0_opp3: opp-518400000 { 3918e0e8016SThara Gopinath opp-hz = /bits/ 64 <518400000>; 3928e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3938e0e8016SThara Gopinath }; 3948e0e8016SThara Gopinath 3958e0e8016SThara Gopinath cpu0_opp4: opp-614400000 { 3968e0e8016SThara Gopinath opp-hz = /bits/ 64 <614400000>; 3978e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3988e0e8016SThara Gopinath }; 3998e0e8016SThara Gopinath 4008e0e8016SThara Gopinath cpu0_opp5: opp-691200000 { 4018e0e8016SThara Gopinath opp-hz = /bits/ 64 <691200000>; 4028e0e8016SThara Gopinath opp-peak-kBps = <800000 19660800>; 4038e0e8016SThara Gopinath }; 4048e0e8016SThara Gopinath 4058e0e8016SThara Gopinath cpu0_opp6: opp-787200000 { 4068e0e8016SThara Gopinath opp-hz = /bits/ 64 <787200000>; 4078e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4088e0e8016SThara Gopinath }; 4098e0e8016SThara Gopinath 4108e0e8016SThara Gopinath cpu0_opp7: opp-883200000 { 4118e0e8016SThara Gopinath opp-hz = /bits/ 64 <883200000>; 4128e0e8016SThara Gopinath opp-peak-kBps = <1804000 23347200>; 4138e0e8016SThara Gopinath }; 4148e0e8016SThara Gopinath 4158e0e8016SThara Gopinath cpu0_opp8: opp-979200000 { 4168e0e8016SThara Gopinath opp-hz = /bits/ 64 <979200000>; 4178e0e8016SThara Gopinath opp-peak-kBps = <1804000 26419200>; 4188e0e8016SThara Gopinath }; 4198e0e8016SThara Gopinath 4208e0e8016SThara Gopinath cpu0_opp9: opp-1075200000 { 4218e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 4228e0e8016SThara Gopinath opp-peak-kBps = <1804000 29491200>; 4238e0e8016SThara Gopinath }; 4248e0e8016SThara Gopinath 4258e0e8016SThara Gopinath cpu0_opp10: opp-1171200000 { 4268e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4278e0e8016SThara Gopinath opp-peak-kBps = <1804000 32563200>; 4288e0e8016SThara Gopinath }; 4298e0e8016SThara Gopinath 4308e0e8016SThara Gopinath cpu0_opp11: opp-1248000000 { 4318e0e8016SThara Gopinath opp-hz = /bits/ 64 <1248000000>; 4328e0e8016SThara Gopinath opp-peak-kBps = <1804000 36249600>; 4338e0e8016SThara Gopinath }; 4348e0e8016SThara Gopinath 4358e0e8016SThara Gopinath cpu0_opp12: opp-1344000000 { 4368e0e8016SThara Gopinath opp-hz = /bits/ 64 <1344000000>; 4378e0e8016SThara Gopinath opp-peak-kBps = <2188000 36249600>; 4388e0e8016SThara Gopinath }; 4398e0e8016SThara Gopinath 4408e0e8016SThara Gopinath cpu0_opp13: opp-1420800000 { 4418e0e8016SThara Gopinath opp-hz = /bits/ 64 <1420800000>; 4428e0e8016SThara Gopinath opp-peak-kBps = <2188000 39321600>; 4438e0e8016SThara Gopinath }; 4448e0e8016SThara Gopinath 4458e0e8016SThara Gopinath cpu0_opp14: opp-1516800000 { 4468e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 4478e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4488e0e8016SThara Gopinath }; 4498e0e8016SThara Gopinath 4508e0e8016SThara Gopinath cpu0_opp15: opp-1612800000 { 4518e0e8016SThara Gopinath opp-hz = /bits/ 64 <1612800000>; 4528e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4538e0e8016SThara Gopinath }; 4548e0e8016SThara Gopinath 4558e0e8016SThara Gopinath cpu0_opp16: opp-1708800000 { 4568e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 4578e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4588e0e8016SThara Gopinath }; 4598e0e8016SThara Gopinath 4608e0e8016SThara Gopinath cpu0_opp17: opp-1804800000 { 4618e0e8016SThara Gopinath opp-hz = /bits/ 64 <1804800000>; 4628e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4638e0e8016SThara Gopinath }; 4648e0e8016SThara Gopinath }; 4658e0e8016SThara Gopinath 4660e3e6546SKrzysztof Kozlowski cpu4_opp_table: opp-table-cpu4 { 4678e0e8016SThara Gopinath compatible = "operating-points-v2"; 4688e0e8016SThara Gopinath opp-shared; 4698e0e8016SThara Gopinath 4708e0e8016SThara Gopinath cpu4_opp1: opp-710400000 { 4718e0e8016SThara Gopinath opp-hz = /bits/ 64 <710400000>; 4728e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4738e0e8016SThara Gopinath }; 4748e0e8016SThara Gopinath 4758e0e8016SThara Gopinath cpu4_opp2: opp-825600000 { 4768e0e8016SThara Gopinath opp-hz = /bits/ 64 <825600000>; 4778e0e8016SThara Gopinath opp-peak-kBps = <2188000 23347200>; 4788e0e8016SThara Gopinath }; 4798e0e8016SThara Gopinath 4808e0e8016SThara Gopinath cpu4_opp3: opp-940800000 { 4818e0e8016SThara Gopinath opp-hz = /bits/ 64 <940800000>; 4828e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 4838e0e8016SThara Gopinath }; 4848e0e8016SThara Gopinath 4858e0e8016SThara Gopinath cpu4_opp4: opp-1056000000 { 4868e0e8016SThara Gopinath opp-hz = /bits/ 64 <1056000000>; 4878e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 4888e0e8016SThara Gopinath }; 4898e0e8016SThara Gopinath 4908e0e8016SThara Gopinath cpu4_opp5: opp-1171200000 { 4918e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4928e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 4938e0e8016SThara Gopinath }; 4948e0e8016SThara Gopinath 4958e0e8016SThara Gopinath cpu4_opp6: opp-1286400000 { 4968e0e8016SThara Gopinath opp-hz = /bits/ 64 <1286400000>; 4978e0e8016SThara Gopinath opp-peak-kBps = <4068000 29491200>; 4988e0e8016SThara Gopinath }; 4998e0e8016SThara Gopinath 5008e0e8016SThara Gopinath cpu4_opp7: opp-1382400000 { 5018e0e8016SThara Gopinath opp-hz = /bits/ 64 <1382400000>; 5028e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5038e0e8016SThara Gopinath }; 5048e0e8016SThara Gopinath 5058e0e8016SThara Gopinath cpu4_opp8: opp-1478400000 { 5068e0e8016SThara Gopinath opp-hz = /bits/ 64 <1478400000>; 5078e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5088e0e8016SThara Gopinath }; 5098e0e8016SThara Gopinath 5108e0e8016SThara Gopinath cpu4_opp9: opp-1574400000 { 5118e0e8016SThara Gopinath opp-hz = /bits/ 64 <1574400000>; 5128e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 5138e0e8016SThara Gopinath }; 5148e0e8016SThara Gopinath 5158e0e8016SThara Gopinath cpu4_opp10: opp-1670400000 { 5168e0e8016SThara Gopinath opp-hz = /bits/ 64 <1670400000>; 5178e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 5188e0e8016SThara Gopinath }; 5198e0e8016SThara Gopinath 5208e0e8016SThara Gopinath cpu4_opp11: opp-1766400000 { 5218e0e8016SThara Gopinath opp-hz = /bits/ 64 <1766400000>; 5228e0e8016SThara Gopinath opp-peak-kBps = <5412000 45465600>; 5238e0e8016SThara Gopinath }; 5248e0e8016SThara Gopinath 5258e0e8016SThara Gopinath cpu4_opp12: opp-1862400000 { 5268e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 5278e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 5288e0e8016SThara Gopinath }; 5298e0e8016SThara Gopinath 5308e0e8016SThara Gopinath cpu4_opp13: opp-1958400000 { 5318e0e8016SThara Gopinath opp-hz = /bits/ 64 <1958400000>; 5328e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 5338e0e8016SThara Gopinath }; 5348e0e8016SThara Gopinath 5358e0e8016SThara Gopinath cpu4_opp14: opp-2054400000 { 5368e0e8016SThara Gopinath opp-hz = /bits/ 64 <2054400000>; 5378e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 5388e0e8016SThara Gopinath }; 5398e0e8016SThara Gopinath 5408e0e8016SThara Gopinath cpu4_opp15: opp-2150400000 { 5418e0e8016SThara Gopinath opp-hz = /bits/ 64 <2150400000>; 5428e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5438e0e8016SThara Gopinath }; 5448e0e8016SThara Gopinath 5458e0e8016SThara Gopinath cpu4_opp16: opp-2246400000 { 5468e0e8016SThara Gopinath opp-hz = /bits/ 64 <2246400000>; 5478e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5488e0e8016SThara Gopinath }; 5498e0e8016SThara Gopinath 5508e0e8016SThara Gopinath cpu4_opp17: opp-2342400000 { 5518e0e8016SThara Gopinath opp-hz = /bits/ 64 <2342400000>; 5528e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5538e0e8016SThara Gopinath }; 5548e0e8016SThara Gopinath 5558e0e8016SThara Gopinath cpu4_opp18: opp-2419200000 { 5568e0e8016SThara Gopinath opp-hz = /bits/ 64 <2419200000>; 5578e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5588e0e8016SThara Gopinath }; 5598e0e8016SThara Gopinath }; 5608e0e8016SThara Gopinath 5610e3e6546SKrzysztof Kozlowski cpu7_opp_table: opp-table-cpu7 { 5628e0e8016SThara Gopinath compatible = "operating-points-v2"; 5638e0e8016SThara Gopinath opp-shared; 5648e0e8016SThara Gopinath 5658e0e8016SThara Gopinath cpu7_opp1: opp-844800000 { 5668e0e8016SThara Gopinath opp-hz = /bits/ 64 <844800000>; 5678e0e8016SThara Gopinath opp-peak-kBps = <2188000 19660800>; 5688e0e8016SThara Gopinath }; 5698e0e8016SThara Gopinath 5708e0e8016SThara Gopinath cpu7_opp2: opp-960000000 { 5718e0e8016SThara Gopinath opp-hz = /bits/ 64 <960000000>; 5728e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 5738e0e8016SThara Gopinath }; 5748e0e8016SThara Gopinath 5758e0e8016SThara Gopinath cpu7_opp3: opp-1075200000 { 5768e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 5778e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 5788e0e8016SThara Gopinath }; 5798e0e8016SThara Gopinath 5808e0e8016SThara Gopinath cpu7_opp4: opp-1190400000 { 5818e0e8016SThara Gopinath opp-hz = /bits/ 64 <1190400000>; 5828e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 5838e0e8016SThara Gopinath }; 5848e0e8016SThara Gopinath 5858e0e8016SThara Gopinath cpu7_opp5: opp-1305600000 { 5868e0e8016SThara Gopinath opp-hz = /bits/ 64 <1305600000>; 5878e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5888e0e8016SThara Gopinath }; 5898e0e8016SThara Gopinath 5908e0e8016SThara Gopinath cpu7_opp6: opp-1401600000 { 5918e0e8016SThara Gopinath opp-hz = /bits/ 64 <1401600000>; 5928e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5938e0e8016SThara Gopinath }; 5948e0e8016SThara Gopinath 5958e0e8016SThara Gopinath cpu7_opp7: opp-1516800000 { 5968e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 5978e0e8016SThara Gopinath opp-peak-kBps = <4068000 36249600>; 5988e0e8016SThara Gopinath }; 5998e0e8016SThara Gopinath 6008e0e8016SThara Gopinath cpu7_opp8: opp-1632000000 { 6018e0e8016SThara Gopinath opp-hz = /bits/ 64 <1632000000>; 6028e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 6038e0e8016SThara Gopinath }; 6048e0e8016SThara Gopinath 6058e0e8016SThara Gopinath cpu7_opp9: opp-1747200000 { 6068e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 6078e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 6088e0e8016SThara Gopinath }; 6098e0e8016SThara Gopinath 6108e0e8016SThara Gopinath cpu7_opp10: opp-1862400000 { 6118e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 6128e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 6138e0e8016SThara Gopinath }; 6148e0e8016SThara Gopinath 6158e0e8016SThara Gopinath cpu7_opp11: opp-1977600000 { 6168e0e8016SThara Gopinath opp-hz = /bits/ 64 <1977600000>; 6178e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 6188e0e8016SThara Gopinath }; 6198e0e8016SThara Gopinath 6208e0e8016SThara Gopinath cpu7_opp12: opp-2073600000 { 6218e0e8016SThara Gopinath opp-hz = /bits/ 64 <2073600000>; 6228e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 6238e0e8016SThara Gopinath }; 6248e0e8016SThara Gopinath 6258e0e8016SThara Gopinath cpu7_opp13: opp-2169600000 { 6268e0e8016SThara Gopinath opp-hz = /bits/ 64 <2169600000>; 6278e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6288e0e8016SThara Gopinath }; 6298e0e8016SThara Gopinath 6308e0e8016SThara Gopinath cpu7_opp14: opp-2265600000 { 6318e0e8016SThara Gopinath opp-hz = /bits/ 64 <2265600000>; 6328e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6338e0e8016SThara Gopinath }; 6348e0e8016SThara Gopinath 6358e0e8016SThara Gopinath cpu7_opp15: opp-2361600000 { 6368e0e8016SThara Gopinath opp-hz = /bits/ 64 <2361600000>; 6378e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6388e0e8016SThara Gopinath }; 6398e0e8016SThara Gopinath 6408e0e8016SThara Gopinath cpu7_opp16: opp-2457600000 { 6418e0e8016SThara Gopinath opp-hz = /bits/ 64 <2457600000>; 6428e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6438e0e8016SThara Gopinath }; 6448e0e8016SThara Gopinath 6458e0e8016SThara Gopinath cpu7_opp17: opp-2553600000 { 6468e0e8016SThara Gopinath opp-hz = /bits/ 64 <2553600000>; 6478e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6488e0e8016SThara Gopinath }; 6498e0e8016SThara Gopinath 6508e0e8016SThara Gopinath cpu7_opp18: opp-2649600000 { 6518e0e8016SThara Gopinath opp-hz = /bits/ 64 <2649600000>; 6528e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6538e0e8016SThara Gopinath }; 6548e0e8016SThara Gopinath 6558e0e8016SThara Gopinath cpu7_opp19: opp-2745600000 { 6568e0e8016SThara Gopinath opp-hz = /bits/ 64 <2745600000>; 6578e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6588e0e8016SThara Gopinath }; 6598e0e8016SThara Gopinath 6608e0e8016SThara Gopinath cpu7_opp20: opp-2841600000 { 6618e0e8016SThara Gopinath opp-hz = /bits/ 64 <2841600000>; 6628e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6638e0e8016SThara Gopinath }; 6648e0e8016SThara Gopinath }; 6658e0e8016SThara Gopinath 66660378f1aSVenkata Narendra Kumar Gutta firmware { 66760378f1aSVenkata Narendra Kumar Gutta scm: scm { 668b9c0c0e5SDavid Heidelberg compatible = "qcom,scm-sm8250", "qcom,scm"; 66960378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 67060378f1aSVenkata Narendra Kumar Gutta }; 67160378f1aSVenkata Narendra Kumar Gutta }; 67260378f1aSVenkata Narendra Kumar Gutta 67360378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 67460378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 67560378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 67660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 67760378f1aSVenkata Narendra Kumar Gutta }; 67860378f1aSVenkata Narendra Kumar Gutta 67960378f1aSVenkata Narendra Kumar Gutta pmu { 68060378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 68193138ef5SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 68260378f1aSVenkata Narendra Kumar Gutta }; 68360378f1aSVenkata Narendra Kumar Gutta 68460378f1aSVenkata Narendra Kumar Gutta psci { 68560378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 68660378f1aSVenkata Narendra Kumar Gutta method = "smc"; 68732bc936dSMaulik Shah 68856d59002SKrzysztof Kozlowski CPU_PD0: power-domain-cpu0 { 68932bc936dSMaulik Shah #power-domain-cells = <0>; 69032bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69132bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 69232bc936dSMaulik Shah }; 69332bc936dSMaulik Shah 69456d59002SKrzysztof Kozlowski CPU_PD1: power-domain-cpu1 { 69532bc936dSMaulik Shah #power-domain-cells = <0>; 69632bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69732bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 69832bc936dSMaulik Shah }; 69932bc936dSMaulik Shah 70056d59002SKrzysztof Kozlowski CPU_PD2: power-domain-cpu2 { 70132bc936dSMaulik Shah #power-domain-cells = <0>; 70232bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70332bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 70432bc936dSMaulik Shah }; 70532bc936dSMaulik Shah 70656d59002SKrzysztof Kozlowski CPU_PD3: power-domain-cpu3 { 70732bc936dSMaulik Shah #power-domain-cells = <0>; 70832bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70932bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 71032bc936dSMaulik Shah }; 71132bc936dSMaulik Shah 71256d59002SKrzysztof Kozlowski CPU_PD4: power-domain-cpu4 { 71332bc936dSMaulik Shah #power-domain-cells = <0>; 71432bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 71532bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 71632bc936dSMaulik Shah }; 71732bc936dSMaulik Shah 71856d59002SKrzysztof Kozlowski CPU_PD5: power-domain-cpu5 { 71932bc936dSMaulik Shah #power-domain-cells = <0>; 72032bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 72132bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 72232bc936dSMaulik Shah }; 72332bc936dSMaulik Shah 72456d59002SKrzysztof Kozlowski CPU_PD6: power-domain-cpu6 { 72532bc936dSMaulik Shah #power-domain-cells = <0>; 72632bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 72732bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 72832bc936dSMaulik Shah }; 72932bc936dSMaulik Shah 73056d59002SKrzysztof Kozlowski CPU_PD7: power-domain-cpu7 { 73132bc936dSMaulik Shah #power-domain-cells = <0>; 73232bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 73332bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 73432bc936dSMaulik Shah }; 73532bc936dSMaulik Shah 73656d59002SKrzysztof Kozlowski CLUSTER_PD: power-domain-cpu-cluster0 { 73732bc936dSMaulik Shah #power-domain-cells = <0>; 73832bc936dSMaulik Shah domain-idle-states = <&CLUSTER_SLEEP_0>; 73932bc936dSMaulik Shah }; 74060378f1aSVenkata Narendra Kumar Gutta }; 74160378f1aSVenkata Narendra Kumar Gutta 742191c85b8SVinod Koul qup_opp_table: opp-table-qup { 743191c85b8SVinod Koul compatible = "operating-points-v2"; 744191c85b8SVinod Koul 745191c85b8SVinod Koul opp-50000000 { 746191c85b8SVinod Koul opp-hz = /bits/ 64 <50000000>; 747191c85b8SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 748191c85b8SVinod Koul }; 749191c85b8SVinod Koul 750191c85b8SVinod Koul opp-75000000 { 751191c85b8SVinod Koul opp-hz = /bits/ 64 <75000000>; 752191c85b8SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 753191c85b8SVinod Koul }; 754191c85b8SVinod Koul 755191c85b8SVinod Koul opp-120000000 { 756191c85b8SVinod Koul opp-hz = /bits/ 64 <120000000>; 757191c85b8SVinod Koul required-opps = <&rpmhpd_opp_svs>; 758191c85b8SVinod Koul }; 759191c85b8SVinod Koul }; 760191c85b8SVinod Koul 76160378f1aSVenkata Narendra Kumar Gutta reserved-memory { 76260378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 76360378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 76460378f1aSVenkata Narendra Kumar Gutta ranges; 76560378f1aSVenkata Narendra Kumar Gutta 76660378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 76760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 76860378f1aSVenkata Narendra Kumar Gutta no-map; 76960378f1aSVenkata Narendra Kumar Gutta }; 77060378f1aSVenkata Narendra Kumar Gutta 77160378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 77260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 77360378f1aSVenkata Narendra Kumar Gutta no-map; 77460378f1aSVenkata Narendra Kumar Gutta }; 77560378f1aSVenkata Narendra Kumar Gutta 77660378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 77760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 77860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 77960378f1aSVenkata Narendra Kumar Gutta no-map; 78060378f1aSVenkata Narendra Kumar Gutta }; 78160378f1aSVenkata Narendra Kumar Gutta 78260378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 78360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 78460378f1aSVenkata Narendra Kumar Gutta no-map; 78560378f1aSVenkata Narendra Kumar Gutta }; 78660378f1aSVenkata Narendra Kumar Gutta 78760378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 78860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 78960378f1aSVenkata Narendra Kumar Gutta no-map; 79060378f1aSVenkata Narendra Kumar Gutta }; 79160378f1aSVenkata Narendra Kumar Gutta 79260378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 79360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 79460378f1aSVenkata Narendra Kumar Gutta no-map; 79560378f1aSVenkata Narendra Kumar Gutta }; 79660378f1aSVenkata Narendra Kumar Gutta 79760378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 79860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 79960378f1aSVenkata Narendra Kumar Gutta no-map; 80060378f1aSVenkata Narendra Kumar Gutta }; 80160378f1aSVenkata Narendra Kumar Gutta 80260378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 80360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 80460378f1aSVenkata Narendra Kumar Gutta no-map; 80560378f1aSVenkata Narendra Kumar Gutta }; 80660378f1aSVenkata Narendra Kumar Gutta 80760378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 80860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 80960378f1aSVenkata Narendra Kumar Gutta no-map; 81060378f1aSVenkata Narendra Kumar Gutta }; 81160378f1aSVenkata Narendra Kumar Gutta 81260378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 81360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 81460378f1aSVenkata Narendra Kumar Gutta no-map; 81560378f1aSVenkata Narendra Kumar Gutta }; 81660378f1aSVenkata Narendra Kumar Gutta 81760378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 81860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 81960378f1aSVenkata Narendra Kumar Gutta no-map; 82060378f1aSVenkata Narendra Kumar Gutta }; 82160378f1aSVenkata Narendra Kumar Gutta 82260378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 82360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 82460378f1aSVenkata Narendra Kumar Gutta no-map; 82560378f1aSVenkata Narendra Kumar Gutta }; 82660378f1aSVenkata Narendra Kumar Gutta 82760378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 82860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 82960378f1aSVenkata Narendra Kumar Gutta no-map; 83060378f1aSVenkata Narendra Kumar Gutta }; 83160378f1aSVenkata Narendra Kumar Gutta 83260378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 83360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 83460378f1aSVenkata Narendra Kumar Gutta no-map; 83560378f1aSVenkata Narendra Kumar Gutta }; 83660378f1aSVenkata Narendra Kumar Gutta 83760378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 83860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 83960378f1aSVenkata Narendra Kumar Gutta no-map; 84060378f1aSVenkata Narendra Kumar Gutta }; 84160378f1aSVenkata Narendra Kumar Gutta 84260378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 84360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 84460378f1aSVenkata Narendra Kumar Gutta no-map; 84560378f1aSVenkata Narendra Kumar Gutta }; 84660378f1aSVenkata Narendra Kumar Gutta 84760378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 84860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 84960378f1aSVenkata Narendra Kumar Gutta no-map; 85060378f1aSVenkata Narendra Kumar Gutta }; 85160378f1aSVenkata Narendra Kumar Gutta 85260378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 85360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 85460378f1aSVenkata Narendra Kumar Gutta no-map; 85560378f1aSVenkata Narendra Kumar Gutta }; 85660378f1aSVenkata Narendra Kumar Gutta }; 85760378f1aSVenkata Narendra Kumar Gutta 85888b57bc3SDmitry Baryshkov smem { 85960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 86060378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 86160378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 86260378f1aSVenkata Narendra Kumar Gutta }; 86360378f1aSVenkata Narendra Kumar Gutta 8648770a2a8SBjorn Andersson smp2p-adsp { 8658770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8668770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 8678770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 8688770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8698770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8708770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 8718770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8728770a2a8SBjorn Andersson 8738770a2a8SBjorn Andersson qcom,local-pid = <0>; 8748770a2a8SBjorn Andersson qcom,remote-pid = <2>; 8758770a2a8SBjorn Andersson 8768770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 8778770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8788770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8798770a2a8SBjorn Andersson }; 8808770a2a8SBjorn Andersson 8818770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 8828770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8838770a2a8SBjorn Andersson interrupt-controller; 8848770a2a8SBjorn Andersson #interrupt-cells = <2>; 8858770a2a8SBjorn Andersson }; 8868770a2a8SBjorn Andersson }; 8878770a2a8SBjorn Andersson 8888770a2a8SBjorn Andersson smp2p-cdsp { 8898770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8908770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 8918770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 8928770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8938770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8948770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 8958770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8968770a2a8SBjorn Andersson 8978770a2a8SBjorn Andersson qcom,local-pid = <0>; 8988770a2a8SBjorn Andersson qcom,remote-pid = <5>; 8998770a2a8SBjorn Andersson 9008770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 9018770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 9028770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9038770a2a8SBjorn Andersson }; 9048770a2a8SBjorn Andersson 9058770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 9068770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9078770a2a8SBjorn Andersson interrupt-controller; 9088770a2a8SBjorn Andersson #interrupt-cells = <2>; 9098770a2a8SBjorn Andersson }; 9108770a2a8SBjorn Andersson }; 9118770a2a8SBjorn Andersson 9128770a2a8SBjorn Andersson smp2p-slpi { 9138770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 9148770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 9158770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 9168770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 9178770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 9188770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 9198770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 9208770a2a8SBjorn Andersson 9218770a2a8SBjorn Andersson qcom,local-pid = <0>; 9228770a2a8SBjorn Andersson qcom,remote-pid = <3>; 9238770a2a8SBjorn Andersson 9248770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 9258770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 9268770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9278770a2a8SBjorn Andersson }; 9288770a2a8SBjorn Andersson 9298770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 9308770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9318770a2a8SBjorn Andersson interrupt-controller; 9328770a2a8SBjorn Andersson #interrupt-cells = <2>; 9338770a2a8SBjorn Andersson }; 9348770a2a8SBjorn Andersson }; 9358770a2a8SBjorn Andersson 93660378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 93760378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 93860378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 93960378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 94060378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 94160378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 94260378f1aSVenkata Narendra Kumar Gutta 94360378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 94460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 94560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 94660378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 94760378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 94860378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 94976bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 95076bd127eSDmitry Baryshkov "bi_tcxo_ao", 95176bd127eSDmitry Baryshkov "sleep_clk"; 95276bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 95376bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 95476bd127eSDmitry Baryshkov <&sleep_clk>; 95560378f1aSVenkata Narendra Kumar Gutta }; 95660378f1aSVenkata Narendra Kumar Gutta 957e5361e75SBjorn Andersson ipcc: mailbox@408000 { 958e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 959e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 960e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 961e5361e75SBjorn Andersson interrupt-controller; 962e5361e75SBjorn Andersson #interrupt-cells = <3>; 963e5361e75SBjorn Andersson #mbox-cells = <2>; 964e5361e75SBjorn Andersson }; 965e5361e75SBjorn Andersson 96665389ce6SManivannan Sadhasivam rng: rng@793000 { 96765389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 96865389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 96965389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 97065389ce6SManivannan Sadhasivam clock-names = "core"; 97165389ce6SManivannan Sadhasivam }; 97265389ce6SManivannan Sadhasivam 97315049bb5SKonrad Dybcio gpi_dma2: dma-controller@800000 { 974e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 97515049bb5SKonrad Dybcio reg = <0 0x00800000 0 0x70000>; 97615049bb5SKonrad Dybcio interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>, 97715049bb5SKonrad Dybcio <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>, 97815049bb5SKonrad Dybcio <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, 97915049bb5SKonrad Dybcio <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>, 98015049bb5SKonrad Dybcio <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>, 98115049bb5SKonrad Dybcio <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>, 98215049bb5SKonrad Dybcio <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>, 98315049bb5SKonrad Dybcio <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>, 98415049bb5SKonrad Dybcio <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>, 98515049bb5SKonrad Dybcio <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>; 98615049bb5SKonrad Dybcio dma-channels = <10>; 98715049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 98815049bb5SKonrad Dybcio iommus = <&apps_smmu 0x76 0x0>; 98915049bb5SKonrad Dybcio #dma-cells = <3>; 99015049bb5SKonrad Dybcio status = "disabled"; 99115049bb5SKonrad Dybcio }; 99215049bb5SKonrad Dybcio 993e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 994e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 995e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 996e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 997e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 998e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 999e5813b15SDmitry Baryshkov #address-cells = <2>; 1000e5813b15SDmitry Baryshkov #size-cells = <2>; 100185309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 1002e5813b15SDmitry Baryshkov ranges; 1003e5813b15SDmitry Baryshkov status = "disabled"; 1004e5813b15SDmitry Baryshkov 1005e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 1006e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1007e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1008e5813b15SDmitry Baryshkov clock-names = "se"; 1009e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1010e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1011e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 1012e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 101359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, 101459983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_I2C>; 101559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1016e5813b15SDmitry Baryshkov #address-cells = <1>; 1017e5813b15SDmitry Baryshkov #size-cells = <0>; 1018e5813b15SDmitry Baryshkov status = "disabled"; 1019e5813b15SDmitry Baryshkov }; 1020e5813b15SDmitry Baryshkov 1021e5813b15SDmitry Baryshkov spi14: spi@880000 { 1022e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1023e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1024e5813b15SDmitry Baryshkov clock-names = "se"; 1025e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1026e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 102759983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, 102859983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_SPI>; 102959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 103001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 103101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 103259983a5cSKonrad Dybcio #address-cells = <1>; 103359983a5cSKonrad Dybcio #size-cells = <0>; 1034e5813b15SDmitry Baryshkov status = "disabled"; 1035e5813b15SDmitry Baryshkov }; 1036e5813b15SDmitry Baryshkov 1037e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 1038e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1039e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1040e5813b15SDmitry Baryshkov clock-names = "se"; 1041e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1042e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1043e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 1044e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 104559983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, 104659983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_I2C>; 104759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1048e5813b15SDmitry Baryshkov #address-cells = <1>; 1049e5813b15SDmitry Baryshkov #size-cells = <0>; 1050e5813b15SDmitry Baryshkov status = "disabled"; 1051e5813b15SDmitry Baryshkov }; 1052e5813b15SDmitry Baryshkov 1053e5813b15SDmitry Baryshkov spi15: spi@884000 { 1054e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1055e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1056e5813b15SDmitry Baryshkov clock-names = "se"; 1057e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1058e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 105959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, 106059983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_SPI>; 106159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 106201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 106301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 106459983a5cSKonrad Dybcio #address-cells = <1>; 106559983a5cSKonrad Dybcio #size-cells = <0>; 1066e5813b15SDmitry Baryshkov status = "disabled"; 1067e5813b15SDmitry Baryshkov }; 1068e5813b15SDmitry Baryshkov 1069e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 1070e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1071e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1072e5813b15SDmitry Baryshkov clock-names = "se"; 1073e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1074e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1075e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 1076e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 107759983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, 107859983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_I2C>; 107959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1080e5813b15SDmitry Baryshkov #address-cells = <1>; 1081e5813b15SDmitry Baryshkov #size-cells = <0>; 1082e5813b15SDmitry Baryshkov status = "disabled"; 1083e5813b15SDmitry Baryshkov }; 1084e5813b15SDmitry Baryshkov 1085e5813b15SDmitry Baryshkov spi16: spi@888000 { 1086e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1087e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1088e5813b15SDmitry Baryshkov clock-names = "se"; 1089e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1090e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 109159983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, 109259983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_SPI>; 109359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 109401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 109501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 109659983a5cSKonrad Dybcio #address-cells = <1>; 109759983a5cSKonrad Dybcio #size-cells = <0>; 1098e5813b15SDmitry Baryshkov status = "disabled"; 1099e5813b15SDmitry Baryshkov }; 1100e5813b15SDmitry Baryshkov 1101e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 1102e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1103e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1104e5813b15SDmitry Baryshkov clock-names = "se"; 1105e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1106e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1107e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 1108e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 110959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, 111059983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_I2C>; 111159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1112e5813b15SDmitry Baryshkov #address-cells = <1>; 1113e5813b15SDmitry Baryshkov #size-cells = <0>; 1114e5813b15SDmitry Baryshkov status = "disabled"; 1115e5813b15SDmitry Baryshkov }; 1116e5813b15SDmitry Baryshkov 1117e5813b15SDmitry Baryshkov spi17: spi@88c000 { 1118e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1119e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1120e5813b15SDmitry Baryshkov clock-names = "se"; 1121e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1122e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 112359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, 112459983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_SPI>; 112559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 112601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 112701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 112859983a5cSKonrad Dybcio #address-cells = <1>; 112959983a5cSKonrad Dybcio #size-cells = <0>; 1130e5813b15SDmitry Baryshkov status = "disabled"; 1131e5813b15SDmitry Baryshkov }; 1132e5813b15SDmitry Baryshkov 113308a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 113408a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 113508a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 113608a9ae2dSDmitry Baryshkov clock-names = "se"; 113708a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 113808a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 113908a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 114008a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 114101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 114201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 114308a9ae2dSDmitry Baryshkov status = "disabled"; 114408a9ae2dSDmitry Baryshkov }; 114508a9ae2dSDmitry Baryshkov 1146e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 1147e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1148e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1149e5813b15SDmitry Baryshkov clock-names = "se"; 1150e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1151e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1152e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 1153e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 115459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, 115559983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_I2C>; 115659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1157e5813b15SDmitry Baryshkov #address-cells = <1>; 1158e5813b15SDmitry Baryshkov #size-cells = <0>; 1159e5813b15SDmitry Baryshkov status = "disabled"; 1160e5813b15SDmitry Baryshkov }; 1161e5813b15SDmitry Baryshkov 1162e5813b15SDmitry Baryshkov spi18: spi@890000 { 1163e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1164e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1165e5813b15SDmitry Baryshkov clock-names = "se"; 1166e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1167e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 116859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, 116959983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_SPI>; 117059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 117101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 117201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 117359983a5cSKonrad Dybcio #address-cells = <1>; 117459983a5cSKonrad Dybcio #size-cells = <0>; 1175e5813b15SDmitry Baryshkov status = "disabled"; 1176e5813b15SDmitry Baryshkov }; 1177e5813b15SDmitry Baryshkov 117808a9ae2dSDmitry Baryshkov uart18: serial@890000 { 117908a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 118008a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 118108a9ae2dSDmitry Baryshkov clock-names = "se"; 118208a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 118308a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 118408a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 118508a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 118601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 118701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 118808a9ae2dSDmitry Baryshkov status = "disabled"; 118908a9ae2dSDmitry Baryshkov }; 119008a9ae2dSDmitry Baryshkov 1191e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 1192e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1193e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1194e5813b15SDmitry Baryshkov clock-names = "se"; 1195e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1196e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1197e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 1198e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 119959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, 120059983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_I2C>; 120159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1202e5813b15SDmitry Baryshkov #address-cells = <1>; 1203e5813b15SDmitry Baryshkov #size-cells = <0>; 1204e5813b15SDmitry Baryshkov status = "disabled"; 1205e5813b15SDmitry Baryshkov }; 1206e5813b15SDmitry Baryshkov 1207e5813b15SDmitry Baryshkov spi19: spi@894000 { 1208e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1209e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1210e5813b15SDmitry Baryshkov clock-names = "se"; 1211e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1212e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 121359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, 121459983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_SPI>; 121559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 121601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 121701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 121859983a5cSKonrad Dybcio #address-cells = <1>; 121959983a5cSKonrad Dybcio #size-cells = <0>; 1220e5813b15SDmitry Baryshkov status = "disabled"; 1221e5813b15SDmitry Baryshkov }; 1222e5813b15SDmitry Baryshkov }; 1223e5813b15SDmitry Baryshkov 122415049bb5SKonrad Dybcio gpi_dma0: dma-controller@900000 { 1225e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 122615049bb5SKonrad Dybcio reg = <0 0x00900000 0 0x70000>; 122715049bb5SKonrad Dybcio interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 122815049bb5SKonrad Dybcio <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 122915049bb5SKonrad Dybcio <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 123015049bb5SKonrad Dybcio <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, 123115049bb5SKonrad Dybcio <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 123215049bb5SKonrad Dybcio <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, 123315049bb5SKonrad Dybcio <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, 123415049bb5SKonrad Dybcio <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 123515049bb5SKonrad Dybcio <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 123615049bb5SKonrad Dybcio <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 123715049bb5SKonrad Dybcio <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 123815049bb5SKonrad Dybcio <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, 123915049bb5SKonrad Dybcio <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; 124015049bb5SKonrad Dybcio dma-channels = <15>; 124115049bb5SKonrad Dybcio dma-channel-mask = <0x7ff>; 124215049bb5SKonrad Dybcio iommus = <&apps_smmu 0x5b6 0x0>; 124315049bb5SKonrad Dybcio #dma-cells = <3>; 124415049bb5SKonrad Dybcio status = "disabled"; 124515049bb5SKonrad Dybcio }; 124615049bb5SKonrad Dybcio 1247e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 1248e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1249e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 1250e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1251e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 1252e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 1253e5813b15SDmitry Baryshkov #address-cells = <2>; 1254e5813b15SDmitry Baryshkov #size-cells = <2>; 125585309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 1256e5813b15SDmitry Baryshkov ranges; 1257e5813b15SDmitry Baryshkov status = "disabled"; 1258e5813b15SDmitry Baryshkov 1259e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 1260e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1261e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1262e5813b15SDmitry Baryshkov clock-names = "se"; 1263e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1264e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1265e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 1266e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 126759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, 126859983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_I2C>; 126959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1270e5813b15SDmitry Baryshkov #address-cells = <1>; 1271e5813b15SDmitry Baryshkov #size-cells = <0>; 1272e5813b15SDmitry Baryshkov status = "disabled"; 1273e5813b15SDmitry Baryshkov }; 1274e5813b15SDmitry Baryshkov 1275e5813b15SDmitry Baryshkov spi0: spi@980000 { 1276e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1277e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1278e5813b15SDmitry Baryshkov clock-names = "se"; 1279e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1280e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 128159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, 128259983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_SPI>; 128359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 128401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 128501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 128659983a5cSKonrad Dybcio #address-cells = <1>; 128759983a5cSKonrad Dybcio #size-cells = <0>; 1288e5813b15SDmitry Baryshkov status = "disabled"; 1289e5813b15SDmitry Baryshkov }; 1290e5813b15SDmitry Baryshkov 1291e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 1292e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1293e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1294e5813b15SDmitry Baryshkov clock-names = "se"; 1295e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1296e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1297e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 1298e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 129959983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, 130059983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_I2C>; 130159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1302e5813b15SDmitry Baryshkov #address-cells = <1>; 1303e5813b15SDmitry Baryshkov #size-cells = <0>; 1304e5813b15SDmitry Baryshkov status = "disabled"; 1305e5813b15SDmitry Baryshkov }; 1306e5813b15SDmitry Baryshkov 1307e5813b15SDmitry Baryshkov spi1: spi@984000 { 1308e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1309e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1310e5813b15SDmitry Baryshkov clock-names = "se"; 1311e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1312e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 131359983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 131459983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_SPI>; 131559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 131601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 131701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 131859983a5cSKonrad Dybcio #address-cells = <1>; 131959983a5cSKonrad Dybcio #size-cells = <0>; 1320e5813b15SDmitry Baryshkov status = "disabled"; 1321e5813b15SDmitry Baryshkov }; 1322e5813b15SDmitry Baryshkov 1323e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 1324e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1325e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1326e5813b15SDmitry Baryshkov clock-names = "se"; 1327e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1328e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1329e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 1330e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 133159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, 133259983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_I2C>; 133359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1334e5813b15SDmitry Baryshkov #address-cells = <1>; 1335e5813b15SDmitry Baryshkov #size-cells = <0>; 1336e5813b15SDmitry Baryshkov status = "disabled"; 1337e5813b15SDmitry Baryshkov }; 1338e5813b15SDmitry Baryshkov 1339e5813b15SDmitry Baryshkov spi2: spi@988000 { 1340e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1341e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1342e5813b15SDmitry Baryshkov clock-names = "se"; 1343e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1344e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 134559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, 134659983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_SPI>; 134759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 134801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 134901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 135059983a5cSKonrad Dybcio #address-cells = <1>; 135159983a5cSKonrad Dybcio #size-cells = <0>; 1352e5813b15SDmitry Baryshkov status = "disabled"; 1353e5813b15SDmitry Baryshkov }; 1354e5813b15SDmitry Baryshkov 135508a9ae2dSDmitry Baryshkov uart2: serial@988000 { 135608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 135708a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 135808a9ae2dSDmitry Baryshkov clock-names = "se"; 135908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 136008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 136108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 136208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 136301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 136401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 136508a9ae2dSDmitry Baryshkov status = "disabled"; 136608a9ae2dSDmitry Baryshkov }; 136708a9ae2dSDmitry Baryshkov 1368e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 1369e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1370e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1371e5813b15SDmitry Baryshkov clock-names = "se"; 1372e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1373e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1374e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 1375e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 137659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, 137759983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_I2C>; 137859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1379e5813b15SDmitry Baryshkov #address-cells = <1>; 1380e5813b15SDmitry Baryshkov #size-cells = <0>; 1381e5813b15SDmitry Baryshkov status = "disabled"; 1382e5813b15SDmitry Baryshkov }; 1383e5813b15SDmitry Baryshkov 1384e5813b15SDmitry Baryshkov spi3: spi@98c000 { 1385e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1386e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1387e5813b15SDmitry Baryshkov clock-names = "se"; 1388e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1389e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 139059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, 139159983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_SPI>; 139259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 139301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 139401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 139559983a5cSKonrad Dybcio #address-cells = <1>; 139659983a5cSKonrad Dybcio #size-cells = <0>; 1397e5813b15SDmitry Baryshkov status = "disabled"; 1398e5813b15SDmitry Baryshkov }; 1399e5813b15SDmitry Baryshkov 1400e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 1401e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1402e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1403e5813b15SDmitry Baryshkov clock-names = "se"; 1404e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1405e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1406e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 1407e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 140859983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, 140959983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_I2C>; 141059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1411e5813b15SDmitry Baryshkov #address-cells = <1>; 1412e5813b15SDmitry Baryshkov #size-cells = <0>; 1413e5813b15SDmitry Baryshkov status = "disabled"; 1414e5813b15SDmitry Baryshkov }; 1415e5813b15SDmitry Baryshkov 1416e5813b15SDmitry Baryshkov spi4: spi@990000 { 1417e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1418e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1419e5813b15SDmitry Baryshkov clock-names = "se"; 1420e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1421e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 142259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, 142359983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_SPI>; 142459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 142501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 142601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 142759983a5cSKonrad Dybcio #address-cells = <1>; 142859983a5cSKonrad Dybcio #size-cells = <0>; 1429e5813b15SDmitry Baryshkov status = "disabled"; 1430e5813b15SDmitry Baryshkov }; 1431e5813b15SDmitry Baryshkov 1432e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 1433e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1434e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1435e5813b15SDmitry Baryshkov clock-names = "se"; 1436e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1437e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1438e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 1439e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 144059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, 144159983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_I2C>; 144259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1443e5813b15SDmitry Baryshkov #address-cells = <1>; 1444e5813b15SDmitry Baryshkov #size-cells = <0>; 1445e5813b15SDmitry Baryshkov status = "disabled"; 1446e5813b15SDmitry Baryshkov }; 1447e5813b15SDmitry Baryshkov 1448e5813b15SDmitry Baryshkov spi5: spi@994000 { 1449e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1450e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1451e5813b15SDmitry Baryshkov clock-names = "se"; 1452e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1453e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 145459983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, 145559983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_SPI>; 145659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 145701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 145801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 145959983a5cSKonrad Dybcio #address-cells = <1>; 146059983a5cSKonrad Dybcio #size-cells = <0>; 1461e5813b15SDmitry Baryshkov status = "disabled"; 1462e5813b15SDmitry Baryshkov }; 1463e5813b15SDmitry Baryshkov 1464e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 1465e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1466e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1467e5813b15SDmitry Baryshkov clock-names = "se"; 1468e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1469e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1470e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 1471e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 147259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, 147359983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_I2C>; 147459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1475e5813b15SDmitry Baryshkov #address-cells = <1>; 1476e5813b15SDmitry Baryshkov #size-cells = <0>; 1477e5813b15SDmitry Baryshkov status = "disabled"; 1478e5813b15SDmitry Baryshkov }; 1479e5813b15SDmitry Baryshkov 1480e5813b15SDmitry Baryshkov spi6: spi@998000 { 1481e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1482e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1483e5813b15SDmitry Baryshkov clock-names = "se"; 1484e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1485e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 148659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, 148759983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_SPI>; 148859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 148901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 149001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 149159983a5cSKonrad Dybcio #address-cells = <1>; 149259983a5cSKonrad Dybcio #size-cells = <0>; 1493e5813b15SDmitry Baryshkov status = "disabled"; 1494e5813b15SDmitry Baryshkov }; 1495e5813b15SDmitry Baryshkov 149608a9ae2dSDmitry Baryshkov uart6: serial@998000 { 149708a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 149808a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 149908a9ae2dSDmitry Baryshkov clock-names = "se"; 150008a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 150108a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 150208a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 150308a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 150401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 150501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 150608a9ae2dSDmitry Baryshkov status = "disabled"; 150708a9ae2dSDmitry Baryshkov }; 150808a9ae2dSDmitry Baryshkov 1509e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 1510e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1511e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1512e5813b15SDmitry Baryshkov clock-names = "se"; 1513e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1514e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1515e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 1516e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 151759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, 151859983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_I2C>; 151959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1520e5813b15SDmitry Baryshkov #address-cells = <1>; 1521e5813b15SDmitry Baryshkov #size-cells = <0>; 1522e5813b15SDmitry Baryshkov status = "disabled"; 1523e5813b15SDmitry Baryshkov }; 1524e5813b15SDmitry Baryshkov 1525e5813b15SDmitry Baryshkov spi7: spi@99c000 { 1526e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1527e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1528e5813b15SDmitry Baryshkov clock-names = "se"; 1529e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1530e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 153159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, 153259983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_SPI>; 153359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 153401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 153501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 153659983a5cSKonrad Dybcio #address-cells = <1>; 153759983a5cSKonrad Dybcio #size-cells = <0>; 1538e5813b15SDmitry Baryshkov status = "disabled"; 1539e5813b15SDmitry Baryshkov }; 1540e5813b15SDmitry Baryshkov }; 1541e5813b15SDmitry Baryshkov 154215049bb5SKonrad Dybcio gpi_dma1: dma-controller@a00000 { 1543e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 154415049bb5SKonrad Dybcio reg = <0 0x00a00000 0 0x70000>; 154515049bb5SKonrad Dybcio interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 154615049bb5SKonrad Dybcio <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 154715049bb5SKonrad Dybcio <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 154815049bb5SKonrad Dybcio <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 154915049bb5SKonrad Dybcio <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 155015049bb5SKonrad Dybcio <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 155115049bb5SKonrad Dybcio <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 155215049bb5SKonrad Dybcio <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 155315049bb5SKonrad Dybcio <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 155415049bb5SKonrad Dybcio <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>; 155515049bb5SKonrad Dybcio dma-channels = <10>; 155615049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 155715049bb5SKonrad Dybcio iommus = <&apps_smmu 0x56 0x0>; 155815049bb5SKonrad Dybcio #dma-cells = <3>; 155915049bb5SKonrad Dybcio status = "disabled"; 156015049bb5SKonrad Dybcio }; 156115049bb5SKonrad Dybcio 156260378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 156360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 156460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 156560378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 1566fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 1567fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 156860378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 156960378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 157085309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 157160378f1aSVenkata Narendra Kumar Gutta ranges; 157260378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 157360378f1aSVenkata Narendra Kumar Gutta 1574e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 1575e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1576e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1577e5813b15SDmitry Baryshkov clock-names = "se"; 1578e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1579e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1580e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 1581e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 158259983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, 158359983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_I2C>; 158459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1585e5813b15SDmitry Baryshkov #address-cells = <1>; 1586e5813b15SDmitry Baryshkov #size-cells = <0>; 1587e5813b15SDmitry Baryshkov status = "disabled"; 1588e5813b15SDmitry Baryshkov }; 1589e5813b15SDmitry Baryshkov 1590e5813b15SDmitry Baryshkov spi8: spi@a80000 { 1591e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1592e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1593e5813b15SDmitry Baryshkov clock-names = "se"; 1594e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1595e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 159659983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, 159759983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_SPI>; 159859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 159901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 160001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 160159983a5cSKonrad Dybcio #address-cells = <1>; 160259983a5cSKonrad Dybcio #size-cells = <0>; 1603e5813b15SDmitry Baryshkov status = "disabled"; 1604e5813b15SDmitry Baryshkov }; 1605e5813b15SDmitry Baryshkov 1606e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 1607e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1608e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1609e5813b15SDmitry Baryshkov clock-names = "se"; 1610e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1611e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1612e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 1613e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 161459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, 161559983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_I2C>; 161659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1617e5813b15SDmitry Baryshkov #address-cells = <1>; 1618e5813b15SDmitry Baryshkov #size-cells = <0>; 1619e5813b15SDmitry Baryshkov status = "disabled"; 1620e5813b15SDmitry Baryshkov }; 1621e5813b15SDmitry Baryshkov 1622e5813b15SDmitry Baryshkov spi9: spi@a84000 { 1623e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1624e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1625e5813b15SDmitry Baryshkov clock-names = "se"; 1626e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1627e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 162859983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, 162959983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_SPI>; 163059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 163101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 163201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 163359983a5cSKonrad Dybcio #address-cells = <1>; 163459983a5cSKonrad Dybcio #size-cells = <0>; 1635e5813b15SDmitry Baryshkov status = "disabled"; 1636e5813b15SDmitry Baryshkov }; 1637e5813b15SDmitry Baryshkov 1638e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1639e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1640e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1641e5813b15SDmitry Baryshkov clock-names = "se"; 1642e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1643e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1644e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1645e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 164659983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, 164759983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_I2C>; 164859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1649e5813b15SDmitry Baryshkov #address-cells = <1>; 1650e5813b15SDmitry Baryshkov #size-cells = <0>; 1651e5813b15SDmitry Baryshkov status = "disabled"; 1652e5813b15SDmitry Baryshkov }; 1653e5813b15SDmitry Baryshkov 1654e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1655e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1656e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1657e5813b15SDmitry Baryshkov clock-names = "se"; 1658e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1659e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 166059983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, 166159983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_SPI>; 166259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 166301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 166401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 166559983a5cSKonrad Dybcio #address-cells = <1>; 166659983a5cSKonrad Dybcio #size-cells = <0>; 1667e5813b15SDmitry Baryshkov status = "disabled"; 1668e5813b15SDmitry Baryshkov }; 1669e5813b15SDmitry Baryshkov 1670e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1671e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1672e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1673e5813b15SDmitry Baryshkov clock-names = "se"; 1674e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1675e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1676e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1677e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 167859983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, 167959983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_I2C>; 168059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1681e5813b15SDmitry Baryshkov #address-cells = <1>; 1682e5813b15SDmitry Baryshkov #size-cells = <0>; 1683e5813b15SDmitry Baryshkov status = "disabled"; 1684e5813b15SDmitry Baryshkov }; 1685e5813b15SDmitry Baryshkov 1686e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1687e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1688e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1689e5813b15SDmitry Baryshkov clock-names = "se"; 1690e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1691e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 169259983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, 169359983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_SPI>; 169459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 169501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 169601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 169759983a5cSKonrad Dybcio #address-cells = <1>; 169859983a5cSKonrad Dybcio #size-cells = <0>; 1699e5813b15SDmitry Baryshkov status = "disabled"; 1700e5813b15SDmitry Baryshkov }; 1701e5813b15SDmitry Baryshkov 1702e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1703e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1704e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1705e5813b15SDmitry Baryshkov clock-names = "se"; 1706e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1707e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1708e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1709e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 171059983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, 171159983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_I2C>; 171259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1713e5813b15SDmitry Baryshkov #address-cells = <1>; 1714e5813b15SDmitry Baryshkov #size-cells = <0>; 1715e5813b15SDmitry Baryshkov status = "disabled"; 1716e5813b15SDmitry Baryshkov }; 1717e5813b15SDmitry Baryshkov 1718e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1719e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1720e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1721e5813b15SDmitry Baryshkov clock-names = "se"; 1722e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1723e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 172459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, 172559983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_SPI>; 172659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 172701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 172801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 172959983a5cSKonrad Dybcio #address-cells = <1>; 173059983a5cSKonrad Dybcio #size-cells = <0>; 1731e5813b15SDmitry Baryshkov status = "disabled"; 1732e5813b15SDmitry Baryshkov }; 1733e5813b15SDmitry Baryshkov 1734bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 173560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 173660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 173760378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1738fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1739bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1740bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 174160378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 174201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 174301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 174460378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 174560378f1aSVenkata Narendra Kumar Gutta }; 1746e5813b15SDmitry Baryshkov 1747e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1748e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1749e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1750e5813b15SDmitry Baryshkov clock-names = "se"; 1751e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1752e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1753e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1754e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 175559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, 175659983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_I2C>; 175759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1758e5813b15SDmitry Baryshkov #address-cells = <1>; 1759e5813b15SDmitry Baryshkov #size-cells = <0>; 1760e5813b15SDmitry Baryshkov status = "disabled"; 1761e5813b15SDmitry Baryshkov }; 1762e5813b15SDmitry Baryshkov 1763e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1764e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1765e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1766e5813b15SDmitry Baryshkov clock-names = "se"; 1767e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1768e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 176959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, 177059983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_SPI>; 177159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 177201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 177301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 177459983a5cSKonrad Dybcio #address-cells = <1>; 177559983a5cSKonrad Dybcio #size-cells = <0>; 1776e5813b15SDmitry Baryshkov status = "disabled"; 1777e5813b15SDmitry Baryshkov }; 177860378f1aSVenkata Narendra Kumar Gutta }; 177960378f1aSVenkata Narendra Kumar Gutta 1780e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1781e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1782e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1783e7e41a20SJonathan Marek #interconnect-cells = <1>; 1784e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1785e7e41a20SJonathan Marek }; 1786e7e41a20SJonathan Marek 1787e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1788e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1789e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1790e7e41a20SJonathan Marek #interconnect-cells = <1>; 1791e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1792e7e41a20SJonathan Marek }; 1793e7e41a20SJonathan Marek 1794e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1795e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1796e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1797e7e41a20SJonathan Marek #interconnect-cells = <1>; 1798e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1799e7e41a20SJonathan Marek }; 1800e7e41a20SJonathan Marek 1801e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1802e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1803e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1804e7e41a20SJonathan Marek #interconnect-cells = <1>; 1805e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1806e7e41a20SJonathan Marek }; 1807e7e41a20SJonathan Marek 1808e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1809e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1810e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1811e7e41a20SJonathan Marek #interconnect-cells = <1>; 1812e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1813e7e41a20SJonathan Marek }; 1814e7e41a20SJonathan Marek 1815e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1816e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1817e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1818e7e41a20SJonathan Marek #interconnect-cells = <1>; 1819e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1820e7e41a20SJonathan Marek }; 1821e7e41a20SJonathan Marek 1822e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1823e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1824e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1825e7e41a20SJonathan Marek #interconnect-cells = <1>; 1826e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1827e7e41a20SJonathan Marek }; 1828e7e41a20SJonathan Marek 1829e53bdfc0SManivannan Sadhasivam pcie0: pci@1c00000 { 18303e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1831e53bdfc0SManivannan Sadhasivam reg = <0 0x01c00000 0 0x3000>, 1832e53bdfc0SManivannan Sadhasivam <0 0x60000000 0 0xf1d>, 1833e53bdfc0SManivannan Sadhasivam <0 0x60000f20 0 0xa8>, 1834e53bdfc0SManivannan Sadhasivam <0 0x60001000 0 0x1000>, 1835e53bdfc0SManivannan Sadhasivam <0 0x60100000 0 0x100000>; 1836e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 1837e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1838e53bdfc0SManivannan Sadhasivam linux,pci-domain = <0>; 1839e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1840e53bdfc0SManivannan Sadhasivam num-lanes = <1>; 1841e53bdfc0SManivannan Sadhasivam 1842e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1843e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1844e53bdfc0SManivannan Sadhasivam 1845e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, 1846e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; 1847e53bdfc0SManivannan Sadhasivam 1848f2819650SDmitry Baryshkov interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 1849f2819650SDmitry Baryshkov <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1850f2819650SDmitry Baryshkov <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 1851f2819650SDmitry Baryshkov <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 1852f2819650SDmitry Baryshkov <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 1853f2819650SDmitry Baryshkov <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 1854f2819650SDmitry Baryshkov <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 1855f2819650SDmitry Baryshkov <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1856f2819650SDmitry Baryshkov interrupt-names = "msi0", "msi1", "msi2", "msi3", 1857f2819650SDmitry Baryshkov "msi4", "msi5", "msi6", "msi7"; 1858e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1859e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1860e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1861e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1862e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1863e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1864e53bdfc0SManivannan Sadhasivam 1865e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, 1866e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_AUX_CLK>, 1867e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1868e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, 1869e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_AXI_CLK>, 1870e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, 1871e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1872e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1873e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1874e53bdfc0SManivannan Sadhasivam "aux", 1875e53bdfc0SManivannan Sadhasivam "cfg", 1876e53bdfc0SManivannan Sadhasivam "bus_master", 1877e53bdfc0SManivannan Sadhasivam "bus_slave", 1878e53bdfc0SManivannan Sadhasivam "slave_q2a", 1879e53bdfc0SManivannan Sadhasivam "tbu", 1880e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1881e53bdfc0SManivannan Sadhasivam 1882e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1c00 0x7f>; 1883e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, 1884e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c01 0x1>; 1885e53bdfc0SManivannan Sadhasivam 1886e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_BCR>; 1887e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1888e53bdfc0SManivannan Sadhasivam 1889e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_0_GDSC>; 1890e53bdfc0SManivannan Sadhasivam 1891e53bdfc0SManivannan Sadhasivam phys = <&pcie0_lane>; 1892e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1893e53bdfc0SManivannan Sadhasivam 1894d6050720SDmitry Baryshkov perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; 1895d6050720SDmitry Baryshkov wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 189613e948a3SKonrad Dybcio 189713e948a3SKonrad Dybcio pinctrl-names = "default"; 189813e948a3SKonrad Dybcio pinctrl-0 = <&pcie0_default_state>; 189913e948a3SKonrad Dybcio 1900e53bdfc0SManivannan Sadhasivam status = "disabled"; 1901e53bdfc0SManivannan Sadhasivam }; 1902e53bdfc0SManivannan Sadhasivam 1903e53bdfc0SManivannan Sadhasivam pcie0_phy: phy@1c06000 { 1904e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy"; 1905e53bdfc0SManivannan Sadhasivam reg = <0 0x01c06000 0 0x1c0>; 1906e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 1907e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1908e53bdfc0SManivannan Sadhasivam ranges; 1909e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 1910e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1911e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIFI_CLKREF_EN>, 1912e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1913e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 1914e53bdfc0SManivannan Sadhasivam 1915e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_PHY_BCR>; 1916e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 1917e53bdfc0SManivannan Sadhasivam 1918e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1919e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 1920e53bdfc0SManivannan Sadhasivam 1921e53bdfc0SManivannan Sadhasivam status = "disabled"; 1922e53bdfc0SManivannan Sadhasivam 19231351512fSShawn Guo pcie0_lane: phy@1c06200 { 192481f43efcSKonrad Dybcio reg = <0 0x01c06200 0 0x170>, /* tx */ 192581f43efcSKonrad Dybcio <0 0x01c06400 0 0x200>, /* rx */ 192681f43efcSKonrad Dybcio <0 0x01c06800 0 0x1f0>, /* pcs */ 192781f43efcSKonrad Dybcio <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ 1928e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; 1929e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 1930e53bdfc0SManivannan Sadhasivam 1931e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 1932d9fd162cSJohan Hovold 1933d9fd162cSJohan Hovold #clock-cells = <0>; 1934e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_0_pipe_clk"; 1935e53bdfc0SManivannan Sadhasivam }; 1936e53bdfc0SManivannan Sadhasivam }; 1937e53bdfc0SManivannan Sadhasivam 1938e53bdfc0SManivannan Sadhasivam pcie1: pci@1c08000 { 19393e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1940e53bdfc0SManivannan Sadhasivam reg = <0 0x01c08000 0 0x3000>, 1941e53bdfc0SManivannan Sadhasivam <0 0x40000000 0 0xf1d>, 1942e53bdfc0SManivannan Sadhasivam <0 0x40000f20 0 0xa8>, 1943e53bdfc0SManivannan Sadhasivam <0 0x40001000 0 0x1000>, 1944e53bdfc0SManivannan Sadhasivam <0 0x40100000 0 0x100000>; 1945e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 1946e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1947e53bdfc0SManivannan Sadhasivam linux,pci-domain = <1>; 1948e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1949e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 1950e53bdfc0SManivannan Sadhasivam 1951e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1952e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1953e53bdfc0SManivannan Sadhasivam 1954e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, 1955e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 1956e53bdfc0SManivannan Sadhasivam 19571b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 1958e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 1959e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1960e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1961e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1962e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1963e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1964e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1965e53bdfc0SManivannan Sadhasivam 1966e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, 1967e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_AUX_CLK>, 1968e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 1969e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, 1970e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_AXI_CLK>, 1971e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 1972e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 1973e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1974e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1975e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1976e53bdfc0SManivannan Sadhasivam "aux", 1977e53bdfc0SManivannan Sadhasivam "cfg", 1978e53bdfc0SManivannan Sadhasivam "bus_master", 1979e53bdfc0SManivannan Sadhasivam "bus_slave", 1980e53bdfc0SManivannan Sadhasivam "slave_q2a", 1981e53bdfc0SManivannan Sadhasivam "ref", 1982e53bdfc0SManivannan Sadhasivam "tbu", 1983e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1984e53bdfc0SManivannan Sadhasivam 1985e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; 1986e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 1987e53bdfc0SManivannan Sadhasivam 1988e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1c80 0x7f>; 1989e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, 1990e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c81 0x1>; 1991e53bdfc0SManivannan Sadhasivam 1992e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_BCR>; 1993e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1994e53bdfc0SManivannan Sadhasivam 1995e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_1_GDSC>; 1996e53bdfc0SManivannan Sadhasivam 1997e53bdfc0SManivannan Sadhasivam phys = <&pcie1_lane>; 1998e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1999e53bdfc0SManivannan Sadhasivam 2000d6050720SDmitry Baryshkov perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; 2001d6050720SDmitry Baryshkov wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>; 200213e948a3SKonrad Dybcio 200313e948a3SKonrad Dybcio pinctrl-names = "default"; 200413e948a3SKonrad Dybcio pinctrl-0 = <&pcie1_default_state>; 200513e948a3SKonrad Dybcio 2006e53bdfc0SManivannan Sadhasivam status = "disabled"; 2007e53bdfc0SManivannan Sadhasivam }; 2008e53bdfc0SManivannan Sadhasivam 2009e53bdfc0SManivannan Sadhasivam pcie1_phy: phy@1c0e000 { 2010e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy"; 2011e53bdfc0SManivannan Sadhasivam reg = <0 0x01c0e000 0 0x1c0>; 2012e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2013e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2014e53bdfc0SManivannan Sadhasivam ranges; 2015e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2016e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 2017e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 2018e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2019e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2020e53bdfc0SManivannan Sadhasivam 2021e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_PHY_BCR>; 2022e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2023e53bdfc0SManivannan Sadhasivam 2024e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2025e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2026e53bdfc0SManivannan Sadhasivam 2027e53bdfc0SManivannan Sadhasivam status = "disabled"; 2028e53bdfc0SManivannan Sadhasivam 20291351512fSShawn Guo pcie1_lane: phy@1c0e200 { 203081f43efcSKonrad Dybcio reg = <0 0x01c0e200 0 0x170>, /* tx0 */ 203181f43efcSKonrad Dybcio <0 0x01c0e400 0 0x200>, /* rx0 */ 203281f43efcSKonrad Dybcio <0 0x01c0ea00 0 0x1f0>, /* pcs */ 203381f43efcSKonrad Dybcio <0 0x01c0e600 0 0x170>, /* tx1 */ 203481f43efcSKonrad Dybcio <0 0x01c0e800 0 0x200>, /* rx1 */ 203581f43efcSKonrad Dybcio <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2036e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; 2037e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2038e53bdfc0SManivannan Sadhasivam 2039e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2040d9fd162cSJohan Hovold 2041d9fd162cSJohan Hovold #clock-cells = <0>; 2042e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_1_pipe_clk"; 2043e53bdfc0SManivannan Sadhasivam }; 2044e53bdfc0SManivannan Sadhasivam }; 2045e53bdfc0SManivannan Sadhasivam 2046e53bdfc0SManivannan Sadhasivam pcie2: pci@1c10000 { 20473e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 2048e53bdfc0SManivannan Sadhasivam reg = <0 0x01c10000 0 0x3000>, 2049e53bdfc0SManivannan Sadhasivam <0 0x64000000 0 0xf1d>, 2050e53bdfc0SManivannan Sadhasivam <0 0x64000f20 0 0xa8>, 2051e53bdfc0SManivannan Sadhasivam <0 0x64001000 0 0x1000>, 2052e53bdfc0SManivannan Sadhasivam <0 0x64100000 0 0x100000>; 2053e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 2054e53bdfc0SManivannan Sadhasivam device_type = "pci"; 2055e53bdfc0SManivannan Sadhasivam linux,pci-domain = <2>; 2056e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 2057e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 2058e53bdfc0SManivannan Sadhasivam 2059e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 2060e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2061e53bdfc0SManivannan Sadhasivam 2062e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>, 2063e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>; 2064e53bdfc0SManivannan Sadhasivam 20651b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 2066e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 2067e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 2068e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 2069e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 2070e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 415 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 2071e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 416 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 2072e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 417 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 2073e53bdfc0SManivannan Sadhasivam 2074e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, 2075e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_AUX_CLK>, 2076e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2077e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, 2078e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_AXI_CLK>, 2079e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, 2080e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2081e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 2082e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 2083e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 2084e53bdfc0SManivannan Sadhasivam "aux", 2085e53bdfc0SManivannan Sadhasivam "cfg", 2086e53bdfc0SManivannan Sadhasivam "bus_master", 2087e53bdfc0SManivannan Sadhasivam "bus_slave", 2088e53bdfc0SManivannan Sadhasivam "slave_q2a", 2089e53bdfc0SManivannan Sadhasivam "ref", 2090e53bdfc0SManivannan Sadhasivam "tbu", 2091e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 2092e53bdfc0SManivannan Sadhasivam 2093e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>; 2094e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 2095e53bdfc0SManivannan Sadhasivam 2096e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1d00 0x7f>; 2097e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1d00 0x1>, 2098e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1d01 0x1>; 2099e53bdfc0SManivannan Sadhasivam 2100e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_BCR>; 2101e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2102e53bdfc0SManivannan Sadhasivam 2103e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_2_GDSC>; 2104e53bdfc0SManivannan Sadhasivam 2105e53bdfc0SManivannan Sadhasivam phys = <&pcie2_lane>; 2106e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2107e53bdfc0SManivannan Sadhasivam 2108d6050720SDmitry Baryshkov perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>; 2109d6050720SDmitry Baryshkov wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; 211013e948a3SKonrad Dybcio 211113e948a3SKonrad Dybcio pinctrl-names = "default"; 211213e948a3SKonrad Dybcio pinctrl-0 = <&pcie2_default_state>; 211313e948a3SKonrad Dybcio 2114e53bdfc0SManivannan Sadhasivam status = "disabled"; 2115e53bdfc0SManivannan Sadhasivam }; 2116e53bdfc0SManivannan Sadhasivam 2117e53bdfc0SManivannan Sadhasivam pcie2_phy: phy@1c16000 { 2118e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-modem-pcie-phy"; 211981f43efcSKonrad Dybcio reg = <0 0x01c16000 0 0x1c0>; 2120e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2121e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2122e53bdfc0SManivannan Sadhasivam ranges; 2123e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2124e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2125e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2126e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2127e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2128e53bdfc0SManivannan Sadhasivam 2129e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_PHY_BCR>; 2130e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2131e53bdfc0SManivannan Sadhasivam 2132e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2133e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2134e53bdfc0SManivannan Sadhasivam 2135e53bdfc0SManivannan Sadhasivam status = "disabled"; 2136e53bdfc0SManivannan Sadhasivam 21371351512fSShawn Guo pcie2_lane: phy@1c16200 { 213881f43efcSKonrad Dybcio reg = <0 0x01c16200 0 0x170>, /* tx0 */ 213981f43efcSKonrad Dybcio <0 0x01c16400 0 0x200>, /* rx0 */ 214081f43efcSKonrad Dybcio <0 0x01c16a00 0 0x1f0>, /* pcs */ 214181f43efcSKonrad Dybcio <0 0x01c16600 0 0x170>, /* tx1 */ 214281f43efcSKonrad Dybcio <0 0x01c16800 0 0x200>, /* rx1 */ 214381f43efcSKonrad Dybcio <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2144e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; 2145e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2146e53bdfc0SManivannan Sadhasivam 2147e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2148d9fd162cSJohan Hovold 2149d9fd162cSJohan Hovold #clock-cells = <0>; 2150e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_2_pipe_clk"; 2151e53bdfc0SManivannan Sadhasivam }; 2152e53bdfc0SManivannan Sadhasivam }; 2153e53bdfc0SManivannan Sadhasivam 21546b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 2155b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 2156b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 2157b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 2158b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 2159b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 2160b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 2161b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 2162b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 2163b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 2164b7e2fba0SBryan O'Donoghue reset-names = "rst"; 2165b7e2fba0SBryan O'Donoghue 2166b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 2167b7e2fba0SBryan O'Donoghue 2168a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 2169a89441fcSJonathan Marek 2170b7e2fba0SBryan O'Donoghue clock-names = 2171b7e2fba0SBryan O'Donoghue "core_clk", 2172b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 2173b7e2fba0SBryan O'Donoghue "iface_clk", 2174b7e2fba0SBryan O'Donoghue "core_clk_unipro", 2175b7e2fba0SBryan O'Donoghue "ref_clk", 2176b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 2177b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 2178b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 2179b7e2fba0SBryan O'Donoghue clocks = 2180b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 2181b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 2182b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 2183b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 2184b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 2185b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 2186b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 2187b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 2188b7e2fba0SBryan O'Donoghue freq-table-hz = 2189b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2190b7e2fba0SBryan O'Donoghue <0 0>, 2191b7e2fba0SBryan O'Donoghue <0 0>, 2192b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2193b7e2fba0SBryan O'Donoghue <0 0>, 2194b7e2fba0SBryan O'Donoghue <0 0>, 2195b7e2fba0SBryan O'Donoghue <0 0>, 2196b7e2fba0SBryan O'Donoghue <0 0>; 2197b7e2fba0SBryan O'Donoghue 2198b7e2fba0SBryan O'Donoghue status = "disabled"; 2199b7e2fba0SBryan O'Donoghue }; 2200b7e2fba0SBryan O'Donoghue 2201b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 2202b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 2203b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 2204b7e2fba0SBryan O'Donoghue #address-cells = <2>; 2205b7e2fba0SBryan O'Donoghue #size-cells = <2>; 2206b7e2fba0SBryan O'Donoghue ranges; 2207b7e2fba0SBryan O'Donoghue clock-names = "ref", 2208b7e2fba0SBryan O'Donoghue "ref_aux"; 2209b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 2210b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 2211b7e2fba0SBryan O'Donoghue 2212b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 2213b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 2214b7e2fba0SBryan O'Donoghue status = "disabled"; 2215b7e2fba0SBryan O'Donoghue 22161351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 22177f8b37ddSJohan Hovold reg = <0 0x01d87400 0 0x16c>, 22187f8b37ddSJohan Hovold <0 0x01d87600 0 0x200>, 22197f8b37ddSJohan Hovold <0 0x01d87c00 0 0x200>, 22207f8b37ddSJohan Hovold <0 0x01d87800 0 0x16c>, 22217f8b37ddSJohan Hovold <0 0x01d87a00 0 0x200>; 2222b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 2223b7e2fba0SBryan O'Donoghue }; 2224b7e2fba0SBryan O'Donoghue }; 2225b7e2fba0SBryan O'Donoghue 2226dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 2227dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 2228b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 2229dff0f49cSBjorn Andersson #hwlock-cells = <1>; 223060378f1aSVenkata Narendra Kumar Gutta }; 223160378f1aSVenkata Narendra Kumar Gutta 2232768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 2233768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 2234768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 22357858ef3cSLuca Weiss clocks = <&audiocc LPASS_CDC_WSA_MCLK>, 22367858ef3cSLuca Weiss <&audiocc LPASS_CDC_WSA_NPL>, 2237768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2238768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 22397858ef3cSLuca Weiss <&aoncc LPASS_CDC_VA_MCLK>, 2240768270caSSrinivas Kandagatla <&vamacro>; 2241768270caSSrinivas Kandagatla 2242768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 2243768270caSSrinivas Kandagatla 2244768270caSSrinivas Kandagatla #clock-cells = <0>; 2245768270caSSrinivas Kandagatla clock-output-names = "mclk"; 2246768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2247768270caSSrinivas Kandagatla 2248768270caSSrinivas Kandagatla pinctrl-names = "default"; 2249768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 2250ba23455eSKonrad Dybcio 2251ba23455eSKonrad Dybcio status = "disabled"; 2252768270caSSrinivas Kandagatla }; 2253768270caSSrinivas Kandagatla 2254768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 2255768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 2256768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 2257768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 2258768270caSSrinivas Kandagatla clocks = <&wsamacro>; 2259768270caSSrinivas Kandagatla clock-names = "iface"; 2260768270caSSrinivas Kandagatla 2261768270caSSrinivas Kandagatla qcom,din-ports = <2>; 2262768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 2263768270caSSrinivas Kandagatla 2264768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 2265768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 2266768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 2267768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 2268768270caSSrinivas Kandagatla 2269768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2270768270caSSrinivas Kandagatla #address-cells = <2>; 2271768270caSSrinivas Kandagatla #size-cells = <0>; 2272ba23455eSKonrad Dybcio 2273ba23455eSKonrad Dybcio status = "disabled"; 2274768270caSSrinivas Kandagatla }; 2275768270caSSrinivas Kandagatla 2276793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 2277793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 2278793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 2279793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2280793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2281793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2282793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2283793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2284793bbd2dSSrinivas Kandagatla }; 2285793bbd2dSSrinivas Kandagatla 2286768270caSSrinivas Kandagatla vamacro: codec@3370000 { 2287768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 2288768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 22897858ef3cSLuca Weiss clocks = <&aoncc LPASS_CDC_VA_MCLK>, 2290768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2291768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2292768270caSSrinivas Kandagatla 2293768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 2294768270caSSrinivas Kandagatla 2295768270caSSrinivas Kandagatla #clock-cells = <0>; 2296768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 2297768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2298768270caSSrinivas Kandagatla }; 2299768270caSSrinivas Kandagatla 230024f52ef0SSrinivas Kandagatla rxmacro: rxmacro@3200000 { 230124f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 230224f52ef0SSrinivas Kandagatla pinctrl-0 = <&rx_swr_active>; 230324f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-rx-macro"; 2304d8b4ee93SKonrad Dybcio reg = <0 0x03200000 0 0x1000>; 230518019eb6SDmitry Baryshkov status = "disabled"; 230624f52ef0SSrinivas Kandagatla 230724f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 230824f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 230924f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231024f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231124f52ef0SSrinivas Kandagatla <&vamacro>; 231224f52ef0SSrinivas Kandagatla 231324f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 231424f52ef0SSrinivas Kandagatla 231524f52ef0SSrinivas Kandagatla #clock-cells = <0>; 231624f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 231724f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 231824f52ef0SSrinivas Kandagatla }; 231924f52ef0SSrinivas Kandagatla 232024f52ef0SSrinivas Kandagatla swr1: soundwire-controller@3210000 { 2321d8b4ee93SKonrad Dybcio reg = <0 0x03210000 0 0x2000>; 232224f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 232318019eb6SDmitry Baryshkov status = "disabled"; 232424f52ef0SSrinivas Kandagatla interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 232524f52ef0SSrinivas Kandagatla clocks = <&rxmacro>; 232624f52ef0SSrinivas Kandagatla clock-names = "iface"; 232724f52ef0SSrinivas Kandagatla label = "RX"; 232824f52ef0SSrinivas Kandagatla qcom,din-ports = <0>; 232924f52ef0SSrinivas Kandagatla qcom,dout-ports = <5>; 233024f52ef0SSrinivas Kandagatla 233174f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; 233274f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; 233374f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; 233474f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; 233574f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; 233674f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; 233774f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; 233824f52ef0SSrinivas Kandagatla qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; 233974f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; 234024f52ef0SSrinivas Kandagatla 234124f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 234224f52ef0SSrinivas Kandagatla #address-cells = <2>; 234324f52ef0SSrinivas Kandagatla #size-cells = <0>; 234424f52ef0SSrinivas Kandagatla }; 234524f52ef0SSrinivas Kandagatla 234624f52ef0SSrinivas Kandagatla txmacro: txmacro@3220000 { 234724f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 234824f52ef0SSrinivas Kandagatla pinctrl-0 = <&tx_swr_active>; 234924f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-tx-macro"; 2350d8b4ee93SKonrad Dybcio reg = <0 0x03220000 0 0x1000>; 235118019eb6SDmitry Baryshkov status = "disabled"; 235224f52ef0SSrinivas Kandagatla 235324f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235424f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235524f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235624f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235724f52ef0SSrinivas Kandagatla <&vamacro>; 235824f52ef0SSrinivas Kandagatla 235924f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 236024f52ef0SSrinivas Kandagatla 236124f52ef0SSrinivas Kandagatla #clock-cells = <0>; 236224f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 236324f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 236424f52ef0SSrinivas Kandagatla }; 236524f52ef0SSrinivas Kandagatla 236624f52ef0SSrinivas Kandagatla /* tx macro */ 236724f52ef0SSrinivas Kandagatla swr2: soundwire-controller@3230000 { 2368d8b4ee93SKonrad Dybcio reg = <0 0x03230000 0 0x2000>; 236924f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 237024f52ef0SSrinivas Kandagatla interrupts-extended = <&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; 237124f52ef0SSrinivas Kandagatla interrupt-names = "core"; 237218019eb6SDmitry Baryshkov status = "disabled"; 237324f52ef0SSrinivas Kandagatla 237424f52ef0SSrinivas Kandagatla clocks = <&txmacro>; 237524f52ef0SSrinivas Kandagatla clock-names = "iface"; 237624f52ef0SSrinivas Kandagatla label = "TX"; 237724f52ef0SSrinivas Kandagatla 237824f52ef0SSrinivas Kandagatla qcom,din-ports = <5>; 237924f52ef0SSrinivas Kandagatla qcom,dout-ports = <0>; 238074f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0xff 0x01 0x01 0x03 0x03>; 238174f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0xff 0x01 0x00 0x02 0x00>; 238274f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x00 0x00 0x00>; 238374f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 238474f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 238574f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 238674f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 238774f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 238874f91659SKonrad Dybcio qcom,ports-lane-control = /bits/ 8 <0xff 0x00 0x01 0x00 0x01>; 238924f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 239024f52ef0SSrinivas Kandagatla #address-cells = <2>; 239124f52ef0SSrinivas Kandagatla #size-cells = <0>; 239224f52ef0SSrinivas Kandagatla }; 239324f52ef0SSrinivas Kandagatla 2394793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 2395793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 2396793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 2397793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2398793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2399793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2400793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2401793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2402793bbd2dSSrinivas Kandagatla }; 2403793bbd2dSSrinivas Kandagatla 24043160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000 { 24053160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 24063160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 24073160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 24083160c1b8SSrinivas Kandagatla gpio-controller; 24093160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 24103160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 24113160c1b8SSrinivas Kandagatla 24123160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 24133160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 24143160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 24153160c1b8SSrinivas Kandagatla 2416031f5436SKrzysztof Kozlowski wsa_swr_active: wsa-swr-active-state { 2417031f5436SKrzysztof Kozlowski clk-pins { 24183160c1b8SSrinivas Kandagatla pins = "gpio10"; 24193160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24203160c1b8SSrinivas Kandagatla drive-strength = <2>; 24213160c1b8SSrinivas Kandagatla slew-rate = <1>; 24223160c1b8SSrinivas Kandagatla bias-disable; 24233160c1b8SSrinivas Kandagatla }; 24243160c1b8SSrinivas Kandagatla 2425031f5436SKrzysztof Kozlowski data-pins { 24263160c1b8SSrinivas Kandagatla pins = "gpio11"; 24273160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24283160c1b8SSrinivas Kandagatla drive-strength = <2>; 24293160c1b8SSrinivas Kandagatla slew-rate = <1>; 24303160c1b8SSrinivas Kandagatla bias-bus-hold; 24313160c1b8SSrinivas Kandagatla 24323160c1b8SSrinivas Kandagatla }; 24333160c1b8SSrinivas Kandagatla }; 24343160c1b8SSrinivas Kandagatla 2435031f5436SKrzysztof Kozlowski wsa_swr_sleep: wsa-swr-sleep-state { 2436031f5436SKrzysztof Kozlowski clk-pins { 24373160c1b8SSrinivas Kandagatla pins = "gpio10"; 24383160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24393160c1b8SSrinivas Kandagatla drive-strength = <2>; 24403160c1b8SSrinivas Kandagatla input-enable; 24413160c1b8SSrinivas Kandagatla bias-pull-down; 24423160c1b8SSrinivas Kandagatla }; 24433160c1b8SSrinivas Kandagatla 2444031f5436SKrzysztof Kozlowski data-pins { 24453160c1b8SSrinivas Kandagatla pins = "gpio11"; 24463160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24473160c1b8SSrinivas Kandagatla drive-strength = <2>; 24483160c1b8SSrinivas Kandagatla input-enable; 24493160c1b8SSrinivas Kandagatla bias-pull-down; 24503160c1b8SSrinivas Kandagatla 24513160c1b8SSrinivas Kandagatla }; 24523160c1b8SSrinivas Kandagatla }; 24533160c1b8SSrinivas Kandagatla 2454031f5436SKrzysztof Kozlowski dmic01_active: dmic01-active-state { 2455031f5436SKrzysztof Kozlowski clk-pins { 24563160c1b8SSrinivas Kandagatla pins = "gpio6"; 24573160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 24583160c1b8SSrinivas Kandagatla drive-strength = <8>; 24593160c1b8SSrinivas Kandagatla output-high; 24603160c1b8SSrinivas Kandagatla }; 2461031f5436SKrzysztof Kozlowski data-pins { 24623160c1b8SSrinivas Kandagatla pins = "gpio7"; 24633160c1b8SSrinivas Kandagatla function = "dmic1_data"; 24643160c1b8SSrinivas Kandagatla drive-strength = <8>; 24653160c1b8SSrinivas Kandagatla input-enable; 24663160c1b8SSrinivas Kandagatla }; 24673160c1b8SSrinivas Kandagatla }; 24683160c1b8SSrinivas Kandagatla 2469031f5436SKrzysztof Kozlowski dmic01_sleep: dmic01-sleep-state { 2470031f5436SKrzysztof Kozlowski clk-pins { 24713160c1b8SSrinivas Kandagatla pins = "gpio6"; 24723160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 24733160c1b8SSrinivas Kandagatla drive-strength = <2>; 24743160c1b8SSrinivas Kandagatla bias-disable; 24753160c1b8SSrinivas Kandagatla output-low; 24763160c1b8SSrinivas Kandagatla }; 24773160c1b8SSrinivas Kandagatla 2478031f5436SKrzysztof Kozlowski data-pins { 24793160c1b8SSrinivas Kandagatla pins = "gpio7"; 24803160c1b8SSrinivas Kandagatla function = "dmic1_data"; 24813160c1b8SSrinivas Kandagatla drive-strength = <2>; 2482195a0a11SKrzysztof Kozlowski bias-pull-down; 24833160c1b8SSrinivas Kandagatla input-enable; 24843160c1b8SSrinivas Kandagatla }; 24853160c1b8SSrinivas Kandagatla }; 248624f52ef0SSrinivas Kandagatla 2487031f5436SKrzysztof Kozlowski rx_swr_active: rx-swr-active-state { 2488031f5436SKrzysztof Kozlowski clk-pins { 248924f52ef0SSrinivas Kandagatla pins = "gpio3"; 249024f52ef0SSrinivas Kandagatla function = "swr_rx_clk"; 249124f52ef0SSrinivas Kandagatla drive-strength = <2>; 249224f52ef0SSrinivas Kandagatla slew-rate = <1>; 249324f52ef0SSrinivas Kandagatla bias-disable; 249424f52ef0SSrinivas Kandagatla }; 249524f52ef0SSrinivas Kandagatla 2496031f5436SKrzysztof Kozlowski data-pins { 249724f52ef0SSrinivas Kandagatla pins = "gpio4", "gpio5"; 249824f52ef0SSrinivas Kandagatla function = "swr_rx_data"; 249924f52ef0SSrinivas Kandagatla drive-strength = <2>; 250024f52ef0SSrinivas Kandagatla slew-rate = <1>; 250124f52ef0SSrinivas Kandagatla bias-bus-hold; 250224f52ef0SSrinivas Kandagatla }; 250324f52ef0SSrinivas Kandagatla }; 250424f52ef0SSrinivas Kandagatla 2505031f5436SKrzysztof Kozlowski tx_swr_active: tx-swr-active-state { 2506031f5436SKrzysztof Kozlowski clk-pins { 250724f52ef0SSrinivas Kandagatla pins = "gpio0"; 250824f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 250924f52ef0SSrinivas Kandagatla drive-strength = <2>; 251024f52ef0SSrinivas Kandagatla slew-rate = <1>; 251124f52ef0SSrinivas Kandagatla bias-disable; 251224f52ef0SSrinivas Kandagatla }; 251324f52ef0SSrinivas Kandagatla 2514031f5436SKrzysztof Kozlowski data-pins { 251524f52ef0SSrinivas Kandagatla pins = "gpio1", "gpio2"; 251624f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 251724f52ef0SSrinivas Kandagatla drive-strength = <2>; 251824f52ef0SSrinivas Kandagatla slew-rate = <1>; 251924f52ef0SSrinivas Kandagatla bias-bus-hold; 252024f52ef0SSrinivas Kandagatla }; 252124f52ef0SSrinivas Kandagatla }; 252224f52ef0SSrinivas Kandagatla 2523031f5436SKrzysztof Kozlowski tx_swr_sleep: tx-swr-sleep-state { 2524031f5436SKrzysztof Kozlowski clk-pins { 252524f52ef0SSrinivas Kandagatla pins = "gpio0"; 252624f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 252724f52ef0SSrinivas Kandagatla drive-strength = <2>; 252824f52ef0SSrinivas Kandagatla input-enable; 252924f52ef0SSrinivas Kandagatla bias-pull-down; 253024f52ef0SSrinivas Kandagatla }; 253124f52ef0SSrinivas Kandagatla 2532031f5436SKrzysztof Kozlowski data1-pins { 253324f52ef0SSrinivas Kandagatla pins = "gpio1"; 253424f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 253524f52ef0SSrinivas Kandagatla drive-strength = <2>; 253624f52ef0SSrinivas Kandagatla input-enable; 253724f52ef0SSrinivas Kandagatla bias-bus-hold; 253824f52ef0SSrinivas Kandagatla }; 253924f52ef0SSrinivas Kandagatla 2540031f5436SKrzysztof Kozlowski data2-pins { 254124f52ef0SSrinivas Kandagatla pins = "gpio2"; 254224f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 254324f52ef0SSrinivas Kandagatla drive-strength = <2>; 254424f52ef0SSrinivas Kandagatla input-enable; 254524f52ef0SSrinivas Kandagatla bias-pull-down; 254624f52ef0SSrinivas Kandagatla }; 254724f52ef0SSrinivas Kandagatla }; 25483160c1b8SSrinivas Kandagatla }; 25493160c1b8SSrinivas Kandagatla 255004a3605bSJonathan Marek gpu: gpu@3d00000 { 255104a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 25527c1dffd4SDmitry Baryshkov "qcom,adreno"; 255304a3605bSJonathan Marek 255404a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 255504a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 255604a3605bSJonathan Marek 255704a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 255804a3605bSJonathan Marek 255904a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 256004a3605bSJonathan Marek 256104a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 256204a3605bSJonathan Marek 256304a3605bSJonathan Marek qcom,gmu = <&gmu>; 256404a3605bSJonathan Marek 2565ece28cb5SKonrad Dybcio status = "disabled"; 2566ece28cb5SKonrad Dybcio 256704a3605bSJonathan Marek zap-shader { 256804a3605bSJonathan Marek memory-region = <&gpu_mem>; 256904a3605bSJonathan Marek }; 257004a3605bSJonathan Marek 257104a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 257204a3605bSJonathan Marek gpu_opp_table: opp-table { 257304a3605bSJonathan Marek compatible = "operating-points-v2"; 257404a3605bSJonathan Marek 257504a3605bSJonathan Marek opp-670000000 { 257604a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 257704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 257804a3605bSJonathan Marek }; 257904a3605bSJonathan Marek 258004a3605bSJonathan Marek opp-587000000 { 258104a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 258204a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 258304a3605bSJonathan Marek }; 258404a3605bSJonathan Marek 258504a3605bSJonathan Marek opp-525000000 { 258604a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 258704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 258804a3605bSJonathan Marek }; 258904a3605bSJonathan Marek 259004a3605bSJonathan Marek opp-490000000 { 259104a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 259204a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 259304a3605bSJonathan Marek }; 259404a3605bSJonathan Marek 259504a3605bSJonathan Marek opp-441600000 { 259604a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 259704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 259804a3605bSJonathan Marek }; 259904a3605bSJonathan Marek 260004a3605bSJonathan Marek opp-400000000 { 260104a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 260204a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 260304a3605bSJonathan Marek }; 260404a3605bSJonathan Marek 260504a3605bSJonathan Marek opp-305000000 { 260604a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 260704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 260804a3605bSJonathan Marek }; 260904a3605bSJonathan Marek }; 261004a3605bSJonathan Marek }; 261104a3605bSJonathan Marek 261204a3605bSJonathan Marek gmu: gmu@3d6a000 { 261304a3605bSJonathan Marek compatible = "qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 261404a3605bSJonathan Marek 261504a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 261604a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 261704a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 261804a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 261904a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 262004a3605bSJonathan Marek 262104a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 262204a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 262304a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 262404a3605bSJonathan Marek 26250e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 26260e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 26270e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 262804a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 262904a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 263004a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 263104a3605bSJonathan Marek 26320e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 26330e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 263404a3605bSJonathan Marek power-domain-names = "cx", "gx"; 263504a3605bSJonathan Marek 263604a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 263704a3605bSJonathan Marek 263804a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 263904a3605bSJonathan Marek 2640ece28cb5SKonrad Dybcio status = "disabled"; 2641ece28cb5SKonrad Dybcio 264204a3605bSJonathan Marek gmu_opp_table: opp-table { 264304a3605bSJonathan Marek compatible = "operating-points-v2"; 264404a3605bSJonathan Marek 264504a3605bSJonathan Marek opp-200000000 { 264604a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 264704a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 264804a3605bSJonathan Marek }; 264904a3605bSJonathan Marek }; 265004a3605bSJonathan Marek }; 265104a3605bSJonathan Marek 265204a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 265304a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 265404a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 265504a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 265604a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 265704a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 265804a3605bSJonathan Marek clock-names = "bi_tcxo", 265904a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 266004a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 266104a3605bSJonathan Marek #clock-cells = <1>; 266204a3605bSJonathan Marek #reset-cells = <1>; 266304a3605bSJonathan Marek #power-domain-cells = <1>; 266404a3605bSJonathan Marek }; 266504a3605bSJonathan Marek 266604a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 26678347b12eSKonrad Dybcio compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", 26688347b12eSKonrad Dybcio "qcom,smmu-500", "arm,mmu-500"; 266904a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 267004a3605bSJonathan Marek #iommu-cells = <2>; 267104a3605bSJonathan Marek #global-interrupts = <2>; 267204a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 267304a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 267404a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 267504a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 267604a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 267704a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 267804a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 267904a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 268004a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 268104a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 26820e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 268304a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 268404a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 268504a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 268604a3605bSJonathan Marek 26870e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 268804a3605bSJonathan Marek }; 268904a3605bSJonathan Marek 269023a89037SBjorn Andersson slpi: remoteproc@5c00000 { 269123a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 269223a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 269323a89037SBjorn Andersson 269423a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 269523a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 269623a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 269723a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 269823a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 269923a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 270023a89037SBjorn Andersson "handover", "stop-ack"; 270123a89037SBjorn Andersson 270223a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 270323a89037SBjorn Andersson clock-names = "xo"; 270423a89037SBjorn Andersson 2705b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 270623a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 2707b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 270823a89037SBjorn Andersson 270923a89037SBjorn Andersson memory-region = <&slpi_mem>; 271023a89037SBjorn Andersson 2711b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 2712b74ee2d7SSibi Sankar 271323a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 271423a89037SBjorn Andersson qcom,smem-state-names = "stop"; 271523a89037SBjorn Andersson 271623a89037SBjorn Andersson status = "disabled"; 271723a89037SBjorn Andersson 271823a89037SBjorn Andersson glink-edge { 271923a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 272023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 272123a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 272223a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 272323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 272423a89037SBjorn Andersson 272525695808SJonathan Marek label = "slpi"; 272623a89037SBjorn Andersson qcom,remote-pid = <3>; 272725695808SJonathan Marek 272825695808SJonathan Marek fastrpc { 272925695808SJonathan Marek compatible = "qcom,fastrpc"; 273025695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 273125695808SJonathan Marek label = "sdsp"; 27328c8ce95bSJeya R qcom,non-secure-domain; 273325695808SJonathan Marek #address-cells = <1>; 273425695808SJonathan Marek #size-cells = <0>; 273525695808SJonathan Marek 273625695808SJonathan Marek compute-cb@1 { 273725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 273825695808SJonathan Marek reg = <1>; 273925695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 274025695808SJonathan Marek }; 274125695808SJonathan Marek 274225695808SJonathan Marek compute-cb@2 { 274325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 274425695808SJonathan Marek reg = <2>; 274525695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 274625695808SJonathan Marek }; 274725695808SJonathan Marek 274825695808SJonathan Marek compute-cb@3 { 274925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 275025695808SJonathan Marek reg = <3>; 275125695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 275225695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 275325695808SJonathan Marek }; 275425695808SJonathan Marek }; 275523a89037SBjorn Andersson }; 275623a89037SBjorn Andersson }; 275723a89037SBjorn Andersson 27587960de64SMao Jinlong stm@6002000 { 27597960de64SMao Jinlong compatible = "arm,coresight-stm", "arm,primecell"; 27607960de64SMao Jinlong reg = <0 0x06002000 0 0x1000>, <0 0x16280000 0 0x180000>; 27617960de64SMao Jinlong reg-names = "stm-base", "stm-stimulus-base"; 27627960de64SMao Jinlong 27637960de64SMao Jinlong clocks = <&aoss_qmp>; 27647960de64SMao Jinlong clock-names = "apb_pclk"; 27657960de64SMao Jinlong 27667960de64SMao Jinlong out-ports { 27677960de64SMao Jinlong port { 27687960de64SMao Jinlong stm_out: endpoint { 27697960de64SMao Jinlong remote-endpoint = <&funnel0_in7>; 27707960de64SMao Jinlong }; 27717960de64SMao Jinlong }; 27727960de64SMao Jinlong }; 27737960de64SMao Jinlong }; 27747960de64SMao Jinlong 27757960de64SMao Jinlong funnel@6041000 { 27767960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 27777960de64SMao Jinlong reg = <0 0x06041000 0 0x1000>; 27787960de64SMao Jinlong 27797960de64SMao Jinlong clocks = <&aoss_qmp>; 27807960de64SMao Jinlong clock-names = "apb_pclk"; 27817960de64SMao Jinlong 27827960de64SMao Jinlong out-ports { 27837960de64SMao Jinlong port { 27847960de64SMao Jinlong funnel_in0_out_funnel_merg: endpoint { 27857960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in0>; 27867960de64SMao Jinlong }; 27877960de64SMao Jinlong }; 27887960de64SMao Jinlong }; 27897960de64SMao Jinlong 27907960de64SMao Jinlong in-ports { 27917960de64SMao Jinlong #address-cells = <1>; 27927960de64SMao Jinlong #size-cells = <0>; 27937960de64SMao Jinlong 27947960de64SMao Jinlong port@7 { 27957960de64SMao Jinlong reg = <7>; 27967960de64SMao Jinlong funnel0_in7: endpoint { 27977960de64SMao Jinlong remote-endpoint = <&stm_out>; 27987960de64SMao Jinlong }; 27997960de64SMao Jinlong }; 28007960de64SMao Jinlong }; 28017960de64SMao Jinlong }; 28027960de64SMao Jinlong 28037960de64SMao Jinlong funnel@6042000 { 28047960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 28057960de64SMao Jinlong reg = <0 0x06042000 0 0x1000>; 28067960de64SMao Jinlong 28077960de64SMao Jinlong clocks = <&aoss_qmp>; 28087960de64SMao Jinlong clock-names = "apb_pclk"; 28097960de64SMao Jinlong 28107960de64SMao Jinlong out-ports { 2811*d24539a6SKrzysztof Kozlowski port { 28127960de64SMao Jinlong funnel_in1_out_funnel_merg: endpoint { 28137960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in1>; 28147960de64SMao Jinlong }; 28157960de64SMao Jinlong }; 28167960de64SMao Jinlong }; 28177960de64SMao Jinlong 28187960de64SMao Jinlong in-ports { 28197960de64SMao Jinlong #address-cells = <1>; 28207960de64SMao Jinlong #size-cells = <0>; 28217960de64SMao Jinlong 28227960de64SMao Jinlong port@4 { 28237960de64SMao Jinlong reg = <4>; 28247960de64SMao Jinlong funnel_in1_in_funnel_apss_merg: endpoint { 28257960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_out_funnel_in1>; 28267960de64SMao Jinlong }; 28277960de64SMao Jinlong }; 28287960de64SMao Jinlong }; 28297960de64SMao Jinlong }; 28307960de64SMao Jinlong 28317960de64SMao Jinlong funnel@6045000 { 28327960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 28337960de64SMao Jinlong reg = <0 0x06045000 0 0x1000>; 28347960de64SMao Jinlong 28357960de64SMao Jinlong clocks = <&aoss_qmp>; 28367960de64SMao Jinlong clock-names = "apb_pclk"; 28377960de64SMao Jinlong 28387960de64SMao Jinlong out-ports { 28397960de64SMao Jinlong port { 28407960de64SMao Jinlong funnel_merg_out_funnel_swao: endpoint { 28417960de64SMao Jinlong remote-endpoint = <&funnel_swao_in_funnel_merg>; 28427960de64SMao Jinlong }; 28437960de64SMao Jinlong }; 28447960de64SMao Jinlong }; 28457960de64SMao Jinlong 28467960de64SMao Jinlong in-ports { 28477960de64SMao Jinlong #address-cells = <1>; 28487960de64SMao Jinlong #size-cells = <0>; 28497960de64SMao Jinlong 28507960de64SMao Jinlong port@0 { 28517960de64SMao Jinlong reg = <0>; 28527960de64SMao Jinlong funnel_merg_in_funnel_in0: endpoint { 28537960de64SMao Jinlong remote-endpoint = <&funnel_in0_out_funnel_merg>; 28547960de64SMao Jinlong }; 28557960de64SMao Jinlong }; 28567960de64SMao Jinlong 28577960de64SMao Jinlong port@1 { 28587960de64SMao Jinlong reg = <1>; 28597960de64SMao Jinlong funnel_merg_in_funnel_in1: endpoint { 28607960de64SMao Jinlong remote-endpoint = <&funnel_in1_out_funnel_merg>; 28617960de64SMao Jinlong }; 28627960de64SMao Jinlong }; 28637960de64SMao Jinlong }; 28647960de64SMao Jinlong }; 28657960de64SMao Jinlong 28667960de64SMao Jinlong replicator@6046000 { 28677960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 28687960de64SMao Jinlong reg = <0 0x06046000 0 0x1000>; 28697960de64SMao Jinlong 28707960de64SMao Jinlong clocks = <&aoss_qmp>; 28717960de64SMao Jinlong clock-names = "apb_pclk"; 28727960de64SMao Jinlong 28737960de64SMao Jinlong out-ports { 28747960de64SMao Jinlong port { 28757960de64SMao Jinlong replicator_out: endpoint { 28767960de64SMao Jinlong remote-endpoint = <&etr_in>; 28777960de64SMao Jinlong }; 28787960de64SMao Jinlong }; 28797960de64SMao Jinlong }; 28807960de64SMao Jinlong 28817960de64SMao Jinlong in-ports { 28827960de64SMao Jinlong port { 28837960de64SMao Jinlong replicator_cx_in_swao_out: endpoint { 28847960de64SMao Jinlong remote-endpoint = <&replicator_swao_out_cx_in>; 28857960de64SMao Jinlong }; 28867960de64SMao Jinlong }; 28877960de64SMao Jinlong }; 28887960de64SMao Jinlong }; 28897960de64SMao Jinlong 28907960de64SMao Jinlong etr@6048000 { 28917960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 28927960de64SMao Jinlong reg = <0 0x06048000 0 0x1000>; 28937960de64SMao Jinlong 28947960de64SMao Jinlong clocks = <&aoss_qmp>; 28957960de64SMao Jinlong clock-names = "apb_pclk"; 28967960de64SMao Jinlong arm,scatter-gather; 28977960de64SMao Jinlong 28987960de64SMao Jinlong in-ports { 28997960de64SMao Jinlong port { 29007960de64SMao Jinlong etr_in: endpoint { 29017960de64SMao Jinlong remote-endpoint = <&replicator_out>; 29027960de64SMao Jinlong }; 29037960de64SMao Jinlong }; 29047960de64SMao Jinlong }; 29057960de64SMao Jinlong }; 29067960de64SMao Jinlong 29077960de64SMao Jinlong funnel@6b04000 { 29087960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 29097960de64SMao Jinlong arm,primecell-periphid = <0x000bb908>; 29107960de64SMao Jinlong 29117960de64SMao Jinlong reg = <0 0x06b04000 0 0x1000>; 29127960de64SMao Jinlong 29137960de64SMao Jinlong clocks = <&aoss_qmp>; 29147960de64SMao Jinlong clock-names = "apb_pclk"; 29157960de64SMao Jinlong 29167960de64SMao Jinlong out-ports { 29177960de64SMao Jinlong port { 29187960de64SMao Jinlong funnel_swao_out_etf: endpoint { 29197960de64SMao Jinlong remote-endpoint = <&etf_in_funnel_swao_out>; 29207960de64SMao Jinlong }; 29217960de64SMao Jinlong }; 29227960de64SMao Jinlong }; 29237960de64SMao Jinlong 29247960de64SMao Jinlong in-ports { 29257960de64SMao Jinlong #address-cells = <1>; 29267960de64SMao Jinlong #size-cells = <0>; 29277960de64SMao Jinlong 29287960de64SMao Jinlong port@7 { 29297960de64SMao Jinlong reg = <7>; 29307960de64SMao Jinlong funnel_swao_in_funnel_merg: endpoint { 29317960de64SMao Jinlong remote-endpoint= <&funnel_merg_out_funnel_swao>; 29327960de64SMao Jinlong }; 29337960de64SMao Jinlong }; 29347960de64SMao Jinlong }; 29357960de64SMao Jinlong 29367960de64SMao Jinlong }; 29377960de64SMao Jinlong 29387960de64SMao Jinlong etf@6b05000 { 29397960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 29407960de64SMao Jinlong reg = <0 0x06b05000 0 0x1000>; 29417960de64SMao Jinlong 29427960de64SMao Jinlong clocks = <&aoss_qmp>; 29437960de64SMao Jinlong clock-names = "apb_pclk"; 29447960de64SMao Jinlong 29457960de64SMao Jinlong out-ports { 29467960de64SMao Jinlong port { 29477960de64SMao Jinlong etf_out: endpoint { 29487960de64SMao Jinlong remote-endpoint = <&replicator_in>; 29497960de64SMao Jinlong }; 29507960de64SMao Jinlong }; 29517960de64SMao Jinlong }; 29527960de64SMao Jinlong 29537960de64SMao Jinlong in-ports { 29547960de64SMao Jinlong #address-cells = <1>; 29557960de64SMao Jinlong #size-cells = <0>; 29567960de64SMao Jinlong 29577960de64SMao Jinlong port@0 { 29587960de64SMao Jinlong reg = <0>; 29597960de64SMao Jinlong etf_in_funnel_swao_out: endpoint { 29607960de64SMao Jinlong remote-endpoint = <&funnel_swao_out_etf>; 29617960de64SMao Jinlong }; 29627960de64SMao Jinlong }; 29637960de64SMao Jinlong }; 29647960de64SMao Jinlong }; 29657960de64SMao Jinlong 29667960de64SMao Jinlong replicator@6b06000 { 29677960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 29687960de64SMao Jinlong reg = <0 0x06b06000 0 0x1000>; 29697960de64SMao Jinlong 29707960de64SMao Jinlong clocks = <&aoss_qmp>; 29717960de64SMao Jinlong clock-names = "apb_pclk"; 29727960de64SMao Jinlong 29737960de64SMao Jinlong out-ports { 29747960de64SMao Jinlong port { 29757960de64SMao Jinlong replicator_swao_out_cx_in: endpoint { 29767960de64SMao Jinlong remote-endpoint = <&replicator_cx_in_swao_out>; 29777960de64SMao Jinlong }; 29787960de64SMao Jinlong }; 29797960de64SMao Jinlong }; 29807960de64SMao Jinlong 29817960de64SMao Jinlong in-ports { 29827960de64SMao Jinlong port { 29837960de64SMao Jinlong replicator_in: endpoint { 29847960de64SMao Jinlong remote-endpoint = <&etf_out>; 29857960de64SMao Jinlong }; 29867960de64SMao Jinlong }; 29877960de64SMao Jinlong }; 29887960de64SMao Jinlong }; 29897960de64SMao Jinlong 29907960de64SMao Jinlong etm@7040000 { 29917960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 29927960de64SMao Jinlong reg = <0 0x07040000 0 0x1000>; 29937960de64SMao Jinlong 29947960de64SMao Jinlong cpu = <&CPU0>; 29957960de64SMao Jinlong 29967960de64SMao Jinlong clocks = <&aoss_qmp>; 29977960de64SMao Jinlong clock-names = "apb_pclk"; 29987960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 29997960de64SMao Jinlong 30007960de64SMao Jinlong out-ports { 30017960de64SMao Jinlong port { 30027960de64SMao Jinlong etm0_out: endpoint { 30037960de64SMao Jinlong remote-endpoint = <&apss_funnel_in0>; 30047960de64SMao Jinlong }; 30057960de64SMao Jinlong }; 30067960de64SMao Jinlong }; 30077960de64SMao Jinlong }; 30087960de64SMao Jinlong 30097960de64SMao Jinlong etm@7140000 { 30107960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 30117960de64SMao Jinlong reg = <0 0x07140000 0 0x1000>; 30127960de64SMao Jinlong 30137960de64SMao Jinlong cpu = <&CPU1>; 30147960de64SMao Jinlong 30157960de64SMao Jinlong clocks = <&aoss_qmp>; 30167960de64SMao Jinlong clock-names = "apb_pclk"; 30177960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 30187960de64SMao Jinlong 30197960de64SMao Jinlong out-ports { 30207960de64SMao Jinlong port { 30217960de64SMao Jinlong etm1_out: endpoint { 30227960de64SMao Jinlong remote-endpoint = <&apss_funnel_in1>; 30237960de64SMao Jinlong }; 30247960de64SMao Jinlong }; 30257960de64SMao Jinlong }; 30267960de64SMao Jinlong }; 30277960de64SMao Jinlong 30287960de64SMao Jinlong etm@7240000 { 30297960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 30307960de64SMao Jinlong reg = <0 0x07240000 0 0x1000>; 30317960de64SMao Jinlong 30327960de64SMao Jinlong cpu = <&CPU2>; 30337960de64SMao Jinlong 30347960de64SMao Jinlong clocks = <&aoss_qmp>; 30357960de64SMao Jinlong clock-names = "apb_pclk"; 30367960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 30377960de64SMao Jinlong 30387960de64SMao Jinlong out-ports { 30397960de64SMao Jinlong port { 30407960de64SMao Jinlong etm2_out: endpoint { 30417960de64SMao Jinlong remote-endpoint = <&apss_funnel_in2>; 30427960de64SMao Jinlong }; 30437960de64SMao Jinlong }; 30447960de64SMao Jinlong }; 30457960de64SMao Jinlong }; 30467960de64SMao Jinlong 30477960de64SMao Jinlong etm@7340000 { 30487960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 30497960de64SMao Jinlong reg = <0 0x07340000 0 0x1000>; 30507960de64SMao Jinlong 30517960de64SMao Jinlong cpu = <&CPU3>; 30527960de64SMao Jinlong 30537960de64SMao Jinlong clocks = <&aoss_qmp>; 30547960de64SMao Jinlong clock-names = "apb_pclk"; 30557960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 30567960de64SMao Jinlong 30577960de64SMao Jinlong out-ports { 30587960de64SMao Jinlong port { 30597960de64SMao Jinlong etm3_out: endpoint { 30607960de64SMao Jinlong remote-endpoint = <&apss_funnel_in3>; 30617960de64SMao Jinlong }; 30627960de64SMao Jinlong }; 30637960de64SMao Jinlong }; 30647960de64SMao Jinlong }; 30657960de64SMao Jinlong 30667960de64SMao Jinlong etm@7440000 { 30677960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 30687960de64SMao Jinlong reg = <0 0x07440000 0 0x1000>; 30697960de64SMao Jinlong 30707960de64SMao Jinlong cpu = <&CPU4>; 30717960de64SMao Jinlong 30727960de64SMao Jinlong clocks = <&aoss_qmp>; 30737960de64SMao Jinlong clock-names = "apb_pclk"; 30747960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 30757960de64SMao Jinlong 30767960de64SMao Jinlong out-ports { 30777960de64SMao Jinlong port { 30787960de64SMao Jinlong etm4_out: endpoint { 30797960de64SMao Jinlong remote-endpoint = <&apss_funnel_in4>; 30807960de64SMao Jinlong }; 30817960de64SMao Jinlong }; 30827960de64SMao Jinlong }; 30837960de64SMao Jinlong }; 30847960de64SMao Jinlong 30857960de64SMao Jinlong etm@7540000 { 30867960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 30877960de64SMao Jinlong reg = <0 0x07540000 0 0x1000>; 30887960de64SMao Jinlong 30897960de64SMao Jinlong cpu = <&CPU5>; 30907960de64SMao Jinlong 30917960de64SMao Jinlong clocks = <&aoss_qmp>; 30927960de64SMao Jinlong clock-names = "apb_pclk"; 30937960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 30947960de64SMao Jinlong 30957960de64SMao Jinlong out-ports { 30967960de64SMao Jinlong port { 30977960de64SMao Jinlong etm5_out: endpoint { 30987960de64SMao Jinlong remote-endpoint = <&apss_funnel_in5>; 30997960de64SMao Jinlong }; 31007960de64SMao Jinlong }; 31017960de64SMao Jinlong }; 31027960de64SMao Jinlong }; 31037960de64SMao Jinlong 31047960de64SMao Jinlong etm@7640000 { 31057960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 31067960de64SMao Jinlong reg = <0 0x07640000 0 0x1000>; 31077960de64SMao Jinlong 31087960de64SMao Jinlong cpu = <&CPU6>; 31097960de64SMao Jinlong 31107960de64SMao Jinlong clocks = <&aoss_qmp>; 31117960de64SMao Jinlong clock-names = "apb_pclk"; 31127960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 31137960de64SMao Jinlong 31147960de64SMao Jinlong out-ports { 31157960de64SMao Jinlong port { 31167960de64SMao Jinlong etm6_out: endpoint { 31177960de64SMao Jinlong remote-endpoint = <&apss_funnel_in6>; 31187960de64SMao Jinlong }; 31197960de64SMao Jinlong }; 31207960de64SMao Jinlong }; 31217960de64SMao Jinlong }; 31227960de64SMao Jinlong 31237960de64SMao Jinlong etm@7740000 { 31247960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 31257960de64SMao Jinlong reg = <0 0x07740000 0 0x1000>; 31267960de64SMao Jinlong 31277960de64SMao Jinlong cpu = <&CPU7>; 31287960de64SMao Jinlong 31297960de64SMao Jinlong clocks = <&aoss_qmp>; 31307960de64SMao Jinlong clock-names = "apb_pclk"; 31317960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 31327960de64SMao Jinlong 31337960de64SMao Jinlong out-ports { 31347960de64SMao Jinlong port { 31357960de64SMao Jinlong etm7_out: endpoint { 31367960de64SMao Jinlong remote-endpoint = <&apss_funnel_in7>; 31377960de64SMao Jinlong }; 31387960de64SMao Jinlong }; 31397960de64SMao Jinlong }; 31407960de64SMao Jinlong }; 31417960de64SMao Jinlong 31427960de64SMao Jinlong funnel@7800000 { 31437960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 31447960de64SMao Jinlong reg = <0 0x07800000 0 0x1000>; 31457960de64SMao Jinlong 31467960de64SMao Jinlong clocks = <&aoss_qmp>; 31477960de64SMao Jinlong clock-names = "apb_pclk"; 31487960de64SMao Jinlong 31497960de64SMao Jinlong out-ports { 31507960de64SMao Jinlong port { 31517960de64SMao Jinlong funnel_apss_out_funnel_apss_merg: endpoint { 31527960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_in_funnel_apss>; 31537960de64SMao Jinlong }; 31547960de64SMao Jinlong }; 31557960de64SMao Jinlong }; 31567960de64SMao Jinlong 31577960de64SMao Jinlong in-ports { 31587960de64SMao Jinlong #address-cells = <1>; 31597960de64SMao Jinlong #size-cells = <0>; 31607960de64SMao Jinlong 31617960de64SMao Jinlong port@0 { 31627960de64SMao Jinlong reg = <0>; 31637960de64SMao Jinlong apss_funnel_in0: endpoint { 31647960de64SMao Jinlong remote-endpoint = <&etm0_out>; 31657960de64SMao Jinlong }; 31667960de64SMao Jinlong }; 31677960de64SMao Jinlong 31687960de64SMao Jinlong port@1 { 31697960de64SMao Jinlong reg = <1>; 31707960de64SMao Jinlong apss_funnel_in1: endpoint { 31717960de64SMao Jinlong remote-endpoint = <&etm1_out>; 31727960de64SMao Jinlong }; 31737960de64SMao Jinlong }; 31747960de64SMao Jinlong 31757960de64SMao Jinlong port@2 { 31767960de64SMao Jinlong reg = <2>; 31777960de64SMao Jinlong apss_funnel_in2: endpoint { 31787960de64SMao Jinlong remote-endpoint = <&etm2_out>; 31797960de64SMao Jinlong }; 31807960de64SMao Jinlong }; 31817960de64SMao Jinlong 31827960de64SMao Jinlong port@3 { 31837960de64SMao Jinlong reg = <3>; 31847960de64SMao Jinlong apss_funnel_in3: endpoint { 31857960de64SMao Jinlong remote-endpoint = <&etm3_out>; 31867960de64SMao Jinlong }; 31877960de64SMao Jinlong }; 31887960de64SMao Jinlong 31897960de64SMao Jinlong port@4 { 31907960de64SMao Jinlong reg = <4>; 31917960de64SMao Jinlong apss_funnel_in4: endpoint { 31927960de64SMao Jinlong remote-endpoint = <&etm4_out>; 31937960de64SMao Jinlong }; 31947960de64SMao Jinlong }; 31957960de64SMao Jinlong 31967960de64SMao Jinlong port@5 { 31977960de64SMao Jinlong reg = <5>; 31987960de64SMao Jinlong apss_funnel_in5: endpoint { 31997960de64SMao Jinlong remote-endpoint = <&etm5_out>; 32007960de64SMao Jinlong }; 32017960de64SMao Jinlong }; 32027960de64SMao Jinlong 32037960de64SMao Jinlong port@6 { 32047960de64SMao Jinlong reg = <6>; 32057960de64SMao Jinlong apss_funnel_in6: endpoint { 32067960de64SMao Jinlong remote-endpoint = <&etm6_out>; 32077960de64SMao Jinlong }; 32087960de64SMao Jinlong }; 32097960de64SMao Jinlong 32107960de64SMao Jinlong port@7 { 32117960de64SMao Jinlong reg = <7>; 32127960de64SMao Jinlong apss_funnel_in7: endpoint { 32137960de64SMao Jinlong remote-endpoint = <&etm7_out>; 32147960de64SMao Jinlong }; 32157960de64SMao Jinlong }; 32167960de64SMao Jinlong }; 32177960de64SMao Jinlong }; 32187960de64SMao Jinlong 32197960de64SMao Jinlong funnel@7810000 { 32207960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 32217960de64SMao Jinlong reg = <0 0x07810000 0 0x1000>; 32227960de64SMao Jinlong 32237960de64SMao Jinlong clocks = <&aoss_qmp>; 32247960de64SMao Jinlong clock-names = "apb_pclk"; 32257960de64SMao Jinlong 32267960de64SMao Jinlong out-ports { 32277960de64SMao Jinlong port { 32287960de64SMao Jinlong funnel_apss_merg_out_funnel_in1: endpoint { 32297960de64SMao Jinlong remote-endpoint = <&funnel_in1_in_funnel_apss_merg>; 32307960de64SMao Jinlong }; 32317960de64SMao Jinlong }; 32327960de64SMao Jinlong }; 32337960de64SMao Jinlong 32347960de64SMao Jinlong in-ports { 32357960de64SMao Jinlong #address-cells = <1>; 32367960de64SMao Jinlong #size-cells = <0>; 32377960de64SMao Jinlong 32387960de64SMao Jinlong port@0 { 32397960de64SMao Jinlong reg = <0>; 32407960de64SMao Jinlong funnel_apss_merg_in_funnel_apss: endpoint { 32417960de64SMao Jinlong remote-endpoint = <&funnel_apss_out_funnel_apss_merg>; 32427960de64SMao Jinlong }; 32437960de64SMao Jinlong }; 32447960de64SMao Jinlong }; 32457960de64SMao Jinlong }; 32467960de64SMao Jinlong 324723a89037SBjorn Andersson cdsp: remoteproc@8300000 { 324823a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 324923a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 325023a89037SBjorn Andersson 325123a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 325223a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 325323a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 325423a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 325523a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 325623a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 325723a89037SBjorn Andersson "handover", "stop-ack"; 325823a89037SBjorn Andersson 325923a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 326023a89037SBjorn Andersson clock-names = "xo"; 326123a89037SBjorn Andersson 3262b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_CX>; 326323a89037SBjorn Andersson 326423a89037SBjorn Andersson memory-region = <&cdsp_mem>; 326523a89037SBjorn Andersson 3266b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 3267b74ee2d7SSibi Sankar 326823a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 326923a89037SBjorn Andersson qcom,smem-state-names = "stop"; 327023a89037SBjorn Andersson 327123a89037SBjorn Andersson status = "disabled"; 327223a89037SBjorn Andersson 327323a89037SBjorn Andersson glink-edge { 327423a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 327523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 327623a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 327723a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 327823a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 327923a89037SBjorn Andersson 328025695808SJonathan Marek label = "cdsp"; 328123a89037SBjorn Andersson qcom,remote-pid = <5>; 328225695808SJonathan Marek 328325695808SJonathan Marek fastrpc { 328425695808SJonathan Marek compatible = "qcom,fastrpc"; 328525695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 328625695808SJonathan Marek label = "cdsp"; 32878c8ce95bSJeya R qcom,non-secure-domain; 328825695808SJonathan Marek #address-cells = <1>; 328925695808SJonathan Marek #size-cells = <0>; 329025695808SJonathan Marek 329125695808SJonathan Marek compute-cb@1 { 329225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 329325695808SJonathan Marek reg = <1>; 329425695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 329525695808SJonathan Marek }; 329625695808SJonathan Marek 329725695808SJonathan Marek compute-cb@2 { 329825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 329925695808SJonathan Marek reg = <2>; 330025695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 330125695808SJonathan Marek }; 330225695808SJonathan Marek 330325695808SJonathan Marek compute-cb@3 { 330425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 330525695808SJonathan Marek reg = <3>; 330625695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 330725695808SJonathan Marek }; 330825695808SJonathan Marek 330925695808SJonathan Marek compute-cb@4 { 331025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 331125695808SJonathan Marek reg = <4>; 331225695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 331325695808SJonathan Marek }; 331425695808SJonathan Marek 331525695808SJonathan Marek compute-cb@5 { 331625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 331725695808SJonathan Marek reg = <5>; 331825695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 331925695808SJonathan Marek }; 332025695808SJonathan Marek 332125695808SJonathan Marek compute-cb@6 { 332225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 332325695808SJonathan Marek reg = <6>; 332425695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 332525695808SJonathan Marek }; 332625695808SJonathan Marek 332725695808SJonathan Marek compute-cb@7 { 332825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 332925695808SJonathan Marek reg = <7>; 333025695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 333125695808SJonathan Marek }; 333225695808SJonathan Marek 333325695808SJonathan Marek compute-cb@8 { 333425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 333525695808SJonathan Marek reg = <8>; 333625695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 333725695808SJonathan Marek }; 333825695808SJonathan Marek 333925695808SJonathan Marek /* note: secure cb9 in downstream */ 334025695808SJonathan Marek }; 334123a89037SBjorn Andersson }; 334223a89037SBjorn Andersson }; 334323a89037SBjorn Andersson 334446a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 334546a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 334646a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 334746a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 334846a6f297SJonathan Marek status = "disabled"; 334946a6f297SJonathan Marek #phy-cells = <0>; 335046a6f297SJonathan Marek 335146a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 335246a6f297SJonathan Marek clock-names = "ref"; 335346a6f297SJonathan Marek 335446a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 335546a6f297SJonathan Marek }; 335646a6f297SJonathan Marek 335746a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 335846a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 335946a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 336046a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 336146a6f297SJonathan Marek status = "disabled"; 336246a6f297SJonathan Marek #phy-cells = <0>; 336346a6f297SJonathan Marek 336446a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 336546a6f297SJonathan Marek clock-names = "ref"; 336646a6f297SJonathan Marek 336746a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 336846a6f297SJonathan Marek }; 336946a6f297SJonathan Marek 337046a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 33715aa0d1beSDmitry Baryshkov compatible = "qcom,sm8250-qmp-usb3-dp-phy"; 337246a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 33735aa0d1beSDmitry Baryshkov <0 0x088e8000 0 0x40>, 33745aa0d1beSDmitry Baryshkov <0 0x088ea000 0 0x200>; 337546a6f297SJonathan Marek status = "disabled"; 337646a6f297SJonathan Marek #address-cells = <2>; 337746a6f297SJonathan Marek #size-cells = <2>; 337846a6f297SJonathan Marek ranges; 337946a6f297SJonathan Marek 338046a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 338146a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 338246a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 338346a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 338446a6f297SJonathan Marek 338546a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 338646a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 338746a6f297SJonathan Marek reset-names = "phy", "common"; 338846a6f297SJonathan Marek 33895aa0d1beSDmitry Baryshkov usb_1_ssphy: usb3-phy@88e9200 { 339046a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 339146a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 339246a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 339346a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 339446a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 339546a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 33967178d4ccSJonathan Marek #clock-cells = <0>; 339746a6f297SJonathan Marek #phy-cells = <0>; 339846a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 339946a6f297SJonathan Marek clock-names = "pipe0"; 340046a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 340146a6f297SJonathan Marek }; 34025aa0d1beSDmitry Baryshkov 34035aa0d1beSDmitry Baryshkov dp_phy: dp-phy@88ea200 { 34045aa0d1beSDmitry Baryshkov reg = <0 0x088ea200 0 0x200>, 34055aa0d1beSDmitry Baryshkov <0 0x088ea400 0 0x200>, 3406f8d8840cSJohan Hovold <0 0x088eaa00 0 0x200>, 34075aa0d1beSDmitry Baryshkov <0 0x088ea600 0 0x200>, 3408f8d8840cSJohan Hovold <0 0x088ea800 0 0x200>; 34095aa0d1beSDmitry Baryshkov #phy-cells = <0>; 34105aa0d1beSDmitry Baryshkov #clock-cells = <1>; 34115aa0d1beSDmitry Baryshkov }; 341246a6f297SJonathan Marek }; 341346a6f297SJonathan Marek 341446a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 341546a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 341646a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 341746a6f297SJonathan Marek status = "disabled"; 341846a6f297SJonathan Marek #address-cells = <2>; 341946a6f297SJonathan Marek #size-cells = <2>; 342046a6f297SJonathan Marek ranges; 342146a6f297SJonathan Marek 342246a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 342346a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 342446a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 342546a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 342646a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 342746a6f297SJonathan Marek 342846a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 342946a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 343046a6f297SJonathan Marek reset-names = "phy", "common"; 343146a6f297SJonathan Marek 34321351512fSShawn Guo usb_2_ssphy: phy@88eb200 { 343346a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 343446a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 343546a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 34367178d4ccSJonathan Marek #clock-cells = <0>; 343746a6f297SJonathan Marek #phy-cells = <0>; 343846a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 343946a6f297SJonathan Marek clock-names = "pipe0"; 344046a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 344146a6f297SJonathan Marek }; 344246a6f297SJonathan Marek }; 344346a6f297SJonathan Marek 344496bb736fSBhupesh Sharma sdhc_2: mmc@8804000 { 3445c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 3446c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 3447c4cf0300SManivannan Sadhasivam 3448c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 3449c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 3450c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 3451c4cf0300SManivannan Sadhasivam 3452c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 3453c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 345474097d80SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 3455c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 3456c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 3457c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 3458c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 3459c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 3460c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 3461c4cf0300SManivannan Sadhasivam 3462c4cf0300SManivannan Sadhasivam status = "disabled"; 3463c4cf0300SManivannan Sadhasivam 34640e3e6546SKrzysztof Kozlowski sdhc2_opp_table: opp-table { 3465c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 3466c4cf0300SManivannan Sadhasivam 3467c4cf0300SManivannan Sadhasivam opp-19200000 { 3468c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 3469c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 3470c4cf0300SManivannan Sadhasivam }; 3471c4cf0300SManivannan Sadhasivam 3472c4cf0300SManivannan Sadhasivam opp-50000000 { 3473c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 3474c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 3475c4cf0300SManivannan Sadhasivam }; 3476c4cf0300SManivannan Sadhasivam 3477c4cf0300SManivannan Sadhasivam opp-100000000 { 3478c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 3479c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 3480c4cf0300SManivannan Sadhasivam }; 3481c4cf0300SManivannan Sadhasivam 3482c4cf0300SManivannan Sadhasivam opp-202000000 { 3483c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 3484c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 3485c4cf0300SManivannan Sadhasivam }; 3486c4cf0300SManivannan Sadhasivam }; 3487c4cf0300SManivannan Sadhasivam }; 3488c4cf0300SManivannan Sadhasivam 3489e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 3490e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 3491e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 3492e7e41a20SJonathan Marek #interconnect-cells = <1>; 3493e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3494e7e41a20SJonathan Marek }; 3495e7e41a20SJonathan Marek 3496e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 3497e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 3498e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 3499e7e41a20SJonathan Marek #interconnect-cells = <1>; 3500e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3501e7e41a20SJonathan Marek }; 3502e7e41a20SJonathan Marek 3503e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 3504e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 3505e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 3506e7e41a20SJonathan Marek #interconnect-cells = <1>; 3507e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3508e7e41a20SJonathan Marek }; 3509e7e41a20SJonathan Marek 351046a6f297SJonathan Marek usb_1: usb@a6f8800 { 351146a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 351246a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 351346a6f297SJonathan Marek status = "disabled"; 351446a6f297SJonathan Marek #address-cells = <2>; 351546a6f297SJonathan Marek #size-cells = <2>; 351646a6f297SJonathan Marek ranges; 351746a6f297SJonathan Marek dma-ranges; 351846a6f297SJonathan Marek 351946a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 352046a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 352146a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 352246a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 35238d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 352446a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 35258d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 35268d5fd4e4SKrzysztof Kozlowski "core", 35278d5fd4e4SKrzysztof Kozlowski "iface", 35288d5fd4e4SKrzysztof Kozlowski "sleep", 35298d5fd4e4SKrzysztof Kozlowski "mock_utmi", 35308d5fd4e4SKrzysztof Kozlowski "xo"; 353146a6f297SJonathan Marek 353246a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 353346a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 353446a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 353546a6f297SJonathan Marek 353646a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 35375b7e3499SJohan Hovold <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, 353846a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 35395b7e3499SJohan Hovold <&pdc 14 IRQ_TYPE_EDGE_BOTH>; 35405b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 35415b7e3499SJohan Hovold "ss_phy_irq", 35425b7e3499SJohan Hovold "dm_hs_phy_irq", 35435b7e3499SJohan Hovold "dp_hs_phy_irq"; 354446a6f297SJonathan Marek 354546a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 354646a6f297SJonathan Marek 354746a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 354846a6f297SJonathan Marek 35492aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 355046a6f297SJonathan Marek compatible = "snps,dwc3"; 355146a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 355246a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 355346a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 355446a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 355546a6f297SJonathan Marek snps,dis_enblslpm_quirk; 355646a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 355746a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 355846a6f297SJonathan Marek }; 355946a6f297SJonathan Marek }; 356046a6f297SJonathan Marek 35610085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 35620085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 356342c9b157SManivannan Sadhasivam reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, 356442c9b157SManivannan Sadhasivam <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, 356542c9b157SManivannan Sadhasivam <0 0x09600000 0 0x50000>; 356642c9b157SManivannan Sadhasivam reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 356742c9b157SManivannan Sadhasivam "llcc3_base", "llcc_broadcast_base"; 35680085a33aSManivannan Sadhasivam }; 35690085a33aSManivannan Sadhasivam 357046a6f297SJonathan Marek usb_2: usb@a8f8800 { 357146a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 357246a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 357346a6f297SJonathan Marek status = "disabled"; 357446a6f297SJonathan Marek #address-cells = <2>; 357546a6f297SJonathan Marek #size-cells = <2>; 357646a6f297SJonathan Marek ranges; 357746a6f297SJonathan Marek dma-ranges; 357846a6f297SJonathan Marek 357946a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 358046a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 358146a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 358246a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 35838d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 358446a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 35858d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 35868d5fd4e4SKrzysztof Kozlowski "core", 35878d5fd4e4SKrzysztof Kozlowski "iface", 35888d5fd4e4SKrzysztof Kozlowski "sleep", 35898d5fd4e4SKrzysztof Kozlowski "mock_utmi", 35908d5fd4e4SKrzysztof Kozlowski "xo"; 359146a6f297SJonathan Marek 359246a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 359346a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 359446a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 359546a6f297SJonathan Marek 359646a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 35975b7e3499SJohan Hovold <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, 359846a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 35995b7e3499SJohan Hovold <&pdc 12 IRQ_TYPE_EDGE_BOTH>; 36005b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 36015b7e3499SJohan Hovold "ss_phy_irq", 36025b7e3499SJohan Hovold "dm_hs_phy_irq", 36035b7e3499SJohan Hovold "dp_hs_phy_irq"; 360446a6f297SJonathan Marek 360546a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 360646a6f297SJonathan Marek 360746a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 360846a6f297SJonathan Marek 36092aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 361046a6f297SJonathan Marek compatible = "snps,dwc3"; 361146a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 361246a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 361346a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 361446a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 361546a6f297SJonathan Marek snps,dis_enblslpm_quirk; 361646a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 361746a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 361846a6f297SJonathan Marek }; 361946a6f297SJonathan Marek }; 362046a6f297SJonathan Marek 3621fa245b3fSBryan O'Donoghue venus: video-codec@aa00000 { 3622fa245b3fSBryan O'Donoghue compatible = "qcom,sm8250-venus"; 3623fa245b3fSBryan O'Donoghue reg = <0 0x0aa00000 0 0x100000>; 3624fa245b3fSBryan O'Donoghue interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 3625fa245b3fSBryan O'Donoghue power-domains = <&videocc MVS0C_GDSC>, 3626fa245b3fSBryan O'Donoghue <&videocc MVS0_GDSC>, 3627fa245b3fSBryan O'Donoghue <&rpmhpd SM8250_MX>; 3628fa245b3fSBryan O'Donoghue power-domain-names = "venus", "vcodec0", "mx"; 3629fa245b3fSBryan O'Donoghue operating-points-v2 = <&venus_opp_table>; 3630fa245b3fSBryan O'Donoghue 3631fa245b3fSBryan O'Donoghue clocks = <&gcc GCC_VIDEO_AXI0_CLK>, 3632fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK>, 3633fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0_CLK>; 3634fa245b3fSBryan O'Donoghue clock-names = "iface", "core", "vcodec0_core"; 3635fa245b3fSBryan O'Donoghue 3636fa245b3fSBryan O'Donoghue interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, 3637fa245b3fSBryan O'Donoghue <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>; 3638fa245b3fSBryan O'Donoghue interconnect-names = "cpu-cfg", "video-mem"; 3639fa245b3fSBryan O'Donoghue 3640fa245b3fSBryan O'Donoghue iommus = <&apps_smmu 0x2100 0x0400>; 3641fa245b3fSBryan O'Donoghue memory-region = <&video_mem>; 3642fa245b3fSBryan O'Donoghue 3643fa245b3fSBryan O'Donoghue resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, 3644fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK_ARES>; 3645fa245b3fSBryan O'Donoghue reset-names = "bus", "core"; 3646fa245b3fSBryan O'Donoghue 3647ece28cb5SKonrad Dybcio status = "disabled"; 3648ece28cb5SKonrad Dybcio 3649fa245b3fSBryan O'Donoghue video-decoder { 3650fa245b3fSBryan O'Donoghue compatible = "venus-decoder"; 3651fa245b3fSBryan O'Donoghue }; 3652fa245b3fSBryan O'Donoghue 3653fa245b3fSBryan O'Donoghue video-encoder { 3654fa245b3fSBryan O'Donoghue compatible = "venus-encoder"; 3655fa245b3fSBryan O'Donoghue }; 3656fa245b3fSBryan O'Donoghue 36570e3e6546SKrzysztof Kozlowski venus_opp_table: opp-table { 3658fa245b3fSBryan O'Donoghue compatible = "operating-points-v2"; 3659fa245b3fSBryan O'Donoghue 3660fa245b3fSBryan O'Donoghue opp-720000000 { 3661fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <720000000>; 3662fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 3663fa245b3fSBryan O'Donoghue }; 3664fa245b3fSBryan O'Donoghue 3665fa245b3fSBryan O'Donoghue opp-1014000000 { 3666fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1014000000>; 3667fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs>; 3668fa245b3fSBryan O'Donoghue }; 3669fa245b3fSBryan O'Donoghue 3670fa245b3fSBryan O'Donoghue opp-1098000000 { 3671fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1098000000>; 3672fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs_l1>; 3673fa245b3fSBryan O'Donoghue }; 3674fa245b3fSBryan O'Donoghue 3675fa245b3fSBryan O'Donoghue opp-1332000000 { 3676fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1332000000>; 3677fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_nom>; 3678fa245b3fSBryan O'Donoghue }; 3679fa245b3fSBryan O'Donoghue }; 3680fa245b3fSBryan O'Donoghue }; 3681fa245b3fSBryan O'Donoghue 36825b9ec225Sjonathan@marek.ca videocc: clock-controller@abf0000 { 36835b9ec225Sjonathan@marek.ca compatible = "qcom,sm8250-videocc"; 36845b9ec225Sjonathan@marek.ca reg = <0 0x0abf0000 0 0x10000>; 36855b9ec225Sjonathan@marek.ca clocks = <&gcc GCC_VIDEO_AHB_CLK>, 36865b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK>, 36875b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK_A>; 3688266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 3689266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 36905b9ec225Sjonathan@marek.ca clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; 36915b9ec225Sjonathan@marek.ca #clock-cells = <1>; 36925b9ec225Sjonathan@marek.ca #reset-cells = <1>; 36935b9ec225Sjonathan@marek.ca #power-domain-cells = <1>; 36945b9ec225Sjonathan@marek.ca }; 36955b9ec225Sjonathan@marek.ca 3696e7173009SBryan O'Donoghue cci0: cci@ac4f000 { 3697dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 3698e7173009SBryan O'Donoghue #address-cells = <1>; 3699e7173009SBryan O'Donoghue #size-cells = <0>; 3700e7173009SBryan O'Donoghue 3701e7173009SBryan O'Donoghue reg = <0 0x0ac4f000 0 0x1000>; 3702e7173009SBryan O'Donoghue interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; 3703e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3704e7173009SBryan O'Donoghue 3705e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3706e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3707e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3708e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK>, 3709e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK_SRC>; 3710e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3711e7173009SBryan O'Donoghue "slow_ahb_src", 3712e7173009SBryan O'Donoghue "cpas_ahb", 3713e7173009SBryan O'Donoghue "cci", 3714e7173009SBryan O'Donoghue "cci_src"; 3715e7173009SBryan O'Donoghue 3716e7173009SBryan O'Donoghue pinctrl-0 = <&cci0_default>; 3717e7173009SBryan O'Donoghue pinctrl-1 = <&cci0_sleep>; 3718e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3719e7173009SBryan O'Donoghue 3720e7173009SBryan O'Donoghue status = "disabled"; 3721e7173009SBryan O'Donoghue 3722e7173009SBryan O'Donoghue cci0_i2c0: i2c-bus@0 { 3723e7173009SBryan O'Donoghue reg = <0>; 3724e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3725e7173009SBryan O'Donoghue #address-cells = <1>; 3726e7173009SBryan O'Donoghue #size-cells = <0>; 3727e7173009SBryan O'Donoghue }; 3728e7173009SBryan O'Donoghue 3729e7173009SBryan O'Donoghue cci0_i2c1: i2c-bus@1 { 3730e7173009SBryan O'Donoghue reg = <1>; 3731e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3732e7173009SBryan O'Donoghue #address-cells = <1>; 3733e7173009SBryan O'Donoghue #size-cells = <0>; 3734e7173009SBryan O'Donoghue }; 3735e7173009SBryan O'Donoghue }; 3736e7173009SBryan O'Donoghue 3737e7173009SBryan O'Donoghue cci1: cci@ac50000 { 3738dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 3739e7173009SBryan O'Donoghue #address-cells = <1>; 3740e7173009SBryan O'Donoghue #size-cells = <0>; 3741e7173009SBryan O'Donoghue 3742e7173009SBryan O'Donoghue reg = <0 0x0ac50000 0 0x1000>; 3743e7173009SBryan O'Donoghue interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>; 3744e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3745e7173009SBryan O'Donoghue 3746e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3747e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3748e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3749e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK>, 3750e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK_SRC>; 3751e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3752e7173009SBryan O'Donoghue "slow_ahb_src", 3753e7173009SBryan O'Donoghue "cpas_ahb", 3754e7173009SBryan O'Donoghue "cci", 3755e7173009SBryan O'Donoghue "cci_src"; 3756e7173009SBryan O'Donoghue 3757e7173009SBryan O'Donoghue pinctrl-0 = <&cci1_default>; 3758e7173009SBryan O'Donoghue pinctrl-1 = <&cci1_sleep>; 3759e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3760e7173009SBryan O'Donoghue 3761e7173009SBryan O'Donoghue status = "disabled"; 3762e7173009SBryan O'Donoghue 3763e7173009SBryan O'Donoghue cci1_i2c0: i2c-bus@0 { 3764e7173009SBryan O'Donoghue reg = <0>; 3765e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3766e7173009SBryan O'Donoghue #address-cells = <1>; 3767e7173009SBryan O'Donoghue #size-cells = <0>; 3768e7173009SBryan O'Donoghue }; 3769e7173009SBryan O'Donoghue 3770e7173009SBryan O'Donoghue cci1_i2c1: i2c-bus@1 { 3771e7173009SBryan O'Donoghue reg = <1>; 3772e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3773e7173009SBryan O'Donoghue #address-cells = <1>; 3774e7173009SBryan O'Donoghue #size-cells = <0>; 3775e7173009SBryan O'Donoghue }; 3776e7173009SBryan O'Donoghue }; 3777e7173009SBryan O'Donoghue 377830325603SBryan O'Donoghue camss: camss@ac6a000 { 377930325603SBryan O'Donoghue compatible = "qcom,sm8250-camss"; 378030325603SBryan O'Donoghue status = "disabled"; 378130325603SBryan O'Donoghue 378281f43efcSKonrad Dybcio reg = <0 0x0ac6a000 0 0x2000>, 378381f43efcSKonrad Dybcio <0 0x0ac6c000 0 0x2000>, 378481f43efcSKonrad Dybcio <0 0x0ac6e000 0 0x1000>, 378581f43efcSKonrad Dybcio <0 0x0ac70000 0 0x1000>, 378681f43efcSKonrad Dybcio <0 0x0ac72000 0 0x1000>, 378781f43efcSKonrad Dybcio <0 0x0ac74000 0 0x1000>, 378881f43efcSKonrad Dybcio <0 0x0acb4000 0 0xd000>, 378981f43efcSKonrad Dybcio <0 0x0acc3000 0 0xd000>, 379081f43efcSKonrad Dybcio <0 0x0acd9000 0 0x2200>, 379181f43efcSKonrad Dybcio <0 0x0acdb200 0 0x2200>; 379230325603SBryan O'Donoghue reg-names = "csiphy0", 379330325603SBryan O'Donoghue "csiphy1", 379430325603SBryan O'Donoghue "csiphy2", 379530325603SBryan O'Donoghue "csiphy3", 379630325603SBryan O'Donoghue "csiphy4", 379730325603SBryan O'Donoghue "csiphy5", 379830325603SBryan O'Donoghue "vfe0", 379930325603SBryan O'Donoghue "vfe1", 380030325603SBryan O'Donoghue "vfe_lite0", 380130325603SBryan O'Donoghue "vfe_lite1"; 380230325603SBryan O'Donoghue 380330325603SBryan O'Donoghue interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 380430325603SBryan O'Donoghue <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, 380530325603SBryan O'Donoghue <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, 380630325603SBryan O'Donoghue <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 380730325603SBryan O'Donoghue <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 380830325603SBryan O'Donoghue <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 380930325603SBryan O'Donoghue <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 381030325603SBryan O'Donoghue <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 381130325603SBryan O'Donoghue <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 381230325603SBryan O'Donoghue <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 381330325603SBryan O'Donoghue <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 381430325603SBryan O'Donoghue <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 381530325603SBryan O'Donoghue <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 381630325603SBryan O'Donoghue <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 381730325603SBryan O'Donoghue interrupt-names = "csiphy0", 381830325603SBryan O'Donoghue "csiphy1", 381930325603SBryan O'Donoghue "csiphy2", 382030325603SBryan O'Donoghue "csiphy3", 382130325603SBryan O'Donoghue "csiphy4", 382230325603SBryan O'Donoghue "csiphy5", 382330325603SBryan O'Donoghue "csid0", 382430325603SBryan O'Donoghue "csid1", 382530325603SBryan O'Donoghue "csid2", 382630325603SBryan O'Donoghue "csid3", 382730325603SBryan O'Donoghue "vfe0", 382830325603SBryan O'Donoghue "vfe1", 382930325603SBryan O'Donoghue "vfe_lite0", 383030325603SBryan O'Donoghue "vfe_lite1"; 383130325603SBryan O'Donoghue 383230325603SBryan O'Donoghue power-domains = <&camcc IFE_0_GDSC>, 383330325603SBryan O'Donoghue <&camcc IFE_1_GDSC>, 383430325603SBryan O'Donoghue <&camcc TITAN_TOP_GDSC>; 383530325603SBryan O'Donoghue 383630325603SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 383730325603SBryan O'Donoghue <&gcc GCC_CAMERA_HF_AXI_CLK>, 383830325603SBryan O'Donoghue <&gcc GCC_CAMERA_SF_AXI_CLK>, 383930325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK>, 384030325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, 384130325603SBryan O'Donoghue <&camcc CAM_CC_CORE_AHB_CLK>, 384230325603SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 384330325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY0_CLK>, 384430325603SBryan O'Donoghue <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 384530325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY1_CLK>, 384630325603SBryan O'Donoghue <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 384730325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY2_CLK>, 384830325603SBryan O'Donoghue <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 384930325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY3_CLK>, 385030325603SBryan O'Donoghue <&camcc CAM_CC_CSI3PHYTIMER_CLK>, 385130325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY4_CLK>, 385230325603SBryan O'Donoghue <&camcc CAM_CC_CSI4PHYTIMER_CLK>, 385330325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY5_CLK>, 385430325603SBryan O'Donoghue <&camcc CAM_CC_CSI5PHYTIMER_CLK>, 385530325603SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 385630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AHB_CLK>, 385730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AXI_CLK>, 385830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CLK>, 385930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, 386030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CSID_CLK>, 386130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AREG_CLK>, 386230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AHB_CLK>, 386330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AXI_CLK>, 386430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CLK>, 386530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, 386630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CSID_CLK>, 386730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AREG_CLK>, 386830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AHB_CLK>, 386930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AXI_CLK>, 387030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CLK>, 387130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 387230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CSID_CLK>; 387330325603SBryan O'Donoghue 387430325603SBryan O'Donoghue clock-names = "cam_ahb_clk", 387530325603SBryan O'Donoghue "cam_hf_axi", 387630325603SBryan O'Donoghue "cam_sf_axi", 387730325603SBryan O'Donoghue "camnoc_axi", 387830325603SBryan O'Donoghue "camnoc_axi_src", 387930325603SBryan O'Donoghue "core_ahb", 388030325603SBryan O'Donoghue "cpas_ahb", 388130325603SBryan O'Donoghue "csiphy0", 388230325603SBryan O'Donoghue "csiphy0_timer", 388330325603SBryan O'Donoghue "csiphy1", 388430325603SBryan O'Donoghue "csiphy1_timer", 388530325603SBryan O'Donoghue "csiphy2", 388630325603SBryan O'Donoghue "csiphy2_timer", 388730325603SBryan O'Donoghue "csiphy3", 388830325603SBryan O'Donoghue "csiphy3_timer", 388930325603SBryan O'Donoghue "csiphy4", 389030325603SBryan O'Donoghue "csiphy4_timer", 389130325603SBryan O'Donoghue "csiphy5", 389230325603SBryan O'Donoghue "csiphy5_timer", 389330325603SBryan O'Donoghue "slow_ahb_src", 389430325603SBryan O'Donoghue "vfe0_ahb", 389530325603SBryan O'Donoghue "vfe0_axi", 389630325603SBryan O'Donoghue "vfe0", 389730325603SBryan O'Donoghue "vfe0_cphy_rx", 389830325603SBryan O'Donoghue "vfe0_csid", 389930325603SBryan O'Donoghue "vfe0_areg", 390030325603SBryan O'Donoghue "vfe1_ahb", 390130325603SBryan O'Donoghue "vfe1_axi", 390230325603SBryan O'Donoghue "vfe1", 390330325603SBryan O'Donoghue "vfe1_cphy_rx", 390430325603SBryan O'Donoghue "vfe1_csid", 390530325603SBryan O'Donoghue "vfe1_areg", 390630325603SBryan O'Donoghue "vfe_lite_ahb", 390730325603SBryan O'Donoghue "vfe_lite_axi", 390830325603SBryan O'Donoghue "vfe_lite", 390930325603SBryan O'Donoghue "vfe_lite_cphy_rx", 391030325603SBryan O'Donoghue "vfe_lite_csid"; 391130325603SBryan O'Donoghue 391230325603SBryan O'Donoghue iommus = <&apps_smmu 0x800 0x400>, 391330325603SBryan O'Donoghue <&apps_smmu 0x801 0x400>, 391430325603SBryan O'Donoghue <&apps_smmu 0x840 0x400>, 391530325603SBryan O'Donoghue <&apps_smmu 0x841 0x400>, 391630325603SBryan O'Donoghue <&apps_smmu 0xc00 0x400>, 391730325603SBryan O'Donoghue <&apps_smmu 0xc01 0x400>, 391830325603SBryan O'Donoghue <&apps_smmu 0xc40 0x400>, 391930325603SBryan O'Donoghue <&apps_smmu 0xc41 0x400>; 392030325603SBryan O'Donoghue 392130325603SBryan O'Donoghue interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>, 392230325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>, 392330325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>, 392430325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>; 392530325603SBryan O'Donoghue interconnect-names = "cam_ahb", 392630325603SBryan O'Donoghue "cam_hf_0_mnoc", 392730325603SBryan O'Donoghue "cam_sf_0_mnoc", 392830325603SBryan O'Donoghue "cam_sf_icp_mnoc"; 39293c5aa4c7SBryan O'Donoghue 39303c5aa4c7SBryan O'Donoghue ports { 39313c5aa4c7SBryan O'Donoghue #address-cells = <1>; 39323c5aa4c7SBryan O'Donoghue #size-cells = <0>; 39333c5aa4c7SBryan O'Donoghue 39343c5aa4c7SBryan O'Donoghue port@0 { 39353c5aa4c7SBryan O'Donoghue reg = <0>; 39363c5aa4c7SBryan O'Donoghue }; 39373c5aa4c7SBryan O'Donoghue 39383c5aa4c7SBryan O'Donoghue port@1 { 39393c5aa4c7SBryan O'Donoghue reg = <1>; 39403c5aa4c7SBryan O'Donoghue }; 39413c5aa4c7SBryan O'Donoghue 39423c5aa4c7SBryan O'Donoghue port@2 { 39433c5aa4c7SBryan O'Donoghue reg = <2>; 39443c5aa4c7SBryan O'Donoghue }; 39453c5aa4c7SBryan O'Donoghue 39463c5aa4c7SBryan O'Donoghue port@3 { 39473c5aa4c7SBryan O'Donoghue reg = <3>; 39483c5aa4c7SBryan O'Donoghue }; 39493c5aa4c7SBryan O'Donoghue 39503c5aa4c7SBryan O'Donoghue port@4 { 39513c5aa4c7SBryan O'Donoghue reg = <4>; 39523c5aa4c7SBryan O'Donoghue }; 39533c5aa4c7SBryan O'Donoghue 39543c5aa4c7SBryan O'Donoghue port@5 { 39553c5aa4c7SBryan O'Donoghue reg = <5>; 39563c5aa4c7SBryan O'Donoghue }; 39573c5aa4c7SBryan O'Donoghue }; 395830325603SBryan O'Donoghue }; 395930325603SBryan O'Donoghue 3960ca79a997SBryan O'Donoghue camcc: clock-controller@ad00000 { 3961ca79a997SBryan O'Donoghue compatible = "qcom,sm8250-camcc"; 3962ca79a997SBryan O'Donoghue reg = <0 0x0ad00000 0 0x10000>; 3963ca79a997SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 3964ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 3965ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK_A>, 3966ca79a997SBryan O'Donoghue <&sleep_clk>; 3967ca79a997SBryan O'Donoghue clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 3968ca79a997SBryan O'Donoghue power-domains = <&rpmhpd SM8250_MMCX>; 3969ca79a997SBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 39701b3bfc40SVladimir Zapolskiy status = "disabled"; 3971ca79a997SBryan O'Donoghue #clock-cells = <1>; 3972ca79a997SBryan O'Donoghue #reset-cells = <1>; 3973ca79a997SBryan O'Donoghue #power-domain-cells = <1>; 3974ca79a997SBryan O'Donoghue }; 3975ca79a997SBryan O'Donoghue 3976ecf0f5ffSDmitry Baryshkov mdss: display-subsystem@ae00000 { 3977dc5d9125SJonathan Marek compatible = "qcom,sm8250-mdss"; 39787c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 39797c1dffd4SDmitry Baryshkov reg-names = "mdss"; 39807c1dffd4SDmitry Baryshkov 3981888771a9SJonathan Marek interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, 39827c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; 3983888771a9SJonathan Marek interconnect-names = "mdp0-mem", "mdp1-mem"; 39847c1dffd4SDmitry Baryshkov 39857c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 39867c1dffd4SDmitry Baryshkov 39877c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 3988e091b836SAmit Pundir <&gcc GCC_DISP_HF_AXI_CLK>, 39897c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 39907c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 3991e091b836SAmit Pundir clock-names = "iface", "bus", "nrt_bus", "core"; 39927c1dffd4SDmitry Baryshkov 39937c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 39947c1dffd4SDmitry Baryshkov interrupt-controller; 39957c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 39967c1dffd4SDmitry Baryshkov 39977c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 39987c1dffd4SDmitry Baryshkov 39997c1dffd4SDmitry Baryshkov status = "disabled"; 40007c1dffd4SDmitry Baryshkov 40017c1dffd4SDmitry Baryshkov #address-cells = <2>; 40027c1dffd4SDmitry Baryshkov #size-cells = <2>; 40037c1dffd4SDmitry Baryshkov ranges; 40047c1dffd4SDmitry Baryshkov 4005ce5cf986SDmitry Baryshkov mdss_mdp: display-controller@ae01000 { 4006dc5d9125SJonathan Marek compatible = "qcom,sm8250-dpu"; 40077c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 40087c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 40097c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 40107c1dffd4SDmitry Baryshkov 40117c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 40127c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 40137c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 40147c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 40157c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 40167c1dffd4SDmitry Baryshkov 40176edb3238SVinod Polimera assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 40186edb3238SVinod Polimera assigned-clock-rates = <19200000>; 40197c1dffd4SDmitry Baryshkov 40207c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 40217c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 40227c1dffd4SDmitry Baryshkov 40237c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4024be633329SDmitry Baryshkov interrupts = <0>; 40257c1dffd4SDmitry Baryshkov 40267c1dffd4SDmitry Baryshkov ports { 40277c1dffd4SDmitry Baryshkov #address-cells = <1>; 40287c1dffd4SDmitry Baryshkov #size-cells = <0>; 40297c1dffd4SDmitry Baryshkov 40307c1dffd4SDmitry Baryshkov port@0 { 40317c1dffd4SDmitry Baryshkov reg = <0>; 40327c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 40337c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 40347c1dffd4SDmitry Baryshkov }; 40357c1dffd4SDmitry Baryshkov }; 40367c1dffd4SDmitry Baryshkov 40377c1dffd4SDmitry Baryshkov port@1 { 40387c1dffd4SDmitry Baryshkov reg = <1>; 40397c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 40407c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 40417c1dffd4SDmitry Baryshkov }; 40427c1dffd4SDmitry Baryshkov }; 40437c1dffd4SDmitry Baryshkov }; 40447c1dffd4SDmitry Baryshkov 40450e3e6546SKrzysztof Kozlowski mdp_opp_table: opp-table { 40467c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 40477c1dffd4SDmitry Baryshkov 40487c1dffd4SDmitry Baryshkov opp-200000000 { 40497c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 40507c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 40517c1dffd4SDmitry Baryshkov }; 40527c1dffd4SDmitry Baryshkov 40537c1dffd4SDmitry Baryshkov opp-300000000 { 40547c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 40557c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 40567c1dffd4SDmitry Baryshkov }; 40577c1dffd4SDmitry Baryshkov 40587c1dffd4SDmitry Baryshkov opp-345000000 { 40597c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 40607c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 40617c1dffd4SDmitry Baryshkov }; 40627c1dffd4SDmitry Baryshkov 40637c1dffd4SDmitry Baryshkov opp-460000000 { 40647c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 40657c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 40667c1dffd4SDmitry Baryshkov }; 40677c1dffd4SDmitry Baryshkov }; 40687c1dffd4SDmitry Baryshkov }; 40697c1dffd4SDmitry Baryshkov 40707c1dffd4SDmitry Baryshkov dsi0: dsi@ae94000 { 4071ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4072ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 40737c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 40747c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 40757c1dffd4SDmitry Baryshkov 40767c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4077be633329SDmitry Baryshkov interrupts = <4>; 40787c1dffd4SDmitry Baryshkov 40797c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 40807c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 40817c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 40827c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 40837c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 40847c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 40857c1dffd4SDmitry Baryshkov clock-names = "byte", 40867c1dffd4SDmitry Baryshkov "byte_intf", 40877c1dffd4SDmitry Baryshkov "pixel", 40887c1dffd4SDmitry Baryshkov "core", 40897c1dffd4SDmitry Baryshkov "iface", 40907c1dffd4SDmitry Baryshkov "bus"; 40917c1dffd4SDmitry Baryshkov 409297ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 409397ec669dSDmitry Baryshkov assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; 409497ec669dSDmitry Baryshkov 40957c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 40967c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 40977c1dffd4SDmitry Baryshkov 40987c1dffd4SDmitry Baryshkov phys = <&dsi0_phy>; 40997c1dffd4SDmitry Baryshkov 41007c1dffd4SDmitry Baryshkov status = "disabled"; 41017c1dffd4SDmitry Baryshkov 410240f7d36dSKonrad Dybcio #address-cells = <1>; 410340f7d36dSKonrad Dybcio #size-cells = <0>; 410440f7d36dSKonrad Dybcio 41057c1dffd4SDmitry Baryshkov ports { 41067c1dffd4SDmitry Baryshkov #address-cells = <1>; 41077c1dffd4SDmitry Baryshkov #size-cells = <0>; 41087c1dffd4SDmitry Baryshkov 41097c1dffd4SDmitry Baryshkov port@0 { 41107c1dffd4SDmitry Baryshkov reg = <0>; 41117c1dffd4SDmitry Baryshkov dsi0_in: endpoint { 41127c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 41137c1dffd4SDmitry Baryshkov }; 41147c1dffd4SDmitry Baryshkov }; 41157c1dffd4SDmitry Baryshkov 41167c1dffd4SDmitry Baryshkov port@1 { 41177c1dffd4SDmitry Baryshkov reg = <1>; 41187c1dffd4SDmitry Baryshkov dsi0_out: endpoint { 41197c1dffd4SDmitry Baryshkov }; 41207c1dffd4SDmitry Baryshkov }; 41217c1dffd4SDmitry Baryshkov }; 41229ea5ae62SDmitry Baryshkov 41239ea5ae62SDmitry Baryshkov dsi_opp_table: opp-table { 41249ea5ae62SDmitry Baryshkov compatible = "operating-points-v2"; 41259ea5ae62SDmitry Baryshkov 41269ea5ae62SDmitry Baryshkov opp-187500000 { 41279ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 41289ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 41299ea5ae62SDmitry Baryshkov }; 41309ea5ae62SDmitry Baryshkov 41319ea5ae62SDmitry Baryshkov opp-300000000 { 41329ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 41339ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 41349ea5ae62SDmitry Baryshkov }; 41359ea5ae62SDmitry Baryshkov 41369ea5ae62SDmitry Baryshkov opp-358000000 { 41379ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 41389ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 41399ea5ae62SDmitry Baryshkov }; 41409ea5ae62SDmitry Baryshkov }; 41417c1dffd4SDmitry Baryshkov }; 41427c1dffd4SDmitry Baryshkov 4143d455f204SDmitry Baryshkov dsi0_phy: phy@ae94400 { 41447c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 41457c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 41467c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 41477c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 41487c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 41497c1dffd4SDmitry Baryshkov "dsi_phy_lane", 41507c1dffd4SDmitry Baryshkov "dsi_pll"; 41517c1dffd4SDmitry Baryshkov 41527c1dffd4SDmitry Baryshkov #clock-cells = <1>; 41537c1dffd4SDmitry Baryshkov #phy-cells = <0>; 41547c1dffd4SDmitry Baryshkov 41557c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 41567c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 41577c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 41587c1dffd4SDmitry Baryshkov 41597c1dffd4SDmitry Baryshkov status = "disabled"; 41607c1dffd4SDmitry Baryshkov }; 41617c1dffd4SDmitry Baryshkov 41627c1dffd4SDmitry Baryshkov dsi1: dsi@ae96000 { 4163ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4164ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 41657c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 41667c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 41677c1dffd4SDmitry Baryshkov 41687c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4169be633329SDmitry Baryshkov interrupts = <5>; 41707c1dffd4SDmitry Baryshkov 41717c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 41727c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 41737c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 41747c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 41757c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 41767c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 41777c1dffd4SDmitry Baryshkov clock-names = "byte", 41787c1dffd4SDmitry Baryshkov "byte_intf", 41797c1dffd4SDmitry Baryshkov "pixel", 41807c1dffd4SDmitry Baryshkov "core", 41817c1dffd4SDmitry Baryshkov "iface", 41827c1dffd4SDmitry Baryshkov "bus"; 41837c1dffd4SDmitry Baryshkov 418497ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 418597ec669dSDmitry Baryshkov assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; 418697ec669dSDmitry Baryshkov 41877c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 41887c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 41897c1dffd4SDmitry Baryshkov 41907c1dffd4SDmitry Baryshkov phys = <&dsi1_phy>; 41917c1dffd4SDmitry Baryshkov 41927c1dffd4SDmitry Baryshkov status = "disabled"; 41937c1dffd4SDmitry Baryshkov 419440f7d36dSKonrad Dybcio #address-cells = <1>; 419540f7d36dSKonrad Dybcio #size-cells = <0>; 419640f7d36dSKonrad Dybcio 41977c1dffd4SDmitry Baryshkov ports { 41987c1dffd4SDmitry Baryshkov #address-cells = <1>; 41997c1dffd4SDmitry Baryshkov #size-cells = <0>; 42007c1dffd4SDmitry Baryshkov 42017c1dffd4SDmitry Baryshkov port@0 { 42027c1dffd4SDmitry Baryshkov reg = <0>; 42037c1dffd4SDmitry Baryshkov dsi1_in: endpoint { 42047c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 42057c1dffd4SDmitry Baryshkov }; 42067c1dffd4SDmitry Baryshkov }; 42077c1dffd4SDmitry Baryshkov 42087c1dffd4SDmitry Baryshkov port@1 { 42097c1dffd4SDmitry Baryshkov reg = <1>; 42107c1dffd4SDmitry Baryshkov dsi1_out: endpoint { 42117c1dffd4SDmitry Baryshkov }; 42127c1dffd4SDmitry Baryshkov }; 42137c1dffd4SDmitry Baryshkov }; 42147c1dffd4SDmitry Baryshkov }; 42157c1dffd4SDmitry Baryshkov 4216d455f204SDmitry Baryshkov dsi1_phy: phy@ae96400 { 42177c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 42187c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 42197c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 42207c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 42217c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 42227c1dffd4SDmitry Baryshkov "dsi_phy_lane", 42237c1dffd4SDmitry Baryshkov "dsi_pll"; 42247c1dffd4SDmitry Baryshkov 42257c1dffd4SDmitry Baryshkov #clock-cells = <1>; 42267c1dffd4SDmitry Baryshkov #phy-cells = <0>; 42277c1dffd4SDmitry Baryshkov 42287c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 42297c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 42307c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 42317c1dffd4SDmitry Baryshkov 42327c1dffd4SDmitry Baryshkov status = "disabled"; 42337c1dffd4SDmitry Baryshkov }; 42347c1dffd4SDmitry Baryshkov }; 42357c1dffd4SDmitry Baryshkov 42367c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 42377c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 4238888771a9SJonathan Marek reg = <0 0x0af00000 0 0x10000>; 4239266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 4240266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 42417c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 42427c1dffd4SDmitry Baryshkov <&dsi0_phy 0>, 42437c1dffd4SDmitry Baryshkov <&dsi0_phy 1>, 42447c1dffd4SDmitry Baryshkov <&dsi1_phy 0>, 42457c1dffd4SDmitry Baryshkov <&dsi1_phy 1>, 42469b315324SDmitry Baryshkov <&dp_phy 0>, 42479b315324SDmitry Baryshkov <&dp_phy 1>; 42487c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 42497c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 42507c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 42517c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 42527c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 4253888771a9SJonathan Marek "dp_phy_pll_link_clk", 4254888771a9SJonathan Marek "dp_phy_pll_vco_div_clk"; 42557c1dffd4SDmitry Baryshkov #clock-cells = <1>; 42567c1dffd4SDmitry Baryshkov #reset-cells = <1>; 42577c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 42587c1dffd4SDmitry Baryshkov }; 42597c1dffd4SDmitry Baryshkov 426060378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 426124003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 426224003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 426360378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 426460378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 426560378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 426660378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 426760378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 426860378f1aSVenkata Narendra Kumar Gutta }; 426960378f1aSVenkata Narendra Kumar Gutta 4270bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 4271bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4272bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 4273bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 4274bac12f25SAmit Kucheria #qcom,sensors = <16>; 4275bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 4276bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 4277bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4278bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4279bac12f25SAmit Kucheria }; 4280bac12f25SAmit Kucheria 4281bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 4282bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4283bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 4284bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 4285bac12f25SAmit Kucheria #qcom,sensors = <9>; 4286bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 4287bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 4288bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4289bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4290bac12f25SAmit Kucheria }; 4291bac12f25SAmit Kucheria 4292bb99820dSKrzysztof Kozlowski aoss_qmp: power-management@c300000 { 42936ba93ba9SKrzysztof Kozlowski compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp"; 429447cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 4295087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 4296087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 4297087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 4298087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 4299087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 4300087d537aSBjorn Andersson 4301087d537aSBjorn Andersson #clock-cells = <0>; 4302087d537aSBjorn Andersson }; 4303087d537aSBjorn Andersson 430447cb6a06SMaulik Shah sram@c3f0000 { 430547cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 430647cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 430760378f1aSVenkata Narendra Kumar Gutta }; 430860378f1aSVenkata Narendra Kumar Gutta 430960378f1aSVenkata Narendra Kumar Gutta spmi_bus: spmi@c440000 { 431060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 431160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 431260378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 431316951b49SBjorn Andersson <0x0 0x0e600000 0x0 0x0100000>, 431416951b49SBjorn Andersson <0x0 0x0e700000 0x0 0x00a0000>, 431516951b49SBjorn Andersson <0x0 0x0c40a000 0x0 0x0026000>; 431616951b49SBjorn Andersson reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 431716951b49SBjorn Andersson interrupt-names = "periph_irq"; 431816951b49SBjorn Andersson interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 431916951b49SBjorn Andersson qcom,ee = <0>; 432016951b49SBjorn Andersson qcom,channel = <0>; 432116951b49SBjorn Andersson #address-cells = <2>; 432216951b49SBjorn Andersson #size-cells = <0>; 432316951b49SBjorn Andersson interrupt-controller; 432416951b49SBjorn Andersson #interrupt-cells = <4>; 432516951b49SBjorn Andersson }; 4326e5813b15SDmitry Baryshkov 4327e5813b15SDmitry Baryshkov tlmm: pinctrl@f100000 { 4328e5813b15SDmitry Baryshkov compatible = "qcom,sm8250-pinctrl"; 4329e5813b15SDmitry Baryshkov reg = <0 0x0f100000 0 0x300000>, 4330e5813b15SDmitry Baryshkov <0 0x0f500000 0 0x300000>, 4331e5813b15SDmitry Baryshkov <0 0x0f900000 0 0x300000>; 4332e5813b15SDmitry Baryshkov reg-names = "west", "south", "north"; 4333e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 4334e5813b15SDmitry Baryshkov gpio-controller; 4335e5813b15SDmitry Baryshkov #gpio-cells = <2>; 4336e5813b15SDmitry Baryshkov interrupt-controller; 4337e5813b15SDmitry Baryshkov #interrupt-cells = <2>; 4338e526cb03SShawn Guo gpio-ranges = <&tlmm 0 0 181>; 433916951b49SBjorn Andersson wakeup-parent = <&pdc>; 4340e5813b15SDmitry Baryshkov 434116b24fe5SBryan O'Donoghue cam2_default: cam2-default-state { 434216b24fe5SBryan O'Donoghue rst-pins { 434316b24fe5SBryan O'Donoghue pins = "gpio78"; 434416b24fe5SBryan O'Donoghue function = "gpio"; 434516b24fe5SBryan O'Donoghue drive-strength = <2>; 434616b24fe5SBryan O'Donoghue bias-disable; 434716b24fe5SBryan O'Donoghue }; 434816b24fe5SBryan O'Donoghue 434916b24fe5SBryan O'Donoghue mclk-pins { 435016b24fe5SBryan O'Donoghue pins = "gpio96"; 435116b24fe5SBryan O'Donoghue function = "cam_mclk"; 435216b24fe5SBryan O'Donoghue drive-strength = <16>; 435316b24fe5SBryan O'Donoghue bias-disable; 435416b24fe5SBryan O'Donoghue }; 435516b24fe5SBryan O'Donoghue }; 435616b24fe5SBryan O'Donoghue 435716b24fe5SBryan O'Donoghue cam2_suspend: cam2-suspend-state { 435816b24fe5SBryan O'Donoghue rst-pins { 435916b24fe5SBryan O'Donoghue pins = "gpio78"; 436016b24fe5SBryan O'Donoghue function = "gpio"; 436116b24fe5SBryan O'Donoghue drive-strength = <2>; 436216b24fe5SBryan O'Donoghue bias-pull-down; 436316b24fe5SBryan O'Donoghue output-low; 436416b24fe5SBryan O'Donoghue }; 436516b24fe5SBryan O'Donoghue 436616b24fe5SBryan O'Donoghue mclk-pins { 436716b24fe5SBryan O'Donoghue pins = "gpio96"; 436816b24fe5SBryan O'Donoghue function = "cam_mclk"; 436916b24fe5SBryan O'Donoghue drive-strength = <2>; 437016b24fe5SBryan O'Donoghue bias-disable; 437116b24fe5SBryan O'Donoghue }; 437216b24fe5SBryan O'Donoghue }; 437316b24fe5SBryan O'Donoghue 4374f7636174SKrzysztof Kozlowski cci0_default: cci0-default-state { 4375f7636174SKrzysztof Kozlowski cci0_i2c0_default: cci0-i2c0-default-pins { 4376e7173009SBryan O'Donoghue /* SDA, SCL */ 4377e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4378e7173009SBryan O'Donoghue function = "cci_i2c"; 4379e7173009SBryan O'Donoghue 4380e7173009SBryan O'Donoghue bias-pull-up; 4381e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4382e7173009SBryan O'Donoghue }; 4383e7173009SBryan O'Donoghue 4384f7636174SKrzysztof Kozlowski cci0_i2c1_default: cci0-i2c1-default-pins { 4385e7173009SBryan O'Donoghue /* SDA, SCL */ 4386e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4387e7173009SBryan O'Donoghue function = "cci_i2c"; 4388e7173009SBryan O'Donoghue 4389e7173009SBryan O'Donoghue bias-pull-up; 4390e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4391e7173009SBryan O'Donoghue }; 4392e7173009SBryan O'Donoghue }; 4393e7173009SBryan O'Donoghue 4394f7636174SKrzysztof Kozlowski cci0_sleep: cci0-sleep-state { 4395f7636174SKrzysztof Kozlowski cci0_i2c0_sleep: cci0-i2c0-sleep-pins { 4396e7173009SBryan O'Donoghue /* SDA, SCL */ 4397e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4398e7173009SBryan O'Donoghue function = "cci_i2c"; 4399e7173009SBryan O'Donoghue 4400e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4401e7173009SBryan O'Donoghue bias-pull-down; 4402e7173009SBryan O'Donoghue }; 4403e7173009SBryan O'Donoghue 4404f7636174SKrzysztof Kozlowski cci0_i2c1_sleep: cci0-i2c1-sleep-pins { 4405e7173009SBryan O'Donoghue /* SDA, SCL */ 4406e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4407e7173009SBryan O'Donoghue function = "cci_i2c"; 4408e7173009SBryan O'Donoghue 4409e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4410e7173009SBryan O'Donoghue bias-pull-down; 4411e7173009SBryan O'Donoghue }; 4412e7173009SBryan O'Donoghue }; 4413e7173009SBryan O'Donoghue 4414f7636174SKrzysztof Kozlowski cci1_default: cci1-default-state { 4415f7636174SKrzysztof Kozlowski cci1_i2c0_default: cci1-i2c0-default-pins { 4416e7173009SBryan O'Donoghue /* SDA, SCL */ 4417e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4418e7173009SBryan O'Donoghue function = "cci_i2c"; 4419e7173009SBryan O'Donoghue 4420e7173009SBryan O'Donoghue bias-pull-up; 4421e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4422e7173009SBryan O'Donoghue }; 4423e7173009SBryan O'Donoghue 4424f7636174SKrzysztof Kozlowski cci1_i2c1_default: cci1-i2c1-default-pins { 4425e7173009SBryan O'Donoghue /* SDA, SCL */ 4426e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4427e7173009SBryan O'Donoghue function = "cci_i2c"; 4428e7173009SBryan O'Donoghue 4429e7173009SBryan O'Donoghue bias-pull-up; 4430e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4431e7173009SBryan O'Donoghue }; 4432e7173009SBryan O'Donoghue }; 4433e7173009SBryan O'Donoghue 4434f7636174SKrzysztof Kozlowski cci1_sleep: cci1-sleep-state { 4435f7636174SKrzysztof Kozlowski cci1_i2c0_sleep: cci1-i2c0-sleep-pins { 4436e7173009SBryan O'Donoghue /* SDA, SCL */ 4437e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4438e7173009SBryan O'Donoghue function = "cci_i2c"; 4439e7173009SBryan O'Donoghue 4440e7173009SBryan O'Donoghue bias-pull-down; 4441e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4442e7173009SBryan O'Donoghue }; 4443e7173009SBryan O'Donoghue 4444f7636174SKrzysztof Kozlowski cci1_i2c1_sleep: cci1-i2c1-sleep-pins { 4445e7173009SBryan O'Donoghue /* SDA, SCL */ 4446e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4447e7173009SBryan O'Donoghue function = "cci_i2c"; 4448e7173009SBryan O'Donoghue 4449e7173009SBryan O'Donoghue bias-pull-down; 4450e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4451e7173009SBryan O'Donoghue }; 4452e7173009SBryan O'Donoghue }; 4453e7173009SBryan O'Donoghue 4454f7636174SKrzysztof Kozlowski pri_mi2s_active: pri-mi2s-active-state { 4455f7636174SKrzysztof Kozlowski sclk-pins { 4456b657d372SSrinivas Kandagatla pins = "gpio138"; 4457b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 4458b657d372SSrinivas Kandagatla drive-strength = <8>; 4459b657d372SSrinivas Kandagatla bias-disable; 4460b657d372SSrinivas Kandagatla }; 4461b657d372SSrinivas Kandagatla 4462f7636174SKrzysztof Kozlowski ws-pins { 4463b657d372SSrinivas Kandagatla pins = "gpio141"; 4464b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 4465b657d372SSrinivas Kandagatla drive-strength = <8>; 4466b657d372SSrinivas Kandagatla output-high; 4467b657d372SSrinivas Kandagatla }; 4468b657d372SSrinivas Kandagatla 4469f7636174SKrzysztof Kozlowski data0-pins { 4470b657d372SSrinivas Kandagatla pins = "gpio139"; 4471b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 4472b657d372SSrinivas Kandagatla drive-strength = <8>; 4473b657d372SSrinivas Kandagatla bias-disable; 4474b657d372SSrinivas Kandagatla output-high; 4475b657d372SSrinivas Kandagatla }; 4476b657d372SSrinivas Kandagatla 4477f7636174SKrzysztof Kozlowski data1-pins { 4478b657d372SSrinivas Kandagatla pins = "gpio140"; 4479b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 4480b657d372SSrinivas Kandagatla drive-strength = <8>; 4481b657d372SSrinivas Kandagatla output-high; 4482b657d372SSrinivas Kandagatla }; 4483b657d372SSrinivas Kandagatla }; 4484b657d372SSrinivas Kandagatla 4485f7636174SKrzysztof Kozlowski qup_i2c0_default: qup-i2c0-default-state { 4486e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 4487e5813b15SDmitry Baryshkov function = "qup0"; 4488e5813b15SDmitry Baryshkov drive-strength = <2>; 4489e5813b15SDmitry Baryshkov bias-disable; 4490e5813b15SDmitry Baryshkov }; 4491e5813b15SDmitry Baryshkov 4492f7636174SKrzysztof Kozlowski qup_i2c1_default: qup-i2c1-default-state { 4493e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 4494e5813b15SDmitry Baryshkov function = "qup1"; 4495e5813b15SDmitry Baryshkov drive-strength = <2>; 4496e5813b15SDmitry Baryshkov bias-disable; 4497e5813b15SDmitry Baryshkov }; 4498e5813b15SDmitry Baryshkov 4499f7636174SKrzysztof Kozlowski qup_i2c2_default: qup-i2c2-default-state { 4500e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 4501e5813b15SDmitry Baryshkov function = "qup2"; 4502e5813b15SDmitry Baryshkov drive-strength = <2>; 4503e5813b15SDmitry Baryshkov bias-disable; 4504e5813b15SDmitry Baryshkov }; 4505e5813b15SDmitry Baryshkov 4506f7636174SKrzysztof Kozlowski qup_i2c3_default: qup-i2c3-default-state { 4507e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 4508e5813b15SDmitry Baryshkov function = "qup3"; 4509e5813b15SDmitry Baryshkov drive-strength = <2>; 4510e5813b15SDmitry Baryshkov bias-disable; 4511e5813b15SDmitry Baryshkov }; 4512e5813b15SDmitry Baryshkov 4513f7636174SKrzysztof Kozlowski qup_i2c4_default: qup-i2c4-default-state { 4514e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 4515e5813b15SDmitry Baryshkov function = "qup4"; 4516e5813b15SDmitry Baryshkov drive-strength = <2>; 4517e5813b15SDmitry Baryshkov bias-disable; 4518e5813b15SDmitry Baryshkov }; 4519e5813b15SDmitry Baryshkov 4520f7636174SKrzysztof Kozlowski qup_i2c5_default: qup-i2c5-default-state { 4521e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 4522e5813b15SDmitry Baryshkov function = "qup5"; 4523e5813b15SDmitry Baryshkov drive-strength = <2>; 4524e5813b15SDmitry Baryshkov bias-disable; 4525e5813b15SDmitry Baryshkov }; 4526e5813b15SDmitry Baryshkov 4527f7636174SKrzysztof Kozlowski qup_i2c6_default: qup-i2c6-default-state { 4528e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 4529e5813b15SDmitry Baryshkov function = "qup6"; 4530e5813b15SDmitry Baryshkov drive-strength = <2>; 4531e5813b15SDmitry Baryshkov bias-disable; 4532e5813b15SDmitry Baryshkov }; 4533e5813b15SDmitry Baryshkov 4534f7636174SKrzysztof Kozlowski qup_i2c7_default: qup-i2c7-default-state { 4535e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 4536e5813b15SDmitry Baryshkov function = "qup7"; 4537e5813b15SDmitry Baryshkov drive-strength = <2>; 4538e5813b15SDmitry Baryshkov bias-disable; 4539e5813b15SDmitry Baryshkov }; 4540e5813b15SDmitry Baryshkov 4541f7636174SKrzysztof Kozlowski qup_i2c8_default: qup-i2c8-default-state { 4542e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 4543e5813b15SDmitry Baryshkov function = "qup8"; 4544e5813b15SDmitry Baryshkov drive-strength = <2>; 4545e5813b15SDmitry Baryshkov bias-disable; 4546e5813b15SDmitry Baryshkov }; 4547e5813b15SDmitry Baryshkov 4548f7636174SKrzysztof Kozlowski qup_i2c9_default: qup-i2c9-default-state { 4549e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 4550e5813b15SDmitry Baryshkov function = "qup9"; 4551e5813b15SDmitry Baryshkov drive-strength = <2>; 4552e5813b15SDmitry Baryshkov bias-disable; 4553e5813b15SDmitry Baryshkov }; 4554e5813b15SDmitry Baryshkov 4555f7636174SKrzysztof Kozlowski qup_i2c10_default: qup-i2c10-default-state { 4556e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 4557e5813b15SDmitry Baryshkov function = "qup10"; 4558e5813b15SDmitry Baryshkov drive-strength = <2>; 4559e5813b15SDmitry Baryshkov bias-disable; 4560e5813b15SDmitry Baryshkov }; 4561e5813b15SDmitry Baryshkov 4562f7636174SKrzysztof Kozlowski qup_i2c11_default: qup-i2c11-default-state { 4563e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 4564e5813b15SDmitry Baryshkov function = "qup11"; 4565e5813b15SDmitry Baryshkov drive-strength = <2>; 4566e5813b15SDmitry Baryshkov bias-disable; 4567e5813b15SDmitry Baryshkov }; 4568e5813b15SDmitry Baryshkov 4569f7636174SKrzysztof Kozlowski qup_i2c12_default: qup-i2c12-default-state { 4570e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 4571e5813b15SDmitry Baryshkov function = "qup12"; 4572e5813b15SDmitry Baryshkov drive-strength = <2>; 4573e5813b15SDmitry Baryshkov bias-disable; 4574e5813b15SDmitry Baryshkov }; 4575e5813b15SDmitry Baryshkov 4576f7636174SKrzysztof Kozlowski qup_i2c13_default: qup-i2c13-default-state { 4577e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 4578e5813b15SDmitry Baryshkov function = "qup13"; 4579e5813b15SDmitry Baryshkov drive-strength = <2>; 4580e5813b15SDmitry Baryshkov bias-disable; 4581e5813b15SDmitry Baryshkov }; 4582e5813b15SDmitry Baryshkov 4583f7636174SKrzysztof Kozlowski qup_i2c14_default: qup-i2c14-default-state { 4584e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 4585e5813b15SDmitry Baryshkov function = "qup14"; 4586e5813b15SDmitry Baryshkov drive-strength = <2>; 4587e5813b15SDmitry Baryshkov bias-disable; 4588e5813b15SDmitry Baryshkov }; 4589e5813b15SDmitry Baryshkov 4590f7636174SKrzysztof Kozlowski qup_i2c15_default: qup-i2c15-default-state { 4591e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 4592e5813b15SDmitry Baryshkov function = "qup15"; 4593e5813b15SDmitry Baryshkov drive-strength = <2>; 4594e5813b15SDmitry Baryshkov bias-disable; 4595e5813b15SDmitry Baryshkov }; 4596e5813b15SDmitry Baryshkov 4597f7636174SKrzysztof Kozlowski qup_i2c16_default: qup-i2c16-default-state { 4598e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 4599e5813b15SDmitry Baryshkov function = "qup16"; 4600e5813b15SDmitry Baryshkov drive-strength = <2>; 4601e5813b15SDmitry Baryshkov bias-disable; 4602e5813b15SDmitry Baryshkov }; 4603e5813b15SDmitry Baryshkov 4604f7636174SKrzysztof Kozlowski qup_i2c17_default: qup-i2c17-default-state { 4605e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 4606e5813b15SDmitry Baryshkov function = "qup17"; 4607e5813b15SDmitry Baryshkov drive-strength = <2>; 4608e5813b15SDmitry Baryshkov bias-disable; 4609e5813b15SDmitry Baryshkov }; 4610e5813b15SDmitry Baryshkov 4611f7636174SKrzysztof Kozlowski qup_i2c18_default: qup-i2c18-default-state { 4612e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 4613e5813b15SDmitry Baryshkov function = "qup18"; 4614e5813b15SDmitry Baryshkov drive-strength = <2>; 4615e5813b15SDmitry Baryshkov bias-disable; 4616e5813b15SDmitry Baryshkov }; 4617e5813b15SDmitry Baryshkov 4618f7636174SKrzysztof Kozlowski qup_i2c19_default: qup-i2c19-default-state { 4619e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 4620e5813b15SDmitry Baryshkov function = "qup19"; 4621e5813b15SDmitry Baryshkov drive-strength = <2>; 4622e5813b15SDmitry Baryshkov bias-disable; 4623e5813b15SDmitry Baryshkov }; 4624e5813b15SDmitry Baryshkov 4625f7636174SKrzysztof Kozlowski qup_spi0_cs: qup-spi0-cs-state { 4626c88f9eccSDmitry Baryshkov pins = "gpio31"; 4627e5813b15SDmitry Baryshkov function = "qup0"; 4628e5813b15SDmitry Baryshkov }; 4629e5813b15SDmitry Baryshkov 4630f7636174SKrzysztof Kozlowski qup_spi0_cs_gpio: qup-spi0-cs-gpio-state { 4631eb97ccbbSDmitry Baryshkov pins = "gpio31"; 4632eb97ccbbSDmitry Baryshkov function = "gpio"; 4633eb97ccbbSDmitry Baryshkov }; 4634eb97ccbbSDmitry Baryshkov 4635f7636174SKrzysztof Kozlowski qup_spi0_data_clk: qup-spi0-data-clk-state { 4636c88f9eccSDmitry Baryshkov pins = "gpio28", "gpio29", 4637c88f9eccSDmitry Baryshkov "gpio30"; 4638c88f9eccSDmitry Baryshkov function = "qup0"; 4639c88f9eccSDmitry Baryshkov }; 4640c88f9eccSDmitry Baryshkov 4641f7636174SKrzysztof Kozlowski qup_spi1_cs: qup-spi1-cs-state { 4642c88f9eccSDmitry Baryshkov pins = "gpio7"; 4643e5813b15SDmitry Baryshkov function = "qup1"; 4644e5813b15SDmitry Baryshkov }; 4645e5813b15SDmitry Baryshkov 4646f7636174SKrzysztof Kozlowski qup_spi1_cs_gpio: qup-spi1-cs-gpio-state { 4647eb97ccbbSDmitry Baryshkov pins = "gpio7"; 4648eb97ccbbSDmitry Baryshkov function = "gpio"; 4649eb97ccbbSDmitry Baryshkov }; 4650eb97ccbbSDmitry Baryshkov 4651f7636174SKrzysztof Kozlowski qup_spi1_data_clk: qup-spi1-data-clk-state { 4652c88f9eccSDmitry Baryshkov pins = "gpio4", "gpio5", 4653c88f9eccSDmitry Baryshkov "gpio6"; 4654c88f9eccSDmitry Baryshkov function = "qup1"; 4655c88f9eccSDmitry Baryshkov }; 4656c88f9eccSDmitry Baryshkov 4657f7636174SKrzysztof Kozlowski qup_spi2_cs: qup-spi2-cs-state { 4658c88f9eccSDmitry Baryshkov pins = "gpio118"; 4659e5813b15SDmitry Baryshkov function = "qup2"; 4660e5813b15SDmitry Baryshkov }; 4661e5813b15SDmitry Baryshkov 4662f7636174SKrzysztof Kozlowski qup_spi2_cs_gpio: qup-spi2-cs-gpio-state { 4663eb97ccbbSDmitry Baryshkov pins = "gpio118"; 4664eb97ccbbSDmitry Baryshkov function = "gpio"; 4665eb97ccbbSDmitry Baryshkov }; 4666eb97ccbbSDmitry Baryshkov 4667f7636174SKrzysztof Kozlowski qup_spi2_data_clk: qup-spi2-data-clk-state { 4668c88f9eccSDmitry Baryshkov pins = "gpio115", "gpio116", 4669c88f9eccSDmitry Baryshkov "gpio117"; 4670c88f9eccSDmitry Baryshkov function = "qup2"; 4671c88f9eccSDmitry Baryshkov }; 4672c88f9eccSDmitry Baryshkov 4673f7636174SKrzysztof Kozlowski qup_spi3_cs: qup-spi3-cs-state { 4674c88f9eccSDmitry Baryshkov pins = "gpio122"; 4675e5813b15SDmitry Baryshkov function = "qup3"; 4676e5813b15SDmitry Baryshkov }; 4677e5813b15SDmitry Baryshkov 4678f7636174SKrzysztof Kozlowski qup_spi3_cs_gpio: qup-spi3-cs-gpio-state { 4679eb97ccbbSDmitry Baryshkov pins = "gpio122"; 4680eb97ccbbSDmitry Baryshkov function = "gpio"; 4681eb97ccbbSDmitry Baryshkov }; 4682eb97ccbbSDmitry Baryshkov 4683f7636174SKrzysztof Kozlowski qup_spi3_data_clk: qup-spi3-data-clk-state { 4684c88f9eccSDmitry Baryshkov pins = "gpio119", "gpio120", 4685c88f9eccSDmitry Baryshkov "gpio121"; 4686c88f9eccSDmitry Baryshkov function = "qup3"; 4687c88f9eccSDmitry Baryshkov }; 4688c88f9eccSDmitry Baryshkov 4689f7636174SKrzysztof Kozlowski qup_spi4_cs: qup-spi4-cs-state { 4690c88f9eccSDmitry Baryshkov pins = "gpio11"; 4691e5813b15SDmitry Baryshkov function = "qup4"; 4692e5813b15SDmitry Baryshkov }; 4693e5813b15SDmitry Baryshkov 4694f7636174SKrzysztof Kozlowski qup_spi4_cs_gpio: qup-spi4-cs-gpio-state { 4695eb97ccbbSDmitry Baryshkov pins = "gpio11"; 4696eb97ccbbSDmitry Baryshkov function = "gpio"; 4697eb97ccbbSDmitry Baryshkov }; 4698eb97ccbbSDmitry Baryshkov 4699f7636174SKrzysztof Kozlowski qup_spi4_data_clk: qup-spi4-data-clk-state { 4700c88f9eccSDmitry Baryshkov pins = "gpio8", "gpio9", 4701c88f9eccSDmitry Baryshkov "gpio10"; 4702c88f9eccSDmitry Baryshkov function = "qup4"; 4703c88f9eccSDmitry Baryshkov }; 4704c88f9eccSDmitry Baryshkov 4705f7636174SKrzysztof Kozlowski qup_spi5_cs: qup-spi5-cs-state { 4706c88f9eccSDmitry Baryshkov pins = "gpio15"; 4707e5813b15SDmitry Baryshkov function = "qup5"; 4708e5813b15SDmitry Baryshkov }; 4709e5813b15SDmitry Baryshkov 4710f7636174SKrzysztof Kozlowski qup_spi5_cs_gpio: qup-spi5-cs-gpio-state { 4711eb97ccbbSDmitry Baryshkov pins = "gpio15"; 4712eb97ccbbSDmitry Baryshkov function = "gpio"; 4713eb97ccbbSDmitry Baryshkov }; 4714eb97ccbbSDmitry Baryshkov 4715f7636174SKrzysztof Kozlowski qup_spi5_data_clk: qup-spi5-data-clk-state { 4716c88f9eccSDmitry Baryshkov pins = "gpio12", "gpio13", 4717c88f9eccSDmitry Baryshkov "gpio14"; 4718c88f9eccSDmitry Baryshkov function = "qup5"; 4719c88f9eccSDmitry Baryshkov }; 4720c88f9eccSDmitry Baryshkov 4721f7636174SKrzysztof Kozlowski qup_spi6_cs: qup-spi6-cs-state { 4722c88f9eccSDmitry Baryshkov pins = "gpio19"; 4723e5813b15SDmitry Baryshkov function = "qup6"; 4724e5813b15SDmitry Baryshkov }; 4725e5813b15SDmitry Baryshkov 4726f7636174SKrzysztof Kozlowski qup_spi6_cs_gpio: qup-spi6-cs-gpio-state { 4727eb97ccbbSDmitry Baryshkov pins = "gpio19"; 4728eb97ccbbSDmitry Baryshkov function = "gpio"; 4729eb97ccbbSDmitry Baryshkov }; 4730eb97ccbbSDmitry Baryshkov 4731f7636174SKrzysztof Kozlowski qup_spi6_data_clk: qup-spi6-data-clk-state { 4732c88f9eccSDmitry Baryshkov pins = "gpio16", "gpio17", 4733c88f9eccSDmitry Baryshkov "gpio18"; 4734c88f9eccSDmitry Baryshkov function = "qup6"; 4735c88f9eccSDmitry Baryshkov }; 4736c88f9eccSDmitry Baryshkov 4737f7636174SKrzysztof Kozlowski qup_spi7_cs: qup-spi7-cs-state { 4738c88f9eccSDmitry Baryshkov pins = "gpio23"; 4739e5813b15SDmitry Baryshkov function = "qup7"; 4740e5813b15SDmitry Baryshkov }; 4741e5813b15SDmitry Baryshkov 4742f7636174SKrzysztof Kozlowski qup_spi7_cs_gpio: qup-spi7-cs-gpio-state { 4743eb97ccbbSDmitry Baryshkov pins = "gpio23"; 4744eb97ccbbSDmitry Baryshkov function = "gpio"; 4745eb97ccbbSDmitry Baryshkov }; 4746eb97ccbbSDmitry Baryshkov 4747f7636174SKrzysztof Kozlowski qup_spi7_data_clk: qup-spi7-data-clk-state { 4748c88f9eccSDmitry Baryshkov pins = "gpio20", "gpio21", 4749c88f9eccSDmitry Baryshkov "gpio22"; 4750c88f9eccSDmitry Baryshkov function = "qup7"; 4751c88f9eccSDmitry Baryshkov }; 4752c88f9eccSDmitry Baryshkov 4753f7636174SKrzysztof Kozlowski qup_spi8_cs: qup-spi8-cs-state { 4754c88f9eccSDmitry Baryshkov pins = "gpio27"; 4755e5813b15SDmitry Baryshkov function = "qup8"; 4756e5813b15SDmitry Baryshkov }; 4757e5813b15SDmitry Baryshkov 4758f7636174SKrzysztof Kozlowski qup_spi8_cs_gpio: qup-spi8-cs-gpio-state { 4759eb97ccbbSDmitry Baryshkov pins = "gpio27"; 4760eb97ccbbSDmitry Baryshkov function = "gpio"; 4761eb97ccbbSDmitry Baryshkov }; 4762eb97ccbbSDmitry Baryshkov 4763f7636174SKrzysztof Kozlowski qup_spi8_data_clk: qup-spi8-data-clk-state { 4764c88f9eccSDmitry Baryshkov pins = "gpio24", "gpio25", 4765c88f9eccSDmitry Baryshkov "gpio26"; 4766c88f9eccSDmitry Baryshkov function = "qup8"; 4767c88f9eccSDmitry Baryshkov }; 4768c88f9eccSDmitry Baryshkov 4769f7636174SKrzysztof Kozlowski qup_spi9_cs: qup-spi9-cs-state { 4770c88f9eccSDmitry Baryshkov pins = "gpio128"; 4771e5813b15SDmitry Baryshkov function = "qup9"; 4772e5813b15SDmitry Baryshkov }; 4773e5813b15SDmitry Baryshkov 4774f7636174SKrzysztof Kozlowski qup_spi9_cs_gpio: qup-spi9-cs-gpio-state { 4775eb97ccbbSDmitry Baryshkov pins = "gpio128"; 4776eb97ccbbSDmitry Baryshkov function = "gpio"; 4777eb97ccbbSDmitry Baryshkov }; 4778eb97ccbbSDmitry Baryshkov 4779f7636174SKrzysztof Kozlowski qup_spi9_data_clk: qup-spi9-data-clk-state { 4780c88f9eccSDmitry Baryshkov pins = "gpio125", "gpio126", 4781c88f9eccSDmitry Baryshkov "gpio127"; 4782c88f9eccSDmitry Baryshkov function = "qup9"; 4783c88f9eccSDmitry Baryshkov }; 4784c88f9eccSDmitry Baryshkov 4785f7636174SKrzysztof Kozlowski qup_spi10_cs: qup-spi10-cs-state { 4786c88f9eccSDmitry Baryshkov pins = "gpio132"; 4787e5813b15SDmitry Baryshkov function = "qup10"; 4788e5813b15SDmitry Baryshkov }; 4789e5813b15SDmitry Baryshkov 4790f7636174SKrzysztof Kozlowski qup_spi10_cs_gpio: qup-spi10-cs-gpio-state { 4791eb97ccbbSDmitry Baryshkov pins = "gpio132"; 4792eb97ccbbSDmitry Baryshkov function = "gpio"; 4793eb97ccbbSDmitry Baryshkov }; 4794eb97ccbbSDmitry Baryshkov 4795f7636174SKrzysztof Kozlowski qup_spi10_data_clk: qup-spi10-data-clk-state { 4796c88f9eccSDmitry Baryshkov pins = "gpio129", "gpio130", 4797c88f9eccSDmitry Baryshkov "gpio131"; 4798c88f9eccSDmitry Baryshkov function = "qup10"; 4799c88f9eccSDmitry Baryshkov }; 4800c88f9eccSDmitry Baryshkov 4801f7636174SKrzysztof Kozlowski qup_spi11_cs: qup-spi11-cs-state { 4802c88f9eccSDmitry Baryshkov pins = "gpio63"; 4803e5813b15SDmitry Baryshkov function = "qup11"; 4804e5813b15SDmitry Baryshkov }; 4805e5813b15SDmitry Baryshkov 4806f7636174SKrzysztof Kozlowski qup_spi11_cs_gpio: qup-spi11-cs-gpio-state { 4807eb97ccbbSDmitry Baryshkov pins = "gpio63"; 4808eb97ccbbSDmitry Baryshkov function = "gpio"; 4809eb97ccbbSDmitry Baryshkov }; 4810eb97ccbbSDmitry Baryshkov 4811f7636174SKrzysztof Kozlowski qup_spi11_data_clk: qup-spi11-data-clk-state { 4812c88f9eccSDmitry Baryshkov pins = "gpio60", "gpio61", 4813c88f9eccSDmitry Baryshkov "gpio62"; 4814c88f9eccSDmitry Baryshkov function = "qup11"; 4815c88f9eccSDmitry Baryshkov }; 4816c88f9eccSDmitry Baryshkov 4817f7636174SKrzysztof Kozlowski qup_spi12_cs: qup-spi12-cs-state { 4818c88f9eccSDmitry Baryshkov pins = "gpio35"; 4819e5813b15SDmitry Baryshkov function = "qup12"; 4820e5813b15SDmitry Baryshkov }; 4821e5813b15SDmitry Baryshkov 4822f7636174SKrzysztof Kozlowski qup_spi12_cs_gpio: qup-spi12-cs-gpio-state { 4823eb97ccbbSDmitry Baryshkov pins = "gpio35"; 4824eb97ccbbSDmitry Baryshkov function = "gpio"; 4825eb97ccbbSDmitry Baryshkov }; 4826eb97ccbbSDmitry Baryshkov 4827f7636174SKrzysztof Kozlowski qup_spi12_data_clk: qup-spi12-data-clk-state { 4828c88f9eccSDmitry Baryshkov pins = "gpio32", "gpio33", 4829c88f9eccSDmitry Baryshkov "gpio34"; 4830c88f9eccSDmitry Baryshkov function = "qup12"; 4831c88f9eccSDmitry Baryshkov }; 4832c88f9eccSDmitry Baryshkov 4833f7636174SKrzysztof Kozlowski qup_spi13_cs: qup-spi13-cs-state { 4834c88f9eccSDmitry Baryshkov pins = "gpio39"; 4835e5813b15SDmitry Baryshkov function = "qup13"; 4836e5813b15SDmitry Baryshkov }; 4837e5813b15SDmitry Baryshkov 4838f7636174SKrzysztof Kozlowski qup_spi13_cs_gpio: qup-spi13-cs-gpio-state { 4839eb97ccbbSDmitry Baryshkov pins = "gpio39"; 4840eb97ccbbSDmitry Baryshkov function = "gpio"; 4841eb97ccbbSDmitry Baryshkov }; 4842eb97ccbbSDmitry Baryshkov 4843f7636174SKrzysztof Kozlowski qup_spi13_data_clk: qup-spi13-data-clk-state { 4844c88f9eccSDmitry Baryshkov pins = "gpio36", "gpio37", 4845c88f9eccSDmitry Baryshkov "gpio38"; 4846c88f9eccSDmitry Baryshkov function = "qup13"; 4847c88f9eccSDmitry Baryshkov }; 4848c88f9eccSDmitry Baryshkov 4849f7636174SKrzysztof Kozlowski qup_spi14_cs: qup-spi14-cs-state { 4850c88f9eccSDmitry Baryshkov pins = "gpio43"; 4851e5813b15SDmitry Baryshkov function = "qup14"; 4852e5813b15SDmitry Baryshkov }; 4853e5813b15SDmitry Baryshkov 4854f7636174SKrzysztof Kozlowski qup_spi14_cs_gpio: qup-spi14-cs-gpio-state { 4855eb97ccbbSDmitry Baryshkov pins = "gpio43"; 4856eb97ccbbSDmitry Baryshkov function = "gpio"; 4857eb97ccbbSDmitry Baryshkov }; 4858eb97ccbbSDmitry Baryshkov 4859f7636174SKrzysztof Kozlowski qup_spi14_data_clk: qup-spi14-data-clk-state { 4860c88f9eccSDmitry Baryshkov pins = "gpio40", "gpio41", 4861c88f9eccSDmitry Baryshkov "gpio42"; 4862c88f9eccSDmitry Baryshkov function = "qup14"; 4863c88f9eccSDmitry Baryshkov }; 4864c88f9eccSDmitry Baryshkov 4865f7636174SKrzysztof Kozlowski qup_spi15_cs: qup-spi15-cs-state { 4866c88f9eccSDmitry Baryshkov pins = "gpio47"; 4867e5813b15SDmitry Baryshkov function = "qup15"; 4868e5813b15SDmitry Baryshkov }; 4869e5813b15SDmitry Baryshkov 4870f7636174SKrzysztof Kozlowski qup_spi15_cs_gpio: qup-spi15-cs-gpio-state { 4871eb97ccbbSDmitry Baryshkov pins = "gpio47"; 4872eb97ccbbSDmitry Baryshkov function = "gpio"; 4873eb97ccbbSDmitry Baryshkov }; 4874eb97ccbbSDmitry Baryshkov 4875f7636174SKrzysztof Kozlowski qup_spi15_data_clk: qup-spi15-data-clk-state { 4876c88f9eccSDmitry Baryshkov pins = "gpio44", "gpio45", 4877c88f9eccSDmitry Baryshkov "gpio46"; 4878c88f9eccSDmitry Baryshkov function = "qup15"; 4879c88f9eccSDmitry Baryshkov }; 4880c88f9eccSDmitry Baryshkov 4881f7636174SKrzysztof Kozlowski qup_spi16_cs: qup-spi16-cs-state { 4882c88f9eccSDmitry Baryshkov pins = "gpio51"; 4883e5813b15SDmitry Baryshkov function = "qup16"; 4884e5813b15SDmitry Baryshkov }; 4885e5813b15SDmitry Baryshkov 4886f7636174SKrzysztof Kozlowski qup_spi16_cs_gpio: qup-spi16-cs-gpio-state { 4887eb97ccbbSDmitry Baryshkov pins = "gpio51"; 4888eb97ccbbSDmitry Baryshkov function = "gpio"; 4889eb97ccbbSDmitry Baryshkov }; 4890eb97ccbbSDmitry Baryshkov 4891f7636174SKrzysztof Kozlowski qup_spi16_data_clk: qup-spi16-data-clk-state { 4892c88f9eccSDmitry Baryshkov pins = "gpio48", "gpio49", 4893c88f9eccSDmitry Baryshkov "gpio50"; 4894c88f9eccSDmitry Baryshkov function = "qup16"; 4895c88f9eccSDmitry Baryshkov }; 4896c88f9eccSDmitry Baryshkov 4897f7636174SKrzysztof Kozlowski qup_spi17_cs: qup-spi17-cs-state { 4898c88f9eccSDmitry Baryshkov pins = "gpio55"; 4899e5813b15SDmitry Baryshkov function = "qup17"; 4900e5813b15SDmitry Baryshkov }; 4901e5813b15SDmitry Baryshkov 4902f7636174SKrzysztof Kozlowski qup_spi17_cs_gpio: qup-spi17-cs-gpio-state { 4903eb97ccbbSDmitry Baryshkov pins = "gpio55"; 4904eb97ccbbSDmitry Baryshkov function = "gpio"; 4905eb97ccbbSDmitry Baryshkov }; 4906eb97ccbbSDmitry Baryshkov 4907f7636174SKrzysztof Kozlowski qup_spi17_data_clk: qup-spi17-data-clk-state { 4908c88f9eccSDmitry Baryshkov pins = "gpio52", "gpio53", 4909c88f9eccSDmitry Baryshkov "gpio54"; 4910c88f9eccSDmitry Baryshkov function = "qup17"; 4911c88f9eccSDmitry Baryshkov }; 4912c88f9eccSDmitry Baryshkov 4913f7636174SKrzysztof Kozlowski qup_spi18_cs: qup-spi18-cs-state { 4914c88f9eccSDmitry Baryshkov pins = "gpio59"; 4915e5813b15SDmitry Baryshkov function = "qup18"; 4916e5813b15SDmitry Baryshkov }; 4917e5813b15SDmitry Baryshkov 4918f7636174SKrzysztof Kozlowski qup_spi18_cs_gpio: qup-spi18-cs-gpio-state { 4919eb97ccbbSDmitry Baryshkov pins = "gpio59"; 4920eb97ccbbSDmitry Baryshkov function = "gpio"; 4921eb97ccbbSDmitry Baryshkov }; 4922eb97ccbbSDmitry Baryshkov 4923f7636174SKrzysztof Kozlowski qup_spi18_data_clk: qup-spi18-data-clk-state { 4924c88f9eccSDmitry Baryshkov pins = "gpio56", "gpio57", 4925c88f9eccSDmitry Baryshkov "gpio58"; 4926c88f9eccSDmitry Baryshkov function = "qup18"; 4927c88f9eccSDmitry Baryshkov }; 4928c88f9eccSDmitry Baryshkov 4929f7636174SKrzysztof Kozlowski qup_spi19_cs: qup-spi19-cs-state { 4930c88f9eccSDmitry Baryshkov pins = "gpio3"; 4931c88f9eccSDmitry Baryshkov function = "qup19"; 4932c88f9eccSDmitry Baryshkov }; 4933c88f9eccSDmitry Baryshkov 4934f7636174SKrzysztof Kozlowski qup_spi19_cs_gpio: qup-spi19-cs-gpio-state { 4935eb97ccbbSDmitry Baryshkov pins = "gpio3"; 4936eb97ccbbSDmitry Baryshkov function = "gpio"; 4937eb97ccbbSDmitry Baryshkov }; 4938eb97ccbbSDmitry Baryshkov 4939f7636174SKrzysztof Kozlowski qup_spi19_data_clk: qup-spi19-data-clk-state { 4940e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 4941c88f9eccSDmitry Baryshkov "gpio2"; 4942e5813b15SDmitry Baryshkov function = "qup19"; 4943e5813b15SDmitry Baryshkov }; 4944e5813b15SDmitry Baryshkov 4945f7636174SKrzysztof Kozlowski qup_uart2_default: qup-uart2-default-state { 494608a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 494708a9ae2dSDmitry Baryshkov function = "qup2"; 494808a9ae2dSDmitry Baryshkov }; 494908a9ae2dSDmitry Baryshkov 4950f7636174SKrzysztof Kozlowski qup_uart6_default: qup-uart6-default-state { 4951f7636174SKrzysztof Kozlowski pins = "gpio16", "gpio17", "gpio18", "gpio19"; 495208a9ae2dSDmitry Baryshkov function = "qup6"; 495308a9ae2dSDmitry Baryshkov }; 495408a9ae2dSDmitry Baryshkov 4955f7636174SKrzysztof Kozlowski qup_uart12_default: qup-uart12-default-state { 4956bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 4957bb1dfb4dSManivannan Sadhasivam function = "qup12"; 4958bb1dfb4dSManivannan Sadhasivam }; 495908a9ae2dSDmitry Baryshkov 4960f7636174SKrzysztof Kozlowski qup_uart17_default: qup-uart17-default-state { 4961f7636174SKrzysztof Kozlowski pins = "gpio52", "gpio53", "gpio54", "gpio55"; 496208a9ae2dSDmitry Baryshkov function = "qup17"; 496308a9ae2dSDmitry Baryshkov }; 496408a9ae2dSDmitry Baryshkov 4965f7636174SKrzysztof Kozlowski qup_uart18_default: qup-uart18-default-state { 496608a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 496708a9ae2dSDmitry Baryshkov function = "qup18"; 496808a9ae2dSDmitry Baryshkov }; 4969b657d372SSrinivas Kandagatla 4970f7636174SKrzysztof Kozlowski tert_mi2s_active: tert-mi2s-active-state { 4971f7636174SKrzysztof Kozlowski sck-pins { 4972b657d372SSrinivas Kandagatla pins = "gpio133"; 4973b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 4974b657d372SSrinivas Kandagatla drive-strength = <8>; 4975b657d372SSrinivas Kandagatla bias-disable; 4976b657d372SSrinivas Kandagatla }; 4977b657d372SSrinivas Kandagatla 4978f7636174SKrzysztof Kozlowski data0-pins { 4979b657d372SSrinivas Kandagatla pins = "gpio134"; 4980b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 4981b657d372SSrinivas Kandagatla drive-strength = <8>; 4982b657d372SSrinivas Kandagatla bias-disable; 4983b657d372SSrinivas Kandagatla output-high; 4984b657d372SSrinivas Kandagatla }; 4985b657d372SSrinivas Kandagatla 4986f7636174SKrzysztof Kozlowski ws-pins { 4987b657d372SSrinivas Kandagatla pins = "gpio135"; 4988b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 4989b657d372SSrinivas Kandagatla drive-strength = <8>; 4990b657d372SSrinivas Kandagatla output-high; 4991b657d372SSrinivas Kandagatla }; 4992b657d372SSrinivas Kandagatla }; 49938eaa6501SKonrad Dybcio 4994f7636174SKrzysztof Kozlowski sdc2_sleep_state: sdc2-sleep-state { 4995f7636174SKrzysztof Kozlowski clk-pins { 49968eaa6501SKonrad Dybcio pins = "sdc2_clk"; 49978eaa6501SKonrad Dybcio drive-strength = <2>; 49988eaa6501SKonrad Dybcio bias-disable; 49998eaa6501SKonrad Dybcio }; 50008eaa6501SKonrad Dybcio 5001f7636174SKrzysztof Kozlowski cmd-pins { 50028eaa6501SKonrad Dybcio pins = "sdc2_cmd"; 50038eaa6501SKonrad Dybcio drive-strength = <2>; 50048eaa6501SKonrad Dybcio bias-pull-up; 50058eaa6501SKonrad Dybcio }; 50068eaa6501SKonrad Dybcio 5007f7636174SKrzysztof Kozlowski data-pins { 50088eaa6501SKonrad Dybcio pins = "sdc2_data"; 50098eaa6501SKonrad Dybcio drive-strength = <2>; 50108eaa6501SKonrad Dybcio bias-pull-up; 50118eaa6501SKonrad Dybcio }; 50128eaa6501SKonrad Dybcio }; 501313e948a3SKonrad Dybcio 5014f7636174SKrzysztof Kozlowski pcie0_default_state: pcie0-default-state { 5015f7636174SKrzysztof Kozlowski perst-pins { 501613e948a3SKonrad Dybcio pins = "gpio79"; 501713e948a3SKonrad Dybcio function = "gpio"; 501813e948a3SKonrad Dybcio drive-strength = <2>; 501913e948a3SKonrad Dybcio bias-pull-down; 502013e948a3SKonrad Dybcio }; 502113e948a3SKonrad Dybcio 5022f7636174SKrzysztof Kozlowski clkreq-pins { 502313e948a3SKonrad Dybcio pins = "gpio80"; 502413e948a3SKonrad Dybcio function = "pci_e0"; 502513e948a3SKonrad Dybcio drive-strength = <2>; 502613e948a3SKonrad Dybcio bias-pull-up; 502713e948a3SKonrad Dybcio }; 502813e948a3SKonrad Dybcio 5029f7636174SKrzysztof Kozlowski wake-pins { 503013e948a3SKonrad Dybcio pins = "gpio81"; 503113e948a3SKonrad Dybcio function = "gpio"; 503213e948a3SKonrad Dybcio drive-strength = <2>; 503313e948a3SKonrad Dybcio bias-pull-up; 503413e948a3SKonrad Dybcio }; 503513e948a3SKonrad Dybcio }; 503613e948a3SKonrad Dybcio 5037f7636174SKrzysztof Kozlowski pcie1_default_state: pcie1-default-state { 5038f7636174SKrzysztof Kozlowski perst-pins { 503913e948a3SKonrad Dybcio pins = "gpio82"; 504013e948a3SKonrad Dybcio function = "gpio"; 504113e948a3SKonrad Dybcio drive-strength = <2>; 504213e948a3SKonrad Dybcio bias-pull-down; 504313e948a3SKonrad Dybcio }; 504413e948a3SKonrad Dybcio 5045f7636174SKrzysztof Kozlowski clkreq-pins { 504613e948a3SKonrad Dybcio pins = "gpio83"; 504713e948a3SKonrad Dybcio function = "pci_e1"; 504813e948a3SKonrad Dybcio drive-strength = <2>; 504913e948a3SKonrad Dybcio bias-pull-up; 505013e948a3SKonrad Dybcio }; 505113e948a3SKonrad Dybcio 5052f7636174SKrzysztof Kozlowski wake-pins { 505313e948a3SKonrad Dybcio pins = "gpio84"; 505413e948a3SKonrad Dybcio function = "gpio"; 505513e948a3SKonrad Dybcio drive-strength = <2>; 505613e948a3SKonrad Dybcio bias-pull-up; 505713e948a3SKonrad Dybcio }; 505813e948a3SKonrad Dybcio }; 505913e948a3SKonrad Dybcio 5060f7636174SKrzysztof Kozlowski pcie2_default_state: pcie2-default-state { 5061f7636174SKrzysztof Kozlowski perst-pins { 506213e948a3SKonrad Dybcio pins = "gpio85"; 506313e948a3SKonrad Dybcio function = "gpio"; 506413e948a3SKonrad Dybcio drive-strength = <2>; 506513e948a3SKonrad Dybcio bias-pull-down; 506613e948a3SKonrad Dybcio }; 506713e948a3SKonrad Dybcio 5068f7636174SKrzysztof Kozlowski clkreq-pins { 506913e948a3SKonrad Dybcio pins = "gpio86"; 507013e948a3SKonrad Dybcio function = "pci_e2"; 507113e948a3SKonrad Dybcio drive-strength = <2>; 507213e948a3SKonrad Dybcio bias-pull-up; 507313e948a3SKonrad Dybcio }; 507413e948a3SKonrad Dybcio 5075f7636174SKrzysztof Kozlowski wake-pins { 507613e948a3SKonrad Dybcio pins = "gpio87"; 507713e948a3SKonrad Dybcio function = "gpio"; 507813e948a3SKonrad Dybcio drive-strength = <2>; 507913e948a3SKonrad Dybcio bias-pull-up; 508013e948a3SKonrad Dybcio }; 508113e948a3SKonrad Dybcio }; 508216951b49SBjorn Andersson }; 508316951b49SBjorn Andersson 5084a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 5085a89441fcSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 5086a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 5087a89441fcSJonathan Marek #iommu-cells = <2>; 5088a89441fcSJonathan Marek #global-interrupts = <2>; 5089a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 5090a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 5091a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 5092a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 5093a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 5094a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 5095a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 5096a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 5097a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 5098a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 5099a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 5100a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 5101a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 5102a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 5103a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 5104a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 5105a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 5106a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 5107a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 5108a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 5109a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 5110a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 5111a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 5112a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 5113a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 5114a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 5115a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 5116a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 5117a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 5118a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 5119a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 5120a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 5121a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 5122a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 5123a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 5124a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 5125a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 5126a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 5127a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 5128a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 5129a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 5130a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 5131a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 5132a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 5133a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 5134a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 5135a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 5136a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 5137a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 5138a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 5139a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 5140a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 5141a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 5142a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 5143a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 5144a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 5145a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 5146a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 5147a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 5148a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 5149a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 5150a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 5151a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 5152a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 5153a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 5154a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 5155a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 5156a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 5157a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 5158a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 5159a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 5160a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 5161a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 5162a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 5163a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 5164a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 5165a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 5166a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 5167a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 5168a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 5169a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 5170a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 5171a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 5172a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 5173a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 5174a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 5175a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 5176a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 5177a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 5178a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 5179a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 5180a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 5181a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 5182a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 5183a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 5184a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 5185a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 5186a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 5187a89441fcSJonathan Marek }; 5188a89441fcSJonathan Marek 518923a89037SBjorn Andersson adsp: remoteproc@17300000 { 519023a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 519123a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 519223a89037SBjorn Andersson 519323a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 519423a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 519523a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 519623a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 519723a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 519823a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 519923a89037SBjorn Andersson "handover", "stop-ack"; 520023a89037SBjorn Andersson 520123a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 520223a89037SBjorn Andersson clock-names = "xo"; 520323a89037SBjorn Andersson 5204b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 520523a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 5206b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 520723a89037SBjorn Andersson 520823a89037SBjorn Andersson memory-region = <&adsp_mem>; 520923a89037SBjorn Andersson 5210b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 5211b74ee2d7SSibi Sankar 521223a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 521323a89037SBjorn Andersson qcom,smem-state-names = "stop"; 521423a89037SBjorn Andersson 521523a89037SBjorn Andersson status = "disabled"; 521623a89037SBjorn Andersson 521723a89037SBjorn Andersson glink-edge { 521823a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 521923a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 522023a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 522123a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 522223a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 522323a89037SBjorn Andersson 522423a89037SBjorn Andersson label = "lpass"; 522523a89037SBjorn Andersson qcom,remote-pid = <2>; 522625695808SJonathan Marek 522763e10791SSrinivas Kandagatla apr { 522863e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 522963e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 52302f114511SDavid Heidelberg qcom,domain = <APR_DOMAIN_ADSP>; 523163e10791SSrinivas Kandagatla #address-cells = <1>; 523263e10791SSrinivas Kandagatla #size-cells = <0>; 523363e10791SSrinivas Kandagatla 5234a22609bfSKrzysztof Kozlowski service@3 { 523563e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 523663e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 523763e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 523863e10791SSrinivas Kandagatla }; 523963e10791SSrinivas Kandagatla 5240a22609bfSKrzysztof Kozlowski q6afe: service@4 { 524163e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 524263e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 524363e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 524463e10791SSrinivas Kandagatla q6afedai: dais { 524563e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 524663e10791SSrinivas Kandagatla #address-cells = <1>; 524763e10791SSrinivas Kandagatla #size-cells = <0>; 524863e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 524963e10791SSrinivas Kandagatla }; 525063e10791SSrinivas Kandagatla 5251e0b6c1ffSKrzysztof Kozlowski q6afecc: clock-controller { 525263e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 525363e10791SSrinivas Kandagatla #clock-cells = <2>; 525463e10791SSrinivas Kandagatla }; 525563e10791SSrinivas Kandagatla }; 525663e10791SSrinivas Kandagatla 5257a22609bfSKrzysztof Kozlowski q6asm: service@7 { 525863e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 525963e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 526063e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 526163e10791SSrinivas Kandagatla q6asmdai: dais { 526263e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 526363e10791SSrinivas Kandagatla #address-cells = <1>; 526463e10791SSrinivas Kandagatla #size-cells = <0>; 526563e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 526663e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 526763e10791SSrinivas Kandagatla }; 526863e10791SSrinivas Kandagatla }; 526963e10791SSrinivas Kandagatla 5270a22609bfSKrzysztof Kozlowski q6adm: service@8 { 527163e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 527263e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 527363e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 527463e10791SSrinivas Kandagatla q6routing: routing { 527563e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 527663e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 527763e10791SSrinivas Kandagatla }; 527863e10791SSrinivas Kandagatla }; 527963e10791SSrinivas Kandagatla }; 528063e10791SSrinivas Kandagatla 528125695808SJonathan Marek fastrpc { 528225695808SJonathan Marek compatible = "qcom,fastrpc"; 528325695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 528425695808SJonathan Marek label = "adsp"; 52858c8ce95bSJeya R qcom,non-secure-domain; 528625695808SJonathan Marek #address-cells = <1>; 528725695808SJonathan Marek #size-cells = <0>; 528825695808SJonathan Marek 528925695808SJonathan Marek compute-cb@3 { 529025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 529125695808SJonathan Marek reg = <3>; 529225695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 529325695808SJonathan Marek }; 529425695808SJonathan Marek 529525695808SJonathan Marek compute-cb@4 { 529625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 529725695808SJonathan Marek reg = <4>; 529825695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 529925695808SJonathan Marek }; 530025695808SJonathan Marek 530125695808SJonathan Marek compute-cb@5 { 530225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 530325695808SJonathan Marek reg = <5>; 530425695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 530525695808SJonathan Marek }; 530625695808SJonathan Marek }; 530723a89037SBjorn Andersson }; 530823a89037SBjorn Andersson }; 530923a89037SBjorn Andersson 5310b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 5311b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 5312b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 5313b9ec8cbcSJonathan Marek interrupt-controller; 5314b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 5315b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 5316b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 5317b9ec8cbcSJonathan Marek }; 5318b9ec8cbcSJonathan Marek 5319e0d9acceSDmitry Baryshkov watchdog@17c10000 { 5320e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 5321e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 5322e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 532346a4359fSSai Prakash Ranjan interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 5324e0d9acceSDmitry Baryshkov }; 5325e0d9acceSDmitry Baryshkov 5326b9ec8cbcSJonathan Marek timer@17c20000 { 5327458ebdbbSDavid Heidelberg #address-cells = <1>; 5328458ebdbbSDavid Heidelberg #size-cells = <1>; 5329458ebdbbSDavid Heidelberg ranges = <0 0 0 0x20000000>; 5330b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 5331b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 5332b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 5333b9ec8cbcSJonathan Marek 5334b9ec8cbcSJonathan Marek frame@17c21000 { 5335b9ec8cbcSJonathan Marek frame-number = <0>; 5336b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 5337b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 5338458ebdbbSDavid Heidelberg reg = <0x17c21000 0x1000>, 5339458ebdbbSDavid Heidelberg <0x17c22000 0x1000>; 5340b9ec8cbcSJonathan Marek }; 5341b9ec8cbcSJonathan Marek 5342b9ec8cbcSJonathan Marek frame@17c23000 { 5343b9ec8cbcSJonathan Marek frame-number = <1>; 5344b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 5345458ebdbbSDavid Heidelberg reg = <0x17c23000 0x1000>; 5346b9ec8cbcSJonathan Marek status = "disabled"; 5347b9ec8cbcSJonathan Marek }; 5348b9ec8cbcSJonathan Marek 5349b9ec8cbcSJonathan Marek frame@17c25000 { 5350b9ec8cbcSJonathan Marek frame-number = <2>; 5351b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 5352458ebdbbSDavid Heidelberg reg = <0x17c25000 0x1000>; 5353b9ec8cbcSJonathan Marek status = "disabled"; 5354b9ec8cbcSJonathan Marek }; 5355b9ec8cbcSJonathan Marek 5356b9ec8cbcSJonathan Marek frame@17c27000 { 5357b9ec8cbcSJonathan Marek frame-number = <3>; 5358b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 5359458ebdbbSDavid Heidelberg reg = <0x17c27000 0x1000>; 5360b9ec8cbcSJonathan Marek status = "disabled"; 5361b9ec8cbcSJonathan Marek }; 5362b9ec8cbcSJonathan Marek 5363b9ec8cbcSJonathan Marek frame@17c29000 { 5364b9ec8cbcSJonathan Marek frame-number = <4>; 5365b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 5366458ebdbbSDavid Heidelberg reg = <0x17c29000 0x1000>; 5367b9ec8cbcSJonathan Marek status = "disabled"; 5368b9ec8cbcSJonathan Marek }; 5369b9ec8cbcSJonathan Marek 5370b9ec8cbcSJonathan Marek frame@17c2b000 { 5371b9ec8cbcSJonathan Marek frame-number = <5>; 5372b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 5373458ebdbbSDavid Heidelberg reg = <0x17c2b000 0x1000>; 5374b9ec8cbcSJonathan Marek status = "disabled"; 5375b9ec8cbcSJonathan Marek }; 5376b9ec8cbcSJonathan Marek 5377b9ec8cbcSJonathan Marek frame@17c2d000 { 5378b9ec8cbcSJonathan Marek frame-number = <6>; 5379b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 5380458ebdbbSDavid Heidelberg reg = <0x17c2d000 0x1000>; 5381b9ec8cbcSJonathan Marek status = "disabled"; 5382b9ec8cbcSJonathan Marek }; 5383b9ec8cbcSJonathan Marek }; 5384b9ec8cbcSJonathan Marek 538560378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 538660378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 538760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 538860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 538960378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 539060378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 539160378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 539260378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 539360378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 539460378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 539560378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 539660378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 539760378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 539860378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 53992ffa0ca4SMaulik Shah power-domains = <&CLUSTER_PD>; 540060378f1aSVenkata Narendra Kumar Gutta 540160378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 540260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 540360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 540460378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 540560378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 540660378f1aSVenkata Narendra Kumar Gutta }; 5407b6f78e27SBjorn Andersson 5408b6f78e27SBjorn Andersson rpmhpd: power-controller { 5409b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 5410b6f78e27SBjorn Andersson #power-domain-cells = <1>; 5411b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 5412b6f78e27SBjorn Andersson 5413b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 5414b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 5415b6f78e27SBjorn Andersson 5416b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 5417b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 5418b6f78e27SBjorn Andersson }; 5419b6f78e27SBjorn Andersson 5420b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 5421b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 5422b6f78e27SBjorn Andersson }; 5423b6f78e27SBjorn Andersson 5424b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 5425b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 5426b6f78e27SBjorn Andersson }; 5427b6f78e27SBjorn Andersson 5428b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 5429b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 5430b6f78e27SBjorn Andersson }; 5431b6f78e27SBjorn Andersson 5432b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 5433b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 5434b6f78e27SBjorn Andersson }; 5435b6f78e27SBjorn Andersson 5436b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 5437b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 5438b6f78e27SBjorn Andersson }; 5439b6f78e27SBjorn Andersson 5440b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 5441b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 5442b6f78e27SBjorn Andersson }; 5443b6f78e27SBjorn Andersson 5444b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 5445b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 5446b6f78e27SBjorn Andersson }; 5447b6f78e27SBjorn Andersson 5448b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 5449b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 5450b6f78e27SBjorn Andersson }; 5451b6f78e27SBjorn Andersson 5452b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 5453b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 5454b6f78e27SBjorn Andersson }; 5455b6f78e27SBjorn Andersson }; 5456b6f78e27SBjorn Andersson }; 5457e7e41a20SJonathan Marek 5458fc0e7dd6SKrzysztof Kozlowski apps_bcm_voter: bcm-voter { 5459e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 5460e7e41a20SJonathan Marek }; 546160378f1aSVenkata Narendra Kumar Gutta }; 546279a595bbSSibi Sankar 546377b53d65SGeorgi Djakov epss_l3: interconnect@18590000 { 5464a0289a10SBjorn Andersson compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; 546579a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 546679a595bbSSibi Sankar 546779a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 546879a595bbSSibi Sankar clock-names = "xo", "alternate"; 546979a595bbSSibi Sankar 547079a595bbSSibi Sankar #interconnect-cells = <1>; 547179a595bbSSibi Sankar }; 547202ae4a0eSBjorn Andersson 547302ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 547402ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 547502ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 547602ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 547702ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 547802ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 547902ae4a0eSBjorn Andersson "freq-domain2"; 548002ae4a0eSBjorn Andersson 548102ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 548202ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 5483ffd6cc92SVladimir Zapolskiy interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 5484ffd6cc92SVladimir Zapolskiy <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 5485ffd6cc92SVladimir Zapolskiy <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 5486ffd6cc92SVladimir Zapolskiy interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; 548702ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 5488d78cb07dSManivannan Sadhasivam #clock-cells = <1>; 548902ae4a0eSBjorn Andersson }; 549060378f1aSVenkata Narendra Kumar Gutta }; 549160378f1aSVenkata Narendra Kumar Gutta 5492e5b8c082SKrzysztof Kozlowski sound: sound { 5493e5b8c082SKrzysztof Kozlowski }; 5494e5b8c082SKrzysztof Kozlowski 549560378f1aSVenkata Narendra Kumar Gutta timer { 549660378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 549760378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 549860378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 549960378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 550060378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 550160378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 550260378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 550329a33495SSai Prakash Ranjan <GIC_PPI 10 550460378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 550560378f1aSVenkata Narendra Kumar Gutta }; 5506bac12f25SAmit Kucheria 5507bac12f25SAmit Kucheria thermal-zones { 5508bac12f25SAmit Kucheria cpu0-thermal { 5509bac12f25SAmit Kucheria polling-delay-passive = <250>; 5510bac12f25SAmit Kucheria polling-delay = <1000>; 5511bac12f25SAmit Kucheria 5512bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 5513bac12f25SAmit Kucheria 5514bac12f25SAmit Kucheria trips { 5515bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 5516bac12f25SAmit Kucheria temperature = <90000>; 5517bac12f25SAmit Kucheria hysteresis = <2000>; 5518bac12f25SAmit Kucheria type = "passive"; 5519bac12f25SAmit Kucheria }; 5520bac12f25SAmit Kucheria 5521bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 5522bac12f25SAmit Kucheria temperature = <95000>; 5523bac12f25SAmit Kucheria hysteresis = <2000>; 5524bac12f25SAmit Kucheria type = "passive"; 5525bac12f25SAmit Kucheria }; 5526bac12f25SAmit Kucheria 55271364acc3SKrzysztof Kozlowski cpu0_crit: cpu-crit { 5528bac12f25SAmit Kucheria temperature = <110000>; 5529bac12f25SAmit Kucheria hysteresis = <1000>; 5530bac12f25SAmit Kucheria type = "critical"; 5531bac12f25SAmit Kucheria }; 5532bac12f25SAmit Kucheria }; 5533bac12f25SAmit Kucheria 5534bac12f25SAmit Kucheria cooling-maps { 5535bac12f25SAmit Kucheria map0 { 5536bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 5537bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5538bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5539bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5540bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5541bac12f25SAmit Kucheria }; 5542bac12f25SAmit Kucheria map1 { 5543bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 5544bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5545bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5546bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5547bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5548bac12f25SAmit Kucheria }; 5549bac12f25SAmit Kucheria }; 5550bac12f25SAmit Kucheria }; 5551bac12f25SAmit Kucheria 5552bac12f25SAmit Kucheria cpu1-thermal { 5553bac12f25SAmit Kucheria polling-delay-passive = <250>; 5554bac12f25SAmit Kucheria polling-delay = <1000>; 5555bac12f25SAmit Kucheria 5556bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 5557bac12f25SAmit Kucheria 5558bac12f25SAmit Kucheria trips { 5559bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 5560bac12f25SAmit Kucheria temperature = <90000>; 5561bac12f25SAmit Kucheria hysteresis = <2000>; 5562bac12f25SAmit Kucheria type = "passive"; 5563bac12f25SAmit Kucheria }; 5564bac12f25SAmit Kucheria 5565bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 5566bac12f25SAmit Kucheria temperature = <95000>; 5567bac12f25SAmit Kucheria hysteresis = <2000>; 5568bac12f25SAmit Kucheria type = "passive"; 5569bac12f25SAmit Kucheria }; 5570bac12f25SAmit Kucheria 55711364acc3SKrzysztof Kozlowski cpu1_crit: cpu-crit { 5572bac12f25SAmit Kucheria temperature = <110000>; 5573bac12f25SAmit Kucheria hysteresis = <1000>; 5574bac12f25SAmit Kucheria type = "critical"; 5575bac12f25SAmit Kucheria }; 5576bac12f25SAmit Kucheria }; 5577bac12f25SAmit Kucheria 5578bac12f25SAmit Kucheria cooling-maps { 5579bac12f25SAmit Kucheria map0 { 5580bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 5581bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5582bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5583bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5584bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5585bac12f25SAmit Kucheria }; 5586bac12f25SAmit Kucheria map1 { 5587bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 5588bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5589bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5590bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5591bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5592bac12f25SAmit Kucheria }; 5593bac12f25SAmit Kucheria }; 5594bac12f25SAmit Kucheria }; 5595bac12f25SAmit Kucheria 5596bac12f25SAmit Kucheria cpu2-thermal { 5597bac12f25SAmit Kucheria polling-delay-passive = <250>; 5598bac12f25SAmit Kucheria polling-delay = <1000>; 5599bac12f25SAmit Kucheria 5600bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 5601bac12f25SAmit Kucheria 5602bac12f25SAmit Kucheria trips { 5603bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 5604bac12f25SAmit Kucheria temperature = <90000>; 5605bac12f25SAmit Kucheria hysteresis = <2000>; 5606bac12f25SAmit Kucheria type = "passive"; 5607bac12f25SAmit Kucheria }; 5608bac12f25SAmit Kucheria 5609bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 5610bac12f25SAmit Kucheria temperature = <95000>; 5611bac12f25SAmit Kucheria hysteresis = <2000>; 5612bac12f25SAmit Kucheria type = "passive"; 5613bac12f25SAmit Kucheria }; 5614bac12f25SAmit Kucheria 56151364acc3SKrzysztof Kozlowski cpu2_crit: cpu-crit { 5616bac12f25SAmit Kucheria temperature = <110000>; 5617bac12f25SAmit Kucheria hysteresis = <1000>; 5618bac12f25SAmit Kucheria type = "critical"; 5619bac12f25SAmit Kucheria }; 5620bac12f25SAmit Kucheria }; 5621bac12f25SAmit Kucheria 5622bac12f25SAmit Kucheria cooling-maps { 5623bac12f25SAmit Kucheria map0 { 5624bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 5625bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5626bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5627bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5628bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5629bac12f25SAmit Kucheria }; 5630bac12f25SAmit Kucheria map1 { 5631bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 5632bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5633bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5634bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5635bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5636bac12f25SAmit Kucheria }; 5637bac12f25SAmit Kucheria }; 5638bac12f25SAmit Kucheria }; 5639bac12f25SAmit Kucheria 5640bac12f25SAmit Kucheria cpu3-thermal { 5641bac12f25SAmit Kucheria polling-delay-passive = <250>; 5642bac12f25SAmit Kucheria polling-delay = <1000>; 5643bac12f25SAmit Kucheria 5644bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 5645bac12f25SAmit Kucheria 5646bac12f25SAmit Kucheria trips { 5647bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 5648bac12f25SAmit Kucheria temperature = <90000>; 5649bac12f25SAmit Kucheria hysteresis = <2000>; 5650bac12f25SAmit Kucheria type = "passive"; 5651bac12f25SAmit Kucheria }; 5652bac12f25SAmit Kucheria 5653bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 5654bac12f25SAmit Kucheria temperature = <95000>; 5655bac12f25SAmit Kucheria hysteresis = <2000>; 5656bac12f25SAmit Kucheria type = "passive"; 5657bac12f25SAmit Kucheria }; 5658bac12f25SAmit Kucheria 56591364acc3SKrzysztof Kozlowski cpu3_crit: cpu-crit { 5660bac12f25SAmit Kucheria temperature = <110000>; 5661bac12f25SAmit Kucheria hysteresis = <1000>; 5662bac12f25SAmit Kucheria type = "critical"; 5663bac12f25SAmit Kucheria }; 5664bac12f25SAmit Kucheria }; 5665bac12f25SAmit Kucheria 5666bac12f25SAmit Kucheria cooling-maps { 5667bac12f25SAmit Kucheria map0 { 5668bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 5669bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5670bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5671bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5672bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5673bac12f25SAmit Kucheria }; 5674bac12f25SAmit Kucheria map1 { 5675bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 5676bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5677bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5678bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5679bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5680bac12f25SAmit Kucheria }; 5681bac12f25SAmit Kucheria }; 5682bac12f25SAmit Kucheria }; 5683bac12f25SAmit Kucheria 5684bac12f25SAmit Kucheria cpu4-top-thermal { 5685bac12f25SAmit Kucheria polling-delay-passive = <250>; 5686bac12f25SAmit Kucheria polling-delay = <1000>; 5687bac12f25SAmit Kucheria 5688bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 5689bac12f25SAmit Kucheria 5690bac12f25SAmit Kucheria trips { 5691bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 5692bac12f25SAmit Kucheria temperature = <90000>; 5693bac12f25SAmit Kucheria hysteresis = <2000>; 5694bac12f25SAmit Kucheria type = "passive"; 5695bac12f25SAmit Kucheria }; 5696bac12f25SAmit Kucheria 5697bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 5698bac12f25SAmit Kucheria temperature = <95000>; 5699bac12f25SAmit Kucheria hysteresis = <2000>; 5700bac12f25SAmit Kucheria type = "passive"; 5701bac12f25SAmit Kucheria }; 5702bac12f25SAmit Kucheria 57031364acc3SKrzysztof Kozlowski cpu4_top_crit: cpu-crit { 5704bac12f25SAmit Kucheria temperature = <110000>; 5705bac12f25SAmit Kucheria hysteresis = <1000>; 5706bac12f25SAmit Kucheria type = "critical"; 5707bac12f25SAmit Kucheria }; 5708bac12f25SAmit Kucheria }; 5709bac12f25SAmit Kucheria 5710bac12f25SAmit Kucheria cooling-maps { 5711bac12f25SAmit Kucheria map0 { 5712bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 5713bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5714bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5715bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5716bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5717bac12f25SAmit Kucheria }; 5718bac12f25SAmit Kucheria map1 { 5719bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 5720bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5721bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5722bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5723bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5724bac12f25SAmit Kucheria }; 5725bac12f25SAmit Kucheria }; 5726bac12f25SAmit Kucheria }; 5727bac12f25SAmit Kucheria 5728bac12f25SAmit Kucheria cpu5-top-thermal { 5729bac12f25SAmit Kucheria polling-delay-passive = <250>; 5730bac12f25SAmit Kucheria polling-delay = <1000>; 5731bac12f25SAmit Kucheria 5732bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 5733bac12f25SAmit Kucheria 5734bac12f25SAmit Kucheria trips { 5735bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 5736bac12f25SAmit Kucheria temperature = <90000>; 5737bac12f25SAmit Kucheria hysteresis = <2000>; 5738bac12f25SAmit Kucheria type = "passive"; 5739bac12f25SAmit Kucheria }; 5740bac12f25SAmit Kucheria 5741bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 5742bac12f25SAmit Kucheria temperature = <95000>; 5743bac12f25SAmit Kucheria hysteresis = <2000>; 5744bac12f25SAmit Kucheria type = "passive"; 5745bac12f25SAmit Kucheria }; 5746bac12f25SAmit Kucheria 57471364acc3SKrzysztof Kozlowski cpu5_top_crit: cpu-crit { 5748bac12f25SAmit Kucheria temperature = <110000>; 5749bac12f25SAmit Kucheria hysteresis = <1000>; 5750bac12f25SAmit Kucheria type = "critical"; 5751bac12f25SAmit Kucheria }; 5752bac12f25SAmit Kucheria }; 5753bac12f25SAmit Kucheria 5754bac12f25SAmit Kucheria cooling-maps { 5755bac12f25SAmit Kucheria map0 { 5756bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 5757bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5758bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5759bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5760bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5761bac12f25SAmit Kucheria }; 5762bac12f25SAmit Kucheria map1 { 5763bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 5764bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5765bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5766bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5767bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5768bac12f25SAmit Kucheria }; 5769bac12f25SAmit Kucheria }; 5770bac12f25SAmit Kucheria }; 5771bac12f25SAmit Kucheria 5772bac12f25SAmit Kucheria cpu6-top-thermal { 5773bac12f25SAmit Kucheria polling-delay-passive = <250>; 5774bac12f25SAmit Kucheria polling-delay = <1000>; 5775bac12f25SAmit Kucheria 5776bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 5777bac12f25SAmit Kucheria 5778bac12f25SAmit Kucheria trips { 5779bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 5780bac12f25SAmit Kucheria temperature = <90000>; 5781bac12f25SAmit Kucheria hysteresis = <2000>; 5782bac12f25SAmit Kucheria type = "passive"; 5783bac12f25SAmit Kucheria }; 5784bac12f25SAmit Kucheria 5785bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 5786bac12f25SAmit Kucheria temperature = <95000>; 5787bac12f25SAmit Kucheria hysteresis = <2000>; 5788bac12f25SAmit Kucheria type = "passive"; 5789bac12f25SAmit Kucheria }; 5790bac12f25SAmit Kucheria 57911364acc3SKrzysztof Kozlowski cpu6_top_crit: cpu-crit { 5792bac12f25SAmit Kucheria temperature = <110000>; 5793bac12f25SAmit Kucheria hysteresis = <1000>; 5794bac12f25SAmit Kucheria type = "critical"; 5795bac12f25SAmit Kucheria }; 5796bac12f25SAmit Kucheria }; 5797bac12f25SAmit Kucheria 5798bac12f25SAmit Kucheria cooling-maps { 5799bac12f25SAmit Kucheria map0 { 5800bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 5801bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5802bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5803bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5804bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5805bac12f25SAmit Kucheria }; 5806bac12f25SAmit Kucheria map1 { 5807bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 5808bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5809bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5810bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5811bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5812bac12f25SAmit Kucheria }; 5813bac12f25SAmit Kucheria }; 5814bac12f25SAmit Kucheria }; 5815bac12f25SAmit Kucheria 5816bac12f25SAmit Kucheria cpu7-top-thermal { 5817bac12f25SAmit Kucheria polling-delay-passive = <250>; 5818bac12f25SAmit Kucheria polling-delay = <1000>; 5819bac12f25SAmit Kucheria 5820bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 5821bac12f25SAmit Kucheria 5822bac12f25SAmit Kucheria trips { 5823bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 5824bac12f25SAmit Kucheria temperature = <90000>; 5825bac12f25SAmit Kucheria hysteresis = <2000>; 5826bac12f25SAmit Kucheria type = "passive"; 5827bac12f25SAmit Kucheria }; 5828bac12f25SAmit Kucheria 5829bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 5830bac12f25SAmit Kucheria temperature = <95000>; 5831bac12f25SAmit Kucheria hysteresis = <2000>; 5832bac12f25SAmit Kucheria type = "passive"; 5833bac12f25SAmit Kucheria }; 5834bac12f25SAmit Kucheria 58351364acc3SKrzysztof Kozlowski cpu7_top_crit: cpu-crit { 5836bac12f25SAmit Kucheria temperature = <110000>; 5837bac12f25SAmit Kucheria hysteresis = <1000>; 5838bac12f25SAmit Kucheria type = "critical"; 5839bac12f25SAmit Kucheria }; 5840bac12f25SAmit Kucheria }; 5841bac12f25SAmit Kucheria 5842bac12f25SAmit Kucheria cooling-maps { 5843bac12f25SAmit Kucheria map0 { 5844bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 5845bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5846bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5847bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5848bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5849bac12f25SAmit Kucheria }; 5850bac12f25SAmit Kucheria map1 { 5851bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 5852bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5853bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5854bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5855bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5856bac12f25SAmit Kucheria }; 5857bac12f25SAmit Kucheria }; 5858bac12f25SAmit Kucheria }; 5859bac12f25SAmit Kucheria 5860bac12f25SAmit Kucheria cpu4-bottom-thermal { 5861bac12f25SAmit Kucheria polling-delay-passive = <250>; 5862bac12f25SAmit Kucheria polling-delay = <1000>; 5863bac12f25SAmit Kucheria 5864bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 5865bac12f25SAmit Kucheria 5866bac12f25SAmit Kucheria trips { 5867bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 5868bac12f25SAmit Kucheria temperature = <90000>; 5869bac12f25SAmit Kucheria hysteresis = <2000>; 5870bac12f25SAmit Kucheria type = "passive"; 5871bac12f25SAmit Kucheria }; 5872bac12f25SAmit Kucheria 5873bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 5874bac12f25SAmit Kucheria temperature = <95000>; 5875bac12f25SAmit Kucheria hysteresis = <2000>; 5876bac12f25SAmit Kucheria type = "passive"; 5877bac12f25SAmit Kucheria }; 5878bac12f25SAmit Kucheria 58791364acc3SKrzysztof Kozlowski cpu4_bottom_crit: cpu-crit { 5880bac12f25SAmit Kucheria temperature = <110000>; 5881bac12f25SAmit Kucheria hysteresis = <1000>; 5882bac12f25SAmit Kucheria type = "critical"; 5883bac12f25SAmit Kucheria }; 5884bac12f25SAmit Kucheria }; 5885bac12f25SAmit Kucheria 5886bac12f25SAmit Kucheria cooling-maps { 5887bac12f25SAmit Kucheria map0 { 5888bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 5889bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5890bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5891bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5892bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5893bac12f25SAmit Kucheria }; 5894bac12f25SAmit Kucheria map1 { 5895bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 5896bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5897bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5898bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5899bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5900bac12f25SAmit Kucheria }; 5901bac12f25SAmit Kucheria }; 5902bac12f25SAmit Kucheria }; 5903bac12f25SAmit Kucheria 5904bac12f25SAmit Kucheria cpu5-bottom-thermal { 5905bac12f25SAmit Kucheria polling-delay-passive = <250>; 5906bac12f25SAmit Kucheria polling-delay = <1000>; 5907bac12f25SAmit Kucheria 5908bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 5909bac12f25SAmit Kucheria 5910bac12f25SAmit Kucheria trips { 5911bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 5912bac12f25SAmit Kucheria temperature = <90000>; 5913bac12f25SAmit Kucheria hysteresis = <2000>; 5914bac12f25SAmit Kucheria type = "passive"; 5915bac12f25SAmit Kucheria }; 5916bac12f25SAmit Kucheria 5917bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 5918bac12f25SAmit Kucheria temperature = <95000>; 5919bac12f25SAmit Kucheria hysteresis = <2000>; 5920bac12f25SAmit Kucheria type = "passive"; 5921bac12f25SAmit Kucheria }; 5922bac12f25SAmit Kucheria 59231364acc3SKrzysztof Kozlowski cpu5_bottom_crit: cpu-crit { 5924bac12f25SAmit Kucheria temperature = <110000>; 5925bac12f25SAmit Kucheria hysteresis = <1000>; 5926bac12f25SAmit Kucheria type = "critical"; 5927bac12f25SAmit Kucheria }; 5928bac12f25SAmit Kucheria }; 5929bac12f25SAmit Kucheria 5930bac12f25SAmit Kucheria cooling-maps { 5931bac12f25SAmit Kucheria map0 { 5932bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 5933bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5934bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5935bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5936bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5937bac12f25SAmit Kucheria }; 5938bac12f25SAmit Kucheria map1 { 5939bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 5940bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5941bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5942bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5943bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5944bac12f25SAmit Kucheria }; 5945bac12f25SAmit Kucheria }; 5946bac12f25SAmit Kucheria }; 5947bac12f25SAmit Kucheria 5948bac12f25SAmit Kucheria cpu6-bottom-thermal { 5949bac12f25SAmit Kucheria polling-delay-passive = <250>; 5950bac12f25SAmit Kucheria polling-delay = <1000>; 5951bac12f25SAmit Kucheria 5952bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 5953bac12f25SAmit Kucheria 5954bac12f25SAmit Kucheria trips { 5955bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 5956bac12f25SAmit Kucheria temperature = <90000>; 5957bac12f25SAmit Kucheria hysteresis = <2000>; 5958bac12f25SAmit Kucheria type = "passive"; 5959bac12f25SAmit Kucheria }; 5960bac12f25SAmit Kucheria 5961bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 5962bac12f25SAmit Kucheria temperature = <95000>; 5963bac12f25SAmit Kucheria hysteresis = <2000>; 5964bac12f25SAmit Kucheria type = "passive"; 5965bac12f25SAmit Kucheria }; 5966bac12f25SAmit Kucheria 59671364acc3SKrzysztof Kozlowski cpu6_bottom_crit: cpu-crit { 5968bac12f25SAmit Kucheria temperature = <110000>; 5969bac12f25SAmit Kucheria hysteresis = <1000>; 5970bac12f25SAmit Kucheria type = "critical"; 5971bac12f25SAmit Kucheria }; 5972bac12f25SAmit Kucheria }; 5973bac12f25SAmit Kucheria 5974bac12f25SAmit Kucheria cooling-maps { 5975bac12f25SAmit Kucheria map0 { 5976bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 5977bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5978bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5979bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5980bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5981bac12f25SAmit Kucheria }; 5982bac12f25SAmit Kucheria map1 { 5983bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 5984bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5985bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5986bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5987bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5988bac12f25SAmit Kucheria }; 5989bac12f25SAmit Kucheria }; 5990bac12f25SAmit Kucheria }; 5991bac12f25SAmit Kucheria 5992bac12f25SAmit Kucheria cpu7-bottom-thermal { 5993bac12f25SAmit Kucheria polling-delay-passive = <250>; 5994bac12f25SAmit Kucheria polling-delay = <1000>; 5995bac12f25SAmit Kucheria 5996bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 5997bac12f25SAmit Kucheria 5998bac12f25SAmit Kucheria trips { 5999bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 6000bac12f25SAmit Kucheria temperature = <90000>; 6001bac12f25SAmit Kucheria hysteresis = <2000>; 6002bac12f25SAmit Kucheria type = "passive"; 6003bac12f25SAmit Kucheria }; 6004bac12f25SAmit Kucheria 6005bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 6006bac12f25SAmit Kucheria temperature = <95000>; 6007bac12f25SAmit Kucheria hysteresis = <2000>; 6008bac12f25SAmit Kucheria type = "passive"; 6009bac12f25SAmit Kucheria }; 6010bac12f25SAmit Kucheria 60111364acc3SKrzysztof Kozlowski cpu7_bottom_crit: cpu-crit { 6012bac12f25SAmit Kucheria temperature = <110000>; 6013bac12f25SAmit Kucheria hysteresis = <1000>; 6014bac12f25SAmit Kucheria type = "critical"; 6015bac12f25SAmit Kucheria }; 6016bac12f25SAmit Kucheria }; 6017bac12f25SAmit Kucheria 6018bac12f25SAmit Kucheria cooling-maps { 6019bac12f25SAmit Kucheria map0 { 6020bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 6021bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6022bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6023bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6024bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6025bac12f25SAmit Kucheria }; 6026bac12f25SAmit Kucheria map1 { 6027bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 6028bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6029bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6030bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6031bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6032bac12f25SAmit Kucheria }; 6033bac12f25SAmit Kucheria }; 6034bac12f25SAmit Kucheria }; 6035bac12f25SAmit Kucheria 6036bac12f25SAmit Kucheria aoss0-thermal { 6037bac12f25SAmit Kucheria polling-delay-passive = <250>; 6038bac12f25SAmit Kucheria polling-delay = <1000>; 6039bac12f25SAmit Kucheria 6040bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 6041bac12f25SAmit Kucheria 6042bac12f25SAmit Kucheria trips { 6043bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 6044bac12f25SAmit Kucheria temperature = <90000>; 6045bac12f25SAmit Kucheria hysteresis = <2000>; 6046bac12f25SAmit Kucheria type = "hot"; 6047bac12f25SAmit Kucheria }; 6048bac12f25SAmit Kucheria }; 6049bac12f25SAmit Kucheria }; 6050bac12f25SAmit Kucheria 6051bac12f25SAmit Kucheria cluster0-thermal { 6052bac12f25SAmit Kucheria polling-delay-passive = <250>; 6053bac12f25SAmit Kucheria polling-delay = <1000>; 6054bac12f25SAmit Kucheria 6055bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 6056bac12f25SAmit Kucheria 6057bac12f25SAmit Kucheria trips { 6058bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 6059bac12f25SAmit Kucheria temperature = <90000>; 6060bac12f25SAmit Kucheria hysteresis = <2000>; 6061bac12f25SAmit Kucheria type = "hot"; 6062bac12f25SAmit Kucheria }; 6063bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 6064bac12f25SAmit Kucheria temperature = <110000>; 6065bac12f25SAmit Kucheria hysteresis = <2000>; 6066bac12f25SAmit Kucheria type = "critical"; 6067bac12f25SAmit Kucheria }; 6068bac12f25SAmit Kucheria }; 6069bac12f25SAmit Kucheria }; 6070bac12f25SAmit Kucheria 6071bac12f25SAmit Kucheria cluster1-thermal { 6072bac12f25SAmit Kucheria polling-delay-passive = <250>; 6073bac12f25SAmit Kucheria polling-delay = <1000>; 6074bac12f25SAmit Kucheria 6075bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 6076bac12f25SAmit Kucheria 6077bac12f25SAmit Kucheria trips { 6078bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 6079bac12f25SAmit Kucheria temperature = <90000>; 6080bac12f25SAmit Kucheria hysteresis = <2000>; 6081bac12f25SAmit Kucheria type = "hot"; 6082bac12f25SAmit Kucheria }; 6083bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 6084bac12f25SAmit Kucheria temperature = <110000>; 6085bac12f25SAmit Kucheria hysteresis = <2000>; 6086bac12f25SAmit Kucheria type = "critical"; 6087bac12f25SAmit Kucheria }; 6088bac12f25SAmit Kucheria }; 6089bac12f25SAmit Kucheria }; 6090bac12f25SAmit Kucheria 60917be1c395SDavid Heidelberg gpu-top-thermal { 6092bac12f25SAmit Kucheria polling-delay-passive = <250>; 6093bac12f25SAmit Kucheria polling-delay = <1000>; 6094bac12f25SAmit Kucheria 6095bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 6096bac12f25SAmit Kucheria 6097bac12f25SAmit Kucheria trips { 6098bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 6099bac12f25SAmit Kucheria temperature = <90000>; 6100bac12f25SAmit Kucheria hysteresis = <2000>; 6101bac12f25SAmit Kucheria type = "hot"; 6102bac12f25SAmit Kucheria }; 6103bac12f25SAmit Kucheria }; 6104bac12f25SAmit Kucheria }; 6105bac12f25SAmit Kucheria 6106bac12f25SAmit Kucheria aoss1-thermal { 6107bac12f25SAmit Kucheria polling-delay-passive = <250>; 6108bac12f25SAmit Kucheria polling-delay = <1000>; 6109bac12f25SAmit Kucheria 6110bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 6111bac12f25SAmit Kucheria 6112bac12f25SAmit Kucheria trips { 6113bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 6114bac12f25SAmit Kucheria temperature = <90000>; 6115bac12f25SAmit Kucheria hysteresis = <2000>; 6116bac12f25SAmit Kucheria type = "hot"; 6117bac12f25SAmit Kucheria }; 6118bac12f25SAmit Kucheria }; 6119bac12f25SAmit Kucheria }; 6120bac12f25SAmit Kucheria 6121bac12f25SAmit Kucheria wlan-thermal { 6122bac12f25SAmit Kucheria polling-delay-passive = <250>; 6123bac12f25SAmit Kucheria polling-delay = <1000>; 6124bac12f25SAmit Kucheria 6125bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 6126bac12f25SAmit Kucheria 6127bac12f25SAmit Kucheria trips { 6128bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 6129bac12f25SAmit Kucheria temperature = <90000>; 6130bac12f25SAmit Kucheria hysteresis = <2000>; 6131bac12f25SAmit Kucheria type = "hot"; 6132bac12f25SAmit Kucheria }; 6133bac12f25SAmit Kucheria }; 6134bac12f25SAmit Kucheria }; 6135bac12f25SAmit Kucheria 6136bac12f25SAmit Kucheria video-thermal { 6137bac12f25SAmit Kucheria polling-delay-passive = <250>; 6138bac12f25SAmit Kucheria polling-delay = <1000>; 6139bac12f25SAmit Kucheria 6140bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 6141bac12f25SAmit Kucheria 6142bac12f25SAmit Kucheria trips { 6143bac12f25SAmit Kucheria video_alert0: trip-point0 { 6144bac12f25SAmit Kucheria temperature = <90000>; 6145bac12f25SAmit Kucheria hysteresis = <2000>; 6146bac12f25SAmit Kucheria type = "hot"; 6147bac12f25SAmit Kucheria }; 6148bac12f25SAmit Kucheria }; 6149bac12f25SAmit Kucheria }; 6150bac12f25SAmit Kucheria 6151bac12f25SAmit Kucheria mem-thermal { 6152bac12f25SAmit Kucheria polling-delay-passive = <250>; 6153bac12f25SAmit Kucheria polling-delay = <1000>; 6154bac12f25SAmit Kucheria 6155bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 6156bac12f25SAmit Kucheria 6157bac12f25SAmit Kucheria trips { 6158bac12f25SAmit Kucheria mem_alert0: trip-point0 { 6159bac12f25SAmit Kucheria temperature = <90000>; 6160bac12f25SAmit Kucheria hysteresis = <2000>; 6161bac12f25SAmit Kucheria type = "hot"; 6162bac12f25SAmit Kucheria }; 6163bac12f25SAmit Kucheria }; 6164bac12f25SAmit Kucheria }; 6165bac12f25SAmit Kucheria 6166bac12f25SAmit Kucheria q6-hvx-thermal { 6167bac12f25SAmit Kucheria polling-delay-passive = <250>; 6168bac12f25SAmit Kucheria polling-delay = <1000>; 6169bac12f25SAmit Kucheria 6170bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 6171bac12f25SAmit Kucheria 6172bac12f25SAmit Kucheria trips { 6173bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 6174bac12f25SAmit Kucheria temperature = <90000>; 6175bac12f25SAmit Kucheria hysteresis = <2000>; 6176bac12f25SAmit Kucheria type = "hot"; 6177bac12f25SAmit Kucheria }; 6178bac12f25SAmit Kucheria }; 6179bac12f25SAmit Kucheria }; 6180bac12f25SAmit Kucheria 6181bac12f25SAmit Kucheria camera-thermal { 6182bac12f25SAmit Kucheria polling-delay-passive = <250>; 6183bac12f25SAmit Kucheria polling-delay = <1000>; 6184bac12f25SAmit Kucheria 6185bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 6186bac12f25SAmit Kucheria 6187bac12f25SAmit Kucheria trips { 6188bac12f25SAmit Kucheria camera_alert0: trip-point0 { 6189bac12f25SAmit Kucheria temperature = <90000>; 6190bac12f25SAmit Kucheria hysteresis = <2000>; 6191bac12f25SAmit Kucheria type = "hot"; 6192bac12f25SAmit Kucheria }; 6193bac12f25SAmit Kucheria }; 6194bac12f25SAmit Kucheria }; 6195bac12f25SAmit Kucheria 6196bac12f25SAmit Kucheria compute-thermal { 6197bac12f25SAmit Kucheria polling-delay-passive = <250>; 6198bac12f25SAmit Kucheria polling-delay = <1000>; 6199bac12f25SAmit Kucheria 6200bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 6201bac12f25SAmit Kucheria 6202bac12f25SAmit Kucheria trips { 6203bac12f25SAmit Kucheria compute_alert0: trip-point0 { 6204bac12f25SAmit Kucheria temperature = <90000>; 6205bac12f25SAmit Kucheria hysteresis = <2000>; 6206bac12f25SAmit Kucheria type = "hot"; 6207bac12f25SAmit Kucheria }; 6208bac12f25SAmit Kucheria }; 6209bac12f25SAmit Kucheria }; 6210bac12f25SAmit Kucheria 6211bac12f25SAmit Kucheria npu-thermal { 6212bac12f25SAmit Kucheria polling-delay-passive = <250>; 6213bac12f25SAmit Kucheria polling-delay = <1000>; 6214bac12f25SAmit Kucheria 6215bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 6216bac12f25SAmit Kucheria 6217bac12f25SAmit Kucheria trips { 6218bac12f25SAmit Kucheria npu_alert0: trip-point0 { 6219bac12f25SAmit Kucheria temperature = <90000>; 6220bac12f25SAmit Kucheria hysteresis = <2000>; 6221bac12f25SAmit Kucheria type = "hot"; 6222bac12f25SAmit Kucheria }; 6223bac12f25SAmit Kucheria }; 6224bac12f25SAmit Kucheria }; 6225bac12f25SAmit Kucheria 62267be1c395SDavid Heidelberg gpu-bottom-thermal { 6227bac12f25SAmit Kucheria polling-delay-passive = <250>; 6228bac12f25SAmit Kucheria polling-delay = <1000>; 6229bac12f25SAmit Kucheria 6230bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 6231bac12f25SAmit Kucheria 6232bac12f25SAmit Kucheria trips { 6233bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 6234bac12f25SAmit Kucheria temperature = <90000>; 6235bac12f25SAmit Kucheria hysteresis = <2000>; 6236bac12f25SAmit Kucheria type = "hot"; 6237bac12f25SAmit Kucheria }; 6238bac12f25SAmit Kucheria }; 6239bac12f25SAmit Kucheria }; 6240bac12f25SAmit Kucheria }; 624160378f1aSVenkata Narendra Kumar Gutta}; 6242