160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 7b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 80e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 960378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 1079a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 11e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 12087d537aSBjorn Andersson#include <dt-bindings/power/qcom-aoss-qmp.h> 13b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1460378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 15bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 1660378f1aSVenkata Narendra Kumar Gutta 1760378f1aSVenkata Narendra Kumar Gutta/ { 1860378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 1960378f1aSVenkata Narendra Kumar Gutta 2060378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 2160378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 2260378f1aSVenkata Narendra Kumar Gutta 23e5813b15SDmitry Baryshkov aliases { 24e5813b15SDmitry Baryshkov i2c0 = &i2c0; 25e5813b15SDmitry Baryshkov i2c1 = &i2c1; 26e5813b15SDmitry Baryshkov i2c2 = &i2c2; 27e5813b15SDmitry Baryshkov i2c3 = &i2c3; 28e5813b15SDmitry Baryshkov i2c4 = &i2c4; 29e5813b15SDmitry Baryshkov i2c5 = &i2c5; 30e5813b15SDmitry Baryshkov i2c6 = &i2c6; 31e5813b15SDmitry Baryshkov i2c7 = &i2c7; 32e5813b15SDmitry Baryshkov i2c8 = &i2c8; 33e5813b15SDmitry Baryshkov i2c9 = &i2c9; 34e5813b15SDmitry Baryshkov i2c10 = &i2c10; 35e5813b15SDmitry Baryshkov i2c11 = &i2c11; 36e5813b15SDmitry Baryshkov i2c12 = &i2c12; 37e5813b15SDmitry Baryshkov i2c13 = &i2c13; 38e5813b15SDmitry Baryshkov i2c14 = &i2c14; 39e5813b15SDmitry Baryshkov i2c15 = &i2c15; 40e5813b15SDmitry Baryshkov i2c16 = &i2c16; 41e5813b15SDmitry Baryshkov i2c17 = &i2c17; 42e5813b15SDmitry Baryshkov i2c18 = &i2c18; 43e5813b15SDmitry Baryshkov i2c19 = &i2c19; 44e5813b15SDmitry Baryshkov spi0 = &spi0; 45e5813b15SDmitry Baryshkov spi1 = &spi1; 46e5813b15SDmitry Baryshkov spi2 = &spi2; 47e5813b15SDmitry Baryshkov spi3 = &spi3; 48e5813b15SDmitry Baryshkov spi4 = &spi4; 49e5813b15SDmitry Baryshkov spi5 = &spi5; 50e5813b15SDmitry Baryshkov spi6 = &spi6; 51e5813b15SDmitry Baryshkov spi7 = &spi7; 52e5813b15SDmitry Baryshkov spi8 = &spi8; 53e5813b15SDmitry Baryshkov spi9 = &spi9; 54e5813b15SDmitry Baryshkov spi10 = &spi10; 55e5813b15SDmitry Baryshkov spi11 = &spi11; 56e5813b15SDmitry Baryshkov spi12 = &spi12; 57e5813b15SDmitry Baryshkov spi13 = &spi13; 58e5813b15SDmitry Baryshkov spi14 = &spi14; 59e5813b15SDmitry Baryshkov spi15 = &spi15; 60e5813b15SDmitry Baryshkov spi16 = &spi16; 61e5813b15SDmitry Baryshkov spi17 = &spi17; 62e5813b15SDmitry Baryshkov spi18 = &spi18; 63e5813b15SDmitry Baryshkov spi19 = &spi19; 64e5813b15SDmitry Baryshkov }; 65e5813b15SDmitry Baryshkov 6660378f1aSVenkata Narendra Kumar Gutta chosen { }; 6760378f1aSVenkata Narendra Kumar Gutta 6860378f1aSVenkata Narendra Kumar Gutta clocks { 6960378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7060378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 7160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 7260378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 7360378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 7460378f1aSVenkata Narendra Kumar Gutta }; 7560378f1aSVenkata Narendra Kumar Gutta 7660378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 7760378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 789ff8b059SJonathan Marek clock-frequency = <32768>; 7960378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8060378f1aSVenkata Narendra Kumar Gutta }; 8160378f1aSVenkata Narendra Kumar Gutta }; 8260378f1aSVenkata Narendra Kumar Gutta 8360378f1aSVenkata Narendra Kumar Gutta cpus { 8460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 8560378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 8660378f1aSVenkata Narendra Kumar Gutta 8760378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 8860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 8960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 9160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 9260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 9302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 94bac12f25SAmit Kucheria #cooling-cells = <2>; 9560378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 9660378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 9760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 9860378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 9960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10060378f1aSVenkata Narendra Kumar Gutta }; 10160378f1aSVenkata Narendra Kumar Gutta }; 10260378f1aSVenkata Narendra Kumar Gutta }; 10360378f1aSVenkata Narendra Kumar Gutta 10460378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 10560378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 10660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 10760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 10860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 10960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 11002ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 111bac12f25SAmit Kucheria #cooling-cells = <2>; 11260378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 11360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 11460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11560378f1aSVenkata Narendra Kumar Gutta }; 11660378f1aSVenkata Narendra Kumar Gutta }; 11760378f1aSVenkata Narendra Kumar Gutta 11860378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 11960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 12160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 12260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 12360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 12402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 125bac12f25SAmit Kucheria #cooling-cells = <2>; 12660378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 12760378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 12860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 12960378f1aSVenkata Narendra Kumar Gutta }; 13060378f1aSVenkata Narendra Kumar Gutta }; 13160378f1aSVenkata Narendra Kumar Gutta 13260378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 13360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 13460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 13660378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 13760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 13802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 139bac12f25SAmit Kucheria #cooling-cells = <2>; 14060378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 14160378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 14260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 14360378f1aSVenkata Narendra Kumar Gutta }; 14460378f1aSVenkata Narendra Kumar Gutta }; 14560378f1aSVenkata Narendra Kumar Gutta 14660378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 14760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 14860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 14960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 15060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 15160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 15202ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 153bac12f25SAmit Kucheria #cooling-cells = <2>; 15460378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 15560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 15660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 15760378f1aSVenkata Narendra Kumar Gutta }; 15860378f1aSVenkata Narendra Kumar Gutta }; 15960378f1aSVenkata Narendra Kumar Gutta 16060378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 16160378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 16260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 16360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 16460378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 16560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 16602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 167bac12f25SAmit Kucheria #cooling-cells = <2>; 16860378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 16960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 17060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17160378f1aSVenkata Narendra Kumar Gutta }; 17260378f1aSVenkata Narendra Kumar Gutta 17360378f1aSVenkata Narendra Kumar Gutta }; 17460378f1aSVenkata Narendra Kumar Gutta 17560378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 17660378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 17760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 17860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 17960378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 18060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 18102ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 182bac12f25SAmit Kucheria #cooling-cells = <2>; 18360378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 18460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 18560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 18660378f1aSVenkata Narendra Kumar Gutta }; 18760378f1aSVenkata Narendra Kumar Gutta }; 18860378f1aSVenkata Narendra Kumar Gutta 18960378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 19060378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 19160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 19260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 19360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 19460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 19502ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 196bac12f25SAmit Kucheria #cooling-cells = <2>; 19760378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 19860378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 19960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20060378f1aSVenkata Narendra Kumar Gutta }; 20160378f1aSVenkata Narendra Kumar Gutta }; 20260378f1aSVenkata Narendra Kumar Gutta }; 20360378f1aSVenkata Narendra Kumar Gutta 20460378f1aSVenkata Narendra Kumar Gutta firmware { 20560378f1aSVenkata Narendra Kumar Gutta scm: scm { 20660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,scm"; 20760378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 20860378f1aSVenkata Narendra Kumar Gutta }; 20960378f1aSVenkata Narendra Kumar Gutta }; 21060378f1aSVenkata Narendra Kumar Gutta 21160378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 21260378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 21360378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 21460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 21560378f1aSVenkata Narendra Kumar Gutta }; 21660378f1aSVenkata Narendra Kumar Gutta 21760378f1aSVenkata Narendra Kumar Gutta pmu { 21860378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 21960378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 22060378f1aSVenkata Narendra Kumar Gutta }; 22160378f1aSVenkata Narendra Kumar Gutta 22260378f1aSVenkata Narendra Kumar Gutta psci { 22360378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 22460378f1aSVenkata Narendra Kumar Gutta method = "smc"; 22560378f1aSVenkata Narendra Kumar Gutta }; 22660378f1aSVenkata Narendra Kumar Gutta 22760378f1aSVenkata Narendra Kumar Gutta reserved-memory { 22860378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 22960378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 23060378f1aSVenkata Narendra Kumar Gutta ranges; 23160378f1aSVenkata Narendra Kumar Gutta 23260378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 23360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 23460378f1aSVenkata Narendra Kumar Gutta no-map; 23560378f1aSVenkata Narendra Kumar Gutta }; 23660378f1aSVenkata Narendra Kumar Gutta 23760378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 23860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 23960378f1aSVenkata Narendra Kumar Gutta no-map; 24060378f1aSVenkata Narendra Kumar Gutta }; 24160378f1aSVenkata Narendra Kumar Gutta 24260378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 24360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 24460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 24560378f1aSVenkata Narendra Kumar Gutta no-map; 24660378f1aSVenkata Narendra Kumar Gutta }; 24760378f1aSVenkata Narendra Kumar Gutta 24860378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 24960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 25060378f1aSVenkata Narendra Kumar Gutta no-map; 25160378f1aSVenkata Narendra Kumar Gutta }; 25260378f1aSVenkata Narendra Kumar Gutta 25360378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 25460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 25560378f1aSVenkata Narendra Kumar Gutta no-map; 25660378f1aSVenkata Narendra Kumar Gutta }; 25760378f1aSVenkata Narendra Kumar Gutta 25860378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 25960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 26060378f1aSVenkata Narendra Kumar Gutta no-map; 26160378f1aSVenkata Narendra Kumar Gutta }; 26260378f1aSVenkata Narendra Kumar Gutta 26360378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 26460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 26560378f1aSVenkata Narendra Kumar Gutta no-map; 26660378f1aSVenkata Narendra Kumar Gutta }; 26760378f1aSVenkata Narendra Kumar Gutta 26860378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 26960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 27060378f1aSVenkata Narendra Kumar Gutta no-map; 27160378f1aSVenkata Narendra Kumar Gutta }; 27260378f1aSVenkata Narendra Kumar Gutta 27360378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 27460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 27560378f1aSVenkata Narendra Kumar Gutta no-map; 27660378f1aSVenkata Narendra Kumar Gutta }; 27760378f1aSVenkata Narendra Kumar Gutta 27860378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 27960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 28060378f1aSVenkata Narendra Kumar Gutta no-map; 28160378f1aSVenkata Narendra Kumar Gutta }; 28260378f1aSVenkata Narendra Kumar Gutta 28360378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 28460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 28560378f1aSVenkata Narendra Kumar Gutta no-map; 28660378f1aSVenkata Narendra Kumar Gutta }; 28760378f1aSVenkata Narendra Kumar Gutta 28860378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 28960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 29060378f1aSVenkata Narendra Kumar Gutta no-map; 29160378f1aSVenkata Narendra Kumar Gutta }; 29260378f1aSVenkata Narendra Kumar Gutta 29360378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 29460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 29560378f1aSVenkata Narendra Kumar Gutta no-map; 29660378f1aSVenkata Narendra Kumar Gutta }; 29760378f1aSVenkata Narendra Kumar Gutta 29860378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 29960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 30060378f1aSVenkata Narendra Kumar Gutta no-map; 30160378f1aSVenkata Narendra Kumar Gutta }; 30260378f1aSVenkata Narendra Kumar Gutta 30360378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 30460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 30560378f1aSVenkata Narendra Kumar Gutta no-map; 30660378f1aSVenkata Narendra Kumar Gutta }; 30760378f1aSVenkata Narendra Kumar Gutta 30860378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 30960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 31060378f1aSVenkata Narendra Kumar Gutta no-map; 31160378f1aSVenkata Narendra Kumar Gutta }; 31260378f1aSVenkata Narendra Kumar Gutta 31360378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 31460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 31560378f1aSVenkata Narendra Kumar Gutta no-map; 31660378f1aSVenkata Narendra Kumar Gutta }; 31760378f1aSVenkata Narendra Kumar Gutta 31860378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 31960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 32060378f1aSVenkata Narendra Kumar Gutta no-map; 32160378f1aSVenkata Narendra Kumar Gutta }; 32260378f1aSVenkata Narendra Kumar Gutta }; 32360378f1aSVenkata Narendra Kumar Gutta 32460378f1aSVenkata Narendra Kumar Gutta smem: qcom,smem { 32560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 32660378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 32760378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 32860378f1aSVenkata Narendra Kumar Gutta }; 32960378f1aSVenkata Narendra Kumar Gutta 3308770a2a8SBjorn Andersson smp2p-adsp { 3318770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3328770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 3338770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 3348770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3358770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3368770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 3378770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3388770a2a8SBjorn Andersson 3398770a2a8SBjorn Andersson qcom,local-pid = <0>; 3408770a2a8SBjorn Andersson qcom,remote-pid = <2>; 3418770a2a8SBjorn Andersson 3428770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 3438770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3448770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3458770a2a8SBjorn Andersson }; 3468770a2a8SBjorn Andersson 3478770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 3488770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3498770a2a8SBjorn Andersson interrupt-controller; 3508770a2a8SBjorn Andersson #interrupt-cells = <2>; 3518770a2a8SBjorn Andersson }; 3528770a2a8SBjorn Andersson }; 3538770a2a8SBjorn Andersson 3548770a2a8SBjorn Andersson smp2p-cdsp { 3558770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3568770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 3578770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 3588770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3598770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3608770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 3618770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3628770a2a8SBjorn Andersson 3638770a2a8SBjorn Andersson qcom,local-pid = <0>; 3648770a2a8SBjorn Andersson qcom,remote-pid = <5>; 3658770a2a8SBjorn Andersson 3668770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 3678770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3688770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3698770a2a8SBjorn Andersson }; 3708770a2a8SBjorn Andersson 3718770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 3728770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3738770a2a8SBjorn Andersson interrupt-controller; 3748770a2a8SBjorn Andersson #interrupt-cells = <2>; 3758770a2a8SBjorn Andersson }; 3768770a2a8SBjorn Andersson }; 3778770a2a8SBjorn Andersson 3788770a2a8SBjorn Andersson smp2p-slpi { 3798770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3808770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 3818770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 3828770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3838770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3848770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 3858770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3868770a2a8SBjorn Andersson 3878770a2a8SBjorn Andersson qcom,local-pid = <0>; 3888770a2a8SBjorn Andersson qcom,remote-pid = <3>; 3898770a2a8SBjorn Andersson 3908770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 3918770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3928770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3938770a2a8SBjorn Andersson }; 3948770a2a8SBjorn Andersson 3958770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 3968770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3978770a2a8SBjorn Andersson interrupt-controller; 3988770a2a8SBjorn Andersson #interrupt-cells = <2>; 3998770a2a8SBjorn Andersson }; 4008770a2a8SBjorn Andersson }; 4018770a2a8SBjorn Andersson 40260378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 40360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 40460378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 40560378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 40660378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 40760378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 40860378f1aSVenkata Narendra Kumar Gutta 40960378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 41060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 41160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 41260378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 41360378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 41460378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 41576bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 41676bd127eSDmitry Baryshkov "bi_tcxo_ao", 41776bd127eSDmitry Baryshkov "sleep_clk"; 41876bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 41976bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 42076bd127eSDmitry Baryshkov <&sleep_clk>; 42160378f1aSVenkata Narendra Kumar Gutta }; 42260378f1aSVenkata Narendra Kumar Gutta 423e5361e75SBjorn Andersson ipcc: mailbox@408000 { 424e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 425e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 426e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 427e5361e75SBjorn Andersson interrupt-controller; 428e5361e75SBjorn Andersson #interrupt-cells = <3>; 429e5361e75SBjorn Andersson #mbox-cells = <2>; 430e5361e75SBjorn Andersson }; 431e5361e75SBjorn Andersson 43201e869ccSDmitry Baryshkov qup_opp_table: qup-opp-table { 43301e869ccSDmitry Baryshkov compatible = "operating-points-v2"; 43401e869ccSDmitry Baryshkov 43501e869ccSDmitry Baryshkov opp-50000000 { 43601e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <50000000>; 43701e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_min_svs>; 43801e869ccSDmitry Baryshkov }; 43901e869ccSDmitry Baryshkov 44001e869ccSDmitry Baryshkov opp-75000000 { 44101e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <75000000>; 44201e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 44301e869ccSDmitry Baryshkov }; 44401e869ccSDmitry Baryshkov 44501e869ccSDmitry Baryshkov opp-120000000 { 44601e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <120000000>; 44701e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 44801e869ccSDmitry Baryshkov }; 44901e869ccSDmitry Baryshkov }; 45001e869ccSDmitry Baryshkov 451e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 452e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 453e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 454e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 455e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 456e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 457e5813b15SDmitry Baryshkov #address-cells = <2>; 458e5813b15SDmitry Baryshkov #size-cells = <2>; 459e5813b15SDmitry Baryshkov ranges; 460e5813b15SDmitry Baryshkov status = "disabled"; 461e5813b15SDmitry Baryshkov 462e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 463e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 464e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 465e5813b15SDmitry Baryshkov clock-names = "se"; 466e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 467e5813b15SDmitry Baryshkov pinctrl-names = "default"; 468e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 469e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 470e5813b15SDmitry Baryshkov #address-cells = <1>; 471e5813b15SDmitry Baryshkov #size-cells = <0>; 472e5813b15SDmitry Baryshkov status = "disabled"; 473e5813b15SDmitry Baryshkov }; 474e5813b15SDmitry Baryshkov 475e5813b15SDmitry Baryshkov spi14: spi@880000 { 476e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 477e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 478e5813b15SDmitry Baryshkov clock-names = "se"; 479e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 480e5813b15SDmitry Baryshkov pinctrl-names = "default"; 481e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi14_default>; 482e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 483e5813b15SDmitry Baryshkov #address-cells = <1>; 484e5813b15SDmitry Baryshkov #size-cells = <0>; 48501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 48601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 487e5813b15SDmitry Baryshkov status = "disabled"; 488e5813b15SDmitry Baryshkov }; 489e5813b15SDmitry Baryshkov 490e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 491e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 492e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 493e5813b15SDmitry Baryshkov clock-names = "se"; 494e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 495e5813b15SDmitry Baryshkov pinctrl-names = "default"; 496e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 497e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 498e5813b15SDmitry Baryshkov #address-cells = <1>; 499e5813b15SDmitry Baryshkov #size-cells = <0>; 500e5813b15SDmitry Baryshkov status = "disabled"; 501e5813b15SDmitry Baryshkov }; 502e5813b15SDmitry Baryshkov 503e5813b15SDmitry Baryshkov spi15: spi@884000 { 504e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 505e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 506e5813b15SDmitry Baryshkov clock-names = "se"; 507e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 508e5813b15SDmitry Baryshkov pinctrl-names = "default"; 509e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi15_default>; 510e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 511e5813b15SDmitry Baryshkov #address-cells = <1>; 512e5813b15SDmitry Baryshkov #size-cells = <0>; 51301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 51401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 515e5813b15SDmitry Baryshkov status = "disabled"; 516e5813b15SDmitry Baryshkov }; 517e5813b15SDmitry Baryshkov 518e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 519e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 520e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 521e5813b15SDmitry Baryshkov clock-names = "se"; 522e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 523e5813b15SDmitry Baryshkov pinctrl-names = "default"; 524e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 525e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 526e5813b15SDmitry Baryshkov #address-cells = <1>; 527e5813b15SDmitry Baryshkov #size-cells = <0>; 528e5813b15SDmitry Baryshkov status = "disabled"; 529e5813b15SDmitry Baryshkov }; 530e5813b15SDmitry Baryshkov 531e5813b15SDmitry Baryshkov spi16: spi@888000 { 532e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 533e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 534e5813b15SDmitry Baryshkov clock-names = "se"; 535e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 536e5813b15SDmitry Baryshkov pinctrl-names = "default"; 537e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi16_default>; 538e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 539e5813b15SDmitry Baryshkov #address-cells = <1>; 540e5813b15SDmitry Baryshkov #size-cells = <0>; 54101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 54201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 543e5813b15SDmitry Baryshkov status = "disabled"; 544e5813b15SDmitry Baryshkov }; 545e5813b15SDmitry Baryshkov 546e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 547e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 548e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 549e5813b15SDmitry Baryshkov clock-names = "se"; 550e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 551e5813b15SDmitry Baryshkov pinctrl-names = "default"; 552e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 553e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 554e5813b15SDmitry Baryshkov #address-cells = <1>; 555e5813b15SDmitry Baryshkov #size-cells = <0>; 556e5813b15SDmitry Baryshkov status = "disabled"; 557e5813b15SDmitry Baryshkov }; 558e5813b15SDmitry Baryshkov 559e5813b15SDmitry Baryshkov spi17: spi@88c000 { 560e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 561e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 562e5813b15SDmitry Baryshkov clock-names = "se"; 563e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 564e5813b15SDmitry Baryshkov pinctrl-names = "default"; 565e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi17_default>; 566e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 567e5813b15SDmitry Baryshkov #address-cells = <1>; 568e5813b15SDmitry Baryshkov #size-cells = <0>; 56901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 57001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 571e5813b15SDmitry Baryshkov status = "disabled"; 572e5813b15SDmitry Baryshkov }; 573e5813b15SDmitry Baryshkov 57408a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 57508a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 57608a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 57708a9ae2dSDmitry Baryshkov clock-names = "se"; 57808a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 57908a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 58008a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 58108a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 58201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 58301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 58408a9ae2dSDmitry Baryshkov status = "disabled"; 58508a9ae2dSDmitry Baryshkov }; 58608a9ae2dSDmitry Baryshkov 587e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 588e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 589e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 590e5813b15SDmitry Baryshkov clock-names = "se"; 591e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 592e5813b15SDmitry Baryshkov pinctrl-names = "default"; 593e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 594e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 595e5813b15SDmitry Baryshkov #address-cells = <1>; 596e5813b15SDmitry Baryshkov #size-cells = <0>; 597e5813b15SDmitry Baryshkov status = "disabled"; 598e5813b15SDmitry Baryshkov }; 599e5813b15SDmitry Baryshkov 600e5813b15SDmitry Baryshkov spi18: spi@890000 { 601e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 602e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 603e5813b15SDmitry Baryshkov clock-names = "se"; 604e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 605e5813b15SDmitry Baryshkov pinctrl-names = "default"; 606e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi18_default>; 607e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 608e5813b15SDmitry Baryshkov #address-cells = <1>; 609e5813b15SDmitry Baryshkov #size-cells = <0>; 61001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 61101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 612e5813b15SDmitry Baryshkov status = "disabled"; 613e5813b15SDmitry Baryshkov }; 614e5813b15SDmitry Baryshkov 61508a9ae2dSDmitry Baryshkov uart18: serial@890000 { 61608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 61708a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 61808a9ae2dSDmitry Baryshkov clock-names = "se"; 61908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 62008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 62108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 62208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 62301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 62401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 62508a9ae2dSDmitry Baryshkov status = "disabled"; 62608a9ae2dSDmitry Baryshkov }; 62708a9ae2dSDmitry Baryshkov 628e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 629e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 630e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 631e5813b15SDmitry Baryshkov clock-names = "se"; 632e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 633e5813b15SDmitry Baryshkov pinctrl-names = "default"; 634e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 635e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 636e5813b15SDmitry Baryshkov #address-cells = <1>; 637e5813b15SDmitry Baryshkov #size-cells = <0>; 638e5813b15SDmitry Baryshkov status = "disabled"; 639e5813b15SDmitry Baryshkov }; 640e5813b15SDmitry Baryshkov 641e5813b15SDmitry Baryshkov spi19: spi@894000 { 642e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 643e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 644e5813b15SDmitry Baryshkov clock-names = "se"; 645e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 646e5813b15SDmitry Baryshkov pinctrl-names = "default"; 647e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi19_default>; 648e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 649e5813b15SDmitry Baryshkov #address-cells = <1>; 650e5813b15SDmitry Baryshkov #size-cells = <0>; 65101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 65201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 653e5813b15SDmitry Baryshkov status = "disabled"; 654e5813b15SDmitry Baryshkov }; 655e5813b15SDmitry Baryshkov }; 656e5813b15SDmitry Baryshkov 657e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 658e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 659e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 660e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 661e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 662e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 663e5813b15SDmitry Baryshkov #address-cells = <2>; 664e5813b15SDmitry Baryshkov #size-cells = <2>; 665e5813b15SDmitry Baryshkov ranges; 666e5813b15SDmitry Baryshkov status = "disabled"; 667e5813b15SDmitry Baryshkov 668e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 669e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 670e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 671e5813b15SDmitry Baryshkov clock-names = "se"; 672e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 673e5813b15SDmitry Baryshkov pinctrl-names = "default"; 674e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 675e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 676e5813b15SDmitry Baryshkov #address-cells = <1>; 677e5813b15SDmitry Baryshkov #size-cells = <0>; 678e5813b15SDmitry Baryshkov status = "disabled"; 679e5813b15SDmitry Baryshkov }; 680e5813b15SDmitry Baryshkov 681e5813b15SDmitry Baryshkov spi0: spi@980000 { 682e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 683e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 684e5813b15SDmitry Baryshkov clock-names = "se"; 685e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 686e5813b15SDmitry Baryshkov pinctrl-names = "default"; 687e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi0_default>; 688e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 689e5813b15SDmitry Baryshkov #address-cells = <1>; 690e5813b15SDmitry Baryshkov #size-cells = <0>; 69101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 69201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 693e5813b15SDmitry Baryshkov status = "disabled"; 694e5813b15SDmitry Baryshkov }; 695e5813b15SDmitry Baryshkov 696e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 697e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 698e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 699e5813b15SDmitry Baryshkov clock-names = "se"; 700e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 701e5813b15SDmitry Baryshkov pinctrl-names = "default"; 702e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 703e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 704e5813b15SDmitry Baryshkov #address-cells = <1>; 705e5813b15SDmitry Baryshkov #size-cells = <0>; 706e5813b15SDmitry Baryshkov status = "disabled"; 707e5813b15SDmitry Baryshkov }; 708e5813b15SDmitry Baryshkov 709e5813b15SDmitry Baryshkov spi1: spi@984000 { 710e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 711e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 712e5813b15SDmitry Baryshkov clock-names = "se"; 713e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 714e5813b15SDmitry Baryshkov pinctrl-names = "default"; 715e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi1_default>; 716e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 717e5813b15SDmitry Baryshkov #address-cells = <1>; 718e5813b15SDmitry Baryshkov #size-cells = <0>; 71901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 72001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 721e5813b15SDmitry Baryshkov status = "disabled"; 722e5813b15SDmitry Baryshkov }; 723e5813b15SDmitry Baryshkov 724e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 725e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 726e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 727e5813b15SDmitry Baryshkov clock-names = "se"; 728e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 729e5813b15SDmitry Baryshkov pinctrl-names = "default"; 730e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 731e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 732e5813b15SDmitry Baryshkov #address-cells = <1>; 733e5813b15SDmitry Baryshkov #size-cells = <0>; 734e5813b15SDmitry Baryshkov status = "disabled"; 735e5813b15SDmitry Baryshkov }; 736e5813b15SDmitry Baryshkov 737e5813b15SDmitry Baryshkov spi2: spi@988000 { 738e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 739e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 740e5813b15SDmitry Baryshkov clock-names = "se"; 741e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 742e5813b15SDmitry Baryshkov pinctrl-names = "default"; 743e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi2_default>; 744e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 745e5813b15SDmitry Baryshkov #address-cells = <1>; 746e5813b15SDmitry Baryshkov #size-cells = <0>; 74701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 74801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 749e5813b15SDmitry Baryshkov status = "disabled"; 750e5813b15SDmitry Baryshkov }; 751e5813b15SDmitry Baryshkov 75208a9ae2dSDmitry Baryshkov uart2: serial@988000 { 75308a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 75408a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 75508a9ae2dSDmitry Baryshkov clock-names = "se"; 75608a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 75708a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 75808a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 75908a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 76001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 76101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 76208a9ae2dSDmitry Baryshkov status = "disabled"; 76308a9ae2dSDmitry Baryshkov }; 76408a9ae2dSDmitry Baryshkov 765e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 766e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 767e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 768e5813b15SDmitry Baryshkov clock-names = "se"; 769e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 770e5813b15SDmitry Baryshkov pinctrl-names = "default"; 771e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 772e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 773e5813b15SDmitry Baryshkov #address-cells = <1>; 774e5813b15SDmitry Baryshkov #size-cells = <0>; 775e5813b15SDmitry Baryshkov status = "disabled"; 776e5813b15SDmitry Baryshkov }; 777e5813b15SDmitry Baryshkov 778e5813b15SDmitry Baryshkov spi3: spi@98c000 { 779e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 780e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 781e5813b15SDmitry Baryshkov clock-names = "se"; 782e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 783e5813b15SDmitry Baryshkov pinctrl-names = "default"; 784e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi3_default>; 785e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 786e5813b15SDmitry Baryshkov #address-cells = <1>; 787e5813b15SDmitry Baryshkov #size-cells = <0>; 78801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 78901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 790e5813b15SDmitry Baryshkov status = "disabled"; 791e5813b15SDmitry Baryshkov }; 792e5813b15SDmitry Baryshkov 793e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 794e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 795e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 796e5813b15SDmitry Baryshkov clock-names = "se"; 797e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 798e5813b15SDmitry Baryshkov pinctrl-names = "default"; 799e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 800e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 801e5813b15SDmitry Baryshkov #address-cells = <1>; 802e5813b15SDmitry Baryshkov #size-cells = <0>; 803e5813b15SDmitry Baryshkov status = "disabled"; 804e5813b15SDmitry Baryshkov }; 805e5813b15SDmitry Baryshkov 806e5813b15SDmitry Baryshkov spi4: spi@990000 { 807e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 808e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 809e5813b15SDmitry Baryshkov clock-names = "se"; 810e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 811e5813b15SDmitry Baryshkov pinctrl-names = "default"; 812e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi4_default>; 813e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 814e5813b15SDmitry Baryshkov #address-cells = <1>; 815e5813b15SDmitry Baryshkov #size-cells = <0>; 81601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 81701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 818e5813b15SDmitry Baryshkov status = "disabled"; 819e5813b15SDmitry Baryshkov }; 820e5813b15SDmitry Baryshkov 821e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 822e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 823e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 824e5813b15SDmitry Baryshkov clock-names = "se"; 825e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 826e5813b15SDmitry Baryshkov pinctrl-names = "default"; 827e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 828e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 829e5813b15SDmitry Baryshkov #address-cells = <1>; 830e5813b15SDmitry Baryshkov #size-cells = <0>; 831e5813b15SDmitry Baryshkov status = "disabled"; 832e5813b15SDmitry Baryshkov }; 833e5813b15SDmitry Baryshkov 834e5813b15SDmitry Baryshkov spi5: spi@994000 { 835e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 836e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 837e5813b15SDmitry Baryshkov clock-names = "se"; 838e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 839e5813b15SDmitry Baryshkov pinctrl-names = "default"; 840e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi5_default>; 841e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 842e5813b15SDmitry Baryshkov #address-cells = <1>; 843e5813b15SDmitry Baryshkov #size-cells = <0>; 84401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 84501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 846e5813b15SDmitry Baryshkov status = "disabled"; 847e5813b15SDmitry Baryshkov }; 848e5813b15SDmitry Baryshkov 849e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 850e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 851e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 852e5813b15SDmitry Baryshkov clock-names = "se"; 853e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 854e5813b15SDmitry Baryshkov pinctrl-names = "default"; 855e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 856e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 857e5813b15SDmitry Baryshkov #address-cells = <1>; 858e5813b15SDmitry Baryshkov #size-cells = <0>; 859e5813b15SDmitry Baryshkov status = "disabled"; 860e5813b15SDmitry Baryshkov }; 861e5813b15SDmitry Baryshkov 862e5813b15SDmitry Baryshkov spi6: spi@998000 { 863e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 864e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 865e5813b15SDmitry Baryshkov clock-names = "se"; 866e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 867e5813b15SDmitry Baryshkov pinctrl-names = "default"; 868e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi6_default>; 869e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 870e5813b15SDmitry Baryshkov #address-cells = <1>; 871e5813b15SDmitry Baryshkov #size-cells = <0>; 87201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 87301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 874e5813b15SDmitry Baryshkov status = "disabled"; 875e5813b15SDmitry Baryshkov }; 876e5813b15SDmitry Baryshkov 87708a9ae2dSDmitry Baryshkov uart6: serial@998000 { 87808a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 87908a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 88008a9ae2dSDmitry Baryshkov clock-names = "se"; 88108a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 88208a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 88308a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 88408a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 88501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 88601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 88708a9ae2dSDmitry Baryshkov status = "disabled"; 88808a9ae2dSDmitry Baryshkov }; 88908a9ae2dSDmitry Baryshkov 890e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 891e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 892e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 893e5813b15SDmitry Baryshkov clock-names = "se"; 894e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 895e5813b15SDmitry Baryshkov pinctrl-names = "default"; 896e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 897e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 898e5813b15SDmitry Baryshkov #address-cells = <1>; 899e5813b15SDmitry Baryshkov #size-cells = <0>; 900e5813b15SDmitry Baryshkov status = "disabled"; 901e5813b15SDmitry Baryshkov }; 902e5813b15SDmitry Baryshkov 903e5813b15SDmitry Baryshkov spi7: spi@99c000 { 904e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 905e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 906e5813b15SDmitry Baryshkov clock-names = "se"; 907e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 908e5813b15SDmitry Baryshkov pinctrl-names = "default"; 909e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi7_default>; 910e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 911e5813b15SDmitry Baryshkov #address-cells = <1>; 912e5813b15SDmitry Baryshkov #size-cells = <0>; 91301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 91401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 915e5813b15SDmitry Baryshkov status = "disabled"; 916e5813b15SDmitry Baryshkov }; 917e5813b15SDmitry Baryshkov }; 918e5813b15SDmitry Baryshkov 91960378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 92060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 92160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 92260378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 923fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 924fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 92560378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 92660378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 92760378f1aSVenkata Narendra Kumar Gutta ranges; 92860378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 92960378f1aSVenkata Narendra Kumar Gutta 930e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 931e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 932e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 933e5813b15SDmitry Baryshkov clock-names = "se"; 934e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 935e5813b15SDmitry Baryshkov pinctrl-names = "default"; 936e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 937e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 938e5813b15SDmitry Baryshkov #address-cells = <1>; 939e5813b15SDmitry Baryshkov #size-cells = <0>; 940e5813b15SDmitry Baryshkov status = "disabled"; 941e5813b15SDmitry Baryshkov }; 942e5813b15SDmitry Baryshkov 943e5813b15SDmitry Baryshkov spi8: spi@a80000 { 944e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 945e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 946e5813b15SDmitry Baryshkov clock-names = "se"; 947e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 948e5813b15SDmitry Baryshkov pinctrl-names = "default"; 949e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi8_default>; 950e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 951e5813b15SDmitry Baryshkov #address-cells = <1>; 952e5813b15SDmitry Baryshkov #size-cells = <0>; 95301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 95401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 955e5813b15SDmitry Baryshkov status = "disabled"; 956e5813b15SDmitry Baryshkov }; 957e5813b15SDmitry Baryshkov 958e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 959e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 960e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 961e5813b15SDmitry Baryshkov clock-names = "se"; 962e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 963e5813b15SDmitry Baryshkov pinctrl-names = "default"; 964e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 965e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 966e5813b15SDmitry Baryshkov #address-cells = <1>; 967e5813b15SDmitry Baryshkov #size-cells = <0>; 968e5813b15SDmitry Baryshkov status = "disabled"; 969e5813b15SDmitry Baryshkov }; 970e5813b15SDmitry Baryshkov 971e5813b15SDmitry Baryshkov spi9: spi@a84000 { 972e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 973e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 974e5813b15SDmitry Baryshkov clock-names = "se"; 975e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 976e5813b15SDmitry Baryshkov pinctrl-names = "default"; 977e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi9_default>; 978e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 979e5813b15SDmitry Baryshkov #address-cells = <1>; 980e5813b15SDmitry Baryshkov #size-cells = <0>; 98101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 98201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 983e5813b15SDmitry Baryshkov status = "disabled"; 984e5813b15SDmitry Baryshkov }; 985e5813b15SDmitry Baryshkov 986e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 987e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 988e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 989e5813b15SDmitry Baryshkov clock-names = "se"; 990e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 991e5813b15SDmitry Baryshkov pinctrl-names = "default"; 992e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 993e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 994e5813b15SDmitry Baryshkov #address-cells = <1>; 995e5813b15SDmitry Baryshkov #size-cells = <0>; 996e5813b15SDmitry Baryshkov status = "disabled"; 997e5813b15SDmitry Baryshkov }; 998e5813b15SDmitry Baryshkov 999e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1000e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1001e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1002e5813b15SDmitry Baryshkov clock-names = "se"; 1003e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1004e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1005e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi10_default>; 1006e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1007e5813b15SDmitry Baryshkov #address-cells = <1>; 1008e5813b15SDmitry Baryshkov #size-cells = <0>; 100901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 101001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1011e5813b15SDmitry Baryshkov status = "disabled"; 1012e5813b15SDmitry Baryshkov }; 1013e5813b15SDmitry Baryshkov 1014e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1015e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1016e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1017e5813b15SDmitry Baryshkov clock-names = "se"; 1018e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1019e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1020e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1021e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1022e5813b15SDmitry Baryshkov #address-cells = <1>; 1023e5813b15SDmitry Baryshkov #size-cells = <0>; 1024e5813b15SDmitry Baryshkov status = "disabled"; 1025e5813b15SDmitry Baryshkov }; 1026e5813b15SDmitry Baryshkov 1027e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1028e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1029e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1030e5813b15SDmitry Baryshkov clock-names = "se"; 1031e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1032e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1033e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi11_default>; 1034e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1035e5813b15SDmitry Baryshkov #address-cells = <1>; 1036e5813b15SDmitry Baryshkov #size-cells = <0>; 103701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 103801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1039e5813b15SDmitry Baryshkov status = "disabled"; 1040e5813b15SDmitry Baryshkov }; 1041e5813b15SDmitry Baryshkov 1042e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1043e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1044e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1045e5813b15SDmitry Baryshkov clock-names = "se"; 1046e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1047e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1048e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1049e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1050e5813b15SDmitry Baryshkov #address-cells = <1>; 1051e5813b15SDmitry Baryshkov #size-cells = <0>; 1052e5813b15SDmitry Baryshkov status = "disabled"; 1053e5813b15SDmitry Baryshkov }; 1054e5813b15SDmitry Baryshkov 1055e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1056e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1057e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1058e5813b15SDmitry Baryshkov clock-names = "se"; 1059e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1060e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1061e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi12_default>; 1062e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1063e5813b15SDmitry Baryshkov #address-cells = <1>; 1064e5813b15SDmitry Baryshkov #size-cells = <0>; 106501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 106601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1067e5813b15SDmitry Baryshkov status = "disabled"; 1068e5813b15SDmitry Baryshkov }; 1069e5813b15SDmitry Baryshkov 1070bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 107160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 107260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 107360378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1074fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1075bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1076bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 107760378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 107801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 107901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 108060378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 108160378f1aSVenkata Narendra Kumar Gutta }; 1082e5813b15SDmitry Baryshkov 1083e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1084e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1085e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1086e5813b15SDmitry Baryshkov clock-names = "se"; 1087e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1088e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1089e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1090e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1091e5813b15SDmitry Baryshkov #address-cells = <1>; 1092e5813b15SDmitry Baryshkov #size-cells = <0>; 1093e5813b15SDmitry Baryshkov status = "disabled"; 1094e5813b15SDmitry Baryshkov }; 1095e5813b15SDmitry Baryshkov 1096e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1097e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1098e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1099e5813b15SDmitry Baryshkov clock-names = "se"; 1100e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1101e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1102e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi13_default>; 1103e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1104e5813b15SDmitry Baryshkov #address-cells = <1>; 1105e5813b15SDmitry Baryshkov #size-cells = <0>; 110601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 110701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1108e5813b15SDmitry Baryshkov status = "disabled"; 1109e5813b15SDmitry Baryshkov }; 111060378f1aSVenkata Narendra Kumar Gutta }; 111160378f1aSVenkata Narendra Kumar Gutta 1112e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1113e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1114e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1115e7e41a20SJonathan Marek #interconnect-cells = <1>; 1116e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1117e7e41a20SJonathan Marek }; 1118e7e41a20SJonathan Marek 1119e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1120e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1121e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1122e7e41a20SJonathan Marek #interconnect-cells = <1>; 1123e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1124e7e41a20SJonathan Marek }; 1125e7e41a20SJonathan Marek 1126e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1127e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1128e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1129e7e41a20SJonathan Marek #interconnect-cells = <1>; 1130e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1131e7e41a20SJonathan Marek }; 1132e7e41a20SJonathan Marek 1133e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1134e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1135e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1136e7e41a20SJonathan Marek #interconnect-cells = <1>; 1137e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1138e7e41a20SJonathan Marek }; 1139e7e41a20SJonathan Marek 1140e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1141e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1142e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1143e7e41a20SJonathan Marek #interconnect-cells = <1>; 1144e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1145e7e41a20SJonathan Marek }; 1146e7e41a20SJonathan Marek 1147e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1148e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1149e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1150e7e41a20SJonathan Marek #interconnect-cells = <1>; 1151e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1152e7e41a20SJonathan Marek }; 1153e7e41a20SJonathan Marek 1154e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1155e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1156e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1157e7e41a20SJonathan Marek #interconnect-cells = <1>; 1158e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1159e7e41a20SJonathan Marek }; 1160e7e41a20SJonathan Marek 11616b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 1162b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 1163b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 1164b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 1165b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 1166b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 1167b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 1168b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 1169b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 1170b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 1171b7e2fba0SBryan O'Donoghue reset-names = "rst"; 1172b7e2fba0SBryan O'Donoghue 1173b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 1174b7e2fba0SBryan O'Donoghue 1175b7e2fba0SBryan O'Donoghue clock-names = 1176b7e2fba0SBryan O'Donoghue "core_clk", 1177b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 1178b7e2fba0SBryan O'Donoghue "iface_clk", 1179b7e2fba0SBryan O'Donoghue "core_clk_unipro", 1180b7e2fba0SBryan O'Donoghue "ref_clk", 1181b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 1182b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 1183b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 1184b7e2fba0SBryan O'Donoghue clocks = 1185b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 1186b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 1187b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 1188b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 1189b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 1190b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 1191b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 1192b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 1193b7e2fba0SBryan O'Donoghue freq-table-hz = 1194b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1195b7e2fba0SBryan O'Donoghue <0 0>, 1196b7e2fba0SBryan O'Donoghue <0 0>, 1197b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1198b7e2fba0SBryan O'Donoghue <0 0>, 1199b7e2fba0SBryan O'Donoghue <0 0>, 1200b7e2fba0SBryan O'Donoghue <0 0>, 1201b7e2fba0SBryan O'Donoghue <0 0>; 1202b7e2fba0SBryan O'Donoghue 1203b7e2fba0SBryan O'Donoghue status = "disabled"; 1204b7e2fba0SBryan O'Donoghue }; 1205b7e2fba0SBryan O'Donoghue 1206b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 1207b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 1208b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 1209b7e2fba0SBryan O'Donoghue #address-cells = <2>; 1210b7e2fba0SBryan O'Donoghue #size-cells = <2>; 1211b7e2fba0SBryan O'Donoghue ranges; 1212b7e2fba0SBryan O'Donoghue clock-names = "ref", 1213b7e2fba0SBryan O'Donoghue "ref_aux"; 1214b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 1215b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 1216b7e2fba0SBryan O'Donoghue 1217b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 1218b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 1219b7e2fba0SBryan O'Donoghue status = "disabled"; 1220b7e2fba0SBryan O'Donoghue 1221b7e2fba0SBryan O'Donoghue ufs_mem_phy_lanes: lanes@1d87400 { 1222b7e2fba0SBryan O'Donoghue reg = <0 0x01d87400 0 0x108>, 1223b7e2fba0SBryan O'Donoghue <0 0x01d87600 0 0x1e0>, 1224b7e2fba0SBryan O'Donoghue <0 0x01d87c00 0 0x1dc>, 1225b7e2fba0SBryan O'Donoghue <0 0x01d87800 0 0x108>, 1226b7e2fba0SBryan O'Donoghue <0 0x01d87a00 0 0x1e0>; 1227b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 1228b7e2fba0SBryan O'Donoghue }; 1229b7e2fba0SBryan O'Donoghue }; 1230b7e2fba0SBryan O'Donoghue 1231e7e41a20SJonathan Marek ipa_virt: interconnect@1e00000 { 1232e7e41a20SJonathan Marek compatible = "qcom,sm8250-ipa-virt"; 1233e7e41a20SJonathan Marek reg = <0 0x01e00000 0 0x1000>; 1234e7e41a20SJonathan Marek #interconnect-cells = <1>; 1235e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1236e7e41a20SJonathan Marek }; 1237e7e41a20SJonathan Marek 1238dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 1239dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 1240b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 1241dff0f49cSBjorn Andersson #hwlock-cells = <1>; 124260378f1aSVenkata Narendra Kumar Gutta }; 124360378f1aSVenkata Narendra Kumar Gutta 124404a3605bSJonathan Marek gpu: gpu@3d00000 { 124504a3605bSJonathan Marek /* 124604a3605bSJonathan Marek * note: the amd,imageon compatible makes it possible 124704a3605bSJonathan Marek * to use the drm/msm driver without the display node, 124804a3605bSJonathan Marek * make sure to remove it when display node is added 124904a3605bSJonathan Marek */ 125004a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 125104a3605bSJonathan Marek "qcom,adreno", 125204a3605bSJonathan Marek "amd,imageon"; 125304a3605bSJonathan Marek #stream-id-cells = <16>; 125404a3605bSJonathan Marek 125504a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 125604a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 125704a3605bSJonathan Marek 125804a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 125904a3605bSJonathan Marek 126004a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 126104a3605bSJonathan Marek 126204a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 126304a3605bSJonathan Marek 126404a3605bSJonathan Marek qcom,gmu = <&gmu>; 126504a3605bSJonathan Marek 126604a3605bSJonathan Marek zap-shader { 126704a3605bSJonathan Marek memory-region = <&gpu_mem>; 126804a3605bSJonathan Marek }; 126904a3605bSJonathan Marek 127004a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 127104a3605bSJonathan Marek gpu_opp_table: opp-table { 127204a3605bSJonathan Marek compatible = "operating-points-v2"; 127304a3605bSJonathan Marek 127404a3605bSJonathan Marek opp-670000000 { 127504a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 127604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 127704a3605bSJonathan Marek }; 127804a3605bSJonathan Marek 127904a3605bSJonathan Marek opp-587000000 { 128004a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 128104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 128204a3605bSJonathan Marek }; 128304a3605bSJonathan Marek 128404a3605bSJonathan Marek opp-525000000 { 128504a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 128604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 128704a3605bSJonathan Marek }; 128804a3605bSJonathan Marek 128904a3605bSJonathan Marek opp-490000000 { 129004a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 129104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 129204a3605bSJonathan Marek }; 129304a3605bSJonathan Marek 129404a3605bSJonathan Marek opp-441600000 { 129504a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 129604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 129704a3605bSJonathan Marek }; 129804a3605bSJonathan Marek 129904a3605bSJonathan Marek opp-400000000 { 130004a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 130104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 130204a3605bSJonathan Marek }; 130304a3605bSJonathan Marek 130404a3605bSJonathan Marek opp-305000000 { 130504a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 130604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 130704a3605bSJonathan Marek }; 130804a3605bSJonathan Marek }; 130904a3605bSJonathan Marek }; 131004a3605bSJonathan Marek 131104a3605bSJonathan Marek gmu: gmu@3d6a000 { 131204a3605bSJonathan Marek compatible="qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 131304a3605bSJonathan Marek 131404a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 131504a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 131604a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 131704a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 131804a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 131904a3605bSJonathan Marek 132004a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 132104a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 132204a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 132304a3605bSJonathan Marek 13240e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 13250e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 13260e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 132704a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 132804a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 132904a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 133004a3605bSJonathan Marek 13310e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 13320e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 133304a3605bSJonathan Marek power-domain-names = "cx", "gx"; 133404a3605bSJonathan Marek 133504a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 133604a3605bSJonathan Marek 133704a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 133804a3605bSJonathan Marek 133904a3605bSJonathan Marek gmu_opp_table: opp-table { 134004a3605bSJonathan Marek compatible = "operating-points-v2"; 134104a3605bSJonathan Marek 134204a3605bSJonathan Marek opp-200000000 { 134304a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 134404a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 134504a3605bSJonathan Marek }; 134604a3605bSJonathan Marek }; 134704a3605bSJonathan Marek }; 134804a3605bSJonathan Marek 134904a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 135004a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 135104a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 135204a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 135304a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 135404a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 135504a3605bSJonathan Marek clock-names = "bi_tcxo", 135604a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 135704a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 135804a3605bSJonathan Marek #clock-cells = <1>; 135904a3605bSJonathan Marek #reset-cells = <1>; 136004a3605bSJonathan Marek #power-domain-cells = <1>; 136104a3605bSJonathan Marek }; 136204a3605bSJonathan Marek 136304a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 136404a3605bSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 136504a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 136604a3605bSJonathan Marek #iommu-cells = <2>; 136704a3605bSJonathan Marek #global-interrupts = <2>; 136804a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 136904a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 137004a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 137104a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 137204a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 137304a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 137404a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 137504a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 137604a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 137704a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 13780e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 137904a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 138004a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 138104a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 138204a3605bSJonathan Marek 13830e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 138404a3605bSJonathan Marek }; 138504a3605bSJonathan Marek 138623a89037SBjorn Andersson slpi: remoteproc@5c00000 { 138723a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 138823a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 138923a89037SBjorn Andersson 139023a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 139123a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 139223a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 139323a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 139423a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 139523a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 139623a89037SBjorn Andersson "handover", "stop-ack"; 139723a89037SBjorn Andersson 139823a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 139923a89037SBjorn Andersson clock-names = "xo"; 140023a89037SBjorn Andersson 140123a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 140223a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 140323a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 140423a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 140523a89037SBjorn Andersson 140623a89037SBjorn Andersson memory-region = <&slpi_mem>; 140723a89037SBjorn Andersson 140823a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 140923a89037SBjorn Andersson qcom,smem-state-names = "stop"; 141023a89037SBjorn Andersson 141123a89037SBjorn Andersson status = "disabled"; 141223a89037SBjorn Andersson 141323a89037SBjorn Andersson glink-edge { 141423a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 141523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 141623a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 141723a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 141823a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 141923a89037SBjorn Andersson 142023a89037SBjorn Andersson label = "lpass"; 142123a89037SBjorn Andersson qcom,remote-pid = <3>; 142223a89037SBjorn Andersson }; 142323a89037SBjorn Andersson }; 142423a89037SBjorn Andersson 142523a89037SBjorn Andersson cdsp: remoteproc@8300000 { 142623a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 142723a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 142823a89037SBjorn Andersson 142923a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 143023a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 143123a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 143223a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 143323a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 143423a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 143523a89037SBjorn Andersson "handover", "stop-ack"; 143623a89037SBjorn Andersson 143723a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 143823a89037SBjorn Andersson clock-names = "xo"; 143923a89037SBjorn Andersson 144023a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 144123a89037SBjorn Andersson <&rpmhpd SM8250_CX>; 144223a89037SBjorn Andersson power-domain-names = "load_state", "cx"; 144323a89037SBjorn Andersson 144423a89037SBjorn Andersson memory-region = <&cdsp_mem>; 144523a89037SBjorn Andersson 144623a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 144723a89037SBjorn Andersson qcom,smem-state-names = "stop"; 144823a89037SBjorn Andersson 144923a89037SBjorn Andersson status = "disabled"; 145023a89037SBjorn Andersson 145123a89037SBjorn Andersson glink-edge { 145223a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 145323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 145423a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 145523a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 145623a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 145723a89037SBjorn Andersson 145823a89037SBjorn Andersson label = "lpass"; 145923a89037SBjorn Andersson qcom,remote-pid = <5>; 146023a89037SBjorn Andersson }; 146123a89037SBjorn Andersson }; 146223a89037SBjorn Andersson 1463e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 1464e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 1465e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 1466e7e41a20SJonathan Marek #interconnect-cells = <1>; 1467e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1468e7e41a20SJonathan Marek }; 1469e7e41a20SJonathan Marek 1470e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 1471e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 1472e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 1473e7e41a20SJonathan Marek #interconnect-cells = <1>; 1474e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1475e7e41a20SJonathan Marek }; 1476e7e41a20SJonathan Marek 1477e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 1478e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 1479e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 1480e7e41a20SJonathan Marek #interconnect-cells = <1>; 1481e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1482e7e41a20SJonathan Marek }; 1483e7e41a20SJonathan Marek 148460378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 148524003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 148624003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 148760378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 148860378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 148960378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 149060378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 149160378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 149260378f1aSVenkata Narendra Kumar Gutta }; 149360378f1aSVenkata Narendra Kumar Gutta 1494bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 1495bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 1496bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 1497bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 1498bac12f25SAmit Kucheria #qcom,sensors = <16>; 1499bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 1500bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 1501bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 1502bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 1503bac12f25SAmit Kucheria }; 1504bac12f25SAmit Kucheria 1505bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 1506bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 1507bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 1508bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 1509bac12f25SAmit Kucheria #qcom,sensors = <9>; 1510bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 1511bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 1512bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 1513bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 1514bac12f25SAmit Kucheria }; 1515bac12f25SAmit Kucheria 1516087d537aSBjorn Andersson aoss_qmp: qmp@c300000 { 1517087d537aSBjorn Andersson compatible = "qcom,sm8250-aoss-qmp"; 1518087d537aSBjorn Andersson reg = <0 0x0c300000 0 0x100000>; 1519087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 1520087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 1521087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 1522087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 1523087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 1524087d537aSBjorn Andersson 1525087d537aSBjorn Andersson #clock-cells = <0>; 1526087d537aSBjorn Andersson #power-domain-cells = <1>; 1527087d537aSBjorn Andersson }; 1528087d537aSBjorn Andersson 1529bccc7dd2SJonathan Marek spmi_bus: spmi@c440000 { 153060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 153160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 153260378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 153360378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e600000 0x0 0x0100000>, 153460378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e700000 0x0 0x00a0000>, 153560378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c40a000 0x0 0x0026000>; 153660378f1aSVenkata Narendra Kumar Gutta reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 153760378f1aSVenkata Narendra Kumar Gutta interrupt-names = "periph_irq"; 153860378f1aSVenkata Narendra Kumar Gutta interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 153960378f1aSVenkata Narendra Kumar Gutta qcom,ee = <0>; 154060378f1aSVenkata Narendra Kumar Gutta qcom,channel = <0>; 154160378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 154260378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 154360378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 154460378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <4>; 154560378f1aSVenkata Narendra Kumar Gutta }; 154660378f1aSVenkata Narendra Kumar Gutta 154716951b49SBjorn Andersson tlmm: pinctrl@f100000 { 154816951b49SBjorn Andersson compatible = "qcom,sm8250-pinctrl"; 154916951b49SBjorn Andersson reg = <0 0x0f100000 0 0x300000>, 155016951b49SBjorn Andersson <0 0x0f500000 0 0x300000>, 155116951b49SBjorn Andersson <0 0x0f900000 0 0x300000>; 155216951b49SBjorn Andersson reg-names = "west", "south", "north"; 155316951b49SBjorn Andersson interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 155416951b49SBjorn Andersson gpio-controller; 155516951b49SBjorn Andersson #gpio-cells = <2>; 155616951b49SBjorn Andersson interrupt-controller; 155716951b49SBjorn Andersson #interrupt-cells = <2>; 155816951b49SBjorn Andersson gpio-ranges = <&tlmm 0 0 180>; 155916951b49SBjorn Andersson wakeup-parent = <&pdc>; 1560e5813b15SDmitry Baryshkov 1561e5813b15SDmitry Baryshkov qup_i2c0_default: qup-i2c0-default { 1562e5813b15SDmitry Baryshkov mux { 1563e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 1564e5813b15SDmitry Baryshkov function = "qup0"; 1565e5813b15SDmitry Baryshkov }; 1566e5813b15SDmitry Baryshkov 1567e5813b15SDmitry Baryshkov config { 1568e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 1569e5813b15SDmitry Baryshkov drive-strength = <2>; 1570e5813b15SDmitry Baryshkov bias-disable; 1571e5813b15SDmitry Baryshkov }; 1572e5813b15SDmitry Baryshkov }; 1573e5813b15SDmitry Baryshkov 1574e5813b15SDmitry Baryshkov qup_i2c1_default: qup-i2c1-default { 1575e5813b15SDmitry Baryshkov pinmux { 1576e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 1577e5813b15SDmitry Baryshkov function = "qup1"; 1578e5813b15SDmitry Baryshkov }; 1579e5813b15SDmitry Baryshkov 1580e5813b15SDmitry Baryshkov config { 1581e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 1582e5813b15SDmitry Baryshkov drive-strength = <2>; 1583e5813b15SDmitry Baryshkov bias-disable; 1584e5813b15SDmitry Baryshkov }; 1585e5813b15SDmitry Baryshkov }; 1586e5813b15SDmitry Baryshkov 1587e5813b15SDmitry Baryshkov qup_i2c2_default: qup-i2c2-default { 1588e5813b15SDmitry Baryshkov mux { 1589e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 1590e5813b15SDmitry Baryshkov function = "qup2"; 1591e5813b15SDmitry Baryshkov }; 1592e5813b15SDmitry Baryshkov 1593e5813b15SDmitry Baryshkov config { 1594e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 1595e5813b15SDmitry Baryshkov drive-strength = <2>; 1596e5813b15SDmitry Baryshkov bias-disable; 1597e5813b15SDmitry Baryshkov }; 1598e5813b15SDmitry Baryshkov }; 1599e5813b15SDmitry Baryshkov 1600e5813b15SDmitry Baryshkov qup_i2c3_default: qup-i2c3-default { 1601e5813b15SDmitry Baryshkov mux { 1602e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 1603e5813b15SDmitry Baryshkov function = "qup3"; 1604e5813b15SDmitry Baryshkov }; 1605e5813b15SDmitry Baryshkov 1606e5813b15SDmitry Baryshkov config { 1607e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 1608e5813b15SDmitry Baryshkov drive-strength = <2>; 1609e5813b15SDmitry Baryshkov bias-disable; 1610e5813b15SDmitry Baryshkov }; 1611e5813b15SDmitry Baryshkov }; 1612e5813b15SDmitry Baryshkov 1613e5813b15SDmitry Baryshkov qup_i2c4_default: qup-i2c4-default { 1614e5813b15SDmitry Baryshkov mux { 1615e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 1616e5813b15SDmitry Baryshkov function = "qup4"; 1617e5813b15SDmitry Baryshkov }; 1618e5813b15SDmitry Baryshkov 1619e5813b15SDmitry Baryshkov config { 1620e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 1621e5813b15SDmitry Baryshkov drive-strength = <2>; 1622e5813b15SDmitry Baryshkov bias-disable; 1623e5813b15SDmitry Baryshkov }; 1624e5813b15SDmitry Baryshkov }; 1625e5813b15SDmitry Baryshkov 1626e5813b15SDmitry Baryshkov qup_i2c5_default: qup-i2c5-default { 1627e5813b15SDmitry Baryshkov mux { 1628e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 1629e5813b15SDmitry Baryshkov function = "qup5"; 1630e5813b15SDmitry Baryshkov }; 1631e5813b15SDmitry Baryshkov 1632e5813b15SDmitry Baryshkov config { 1633e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 1634e5813b15SDmitry Baryshkov drive-strength = <2>; 1635e5813b15SDmitry Baryshkov bias-disable; 1636e5813b15SDmitry Baryshkov }; 1637e5813b15SDmitry Baryshkov }; 1638e5813b15SDmitry Baryshkov 1639e5813b15SDmitry Baryshkov qup_i2c6_default: qup-i2c6-default { 1640e5813b15SDmitry Baryshkov mux { 1641e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 1642e5813b15SDmitry Baryshkov function = "qup6"; 1643e5813b15SDmitry Baryshkov }; 1644e5813b15SDmitry Baryshkov 1645e5813b15SDmitry Baryshkov config { 1646e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 1647e5813b15SDmitry Baryshkov drive-strength = <2>; 1648e5813b15SDmitry Baryshkov bias-disable; 1649e5813b15SDmitry Baryshkov }; 1650e5813b15SDmitry Baryshkov }; 1651e5813b15SDmitry Baryshkov 1652e5813b15SDmitry Baryshkov qup_i2c7_default: qup-i2c7-default { 1653e5813b15SDmitry Baryshkov mux { 1654e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 1655e5813b15SDmitry Baryshkov function = "qup7"; 1656e5813b15SDmitry Baryshkov }; 1657e5813b15SDmitry Baryshkov 1658e5813b15SDmitry Baryshkov config { 1659e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 1660e5813b15SDmitry Baryshkov drive-strength = <2>; 1661e5813b15SDmitry Baryshkov bias-disable; 1662e5813b15SDmitry Baryshkov }; 1663e5813b15SDmitry Baryshkov }; 1664e5813b15SDmitry Baryshkov 1665e5813b15SDmitry Baryshkov qup_i2c8_default: qup-i2c8-default { 1666e5813b15SDmitry Baryshkov mux { 1667e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 1668e5813b15SDmitry Baryshkov function = "qup8"; 1669e5813b15SDmitry Baryshkov }; 1670e5813b15SDmitry Baryshkov 1671e5813b15SDmitry Baryshkov config { 1672e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 1673e5813b15SDmitry Baryshkov drive-strength = <2>; 1674e5813b15SDmitry Baryshkov bias-disable; 1675e5813b15SDmitry Baryshkov }; 1676e5813b15SDmitry Baryshkov }; 1677e5813b15SDmitry Baryshkov 1678e5813b15SDmitry Baryshkov qup_i2c9_default: qup-i2c9-default { 1679e5813b15SDmitry Baryshkov mux { 1680e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 1681e5813b15SDmitry Baryshkov function = "qup9"; 1682e5813b15SDmitry Baryshkov }; 1683e5813b15SDmitry Baryshkov 1684e5813b15SDmitry Baryshkov config { 1685e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 1686e5813b15SDmitry Baryshkov drive-strength = <2>; 1687e5813b15SDmitry Baryshkov bias-disable; 1688e5813b15SDmitry Baryshkov }; 1689e5813b15SDmitry Baryshkov }; 1690e5813b15SDmitry Baryshkov 1691e5813b15SDmitry Baryshkov qup_i2c10_default: qup-i2c10-default { 1692e5813b15SDmitry Baryshkov mux { 1693e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 1694e5813b15SDmitry Baryshkov function = "qup10"; 1695e5813b15SDmitry Baryshkov }; 1696e5813b15SDmitry Baryshkov 1697e5813b15SDmitry Baryshkov config { 1698e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 1699e5813b15SDmitry Baryshkov drive-strength = <2>; 1700e5813b15SDmitry Baryshkov bias-disable; 1701e5813b15SDmitry Baryshkov }; 1702e5813b15SDmitry Baryshkov }; 1703e5813b15SDmitry Baryshkov 1704e5813b15SDmitry Baryshkov qup_i2c11_default: qup-i2c11-default { 1705e5813b15SDmitry Baryshkov mux { 1706e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 1707e5813b15SDmitry Baryshkov function = "qup11"; 1708e5813b15SDmitry Baryshkov }; 1709e5813b15SDmitry Baryshkov 1710e5813b15SDmitry Baryshkov config { 1711e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 1712e5813b15SDmitry Baryshkov drive-strength = <2>; 1713e5813b15SDmitry Baryshkov bias-disable; 1714e5813b15SDmitry Baryshkov }; 1715e5813b15SDmitry Baryshkov }; 1716e5813b15SDmitry Baryshkov 1717e5813b15SDmitry Baryshkov qup_i2c12_default: qup-i2c12-default { 1718e5813b15SDmitry Baryshkov mux { 1719e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 1720e5813b15SDmitry Baryshkov function = "qup12"; 1721e5813b15SDmitry Baryshkov }; 1722e5813b15SDmitry Baryshkov 1723e5813b15SDmitry Baryshkov config { 1724e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 1725e5813b15SDmitry Baryshkov drive-strength = <2>; 1726e5813b15SDmitry Baryshkov bias-disable; 1727e5813b15SDmitry Baryshkov }; 1728e5813b15SDmitry Baryshkov }; 1729e5813b15SDmitry Baryshkov 1730e5813b15SDmitry Baryshkov qup_i2c13_default: qup-i2c13-default { 1731e5813b15SDmitry Baryshkov mux { 1732e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 1733e5813b15SDmitry Baryshkov function = "qup13"; 1734e5813b15SDmitry Baryshkov }; 1735e5813b15SDmitry Baryshkov 1736e5813b15SDmitry Baryshkov config { 1737e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 1738e5813b15SDmitry Baryshkov drive-strength = <2>; 1739e5813b15SDmitry Baryshkov bias-disable; 1740e5813b15SDmitry Baryshkov }; 1741e5813b15SDmitry Baryshkov }; 1742e5813b15SDmitry Baryshkov 1743e5813b15SDmitry Baryshkov qup_i2c14_default: qup-i2c14-default { 1744e5813b15SDmitry Baryshkov mux { 1745e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 1746e5813b15SDmitry Baryshkov function = "qup14"; 1747e5813b15SDmitry Baryshkov }; 1748e5813b15SDmitry Baryshkov 1749e5813b15SDmitry Baryshkov config { 1750e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 1751e5813b15SDmitry Baryshkov drive-strength = <2>; 1752e5813b15SDmitry Baryshkov bias-disable; 1753e5813b15SDmitry Baryshkov }; 1754e5813b15SDmitry Baryshkov }; 1755e5813b15SDmitry Baryshkov 1756e5813b15SDmitry Baryshkov qup_i2c15_default: qup-i2c15-default { 1757e5813b15SDmitry Baryshkov mux { 1758e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 1759e5813b15SDmitry Baryshkov function = "qup15"; 1760e5813b15SDmitry Baryshkov }; 1761e5813b15SDmitry Baryshkov 1762e5813b15SDmitry Baryshkov config { 1763e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 1764e5813b15SDmitry Baryshkov drive-strength = <2>; 1765e5813b15SDmitry Baryshkov bias-disable; 1766e5813b15SDmitry Baryshkov }; 1767e5813b15SDmitry Baryshkov }; 1768e5813b15SDmitry Baryshkov 1769e5813b15SDmitry Baryshkov qup_i2c16_default: qup-i2c16-default { 1770e5813b15SDmitry Baryshkov mux { 1771e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 1772e5813b15SDmitry Baryshkov function = "qup16"; 1773e5813b15SDmitry Baryshkov }; 1774e5813b15SDmitry Baryshkov 1775e5813b15SDmitry Baryshkov config { 1776e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 1777e5813b15SDmitry Baryshkov drive-strength = <2>; 1778e5813b15SDmitry Baryshkov bias-disable; 1779e5813b15SDmitry Baryshkov }; 1780e5813b15SDmitry Baryshkov }; 1781e5813b15SDmitry Baryshkov 1782e5813b15SDmitry Baryshkov qup_i2c17_default: qup-i2c17-default { 1783e5813b15SDmitry Baryshkov mux { 1784e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 1785e5813b15SDmitry Baryshkov function = "qup17"; 1786e5813b15SDmitry Baryshkov }; 1787e5813b15SDmitry Baryshkov 1788e5813b15SDmitry Baryshkov config { 1789e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 1790e5813b15SDmitry Baryshkov drive-strength = <2>; 1791e5813b15SDmitry Baryshkov bias-disable; 1792e5813b15SDmitry Baryshkov }; 1793e5813b15SDmitry Baryshkov }; 1794e5813b15SDmitry Baryshkov 1795e5813b15SDmitry Baryshkov qup_i2c18_default: qup-i2c18-default { 1796e5813b15SDmitry Baryshkov mux { 1797e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 1798e5813b15SDmitry Baryshkov function = "qup18"; 1799e5813b15SDmitry Baryshkov }; 1800e5813b15SDmitry Baryshkov 1801e5813b15SDmitry Baryshkov config { 1802e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 1803e5813b15SDmitry Baryshkov drive-strength = <2>; 1804e5813b15SDmitry Baryshkov bias-disable; 1805e5813b15SDmitry Baryshkov }; 1806e5813b15SDmitry Baryshkov }; 1807e5813b15SDmitry Baryshkov 1808e5813b15SDmitry Baryshkov qup_i2c19_default: qup-i2c19-default { 1809e5813b15SDmitry Baryshkov mux { 1810e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 1811e5813b15SDmitry Baryshkov function = "qup19"; 1812e5813b15SDmitry Baryshkov }; 1813e5813b15SDmitry Baryshkov 1814e5813b15SDmitry Baryshkov config { 1815e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 1816e5813b15SDmitry Baryshkov drive-strength = <2>; 1817e5813b15SDmitry Baryshkov bias-disable; 1818e5813b15SDmitry Baryshkov }; 1819e5813b15SDmitry Baryshkov }; 1820e5813b15SDmitry Baryshkov 1821e5813b15SDmitry Baryshkov qup_spi0_default: qup-spi0-default { 1822e5813b15SDmitry Baryshkov mux { 1823e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 1824e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 1825e5813b15SDmitry Baryshkov function = "qup0"; 1826e5813b15SDmitry Baryshkov }; 1827e5813b15SDmitry Baryshkov 1828e5813b15SDmitry Baryshkov config { 1829e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 1830e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 1831e5813b15SDmitry Baryshkov drive-strength = <6>; 1832e5813b15SDmitry Baryshkov bias-disable; 1833e5813b15SDmitry Baryshkov }; 1834e5813b15SDmitry Baryshkov }; 1835e5813b15SDmitry Baryshkov 1836e5813b15SDmitry Baryshkov qup_spi1_default: qup-spi1-default { 1837e5813b15SDmitry Baryshkov mux { 1838e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 1839e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 1840e5813b15SDmitry Baryshkov function = "qup1"; 1841e5813b15SDmitry Baryshkov }; 1842e5813b15SDmitry Baryshkov 1843e5813b15SDmitry Baryshkov config { 1844e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 1845e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 1846e5813b15SDmitry Baryshkov drive-strength = <6>; 1847e5813b15SDmitry Baryshkov bias-disable; 1848e5813b15SDmitry Baryshkov }; 1849e5813b15SDmitry Baryshkov }; 1850e5813b15SDmitry Baryshkov 1851e5813b15SDmitry Baryshkov qup_spi2_default: qup-spi2-default { 1852e5813b15SDmitry Baryshkov mux { 1853e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 1854e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 1855e5813b15SDmitry Baryshkov function = "qup2"; 1856e5813b15SDmitry Baryshkov }; 1857e5813b15SDmitry Baryshkov 1858e5813b15SDmitry Baryshkov config { 1859e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 1860e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 1861e5813b15SDmitry Baryshkov drive-strength = <6>; 1862e5813b15SDmitry Baryshkov bias-disable; 1863e5813b15SDmitry Baryshkov }; 1864e5813b15SDmitry Baryshkov }; 1865e5813b15SDmitry Baryshkov 1866e5813b15SDmitry Baryshkov qup_spi3_default: qup-spi3-default { 1867e5813b15SDmitry Baryshkov mux { 1868e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 1869e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 1870e5813b15SDmitry Baryshkov function = "qup3"; 1871e5813b15SDmitry Baryshkov }; 1872e5813b15SDmitry Baryshkov 1873e5813b15SDmitry Baryshkov config { 1874e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 1875e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 1876e5813b15SDmitry Baryshkov drive-strength = <6>; 1877e5813b15SDmitry Baryshkov bias-disable; 1878e5813b15SDmitry Baryshkov }; 1879e5813b15SDmitry Baryshkov }; 1880e5813b15SDmitry Baryshkov 1881e5813b15SDmitry Baryshkov qup_spi4_default: qup-spi4-default { 1882e5813b15SDmitry Baryshkov mux { 1883e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 1884e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 1885e5813b15SDmitry Baryshkov function = "qup4"; 1886e5813b15SDmitry Baryshkov }; 1887e5813b15SDmitry Baryshkov 1888e5813b15SDmitry Baryshkov config { 1889e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 1890e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 1891e5813b15SDmitry Baryshkov drive-strength = <6>; 1892e5813b15SDmitry Baryshkov bias-disable; 1893e5813b15SDmitry Baryshkov }; 1894e5813b15SDmitry Baryshkov }; 1895e5813b15SDmitry Baryshkov 1896e5813b15SDmitry Baryshkov qup_spi5_default: qup-spi5-default { 1897e5813b15SDmitry Baryshkov mux { 1898e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 1899e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 1900e5813b15SDmitry Baryshkov function = "qup5"; 1901e5813b15SDmitry Baryshkov }; 1902e5813b15SDmitry Baryshkov 1903e5813b15SDmitry Baryshkov config { 1904e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 1905e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 1906e5813b15SDmitry Baryshkov drive-strength = <6>; 1907e5813b15SDmitry Baryshkov bias-disable; 1908e5813b15SDmitry Baryshkov }; 1909e5813b15SDmitry Baryshkov }; 1910e5813b15SDmitry Baryshkov 1911e5813b15SDmitry Baryshkov qup_spi6_default: qup-spi6-default { 1912e5813b15SDmitry Baryshkov mux { 1913e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 1914e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 1915e5813b15SDmitry Baryshkov function = "qup6"; 1916e5813b15SDmitry Baryshkov }; 1917e5813b15SDmitry Baryshkov 1918e5813b15SDmitry Baryshkov config { 1919e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 1920e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 1921e5813b15SDmitry Baryshkov drive-strength = <6>; 1922e5813b15SDmitry Baryshkov bias-disable; 1923e5813b15SDmitry Baryshkov }; 1924e5813b15SDmitry Baryshkov }; 1925e5813b15SDmitry Baryshkov 1926e5813b15SDmitry Baryshkov qup_spi7_default: qup-spi7-default { 1927e5813b15SDmitry Baryshkov mux { 1928e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 1929e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 1930e5813b15SDmitry Baryshkov function = "qup7"; 1931e5813b15SDmitry Baryshkov }; 1932e5813b15SDmitry Baryshkov 1933e5813b15SDmitry Baryshkov config { 1934e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 1935e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 1936e5813b15SDmitry Baryshkov drive-strength = <6>; 1937e5813b15SDmitry Baryshkov bias-disable; 1938e5813b15SDmitry Baryshkov }; 1939e5813b15SDmitry Baryshkov }; 1940e5813b15SDmitry Baryshkov 1941e5813b15SDmitry Baryshkov qup_spi8_default: qup-spi8-default { 1942e5813b15SDmitry Baryshkov mux { 1943e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 1944e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 1945e5813b15SDmitry Baryshkov function = "qup8"; 1946e5813b15SDmitry Baryshkov }; 1947e5813b15SDmitry Baryshkov 1948e5813b15SDmitry Baryshkov config { 1949e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 1950e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 1951e5813b15SDmitry Baryshkov drive-strength = <6>; 1952e5813b15SDmitry Baryshkov bias-disable; 1953e5813b15SDmitry Baryshkov }; 1954e5813b15SDmitry Baryshkov }; 1955e5813b15SDmitry Baryshkov 1956e5813b15SDmitry Baryshkov qup_spi9_default: qup-spi9-default { 1957e5813b15SDmitry Baryshkov mux { 1958e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 1959e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 1960e5813b15SDmitry Baryshkov function = "qup9"; 1961e5813b15SDmitry Baryshkov }; 1962e5813b15SDmitry Baryshkov 1963e5813b15SDmitry Baryshkov config { 1964e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 1965e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 1966e5813b15SDmitry Baryshkov drive-strength = <6>; 1967e5813b15SDmitry Baryshkov bias-disable; 1968e5813b15SDmitry Baryshkov }; 1969e5813b15SDmitry Baryshkov }; 1970e5813b15SDmitry Baryshkov 1971e5813b15SDmitry Baryshkov qup_spi10_default: qup-spi10-default { 1972e5813b15SDmitry Baryshkov mux { 1973e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 1974e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 1975e5813b15SDmitry Baryshkov function = "qup10"; 1976e5813b15SDmitry Baryshkov }; 1977e5813b15SDmitry Baryshkov 1978e5813b15SDmitry Baryshkov config { 1979e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 1980e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 1981e5813b15SDmitry Baryshkov drive-strength = <6>; 1982e5813b15SDmitry Baryshkov bias-disable; 1983e5813b15SDmitry Baryshkov }; 1984e5813b15SDmitry Baryshkov }; 1985e5813b15SDmitry Baryshkov 1986e5813b15SDmitry Baryshkov qup_spi11_default: qup-spi11-default { 1987e5813b15SDmitry Baryshkov mux { 1988e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 1989e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 1990e5813b15SDmitry Baryshkov function = "qup11"; 1991e5813b15SDmitry Baryshkov }; 1992e5813b15SDmitry Baryshkov 1993e5813b15SDmitry Baryshkov config { 1994e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 1995e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 1996e5813b15SDmitry Baryshkov drive-strength = <6>; 1997e5813b15SDmitry Baryshkov bias-disable; 1998e5813b15SDmitry Baryshkov }; 1999e5813b15SDmitry Baryshkov }; 2000e5813b15SDmitry Baryshkov 2001e5813b15SDmitry Baryshkov qup_spi12_default: qup-spi12-default { 2002e5813b15SDmitry Baryshkov mux { 2003e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2004e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2005e5813b15SDmitry Baryshkov function = "qup12"; 2006e5813b15SDmitry Baryshkov }; 2007e5813b15SDmitry Baryshkov 2008e5813b15SDmitry Baryshkov config { 2009e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2010e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2011e5813b15SDmitry Baryshkov drive-strength = <6>; 2012e5813b15SDmitry Baryshkov bias-disable; 2013e5813b15SDmitry Baryshkov }; 2014e5813b15SDmitry Baryshkov }; 2015e5813b15SDmitry Baryshkov 2016e5813b15SDmitry Baryshkov qup_spi13_default: qup-spi13-default { 2017e5813b15SDmitry Baryshkov mux { 2018e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2019e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2020e5813b15SDmitry Baryshkov function = "qup13"; 2021e5813b15SDmitry Baryshkov }; 2022e5813b15SDmitry Baryshkov 2023e5813b15SDmitry Baryshkov config { 2024e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2025e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2026e5813b15SDmitry Baryshkov drive-strength = <6>; 2027e5813b15SDmitry Baryshkov bias-disable; 2028e5813b15SDmitry Baryshkov }; 2029e5813b15SDmitry Baryshkov }; 2030e5813b15SDmitry Baryshkov 2031e5813b15SDmitry Baryshkov qup_spi14_default: qup-spi14-default { 2032e5813b15SDmitry Baryshkov mux { 2033e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2034e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2035e5813b15SDmitry Baryshkov function = "qup14"; 2036e5813b15SDmitry Baryshkov }; 2037e5813b15SDmitry Baryshkov 2038e5813b15SDmitry Baryshkov config { 2039e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2040e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2041e5813b15SDmitry Baryshkov drive-strength = <6>; 2042e5813b15SDmitry Baryshkov bias-disable; 2043e5813b15SDmitry Baryshkov }; 2044e5813b15SDmitry Baryshkov }; 2045e5813b15SDmitry Baryshkov 2046e5813b15SDmitry Baryshkov qup_spi15_default: qup-spi15-default { 2047e5813b15SDmitry Baryshkov mux { 2048e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2049e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2050e5813b15SDmitry Baryshkov function = "qup15"; 2051e5813b15SDmitry Baryshkov }; 2052e5813b15SDmitry Baryshkov 2053e5813b15SDmitry Baryshkov config { 2054e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2055e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2056e5813b15SDmitry Baryshkov drive-strength = <6>; 2057e5813b15SDmitry Baryshkov bias-disable; 2058e5813b15SDmitry Baryshkov }; 2059e5813b15SDmitry Baryshkov }; 2060e5813b15SDmitry Baryshkov 2061e5813b15SDmitry Baryshkov qup_spi16_default: qup-spi16-default { 2062e5813b15SDmitry Baryshkov mux { 2063e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2064e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2065e5813b15SDmitry Baryshkov function = "qup16"; 2066e5813b15SDmitry Baryshkov }; 2067e5813b15SDmitry Baryshkov 2068e5813b15SDmitry Baryshkov config { 2069e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2070e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2071e5813b15SDmitry Baryshkov drive-strength = <6>; 2072e5813b15SDmitry Baryshkov bias-disable; 2073e5813b15SDmitry Baryshkov }; 2074e5813b15SDmitry Baryshkov }; 2075e5813b15SDmitry Baryshkov 2076e5813b15SDmitry Baryshkov qup_spi17_default: qup-spi17-default { 2077e5813b15SDmitry Baryshkov mux { 2078e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2079e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2080e5813b15SDmitry Baryshkov function = "qup17"; 2081e5813b15SDmitry Baryshkov }; 2082e5813b15SDmitry Baryshkov 2083e5813b15SDmitry Baryshkov config { 2084e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2085e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2086e5813b15SDmitry Baryshkov drive-strength = <6>; 2087e5813b15SDmitry Baryshkov bias-disable; 2088e5813b15SDmitry Baryshkov }; 2089e5813b15SDmitry Baryshkov }; 2090e5813b15SDmitry Baryshkov 2091e5813b15SDmitry Baryshkov qup_spi18_default: qup-spi18-default { 2092e5813b15SDmitry Baryshkov mux { 2093e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2094e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2095e5813b15SDmitry Baryshkov function = "qup18"; 2096e5813b15SDmitry Baryshkov }; 2097e5813b15SDmitry Baryshkov 2098e5813b15SDmitry Baryshkov config { 2099e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2100e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2101e5813b15SDmitry Baryshkov drive-strength = <6>; 2102e5813b15SDmitry Baryshkov bias-disable; 2103e5813b15SDmitry Baryshkov }; 2104e5813b15SDmitry Baryshkov }; 2105e5813b15SDmitry Baryshkov 2106e5813b15SDmitry Baryshkov qup_spi19_default: qup-spi19-default { 2107e5813b15SDmitry Baryshkov mux { 2108e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2109e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2110e5813b15SDmitry Baryshkov function = "qup19"; 2111e5813b15SDmitry Baryshkov }; 2112e5813b15SDmitry Baryshkov 2113e5813b15SDmitry Baryshkov config { 2114e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2115e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2116e5813b15SDmitry Baryshkov drive-strength = <6>; 2117e5813b15SDmitry Baryshkov bias-disable; 2118e5813b15SDmitry Baryshkov }; 2119e5813b15SDmitry Baryshkov }; 2120bb1dfb4dSManivannan Sadhasivam 212108a9ae2dSDmitry Baryshkov qup_uart2_default: qup-uart2-default { 212208a9ae2dSDmitry Baryshkov mux { 212308a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 212408a9ae2dSDmitry Baryshkov function = "qup2"; 212508a9ae2dSDmitry Baryshkov }; 212608a9ae2dSDmitry Baryshkov }; 212708a9ae2dSDmitry Baryshkov 212808a9ae2dSDmitry Baryshkov qup_uart6_default: qup-uart6-default { 212908a9ae2dSDmitry Baryshkov mux { 213008a9ae2dSDmitry Baryshkov pins = "gpio16", "gpio17", 213108a9ae2dSDmitry Baryshkov "gpio18", "gpio19"; 213208a9ae2dSDmitry Baryshkov function = "qup6"; 213308a9ae2dSDmitry Baryshkov }; 213408a9ae2dSDmitry Baryshkov }; 213508a9ae2dSDmitry Baryshkov 2136bb1dfb4dSManivannan Sadhasivam qup_uart12_default: qup-uart12-default { 2137bb1dfb4dSManivannan Sadhasivam mux { 2138bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 2139bb1dfb4dSManivannan Sadhasivam function = "qup12"; 2140bb1dfb4dSManivannan Sadhasivam }; 2141bb1dfb4dSManivannan Sadhasivam }; 214208a9ae2dSDmitry Baryshkov 214308a9ae2dSDmitry Baryshkov qup_uart17_default: qup-uart17-default { 214408a9ae2dSDmitry Baryshkov mux { 214508a9ae2dSDmitry Baryshkov pins = "gpio52", "gpio53", 214608a9ae2dSDmitry Baryshkov "gpio54", "gpio55"; 214708a9ae2dSDmitry Baryshkov function = "qup17"; 214808a9ae2dSDmitry Baryshkov }; 214908a9ae2dSDmitry Baryshkov }; 215008a9ae2dSDmitry Baryshkov 215108a9ae2dSDmitry Baryshkov qup_uart18_default: qup-uart18-default { 215208a9ae2dSDmitry Baryshkov mux { 215308a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 215408a9ae2dSDmitry Baryshkov function = "qup18"; 215508a9ae2dSDmitry Baryshkov }; 215608a9ae2dSDmitry Baryshkov }; 215716951b49SBjorn Andersson }; 215816951b49SBjorn Andersson 215923a89037SBjorn Andersson adsp: remoteproc@17300000 { 216023a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 216123a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 216223a89037SBjorn Andersson 216323a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 216423a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 216523a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 216623a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 216723a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 216823a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 216923a89037SBjorn Andersson "handover", "stop-ack"; 217023a89037SBjorn Andersson 217123a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 217223a89037SBjorn Andersson clock-names = "xo"; 217323a89037SBjorn Andersson 217423a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 217523a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 217623a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 217723a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 217823a89037SBjorn Andersson 217923a89037SBjorn Andersson memory-region = <&adsp_mem>; 218023a89037SBjorn Andersson 218123a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 218223a89037SBjorn Andersson qcom,smem-state-names = "stop"; 218323a89037SBjorn Andersson 218423a89037SBjorn Andersson status = "disabled"; 218523a89037SBjorn Andersson 218623a89037SBjorn Andersson glink-edge { 218723a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 218823a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 218923a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 219023a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 219123a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 219223a89037SBjorn Andersson 219323a89037SBjorn Andersson label = "lpass"; 219423a89037SBjorn Andersson qcom,remote-pid = <2>; 219523a89037SBjorn Andersson }; 219623a89037SBjorn Andersson }; 219723a89037SBjorn Andersson 2198b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 2199b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 2200b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 2201b9ec8cbcSJonathan Marek interrupt-controller; 2202b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 2203b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 2204b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2205b9ec8cbcSJonathan Marek }; 2206b9ec8cbcSJonathan Marek 2207e0d9acceSDmitry Baryshkov watchdog@17c10000 { 2208e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 2209e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 2210e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 2211e0d9acceSDmitry Baryshkov }; 2212e0d9acceSDmitry Baryshkov 2213b9ec8cbcSJonathan Marek timer@17c20000 { 2214b9ec8cbcSJonathan Marek #address-cells = <2>; 2215b9ec8cbcSJonathan Marek #size-cells = <2>; 2216b9ec8cbcSJonathan Marek ranges; 2217b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 2218b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 2219b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 2220b9ec8cbcSJonathan Marek 2221b9ec8cbcSJonathan Marek frame@17c21000 { 2222b9ec8cbcSJonathan Marek frame-number = <0>; 2223b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 2224b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 2225b9ec8cbcSJonathan Marek reg = <0x0 0x17c21000 0x0 0x1000>, 2226b9ec8cbcSJonathan Marek <0x0 0x17c22000 0x0 0x1000>; 2227b9ec8cbcSJonathan Marek }; 2228b9ec8cbcSJonathan Marek 2229b9ec8cbcSJonathan Marek frame@17c23000 { 2230b9ec8cbcSJonathan Marek frame-number = <1>; 2231b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 2232b9ec8cbcSJonathan Marek reg = <0x0 0x17c23000 0x0 0x1000>; 2233b9ec8cbcSJonathan Marek status = "disabled"; 2234b9ec8cbcSJonathan Marek }; 2235b9ec8cbcSJonathan Marek 2236b9ec8cbcSJonathan Marek frame@17c25000 { 2237b9ec8cbcSJonathan Marek frame-number = <2>; 2238b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 2239b9ec8cbcSJonathan Marek reg = <0x0 0x17c25000 0x0 0x1000>; 2240b9ec8cbcSJonathan Marek status = "disabled"; 2241b9ec8cbcSJonathan Marek }; 2242b9ec8cbcSJonathan Marek 2243b9ec8cbcSJonathan Marek frame@17c27000 { 2244b9ec8cbcSJonathan Marek frame-number = <3>; 2245b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 2246b9ec8cbcSJonathan Marek reg = <0x0 0x17c27000 0x0 0x1000>; 2247b9ec8cbcSJonathan Marek status = "disabled"; 2248b9ec8cbcSJonathan Marek }; 2249b9ec8cbcSJonathan Marek 2250b9ec8cbcSJonathan Marek frame@17c29000 { 2251b9ec8cbcSJonathan Marek frame-number = <4>; 2252b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 2253b9ec8cbcSJonathan Marek reg = <0x0 0x17c29000 0x0 0x1000>; 2254b9ec8cbcSJonathan Marek status = "disabled"; 2255b9ec8cbcSJonathan Marek }; 2256b9ec8cbcSJonathan Marek 2257b9ec8cbcSJonathan Marek frame@17c2b000 { 2258b9ec8cbcSJonathan Marek frame-number = <5>; 2259b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 2260b9ec8cbcSJonathan Marek reg = <0x0 0x17c2b000 0x0 0x1000>; 2261b9ec8cbcSJonathan Marek status = "disabled"; 2262b9ec8cbcSJonathan Marek }; 2263b9ec8cbcSJonathan Marek 2264b9ec8cbcSJonathan Marek frame@17c2d000 { 2265b9ec8cbcSJonathan Marek frame-number = <6>; 2266b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 2267b9ec8cbcSJonathan Marek reg = <0x0 0x17c2d000 0x0 0x1000>; 2268b9ec8cbcSJonathan Marek status = "disabled"; 2269b9ec8cbcSJonathan Marek }; 2270b9ec8cbcSJonathan Marek }; 2271b9ec8cbcSJonathan Marek 227260378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 227360378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 227460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 227560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 227660378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 227760378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 227860378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 227960378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 228060378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 228160378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 228260378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 228360378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 228460378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 228560378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 228660378f1aSVenkata Narendra Kumar Gutta 228760378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 228860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 228960378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 229060378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 229160378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 229260378f1aSVenkata Narendra Kumar Gutta }; 2293b6f78e27SBjorn Andersson 2294b6f78e27SBjorn Andersson rpmhpd: power-controller { 2295b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 2296b6f78e27SBjorn Andersson #power-domain-cells = <1>; 2297b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 2298b6f78e27SBjorn Andersson 2299b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 2300b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 2301b6f78e27SBjorn Andersson 2302b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 2303b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 2304b6f78e27SBjorn Andersson }; 2305b6f78e27SBjorn Andersson 2306b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 2307b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 2308b6f78e27SBjorn Andersson }; 2309b6f78e27SBjorn Andersson 2310b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 2311b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 2312b6f78e27SBjorn Andersson }; 2313b6f78e27SBjorn Andersson 2314b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 2315b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 2316b6f78e27SBjorn Andersson }; 2317b6f78e27SBjorn Andersson 2318b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 2319b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 2320b6f78e27SBjorn Andersson }; 2321b6f78e27SBjorn Andersson 2322b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 2323b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 2324b6f78e27SBjorn Andersson }; 2325b6f78e27SBjorn Andersson 2326b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 2327b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 2328b6f78e27SBjorn Andersson }; 2329b6f78e27SBjorn Andersson 2330b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 2331b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 2332b6f78e27SBjorn Andersson }; 2333b6f78e27SBjorn Andersson 2334b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 2335b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 2336b6f78e27SBjorn Andersson }; 2337b6f78e27SBjorn Andersson 2338b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 2339b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 2340b6f78e27SBjorn Andersson }; 2341b6f78e27SBjorn Andersson }; 2342b6f78e27SBjorn Andersson }; 2343e7e41a20SJonathan Marek 2344e7e41a20SJonathan Marek apps_bcm_voter: bcm_voter { 2345e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 2346e7e41a20SJonathan Marek }; 234760378f1aSVenkata Narendra Kumar Gutta }; 234879a595bbSSibi Sankar 234979a595bbSSibi Sankar epss_l3: interconnect@18591000 { 235079a595bbSSibi Sankar compatible = "qcom,sm8250-epss-l3"; 235179a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 235279a595bbSSibi Sankar 235379a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 235479a595bbSSibi Sankar clock-names = "xo", "alternate"; 235579a595bbSSibi Sankar 235679a595bbSSibi Sankar #interconnect-cells = <1>; 235779a595bbSSibi Sankar }; 235802ae4a0eSBjorn Andersson 235902ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 236002ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 236102ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 236202ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 236302ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 236402ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 236502ae4a0eSBjorn Andersson "freq-domain2"; 236602ae4a0eSBjorn Andersson 236702ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 236802ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 236902ae4a0eSBjorn Andersson 237002ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 237102ae4a0eSBjorn Andersson }; 237260378f1aSVenkata Narendra Kumar Gutta }; 237360378f1aSVenkata Narendra Kumar Gutta 237460378f1aSVenkata Narendra Kumar Gutta timer { 237560378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 237660378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 237760378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 237860378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 237960378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 238060378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 238160378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 238260378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 12 238360378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 238460378f1aSVenkata Narendra Kumar Gutta }; 2385bac12f25SAmit Kucheria 2386bac12f25SAmit Kucheria thermal-zones { 2387bac12f25SAmit Kucheria cpu0-thermal { 2388bac12f25SAmit Kucheria polling-delay-passive = <250>; 2389bac12f25SAmit Kucheria polling-delay = <1000>; 2390bac12f25SAmit Kucheria 2391bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 2392bac12f25SAmit Kucheria 2393bac12f25SAmit Kucheria trips { 2394bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 2395bac12f25SAmit Kucheria temperature = <90000>; 2396bac12f25SAmit Kucheria hysteresis = <2000>; 2397bac12f25SAmit Kucheria type = "passive"; 2398bac12f25SAmit Kucheria }; 2399bac12f25SAmit Kucheria 2400bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 2401bac12f25SAmit Kucheria temperature = <95000>; 2402bac12f25SAmit Kucheria hysteresis = <2000>; 2403bac12f25SAmit Kucheria type = "passive"; 2404bac12f25SAmit Kucheria }; 2405bac12f25SAmit Kucheria 2406bac12f25SAmit Kucheria cpu0_crit: cpu_crit { 2407bac12f25SAmit Kucheria temperature = <110000>; 2408bac12f25SAmit Kucheria hysteresis = <1000>; 2409bac12f25SAmit Kucheria type = "critical"; 2410bac12f25SAmit Kucheria }; 2411bac12f25SAmit Kucheria }; 2412bac12f25SAmit Kucheria 2413bac12f25SAmit Kucheria cooling-maps { 2414bac12f25SAmit Kucheria map0 { 2415bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 2416bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2417bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2418bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2419bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2420bac12f25SAmit Kucheria }; 2421bac12f25SAmit Kucheria map1 { 2422bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 2423bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2424bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2425bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2426bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2427bac12f25SAmit Kucheria }; 2428bac12f25SAmit Kucheria }; 2429bac12f25SAmit Kucheria }; 2430bac12f25SAmit Kucheria 2431bac12f25SAmit Kucheria cpu1-thermal { 2432bac12f25SAmit Kucheria polling-delay-passive = <250>; 2433bac12f25SAmit Kucheria polling-delay = <1000>; 2434bac12f25SAmit Kucheria 2435bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 2436bac12f25SAmit Kucheria 2437bac12f25SAmit Kucheria trips { 2438bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 2439bac12f25SAmit Kucheria temperature = <90000>; 2440bac12f25SAmit Kucheria hysteresis = <2000>; 2441bac12f25SAmit Kucheria type = "passive"; 2442bac12f25SAmit Kucheria }; 2443bac12f25SAmit Kucheria 2444bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 2445bac12f25SAmit Kucheria temperature = <95000>; 2446bac12f25SAmit Kucheria hysteresis = <2000>; 2447bac12f25SAmit Kucheria type = "passive"; 2448bac12f25SAmit Kucheria }; 2449bac12f25SAmit Kucheria 2450bac12f25SAmit Kucheria cpu1_crit: cpu_crit { 2451bac12f25SAmit Kucheria temperature = <110000>; 2452bac12f25SAmit Kucheria hysteresis = <1000>; 2453bac12f25SAmit Kucheria type = "critical"; 2454bac12f25SAmit Kucheria }; 2455bac12f25SAmit Kucheria }; 2456bac12f25SAmit Kucheria 2457bac12f25SAmit Kucheria cooling-maps { 2458bac12f25SAmit Kucheria map0 { 2459bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 2460bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2461bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2462bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2463bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2464bac12f25SAmit Kucheria }; 2465bac12f25SAmit Kucheria map1 { 2466bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 2467bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2468bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2469bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2470bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2471bac12f25SAmit Kucheria }; 2472bac12f25SAmit Kucheria }; 2473bac12f25SAmit Kucheria }; 2474bac12f25SAmit Kucheria 2475bac12f25SAmit Kucheria cpu2-thermal { 2476bac12f25SAmit Kucheria polling-delay-passive = <250>; 2477bac12f25SAmit Kucheria polling-delay = <1000>; 2478bac12f25SAmit Kucheria 2479bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 2480bac12f25SAmit Kucheria 2481bac12f25SAmit Kucheria trips { 2482bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 2483bac12f25SAmit Kucheria temperature = <90000>; 2484bac12f25SAmit Kucheria hysteresis = <2000>; 2485bac12f25SAmit Kucheria type = "passive"; 2486bac12f25SAmit Kucheria }; 2487bac12f25SAmit Kucheria 2488bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 2489bac12f25SAmit Kucheria temperature = <95000>; 2490bac12f25SAmit Kucheria hysteresis = <2000>; 2491bac12f25SAmit Kucheria type = "passive"; 2492bac12f25SAmit Kucheria }; 2493bac12f25SAmit Kucheria 2494bac12f25SAmit Kucheria cpu2_crit: cpu_crit { 2495bac12f25SAmit Kucheria temperature = <110000>; 2496bac12f25SAmit Kucheria hysteresis = <1000>; 2497bac12f25SAmit Kucheria type = "critical"; 2498bac12f25SAmit Kucheria }; 2499bac12f25SAmit Kucheria }; 2500bac12f25SAmit Kucheria 2501bac12f25SAmit Kucheria cooling-maps { 2502bac12f25SAmit Kucheria map0 { 2503bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 2504bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2505bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2506bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2507bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2508bac12f25SAmit Kucheria }; 2509bac12f25SAmit Kucheria map1 { 2510bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 2511bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2512bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2513bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2514bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2515bac12f25SAmit Kucheria }; 2516bac12f25SAmit Kucheria }; 2517bac12f25SAmit Kucheria }; 2518bac12f25SAmit Kucheria 2519bac12f25SAmit Kucheria cpu3-thermal { 2520bac12f25SAmit Kucheria polling-delay-passive = <250>; 2521bac12f25SAmit Kucheria polling-delay = <1000>; 2522bac12f25SAmit Kucheria 2523bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 2524bac12f25SAmit Kucheria 2525bac12f25SAmit Kucheria trips { 2526bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 2527bac12f25SAmit Kucheria temperature = <90000>; 2528bac12f25SAmit Kucheria hysteresis = <2000>; 2529bac12f25SAmit Kucheria type = "passive"; 2530bac12f25SAmit Kucheria }; 2531bac12f25SAmit Kucheria 2532bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 2533bac12f25SAmit Kucheria temperature = <95000>; 2534bac12f25SAmit Kucheria hysteresis = <2000>; 2535bac12f25SAmit Kucheria type = "passive"; 2536bac12f25SAmit Kucheria }; 2537bac12f25SAmit Kucheria 2538bac12f25SAmit Kucheria cpu3_crit: cpu_crit { 2539bac12f25SAmit Kucheria temperature = <110000>; 2540bac12f25SAmit Kucheria hysteresis = <1000>; 2541bac12f25SAmit Kucheria type = "critical"; 2542bac12f25SAmit Kucheria }; 2543bac12f25SAmit Kucheria }; 2544bac12f25SAmit Kucheria 2545bac12f25SAmit Kucheria cooling-maps { 2546bac12f25SAmit Kucheria map0 { 2547bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 2548bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2549bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2550bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2551bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2552bac12f25SAmit Kucheria }; 2553bac12f25SAmit Kucheria map1 { 2554bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 2555bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2556bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2557bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2558bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2559bac12f25SAmit Kucheria }; 2560bac12f25SAmit Kucheria }; 2561bac12f25SAmit Kucheria }; 2562bac12f25SAmit Kucheria 2563bac12f25SAmit Kucheria cpu4-top-thermal { 2564bac12f25SAmit Kucheria polling-delay-passive = <250>; 2565bac12f25SAmit Kucheria polling-delay = <1000>; 2566bac12f25SAmit Kucheria 2567bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 2568bac12f25SAmit Kucheria 2569bac12f25SAmit Kucheria trips { 2570bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 2571bac12f25SAmit Kucheria temperature = <90000>; 2572bac12f25SAmit Kucheria hysteresis = <2000>; 2573bac12f25SAmit Kucheria type = "passive"; 2574bac12f25SAmit Kucheria }; 2575bac12f25SAmit Kucheria 2576bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 2577bac12f25SAmit Kucheria temperature = <95000>; 2578bac12f25SAmit Kucheria hysteresis = <2000>; 2579bac12f25SAmit Kucheria type = "passive"; 2580bac12f25SAmit Kucheria }; 2581bac12f25SAmit Kucheria 2582bac12f25SAmit Kucheria cpu4_top_crit: cpu_crit { 2583bac12f25SAmit Kucheria temperature = <110000>; 2584bac12f25SAmit Kucheria hysteresis = <1000>; 2585bac12f25SAmit Kucheria type = "critical"; 2586bac12f25SAmit Kucheria }; 2587bac12f25SAmit Kucheria }; 2588bac12f25SAmit Kucheria 2589bac12f25SAmit Kucheria cooling-maps { 2590bac12f25SAmit Kucheria map0 { 2591bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 2592bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2593bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2594bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2595bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2596bac12f25SAmit Kucheria }; 2597bac12f25SAmit Kucheria map1 { 2598bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 2599bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2600bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2601bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2602bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2603bac12f25SAmit Kucheria }; 2604bac12f25SAmit Kucheria }; 2605bac12f25SAmit Kucheria }; 2606bac12f25SAmit Kucheria 2607bac12f25SAmit Kucheria cpu5-top-thermal { 2608bac12f25SAmit Kucheria polling-delay-passive = <250>; 2609bac12f25SAmit Kucheria polling-delay = <1000>; 2610bac12f25SAmit Kucheria 2611bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 2612bac12f25SAmit Kucheria 2613bac12f25SAmit Kucheria trips { 2614bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 2615bac12f25SAmit Kucheria temperature = <90000>; 2616bac12f25SAmit Kucheria hysteresis = <2000>; 2617bac12f25SAmit Kucheria type = "passive"; 2618bac12f25SAmit Kucheria }; 2619bac12f25SAmit Kucheria 2620bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 2621bac12f25SAmit Kucheria temperature = <95000>; 2622bac12f25SAmit Kucheria hysteresis = <2000>; 2623bac12f25SAmit Kucheria type = "passive"; 2624bac12f25SAmit Kucheria }; 2625bac12f25SAmit Kucheria 2626bac12f25SAmit Kucheria cpu5_top_crit: cpu_crit { 2627bac12f25SAmit Kucheria temperature = <110000>; 2628bac12f25SAmit Kucheria hysteresis = <1000>; 2629bac12f25SAmit Kucheria type = "critical"; 2630bac12f25SAmit Kucheria }; 2631bac12f25SAmit Kucheria }; 2632bac12f25SAmit Kucheria 2633bac12f25SAmit Kucheria cooling-maps { 2634bac12f25SAmit Kucheria map0 { 2635bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 2636bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2637bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2638bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2639bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2640bac12f25SAmit Kucheria }; 2641bac12f25SAmit Kucheria map1 { 2642bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 2643bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2644bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2645bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2646bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2647bac12f25SAmit Kucheria }; 2648bac12f25SAmit Kucheria }; 2649bac12f25SAmit Kucheria }; 2650bac12f25SAmit Kucheria 2651bac12f25SAmit Kucheria cpu6-top-thermal { 2652bac12f25SAmit Kucheria polling-delay-passive = <250>; 2653bac12f25SAmit Kucheria polling-delay = <1000>; 2654bac12f25SAmit Kucheria 2655bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 2656bac12f25SAmit Kucheria 2657bac12f25SAmit Kucheria trips { 2658bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 2659bac12f25SAmit Kucheria temperature = <90000>; 2660bac12f25SAmit Kucheria hysteresis = <2000>; 2661bac12f25SAmit Kucheria type = "passive"; 2662bac12f25SAmit Kucheria }; 2663bac12f25SAmit Kucheria 2664bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 2665bac12f25SAmit Kucheria temperature = <95000>; 2666bac12f25SAmit Kucheria hysteresis = <2000>; 2667bac12f25SAmit Kucheria type = "passive"; 2668bac12f25SAmit Kucheria }; 2669bac12f25SAmit Kucheria 2670bac12f25SAmit Kucheria cpu6_top_crit: cpu_crit { 2671bac12f25SAmit Kucheria temperature = <110000>; 2672bac12f25SAmit Kucheria hysteresis = <1000>; 2673bac12f25SAmit Kucheria type = "critical"; 2674bac12f25SAmit Kucheria }; 2675bac12f25SAmit Kucheria }; 2676bac12f25SAmit Kucheria 2677bac12f25SAmit Kucheria cooling-maps { 2678bac12f25SAmit Kucheria map0 { 2679bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 2680bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2681bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2682bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2683bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2684bac12f25SAmit Kucheria }; 2685bac12f25SAmit Kucheria map1 { 2686bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 2687bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2688bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2689bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2690bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2691bac12f25SAmit Kucheria }; 2692bac12f25SAmit Kucheria }; 2693bac12f25SAmit Kucheria }; 2694bac12f25SAmit Kucheria 2695bac12f25SAmit Kucheria cpu7-top-thermal { 2696bac12f25SAmit Kucheria polling-delay-passive = <250>; 2697bac12f25SAmit Kucheria polling-delay = <1000>; 2698bac12f25SAmit Kucheria 2699bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 2700bac12f25SAmit Kucheria 2701bac12f25SAmit Kucheria trips { 2702bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 2703bac12f25SAmit Kucheria temperature = <90000>; 2704bac12f25SAmit Kucheria hysteresis = <2000>; 2705bac12f25SAmit Kucheria type = "passive"; 2706bac12f25SAmit Kucheria }; 2707bac12f25SAmit Kucheria 2708bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 2709bac12f25SAmit Kucheria temperature = <95000>; 2710bac12f25SAmit Kucheria hysteresis = <2000>; 2711bac12f25SAmit Kucheria type = "passive"; 2712bac12f25SAmit Kucheria }; 2713bac12f25SAmit Kucheria 2714bac12f25SAmit Kucheria cpu7_top_crit: cpu_crit { 2715bac12f25SAmit Kucheria temperature = <110000>; 2716bac12f25SAmit Kucheria hysteresis = <1000>; 2717bac12f25SAmit Kucheria type = "critical"; 2718bac12f25SAmit Kucheria }; 2719bac12f25SAmit Kucheria }; 2720bac12f25SAmit Kucheria 2721bac12f25SAmit Kucheria cooling-maps { 2722bac12f25SAmit Kucheria map0 { 2723bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 2724bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2725bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2726bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2727bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2728bac12f25SAmit Kucheria }; 2729bac12f25SAmit Kucheria map1 { 2730bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 2731bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2732bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2733bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2734bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2735bac12f25SAmit Kucheria }; 2736bac12f25SAmit Kucheria }; 2737bac12f25SAmit Kucheria }; 2738bac12f25SAmit Kucheria 2739bac12f25SAmit Kucheria cpu4-bottom-thermal { 2740bac12f25SAmit Kucheria polling-delay-passive = <250>; 2741bac12f25SAmit Kucheria polling-delay = <1000>; 2742bac12f25SAmit Kucheria 2743bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 2744bac12f25SAmit Kucheria 2745bac12f25SAmit Kucheria trips { 2746bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 2747bac12f25SAmit Kucheria temperature = <90000>; 2748bac12f25SAmit Kucheria hysteresis = <2000>; 2749bac12f25SAmit Kucheria type = "passive"; 2750bac12f25SAmit Kucheria }; 2751bac12f25SAmit Kucheria 2752bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 2753bac12f25SAmit Kucheria temperature = <95000>; 2754bac12f25SAmit Kucheria hysteresis = <2000>; 2755bac12f25SAmit Kucheria type = "passive"; 2756bac12f25SAmit Kucheria }; 2757bac12f25SAmit Kucheria 2758bac12f25SAmit Kucheria cpu4_bottom_crit: cpu_crit { 2759bac12f25SAmit Kucheria temperature = <110000>; 2760bac12f25SAmit Kucheria hysteresis = <1000>; 2761bac12f25SAmit Kucheria type = "critical"; 2762bac12f25SAmit Kucheria }; 2763bac12f25SAmit Kucheria }; 2764bac12f25SAmit Kucheria 2765bac12f25SAmit Kucheria cooling-maps { 2766bac12f25SAmit Kucheria map0 { 2767bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 2768bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2769bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2770bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2771bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2772bac12f25SAmit Kucheria }; 2773bac12f25SAmit Kucheria map1 { 2774bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 2775bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2776bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2777bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2778bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2779bac12f25SAmit Kucheria }; 2780bac12f25SAmit Kucheria }; 2781bac12f25SAmit Kucheria }; 2782bac12f25SAmit Kucheria 2783bac12f25SAmit Kucheria cpu5-bottom-thermal { 2784bac12f25SAmit Kucheria polling-delay-passive = <250>; 2785bac12f25SAmit Kucheria polling-delay = <1000>; 2786bac12f25SAmit Kucheria 2787bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 2788bac12f25SAmit Kucheria 2789bac12f25SAmit Kucheria trips { 2790bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 2791bac12f25SAmit Kucheria temperature = <90000>; 2792bac12f25SAmit Kucheria hysteresis = <2000>; 2793bac12f25SAmit Kucheria type = "passive"; 2794bac12f25SAmit Kucheria }; 2795bac12f25SAmit Kucheria 2796bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 2797bac12f25SAmit Kucheria temperature = <95000>; 2798bac12f25SAmit Kucheria hysteresis = <2000>; 2799bac12f25SAmit Kucheria type = "passive"; 2800bac12f25SAmit Kucheria }; 2801bac12f25SAmit Kucheria 2802bac12f25SAmit Kucheria cpu5_bottom_crit: cpu_crit { 2803bac12f25SAmit Kucheria temperature = <110000>; 2804bac12f25SAmit Kucheria hysteresis = <1000>; 2805bac12f25SAmit Kucheria type = "critical"; 2806bac12f25SAmit Kucheria }; 2807bac12f25SAmit Kucheria }; 2808bac12f25SAmit Kucheria 2809bac12f25SAmit Kucheria cooling-maps { 2810bac12f25SAmit Kucheria map0 { 2811bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 2812bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2813bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2814bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2815bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2816bac12f25SAmit Kucheria }; 2817bac12f25SAmit Kucheria map1 { 2818bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 2819bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2820bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2821bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2822bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2823bac12f25SAmit Kucheria }; 2824bac12f25SAmit Kucheria }; 2825bac12f25SAmit Kucheria }; 2826bac12f25SAmit Kucheria 2827bac12f25SAmit Kucheria cpu6-bottom-thermal { 2828bac12f25SAmit Kucheria polling-delay-passive = <250>; 2829bac12f25SAmit Kucheria polling-delay = <1000>; 2830bac12f25SAmit Kucheria 2831bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 2832bac12f25SAmit Kucheria 2833bac12f25SAmit Kucheria trips { 2834bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 2835bac12f25SAmit Kucheria temperature = <90000>; 2836bac12f25SAmit Kucheria hysteresis = <2000>; 2837bac12f25SAmit Kucheria type = "passive"; 2838bac12f25SAmit Kucheria }; 2839bac12f25SAmit Kucheria 2840bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 2841bac12f25SAmit Kucheria temperature = <95000>; 2842bac12f25SAmit Kucheria hysteresis = <2000>; 2843bac12f25SAmit Kucheria type = "passive"; 2844bac12f25SAmit Kucheria }; 2845bac12f25SAmit Kucheria 2846bac12f25SAmit Kucheria cpu6_bottom_crit: cpu_crit { 2847bac12f25SAmit Kucheria temperature = <110000>; 2848bac12f25SAmit Kucheria hysteresis = <1000>; 2849bac12f25SAmit Kucheria type = "critical"; 2850bac12f25SAmit Kucheria }; 2851bac12f25SAmit Kucheria }; 2852bac12f25SAmit Kucheria 2853bac12f25SAmit Kucheria cooling-maps { 2854bac12f25SAmit Kucheria map0 { 2855bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 2856bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2857bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2858bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2859bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2860bac12f25SAmit Kucheria }; 2861bac12f25SAmit Kucheria map1 { 2862bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 2863bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2864bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2865bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2866bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2867bac12f25SAmit Kucheria }; 2868bac12f25SAmit Kucheria }; 2869bac12f25SAmit Kucheria }; 2870bac12f25SAmit Kucheria 2871bac12f25SAmit Kucheria cpu7-bottom-thermal { 2872bac12f25SAmit Kucheria polling-delay-passive = <250>; 2873bac12f25SAmit Kucheria polling-delay = <1000>; 2874bac12f25SAmit Kucheria 2875bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 2876bac12f25SAmit Kucheria 2877bac12f25SAmit Kucheria trips { 2878bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 2879bac12f25SAmit Kucheria temperature = <90000>; 2880bac12f25SAmit Kucheria hysteresis = <2000>; 2881bac12f25SAmit Kucheria type = "passive"; 2882bac12f25SAmit Kucheria }; 2883bac12f25SAmit Kucheria 2884bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 2885bac12f25SAmit Kucheria temperature = <95000>; 2886bac12f25SAmit Kucheria hysteresis = <2000>; 2887bac12f25SAmit Kucheria type = "passive"; 2888bac12f25SAmit Kucheria }; 2889bac12f25SAmit Kucheria 2890bac12f25SAmit Kucheria cpu7_bottom_crit: cpu_crit { 2891bac12f25SAmit Kucheria temperature = <110000>; 2892bac12f25SAmit Kucheria hysteresis = <1000>; 2893bac12f25SAmit Kucheria type = "critical"; 2894bac12f25SAmit Kucheria }; 2895bac12f25SAmit Kucheria }; 2896bac12f25SAmit Kucheria 2897bac12f25SAmit Kucheria cooling-maps { 2898bac12f25SAmit Kucheria map0 { 2899bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 2900bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2901bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2902bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2903bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2904bac12f25SAmit Kucheria }; 2905bac12f25SAmit Kucheria map1 { 2906bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 2907bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2908bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2909bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2910bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2911bac12f25SAmit Kucheria }; 2912bac12f25SAmit Kucheria }; 2913bac12f25SAmit Kucheria }; 2914bac12f25SAmit Kucheria 2915bac12f25SAmit Kucheria aoss0-thermal { 2916bac12f25SAmit Kucheria polling-delay-passive = <250>; 2917bac12f25SAmit Kucheria polling-delay = <1000>; 2918bac12f25SAmit Kucheria 2919bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 2920bac12f25SAmit Kucheria 2921bac12f25SAmit Kucheria trips { 2922bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 2923bac12f25SAmit Kucheria temperature = <90000>; 2924bac12f25SAmit Kucheria hysteresis = <2000>; 2925bac12f25SAmit Kucheria type = "hot"; 2926bac12f25SAmit Kucheria }; 2927bac12f25SAmit Kucheria }; 2928bac12f25SAmit Kucheria }; 2929bac12f25SAmit Kucheria 2930bac12f25SAmit Kucheria cluster0-thermal { 2931bac12f25SAmit Kucheria polling-delay-passive = <250>; 2932bac12f25SAmit Kucheria polling-delay = <1000>; 2933bac12f25SAmit Kucheria 2934bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 2935bac12f25SAmit Kucheria 2936bac12f25SAmit Kucheria trips { 2937bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 2938bac12f25SAmit Kucheria temperature = <90000>; 2939bac12f25SAmit Kucheria hysteresis = <2000>; 2940bac12f25SAmit Kucheria type = "hot"; 2941bac12f25SAmit Kucheria }; 2942bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 2943bac12f25SAmit Kucheria temperature = <110000>; 2944bac12f25SAmit Kucheria hysteresis = <2000>; 2945bac12f25SAmit Kucheria type = "critical"; 2946bac12f25SAmit Kucheria }; 2947bac12f25SAmit Kucheria }; 2948bac12f25SAmit Kucheria }; 2949bac12f25SAmit Kucheria 2950bac12f25SAmit Kucheria cluster1-thermal { 2951bac12f25SAmit Kucheria polling-delay-passive = <250>; 2952bac12f25SAmit Kucheria polling-delay = <1000>; 2953bac12f25SAmit Kucheria 2954bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 2955bac12f25SAmit Kucheria 2956bac12f25SAmit Kucheria trips { 2957bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 2958bac12f25SAmit Kucheria temperature = <90000>; 2959bac12f25SAmit Kucheria hysteresis = <2000>; 2960bac12f25SAmit Kucheria type = "hot"; 2961bac12f25SAmit Kucheria }; 2962bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 2963bac12f25SAmit Kucheria temperature = <110000>; 2964bac12f25SAmit Kucheria hysteresis = <2000>; 2965bac12f25SAmit Kucheria type = "critical"; 2966bac12f25SAmit Kucheria }; 2967bac12f25SAmit Kucheria }; 2968bac12f25SAmit Kucheria }; 2969bac12f25SAmit Kucheria 2970bac12f25SAmit Kucheria gpu-thermal-top { 2971bac12f25SAmit Kucheria polling-delay-passive = <250>; 2972bac12f25SAmit Kucheria polling-delay = <1000>; 2973bac12f25SAmit Kucheria 2974bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 2975bac12f25SAmit Kucheria 2976bac12f25SAmit Kucheria trips { 2977bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 2978bac12f25SAmit Kucheria temperature = <90000>; 2979bac12f25SAmit Kucheria hysteresis = <2000>; 2980bac12f25SAmit Kucheria type = "hot"; 2981bac12f25SAmit Kucheria }; 2982bac12f25SAmit Kucheria }; 2983bac12f25SAmit Kucheria }; 2984bac12f25SAmit Kucheria 2985bac12f25SAmit Kucheria aoss1-thermal { 2986bac12f25SAmit Kucheria polling-delay-passive = <250>; 2987bac12f25SAmit Kucheria polling-delay = <1000>; 2988bac12f25SAmit Kucheria 2989bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 2990bac12f25SAmit Kucheria 2991bac12f25SAmit Kucheria trips { 2992bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 2993bac12f25SAmit Kucheria temperature = <90000>; 2994bac12f25SAmit Kucheria hysteresis = <2000>; 2995bac12f25SAmit Kucheria type = "hot"; 2996bac12f25SAmit Kucheria }; 2997bac12f25SAmit Kucheria }; 2998bac12f25SAmit Kucheria }; 2999bac12f25SAmit Kucheria 3000bac12f25SAmit Kucheria wlan-thermal { 3001bac12f25SAmit Kucheria polling-delay-passive = <250>; 3002bac12f25SAmit Kucheria polling-delay = <1000>; 3003bac12f25SAmit Kucheria 3004bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 3005bac12f25SAmit Kucheria 3006bac12f25SAmit Kucheria trips { 3007bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 3008bac12f25SAmit Kucheria temperature = <90000>; 3009bac12f25SAmit Kucheria hysteresis = <2000>; 3010bac12f25SAmit Kucheria type = "hot"; 3011bac12f25SAmit Kucheria }; 3012bac12f25SAmit Kucheria }; 3013bac12f25SAmit Kucheria }; 3014bac12f25SAmit Kucheria 3015bac12f25SAmit Kucheria video-thermal { 3016bac12f25SAmit Kucheria polling-delay-passive = <250>; 3017bac12f25SAmit Kucheria polling-delay = <1000>; 3018bac12f25SAmit Kucheria 3019bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 3020bac12f25SAmit Kucheria 3021bac12f25SAmit Kucheria trips { 3022bac12f25SAmit Kucheria video_alert0: trip-point0 { 3023bac12f25SAmit Kucheria temperature = <90000>; 3024bac12f25SAmit Kucheria hysteresis = <2000>; 3025bac12f25SAmit Kucheria type = "hot"; 3026bac12f25SAmit Kucheria }; 3027bac12f25SAmit Kucheria }; 3028bac12f25SAmit Kucheria }; 3029bac12f25SAmit Kucheria 3030bac12f25SAmit Kucheria mem-thermal { 3031bac12f25SAmit Kucheria polling-delay-passive = <250>; 3032bac12f25SAmit Kucheria polling-delay = <1000>; 3033bac12f25SAmit Kucheria 3034bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 3035bac12f25SAmit Kucheria 3036bac12f25SAmit Kucheria trips { 3037bac12f25SAmit Kucheria mem_alert0: trip-point0 { 3038bac12f25SAmit Kucheria temperature = <90000>; 3039bac12f25SAmit Kucheria hysteresis = <2000>; 3040bac12f25SAmit Kucheria type = "hot"; 3041bac12f25SAmit Kucheria }; 3042bac12f25SAmit Kucheria }; 3043bac12f25SAmit Kucheria }; 3044bac12f25SAmit Kucheria 3045bac12f25SAmit Kucheria q6-hvx-thermal { 3046bac12f25SAmit Kucheria polling-delay-passive = <250>; 3047bac12f25SAmit Kucheria polling-delay = <1000>; 3048bac12f25SAmit Kucheria 3049bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 3050bac12f25SAmit Kucheria 3051bac12f25SAmit Kucheria trips { 3052bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 3053bac12f25SAmit Kucheria temperature = <90000>; 3054bac12f25SAmit Kucheria hysteresis = <2000>; 3055bac12f25SAmit Kucheria type = "hot"; 3056bac12f25SAmit Kucheria }; 3057bac12f25SAmit Kucheria }; 3058bac12f25SAmit Kucheria }; 3059bac12f25SAmit Kucheria 3060bac12f25SAmit Kucheria camera-thermal { 3061bac12f25SAmit Kucheria polling-delay-passive = <250>; 3062bac12f25SAmit Kucheria polling-delay = <1000>; 3063bac12f25SAmit Kucheria 3064bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 3065bac12f25SAmit Kucheria 3066bac12f25SAmit Kucheria trips { 3067bac12f25SAmit Kucheria camera_alert0: trip-point0 { 3068bac12f25SAmit Kucheria temperature = <90000>; 3069bac12f25SAmit Kucheria hysteresis = <2000>; 3070bac12f25SAmit Kucheria type = "hot"; 3071bac12f25SAmit Kucheria }; 3072bac12f25SAmit Kucheria }; 3073bac12f25SAmit Kucheria }; 3074bac12f25SAmit Kucheria 3075bac12f25SAmit Kucheria compute-thermal { 3076bac12f25SAmit Kucheria polling-delay-passive = <250>; 3077bac12f25SAmit Kucheria polling-delay = <1000>; 3078bac12f25SAmit Kucheria 3079bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 3080bac12f25SAmit Kucheria 3081bac12f25SAmit Kucheria trips { 3082bac12f25SAmit Kucheria compute_alert0: trip-point0 { 3083bac12f25SAmit Kucheria temperature = <90000>; 3084bac12f25SAmit Kucheria hysteresis = <2000>; 3085bac12f25SAmit Kucheria type = "hot"; 3086bac12f25SAmit Kucheria }; 3087bac12f25SAmit Kucheria }; 3088bac12f25SAmit Kucheria }; 3089bac12f25SAmit Kucheria 3090bac12f25SAmit Kucheria npu-thermal { 3091bac12f25SAmit Kucheria polling-delay-passive = <250>; 3092bac12f25SAmit Kucheria polling-delay = <1000>; 3093bac12f25SAmit Kucheria 3094bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 3095bac12f25SAmit Kucheria 3096bac12f25SAmit Kucheria trips { 3097bac12f25SAmit Kucheria npu_alert0: trip-point0 { 3098bac12f25SAmit Kucheria temperature = <90000>; 3099bac12f25SAmit Kucheria hysteresis = <2000>; 3100bac12f25SAmit Kucheria type = "hot"; 3101bac12f25SAmit Kucheria }; 3102bac12f25SAmit Kucheria }; 3103bac12f25SAmit Kucheria }; 3104bac12f25SAmit Kucheria 3105bac12f25SAmit Kucheria gpu-thermal-bottom { 3106bac12f25SAmit Kucheria polling-delay-passive = <250>; 3107bac12f25SAmit Kucheria polling-delay = <1000>; 3108bac12f25SAmit Kucheria 3109bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 3110bac12f25SAmit Kucheria 3111bac12f25SAmit Kucheria trips { 3112bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 3113bac12f25SAmit Kucheria temperature = <90000>; 3114bac12f25SAmit Kucheria hysteresis = <2000>; 3115bac12f25SAmit Kucheria type = "hot"; 3116bac12f25SAmit Kucheria }; 3117bac12f25SAmit Kucheria }; 3118bac12f25SAmit Kucheria }; 3119bac12f25SAmit Kucheria }; 312060378f1aSVenkata Narendra Kumar Gutta}; 3121