160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 1179a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 127c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 13e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 14087d537aSBjorn Andersson#include <dt-bindings/power/qcom-aoss-qmp.h> 15b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1663e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 1760378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1863e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 19bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 2060378f1aSVenkata Narendra Kumar Gutta 2160378f1aSVenkata Narendra Kumar Gutta/ { 2260378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2360378f1aSVenkata Narendra Kumar Gutta 2460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 2560378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 2660378f1aSVenkata Narendra Kumar Gutta 27e5813b15SDmitry Baryshkov aliases { 28e5813b15SDmitry Baryshkov i2c0 = &i2c0; 29e5813b15SDmitry Baryshkov i2c1 = &i2c1; 30e5813b15SDmitry Baryshkov i2c2 = &i2c2; 31e5813b15SDmitry Baryshkov i2c3 = &i2c3; 32e5813b15SDmitry Baryshkov i2c4 = &i2c4; 33e5813b15SDmitry Baryshkov i2c5 = &i2c5; 34e5813b15SDmitry Baryshkov i2c6 = &i2c6; 35e5813b15SDmitry Baryshkov i2c7 = &i2c7; 36e5813b15SDmitry Baryshkov i2c8 = &i2c8; 37e5813b15SDmitry Baryshkov i2c9 = &i2c9; 38e5813b15SDmitry Baryshkov i2c10 = &i2c10; 39e5813b15SDmitry Baryshkov i2c11 = &i2c11; 40e5813b15SDmitry Baryshkov i2c12 = &i2c12; 41e5813b15SDmitry Baryshkov i2c13 = &i2c13; 42e5813b15SDmitry Baryshkov i2c14 = &i2c14; 43e5813b15SDmitry Baryshkov i2c15 = &i2c15; 44e5813b15SDmitry Baryshkov i2c16 = &i2c16; 45e5813b15SDmitry Baryshkov i2c17 = &i2c17; 46e5813b15SDmitry Baryshkov i2c18 = &i2c18; 47e5813b15SDmitry Baryshkov i2c19 = &i2c19; 48e5813b15SDmitry Baryshkov spi0 = &spi0; 49e5813b15SDmitry Baryshkov spi1 = &spi1; 50e5813b15SDmitry Baryshkov spi2 = &spi2; 51e5813b15SDmitry Baryshkov spi3 = &spi3; 52e5813b15SDmitry Baryshkov spi4 = &spi4; 53e5813b15SDmitry Baryshkov spi5 = &spi5; 54e5813b15SDmitry Baryshkov spi6 = &spi6; 55e5813b15SDmitry Baryshkov spi7 = &spi7; 56e5813b15SDmitry Baryshkov spi8 = &spi8; 57e5813b15SDmitry Baryshkov spi9 = &spi9; 58e5813b15SDmitry Baryshkov spi10 = &spi10; 59e5813b15SDmitry Baryshkov spi11 = &spi11; 60e5813b15SDmitry Baryshkov spi12 = &spi12; 61e5813b15SDmitry Baryshkov spi13 = &spi13; 62e5813b15SDmitry Baryshkov spi14 = &spi14; 63e5813b15SDmitry Baryshkov spi15 = &spi15; 64e5813b15SDmitry Baryshkov spi16 = &spi16; 65e5813b15SDmitry Baryshkov spi17 = &spi17; 66e5813b15SDmitry Baryshkov spi18 = &spi18; 67e5813b15SDmitry Baryshkov spi19 = &spi19; 68e5813b15SDmitry Baryshkov }; 69e5813b15SDmitry Baryshkov 7060378f1aSVenkata Narendra Kumar Gutta chosen { }; 7160378f1aSVenkata Narendra Kumar Gutta 7260378f1aSVenkata Narendra Kumar Gutta clocks { 7360378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7460378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 7560378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 7660378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 7760378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 7860378f1aSVenkata Narendra Kumar Gutta }; 7960378f1aSVenkata Narendra Kumar Gutta 8060378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8160378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 829ff8b059SJonathan Marek clock-frequency = <32768>; 8360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8460378f1aSVenkata Narendra Kumar Gutta }; 8560378f1aSVenkata Narendra Kumar Gutta }; 8660378f1aSVenkata Narendra Kumar Gutta 8760378f1aSVenkata Narendra Kumar Gutta cpus { 8860378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 8960378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9060378f1aSVenkata Narendra Kumar Gutta 9160378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9260378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 9560378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 9660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 9702ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 98bac12f25SAmit Kucheria #cooling-cells = <2>; 9960378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 10060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 10260378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 10360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10460378f1aSVenkata Narendra Kumar Gutta }; 10560378f1aSVenkata Narendra Kumar Gutta }; 10660378f1aSVenkata Narendra Kumar Gutta }; 10760378f1aSVenkata Narendra Kumar Gutta 10860378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 10960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 11060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 11160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 11260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 11360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 11402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 115bac12f25SAmit Kucheria #cooling-cells = <2>; 11660378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 11760378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 11860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11960378f1aSVenkata Narendra Kumar Gutta }; 12060378f1aSVenkata Narendra Kumar Gutta }; 12160378f1aSVenkata Narendra Kumar Gutta 12260378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 12360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 12560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 12660378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 12760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 12802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 129bac12f25SAmit Kucheria #cooling-cells = <2>; 13060378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 13160378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 13260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 13360378f1aSVenkata Narendra Kumar Gutta }; 13460378f1aSVenkata Narendra Kumar Gutta }; 13560378f1aSVenkata Narendra Kumar Gutta 13660378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 13760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 13860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 14060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 14160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 14202ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 143bac12f25SAmit Kucheria #cooling-cells = <2>; 14460378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 14560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 14660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 14760378f1aSVenkata Narendra Kumar Gutta }; 14860378f1aSVenkata Narendra Kumar Gutta }; 14960378f1aSVenkata Narendra Kumar Gutta 15060378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 15160378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 15260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 15360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 15460378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 15560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 15602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 157bac12f25SAmit Kucheria #cooling-cells = <2>; 15860378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 15960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 16060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 16160378f1aSVenkata Narendra Kumar Gutta }; 16260378f1aSVenkata Narendra Kumar Gutta }; 16360378f1aSVenkata Narendra Kumar Gutta 16460378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 16560378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 16660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 16760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 16860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 16960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 17002ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 171bac12f25SAmit Kucheria #cooling-cells = <2>; 17260378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 17360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 17460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17560378f1aSVenkata Narendra Kumar Gutta }; 17660378f1aSVenkata Narendra Kumar Gutta 17760378f1aSVenkata Narendra Kumar Gutta }; 17860378f1aSVenkata Narendra Kumar Gutta 17960378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 18060378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 18160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 18360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 18460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 18502ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 186bac12f25SAmit Kucheria #cooling-cells = <2>; 18760378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 18860378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 18960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 19060378f1aSVenkata Narendra Kumar Gutta }; 19160378f1aSVenkata Narendra Kumar Gutta }; 19260378f1aSVenkata Narendra Kumar Gutta 19360378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 19460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 19560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 19660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 19760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 19860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 19902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 200bac12f25SAmit Kucheria #cooling-cells = <2>; 20160378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 20260378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 20360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20460378f1aSVenkata Narendra Kumar Gutta }; 20560378f1aSVenkata Narendra Kumar Gutta }; 20660378f1aSVenkata Narendra Kumar Gutta }; 20760378f1aSVenkata Narendra Kumar Gutta 20860378f1aSVenkata Narendra Kumar Gutta firmware { 20960378f1aSVenkata Narendra Kumar Gutta scm: scm { 21060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,scm"; 21160378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 21260378f1aSVenkata Narendra Kumar Gutta }; 21360378f1aSVenkata Narendra Kumar Gutta }; 21460378f1aSVenkata Narendra Kumar Gutta 21560378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 21660378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 21760378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 21860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 21960378f1aSVenkata Narendra Kumar Gutta }; 22060378f1aSVenkata Narendra Kumar Gutta 2213f2094dfSDmitry Baryshkov mmcx_reg: mmcx-reg { 2223f2094dfSDmitry Baryshkov compatible = "regulator-fixed-domain"; 2233f2094dfSDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 2243f2094dfSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 2253f2094dfSDmitry Baryshkov regulator-name = "MMCX"; 2263f2094dfSDmitry Baryshkov }; 2273f2094dfSDmitry Baryshkov 22860378f1aSVenkata Narendra Kumar Gutta pmu { 22960378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 23060378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 23160378f1aSVenkata Narendra Kumar Gutta }; 23260378f1aSVenkata Narendra Kumar Gutta 23360378f1aSVenkata Narendra Kumar Gutta psci { 23460378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 23560378f1aSVenkata Narendra Kumar Gutta method = "smc"; 23660378f1aSVenkata Narendra Kumar Gutta }; 23760378f1aSVenkata Narendra Kumar Gutta 23860378f1aSVenkata Narendra Kumar Gutta reserved-memory { 23960378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 24060378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 24160378f1aSVenkata Narendra Kumar Gutta ranges; 24260378f1aSVenkata Narendra Kumar Gutta 24360378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 24460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 24560378f1aSVenkata Narendra Kumar Gutta no-map; 24660378f1aSVenkata Narendra Kumar Gutta }; 24760378f1aSVenkata Narendra Kumar Gutta 24860378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 24960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 25060378f1aSVenkata Narendra Kumar Gutta no-map; 25160378f1aSVenkata Narendra Kumar Gutta }; 25260378f1aSVenkata Narendra Kumar Gutta 25360378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 25460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 25560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 25660378f1aSVenkata Narendra Kumar Gutta no-map; 25760378f1aSVenkata Narendra Kumar Gutta }; 25860378f1aSVenkata Narendra Kumar Gutta 25960378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 26060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 26160378f1aSVenkata Narendra Kumar Gutta no-map; 26260378f1aSVenkata Narendra Kumar Gutta }; 26360378f1aSVenkata Narendra Kumar Gutta 26460378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 26560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 26660378f1aSVenkata Narendra Kumar Gutta no-map; 26760378f1aSVenkata Narendra Kumar Gutta }; 26860378f1aSVenkata Narendra Kumar Gutta 26960378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 27060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 27160378f1aSVenkata Narendra Kumar Gutta no-map; 27260378f1aSVenkata Narendra Kumar Gutta }; 27360378f1aSVenkata Narendra Kumar Gutta 27460378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 27560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 27660378f1aSVenkata Narendra Kumar Gutta no-map; 27760378f1aSVenkata Narendra Kumar Gutta }; 27860378f1aSVenkata Narendra Kumar Gutta 27960378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 28060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 28160378f1aSVenkata Narendra Kumar Gutta no-map; 28260378f1aSVenkata Narendra Kumar Gutta }; 28360378f1aSVenkata Narendra Kumar Gutta 28460378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 28560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 28660378f1aSVenkata Narendra Kumar Gutta no-map; 28760378f1aSVenkata Narendra Kumar Gutta }; 28860378f1aSVenkata Narendra Kumar Gutta 28960378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 29060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 29160378f1aSVenkata Narendra Kumar Gutta no-map; 29260378f1aSVenkata Narendra Kumar Gutta }; 29360378f1aSVenkata Narendra Kumar Gutta 29460378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 29560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 29660378f1aSVenkata Narendra Kumar Gutta no-map; 29760378f1aSVenkata Narendra Kumar Gutta }; 29860378f1aSVenkata Narendra Kumar Gutta 29960378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 30060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 30160378f1aSVenkata Narendra Kumar Gutta no-map; 30260378f1aSVenkata Narendra Kumar Gutta }; 30360378f1aSVenkata Narendra Kumar Gutta 30460378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 30560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 30660378f1aSVenkata Narendra Kumar Gutta no-map; 30760378f1aSVenkata Narendra Kumar Gutta }; 30860378f1aSVenkata Narendra Kumar Gutta 30960378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 31060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 31160378f1aSVenkata Narendra Kumar Gutta no-map; 31260378f1aSVenkata Narendra Kumar Gutta }; 31360378f1aSVenkata Narendra Kumar Gutta 31460378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 31560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 31660378f1aSVenkata Narendra Kumar Gutta no-map; 31760378f1aSVenkata Narendra Kumar Gutta }; 31860378f1aSVenkata Narendra Kumar Gutta 31960378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 32060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 32160378f1aSVenkata Narendra Kumar Gutta no-map; 32260378f1aSVenkata Narendra Kumar Gutta }; 32360378f1aSVenkata Narendra Kumar Gutta 32460378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 32560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 32660378f1aSVenkata Narendra Kumar Gutta no-map; 32760378f1aSVenkata Narendra Kumar Gutta }; 32860378f1aSVenkata Narendra Kumar Gutta 32960378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 33060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 33160378f1aSVenkata Narendra Kumar Gutta no-map; 33260378f1aSVenkata Narendra Kumar Gutta }; 33360378f1aSVenkata Narendra Kumar Gutta }; 33460378f1aSVenkata Narendra Kumar Gutta 33560378f1aSVenkata Narendra Kumar Gutta smem: qcom,smem { 33660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 33760378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 33860378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 33960378f1aSVenkata Narendra Kumar Gutta }; 34060378f1aSVenkata Narendra Kumar Gutta 3418770a2a8SBjorn Andersson smp2p-adsp { 3428770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3438770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 3448770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 3458770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3468770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3478770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 3488770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3498770a2a8SBjorn Andersson 3508770a2a8SBjorn Andersson qcom,local-pid = <0>; 3518770a2a8SBjorn Andersson qcom,remote-pid = <2>; 3528770a2a8SBjorn Andersson 3538770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 3548770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3558770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3568770a2a8SBjorn Andersson }; 3578770a2a8SBjorn Andersson 3588770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 3598770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3608770a2a8SBjorn Andersson interrupt-controller; 3618770a2a8SBjorn Andersson #interrupt-cells = <2>; 3628770a2a8SBjorn Andersson }; 3638770a2a8SBjorn Andersson }; 3648770a2a8SBjorn Andersson 3658770a2a8SBjorn Andersson smp2p-cdsp { 3668770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3678770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 3688770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 3698770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3708770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3718770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 3728770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3738770a2a8SBjorn Andersson 3748770a2a8SBjorn Andersson qcom,local-pid = <0>; 3758770a2a8SBjorn Andersson qcom,remote-pid = <5>; 3768770a2a8SBjorn Andersson 3778770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 3788770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3798770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3808770a2a8SBjorn Andersson }; 3818770a2a8SBjorn Andersson 3828770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 3838770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3848770a2a8SBjorn Andersson interrupt-controller; 3858770a2a8SBjorn Andersson #interrupt-cells = <2>; 3868770a2a8SBjorn Andersson }; 3878770a2a8SBjorn Andersson }; 3888770a2a8SBjorn Andersson 3898770a2a8SBjorn Andersson smp2p-slpi { 3908770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3918770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 3928770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 3938770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3948770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3958770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 3968770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3978770a2a8SBjorn Andersson 3988770a2a8SBjorn Andersson qcom,local-pid = <0>; 3998770a2a8SBjorn Andersson qcom,remote-pid = <3>; 4008770a2a8SBjorn Andersson 4018770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 4028770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 4038770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 4048770a2a8SBjorn Andersson }; 4058770a2a8SBjorn Andersson 4068770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 4078770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 4088770a2a8SBjorn Andersson interrupt-controller; 4098770a2a8SBjorn Andersson #interrupt-cells = <2>; 4108770a2a8SBjorn Andersson }; 4118770a2a8SBjorn Andersson }; 4128770a2a8SBjorn Andersson 41360378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 41460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 41560378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 41660378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 41760378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 41860378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 41960378f1aSVenkata Narendra Kumar Gutta 42060378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 42160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 42260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 42360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 42460378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 42560378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 42676bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 42776bd127eSDmitry Baryshkov "bi_tcxo_ao", 42876bd127eSDmitry Baryshkov "sleep_clk"; 42976bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 43076bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 43176bd127eSDmitry Baryshkov <&sleep_clk>; 43260378f1aSVenkata Narendra Kumar Gutta }; 43360378f1aSVenkata Narendra Kumar Gutta 434e5361e75SBjorn Andersson ipcc: mailbox@408000 { 435e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 436e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 437e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 438e5361e75SBjorn Andersson interrupt-controller; 439e5361e75SBjorn Andersson #interrupt-cells = <3>; 440e5361e75SBjorn Andersson #mbox-cells = <2>; 441e5361e75SBjorn Andersson }; 442e5361e75SBjorn Andersson 44365389ce6SManivannan Sadhasivam rng: rng@793000 { 44465389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 44565389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 44665389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 44765389ce6SManivannan Sadhasivam clock-names = "core"; 44865389ce6SManivannan Sadhasivam }; 44965389ce6SManivannan Sadhasivam 45001e869ccSDmitry Baryshkov qup_opp_table: qup-opp-table { 45101e869ccSDmitry Baryshkov compatible = "operating-points-v2"; 45201e869ccSDmitry Baryshkov 45301e869ccSDmitry Baryshkov opp-50000000 { 45401e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <50000000>; 45501e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_min_svs>; 45601e869ccSDmitry Baryshkov }; 45701e869ccSDmitry Baryshkov 45801e869ccSDmitry Baryshkov opp-75000000 { 45901e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <75000000>; 46001e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 46101e869ccSDmitry Baryshkov }; 46201e869ccSDmitry Baryshkov 46301e869ccSDmitry Baryshkov opp-120000000 { 46401e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <120000000>; 46501e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 46601e869ccSDmitry Baryshkov }; 46701e869ccSDmitry Baryshkov }; 46801e869ccSDmitry Baryshkov 469e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 470e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 471e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 472e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 473e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 474e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 475e5813b15SDmitry Baryshkov #address-cells = <2>; 476e5813b15SDmitry Baryshkov #size-cells = <2>; 47785309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 478e5813b15SDmitry Baryshkov ranges; 479e5813b15SDmitry Baryshkov status = "disabled"; 480e5813b15SDmitry Baryshkov 481e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 482e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 483e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 484e5813b15SDmitry Baryshkov clock-names = "se"; 485e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 486e5813b15SDmitry Baryshkov pinctrl-names = "default"; 487e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 488e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 489e5813b15SDmitry Baryshkov #address-cells = <1>; 490e5813b15SDmitry Baryshkov #size-cells = <0>; 491e5813b15SDmitry Baryshkov status = "disabled"; 492e5813b15SDmitry Baryshkov }; 493e5813b15SDmitry Baryshkov 494e5813b15SDmitry Baryshkov spi14: spi@880000 { 495e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 496e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 497e5813b15SDmitry Baryshkov clock-names = "se"; 498e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 499e5813b15SDmitry Baryshkov pinctrl-names = "default"; 500e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi14_default>; 501e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 502e5813b15SDmitry Baryshkov #address-cells = <1>; 503e5813b15SDmitry Baryshkov #size-cells = <0>; 50401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 50501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 506e5813b15SDmitry Baryshkov status = "disabled"; 507e5813b15SDmitry Baryshkov }; 508e5813b15SDmitry Baryshkov 509e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 510e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 511e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 512e5813b15SDmitry Baryshkov clock-names = "se"; 513e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 514e5813b15SDmitry Baryshkov pinctrl-names = "default"; 515e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 516e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 517e5813b15SDmitry Baryshkov #address-cells = <1>; 518e5813b15SDmitry Baryshkov #size-cells = <0>; 519e5813b15SDmitry Baryshkov status = "disabled"; 520e5813b15SDmitry Baryshkov }; 521e5813b15SDmitry Baryshkov 522e5813b15SDmitry Baryshkov spi15: spi@884000 { 523e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 524e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 525e5813b15SDmitry Baryshkov clock-names = "se"; 526e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 527e5813b15SDmitry Baryshkov pinctrl-names = "default"; 528e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi15_default>; 529e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 530e5813b15SDmitry Baryshkov #address-cells = <1>; 531e5813b15SDmitry Baryshkov #size-cells = <0>; 53201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 53301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 534e5813b15SDmitry Baryshkov status = "disabled"; 535e5813b15SDmitry Baryshkov }; 536e5813b15SDmitry Baryshkov 537e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 538e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 539e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 540e5813b15SDmitry Baryshkov clock-names = "se"; 541e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 542e5813b15SDmitry Baryshkov pinctrl-names = "default"; 543e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 544e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 545e5813b15SDmitry Baryshkov #address-cells = <1>; 546e5813b15SDmitry Baryshkov #size-cells = <0>; 547e5813b15SDmitry Baryshkov status = "disabled"; 548e5813b15SDmitry Baryshkov }; 549e5813b15SDmitry Baryshkov 550e5813b15SDmitry Baryshkov spi16: spi@888000 { 551e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 552e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 553e5813b15SDmitry Baryshkov clock-names = "se"; 554e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 555e5813b15SDmitry Baryshkov pinctrl-names = "default"; 556e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi16_default>; 557e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 558e5813b15SDmitry Baryshkov #address-cells = <1>; 559e5813b15SDmitry Baryshkov #size-cells = <0>; 56001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 56101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 562e5813b15SDmitry Baryshkov status = "disabled"; 563e5813b15SDmitry Baryshkov }; 564e5813b15SDmitry Baryshkov 565e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 566e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 567e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 568e5813b15SDmitry Baryshkov clock-names = "se"; 569e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 570e5813b15SDmitry Baryshkov pinctrl-names = "default"; 571e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 572e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 573e5813b15SDmitry Baryshkov #address-cells = <1>; 574e5813b15SDmitry Baryshkov #size-cells = <0>; 575e5813b15SDmitry Baryshkov status = "disabled"; 576e5813b15SDmitry Baryshkov }; 577e5813b15SDmitry Baryshkov 578e5813b15SDmitry Baryshkov spi17: spi@88c000 { 579e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 580e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 581e5813b15SDmitry Baryshkov clock-names = "se"; 582e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 583e5813b15SDmitry Baryshkov pinctrl-names = "default"; 584e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi17_default>; 585e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 586e5813b15SDmitry Baryshkov #address-cells = <1>; 587e5813b15SDmitry Baryshkov #size-cells = <0>; 58801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 58901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 590e5813b15SDmitry Baryshkov status = "disabled"; 591e5813b15SDmitry Baryshkov }; 592e5813b15SDmitry Baryshkov 59308a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 59408a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 59508a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 59608a9ae2dSDmitry Baryshkov clock-names = "se"; 59708a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 59808a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 59908a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 60008a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 60101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 60201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 60308a9ae2dSDmitry Baryshkov status = "disabled"; 60408a9ae2dSDmitry Baryshkov }; 60508a9ae2dSDmitry Baryshkov 606e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 607e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 608e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 609e5813b15SDmitry Baryshkov clock-names = "se"; 610e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 611e5813b15SDmitry Baryshkov pinctrl-names = "default"; 612e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 613e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 614e5813b15SDmitry Baryshkov #address-cells = <1>; 615e5813b15SDmitry Baryshkov #size-cells = <0>; 616e5813b15SDmitry Baryshkov status = "disabled"; 617e5813b15SDmitry Baryshkov }; 618e5813b15SDmitry Baryshkov 619e5813b15SDmitry Baryshkov spi18: spi@890000 { 620e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 621e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 622e5813b15SDmitry Baryshkov clock-names = "se"; 623e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 624e5813b15SDmitry Baryshkov pinctrl-names = "default"; 625e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi18_default>; 626e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 627e5813b15SDmitry Baryshkov #address-cells = <1>; 628e5813b15SDmitry Baryshkov #size-cells = <0>; 62901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 63001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 631e5813b15SDmitry Baryshkov status = "disabled"; 632e5813b15SDmitry Baryshkov }; 633e5813b15SDmitry Baryshkov 63408a9ae2dSDmitry Baryshkov uart18: serial@890000 { 63508a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 63608a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 63708a9ae2dSDmitry Baryshkov clock-names = "se"; 63808a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 63908a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 64008a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 64108a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 64201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 64301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 64408a9ae2dSDmitry Baryshkov status = "disabled"; 64508a9ae2dSDmitry Baryshkov }; 64608a9ae2dSDmitry Baryshkov 647e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 648e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 649e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 650e5813b15SDmitry Baryshkov clock-names = "se"; 651e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 652e5813b15SDmitry Baryshkov pinctrl-names = "default"; 653e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 654e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 655e5813b15SDmitry Baryshkov #address-cells = <1>; 656e5813b15SDmitry Baryshkov #size-cells = <0>; 657e5813b15SDmitry Baryshkov status = "disabled"; 658e5813b15SDmitry Baryshkov }; 659e5813b15SDmitry Baryshkov 660e5813b15SDmitry Baryshkov spi19: spi@894000 { 661e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 662e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 663e5813b15SDmitry Baryshkov clock-names = "se"; 664e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 665e5813b15SDmitry Baryshkov pinctrl-names = "default"; 666e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi19_default>; 667e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 668e5813b15SDmitry Baryshkov #address-cells = <1>; 669e5813b15SDmitry Baryshkov #size-cells = <0>; 67001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 67101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 672e5813b15SDmitry Baryshkov status = "disabled"; 673e5813b15SDmitry Baryshkov }; 674e5813b15SDmitry Baryshkov }; 675e5813b15SDmitry Baryshkov 676e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 677e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 678e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 679e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 680e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 681e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 682e5813b15SDmitry Baryshkov #address-cells = <2>; 683e5813b15SDmitry Baryshkov #size-cells = <2>; 68485309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 685e5813b15SDmitry Baryshkov ranges; 686e5813b15SDmitry Baryshkov status = "disabled"; 687e5813b15SDmitry Baryshkov 688e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 689e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 690e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 691e5813b15SDmitry Baryshkov clock-names = "se"; 692e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 693e5813b15SDmitry Baryshkov pinctrl-names = "default"; 694e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 695e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 696e5813b15SDmitry Baryshkov #address-cells = <1>; 697e5813b15SDmitry Baryshkov #size-cells = <0>; 698e5813b15SDmitry Baryshkov status = "disabled"; 699e5813b15SDmitry Baryshkov }; 700e5813b15SDmitry Baryshkov 701e5813b15SDmitry Baryshkov spi0: spi@980000 { 702e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 703e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 704e5813b15SDmitry Baryshkov clock-names = "se"; 705e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 706e5813b15SDmitry Baryshkov pinctrl-names = "default"; 707e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi0_default>; 708e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 709e5813b15SDmitry Baryshkov #address-cells = <1>; 710e5813b15SDmitry Baryshkov #size-cells = <0>; 71101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 71201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 713e5813b15SDmitry Baryshkov status = "disabled"; 714e5813b15SDmitry Baryshkov }; 715e5813b15SDmitry Baryshkov 716e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 717e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 718e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 719e5813b15SDmitry Baryshkov clock-names = "se"; 720e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 721e5813b15SDmitry Baryshkov pinctrl-names = "default"; 722e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 723e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 724e5813b15SDmitry Baryshkov #address-cells = <1>; 725e5813b15SDmitry Baryshkov #size-cells = <0>; 726e5813b15SDmitry Baryshkov status = "disabled"; 727e5813b15SDmitry Baryshkov }; 728e5813b15SDmitry Baryshkov 729e5813b15SDmitry Baryshkov spi1: spi@984000 { 730e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 731e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 732e5813b15SDmitry Baryshkov clock-names = "se"; 733e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 734e5813b15SDmitry Baryshkov pinctrl-names = "default"; 735e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi1_default>; 736e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 737e5813b15SDmitry Baryshkov #address-cells = <1>; 738e5813b15SDmitry Baryshkov #size-cells = <0>; 73901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 74001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 741e5813b15SDmitry Baryshkov status = "disabled"; 742e5813b15SDmitry Baryshkov }; 743e5813b15SDmitry Baryshkov 744e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 745e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 746e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 747e5813b15SDmitry Baryshkov clock-names = "se"; 748e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 749e5813b15SDmitry Baryshkov pinctrl-names = "default"; 750e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 751e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 752e5813b15SDmitry Baryshkov #address-cells = <1>; 753e5813b15SDmitry Baryshkov #size-cells = <0>; 754e5813b15SDmitry Baryshkov status = "disabled"; 755e5813b15SDmitry Baryshkov }; 756e5813b15SDmitry Baryshkov 757e5813b15SDmitry Baryshkov spi2: spi@988000 { 758e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 759e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 760e5813b15SDmitry Baryshkov clock-names = "se"; 761e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 762e5813b15SDmitry Baryshkov pinctrl-names = "default"; 763e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi2_default>; 764e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 765e5813b15SDmitry Baryshkov #address-cells = <1>; 766e5813b15SDmitry Baryshkov #size-cells = <0>; 76701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 76801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 769e5813b15SDmitry Baryshkov status = "disabled"; 770e5813b15SDmitry Baryshkov }; 771e5813b15SDmitry Baryshkov 77208a9ae2dSDmitry Baryshkov uart2: serial@988000 { 77308a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 77408a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 77508a9ae2dSDmitry Baryshkov clock-names = "se"; 77608a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 77708a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 77808a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 77908a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 78001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 78101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 78208a9ae2dSDmitry Baryshkov status = "disabled"; 78308a9ae2dSDmitry Baryshkov }; 78408a9ae2dSDmitry Baryshkov 785e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 786e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 787e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 788e5813b15SDmitry Baryshkov clock-names = "se"; 789e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 790e5813b15SDmitry Baryshkov pinctrl-names = "default"; 791e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 792e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 793e5813b15SDmitry Baryshkov #address-cells = <1>; 794e5813b15SDmitry Baryshkov #size-cells = <0>; 795e5813b15SDmitry Baryshkov status = "disabled"; 796e5813b15SDmitry Baryshkov }; 797e5813b15SDmitry Baryshkov 798e5813b15SDmitry Baryshkov spi3: spi@98c000 { 799e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 800e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 801e5813b15SDmitry Baryshkov clock-names = "se"; 802e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 803e5813b15SDmitry Baryshkov pinctrl-names = "default"; 804e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi3_default>; 805e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 806e5813b15SDmitry Baryshkov #address-cells = <1>; 807e5813b15SDmitry Baryshkov #size-cells = <0>; 80801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 80901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 810e5813b15SDmitry Baryshkov status = "disabled"; 811e5813b15SDmitry Baryshkov }; 812e5813b15SDmitry Baryshkov 813e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 814e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 815e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 816e5813b15SDmitry Baryshkov clock-names = "se"; 817e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 818e5813b15SDmitry Baryshkov pinctrl-names = "default"; 819e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 820e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 821e5813b15SDmitry Baryshkov #address-cells = <1>; 822e5813b15SDmitry Baryshkov #size-cells = <0>; 823e5813b15SDmitry Baryshkov status = "disabled"; 824e5813b15SDmitry Baryshkov }; 825e5813b15SDmitry Baryshkov 826e5813b15SDmitry Baryshkov spi4: spi@990000 { 827e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 828e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 829e5813b15SDmitry Baryshkov clock-names = "se"; 830e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 831e5813b15SDmitry Baryshkov pinctrl-names = "default"; 832e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi4_default>; 833e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 834e5813b15SDmitry Baryshkov #address-cells = <1>; 835e5813b15SDmitry Baryshkov #size-cells = <0>; 83601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 83701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 838e5813b15SDmitry Baryshkov status = "disabled"; 839e5813b15SDmitry Baryshkov }; 840e5813b15SDmitry Baryshkov 841e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 842e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 843e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 844e5813b15SDmitry Baryshkov clock-names = "se"; 845e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 846e5813b15SDmitry Baryshkov pinctrl-names = "default"; 847e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 848e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 849e5813b15SDmitry Baryshkov #address-cells = <1>; 850e5813b15SDmitry Baryshkov #size-cells = <0>; 851e5813b15SDmitry Baryshkov status = "disabled"; 852e5813b15SDmitry Baryshkov }; 853e5813b15SDmitry Baryshkov 854e5813b15SDmitry Baryshkov spi5: spi@994000 { 855e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 856e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 857e5813b15SDmitry Baryshkov clock-names = "se"; 858e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 859e5813b15SDmitry Baryshkov pinctrl-names = "default"; 860e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi5_default>; 861e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 862e5813b15SDmitry Baryshkov #address-cells = <1>; 863e5813b15SDmitry Baryshkov #size-cells = <0>; 86401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 86501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 866e5813b15SDmitry Baryshkov status = "disabled"; 867e5813b15SDmitry Baryshkov }; 868e5813b15SDmitry Baryshkov 869e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 870e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 871e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 872e5813b15SDmitry Baryshkov clock-names = "se"; 873e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 874e5813b15SDmitry Baryshkov pinctrl-names = "default"; 875e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 876e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 877e5813b15SDmitry Baryshkov #address-cells = <1>; 878e5813b15SDmitry Baryshkov #size-cells = <0>; 879e5813b15SDmitry Baryshkov status = "disabled"; 880e5813b15SDmitry Baryshkov }; 881e5813b15SDmitry Baryshkov 882e5813b15SDmitry Baryshkov spi6: spi@998000 { 883e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 884e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 885e5813b15SDmitry Baryshkov clock-names = "se"; 886e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 887e5813b15SDmitry Baryshkov pinctrl-names = "default"; 888e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi6_default>; 889e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 890e5813b15SDmitry Baryshkov #address-cells = <1>; 891e5813b15SDmitry Baryshkov #size-cells = <0>; 89201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 89301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 894e5813b15SDmitry Baryshkov status = "disabled"; 895e5813b15SDmitry Baryshkov }; 896e5813b15SDmitry Baryshkov 89708a9ae2dSDmitry Baryshkov uart6: serial@998000 { 89808a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 89908a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 90008a9ae2dSDmitry Baryshkov clock-names = "se"; 90108a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 90208a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 90308a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 90408a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 90501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 90601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 90708a9ae2dSDmitry Baryshkov status = "disabled"; 90808a9ae2dSDmitry Baryshkov }; 90908a9ae2dSDmitry Baryshkov 910e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 911e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 912e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 913e5813b15SDmitry Baryshkov clock-names = "se"; 914e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 915e5813b15SDmitry Baryshkov pinctrl-names = "default"; 916e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 917e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 918e5813b15SDmitry Baryshkov #address-cells = <1>; 919e5813b15SDmitry Baryshkov #size-cells = <0>; 920e5813b15SDmitry Baryshkov status = "disabled"; 921e5813b15SDmitry Baryshkov }; 922e5813b15SDmitry Baryshkov 923e5813b15SDmitry Baryshkov spi7: spi@99c000 { 924e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 925e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 926e5813b15SDmitry Baryshkov clock-names = "se"; 927e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 928e5813b15SDmitry Baryshkov pinctrl-names = "default"; 929e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi7_default>; 930e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 931e5813b15SDmitry Baryshkov #address-cells = <1>; 932e5813b15SDmitry Baryshkov #size-cells = <0>; 93301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 93401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 935e5813b15SDmitry Baryshkov status = "disabled"; 936e5813b15SDmitry Baryshkov }; 937e5813b15SDmitry Baryshkov }; 938e5813b15SDmitry Baryshkov 93960378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 94060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 94160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 94260378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 943fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 944fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 94560378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 94660378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 94785309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 94860378f1aSVenkata Narendra Kumar Gutta ranges; 94960378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 95060378f1aSVenkata Narendra Kumar Gutta 951e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 952e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 953e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 954e5813b15SDmitry Baryshkov clock-names = "se"; 955e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 956e5813b15SDmitry Baryshkov pinctrl-names = "default"; 957e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 958e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 959e5813b15SDmitry Baryshkov #address-cells = <1>; 960e5813b15SDmitry Baryshkov #size-cells = <0>; 961e5813b15SDmitry Baryshkov status = "disabled"; 962e5813b15SDmitry Baryshkov }; 963e5813b15SDmitry Baryshkov 964e5813b15SDmitry Baryshkov spi8: spi@a80000 { 965e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 966e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 967e5813b15SDmitry Baryshkov clock-names = "se"; 968e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 969e5813b15SDmitry Baryshkov pinctrl-names = "default"; 970e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi8_default>; 971e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 972e5813b15SDmitry Baryshkov #address-cells = <1>; 973e5813b15SDmitry Baryshkov #size-cells = <0>; 97401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 97501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 976e5813b15SDmitry Baryshkov status = "disabled"; 977e5813b15SDmitry Baryshkov }; 978e5813b15SDmitry Baryshkov 979e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 980e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 981e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 982e5813b15SDmitry Baryshkov clock-names = "se"; 983e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 984e5813b15SDmitry Baryshkov pinctrl-names = "default"; 985e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 986e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 987e5813b15SDmitry Baryshkov #address-cells = <1>; 988e5813b15SDmitry Baryshkov #size-cells = <0>; 989e5813b15SDmitry Baryshkov status = "disabled"; 990e5813b15SDmitry Baryshkov }; 991e5813b15SDmitry Baryshkov 992e5813b15SDmitry Baryshkov spi9: spi@a84000 { 993e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 994e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 995e5813b15SDmitry Baryshkov clock-names = "se"; 996e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 997e5813b15SDmitry Baryshkov pinctrl-names = "default"; 998e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi9_default>; 999e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1000e5813b15SDmitry Baryshkov #address-cells = <1>; 1001e5813b15SDmitry Baryshkov #size-cells = <0>; 100201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 100301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1004e5813b15SDmitry Baryshkov status = "disabled"; 1005e5813b15SDmitry Baryshkov }; 1006e5813b15SDmitry Baryshkov 1007e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1008e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1009e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1010e5813b15SDmitry Baryshkov clock-names = "se"; 1011e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1012e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1013e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1014e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1015e5813b15SDmitry Baryshkov #address-cells = <1>; 1016e5813b15SDmitry Baryshkov #size-cells = <0>; 1017e5813b15SDmitry Baryshkov status = "disabled"; 1018e5813b15SDmitry Baryshkov }; 1019e5813b15SDmitry Baryshkov 1020e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1021e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1022e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1023e5813b15SDmitry Baryshkov clock-names = "se"; 1024e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1025e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1026e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi10_default>; 1027e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1028e5813b15SDmitry Baryshkov #address-cells = <1>; 1029e5813b15SDmitry Baryshkov #size-cells = <0>; 103001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 103101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1032e5813b15SDmitry Baryshkov status = "disabled"; 1033e5813b15SDmitry Baryshkov }; 1034e5813b15SDmitry Baryshkov 1035e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1036e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1037e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1038e5813b15SDmitry Baryshkov clock-names = "se"; 1039e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1040e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1041e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1042e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1043e5813b15SDmitry Baryshkov #address-cells = <1>; 1044e5813b15SDmitry Baryshkov #size-cells = <0>; 1045e5813b15SDmitry Baryshkov status = "disabled"; 1046e5813b15SDmitry Baryshkov }; 1047e5813b15SDmitry Baryshkov 1048e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1049e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1050e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1051e5813b15SDmitry Baryshkov clock-names = "se"; 1052e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1053e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1054e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi11_default>; 1055e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1056e5813b15SDmitry Baryshkov #address-cells = <1>; 1057e5813b15SDmitry Baryshkov #size-cells = <0>; 105801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 105901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1060e5813b15SDmitry Baryshkov status = "disabled"; 1061e5813b15SDmitry Baryshkov }; 1062e5813b15SDmitry Baryshkov 1063e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1064e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1065e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1066e5813b15SDmitry Baryshkov clock-names = "se"; 1067e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1068e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1069e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1070e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1071e5813b15SDmitry Baryshkov #address-cells = <1>; 1072e5813b15SDmitry Baryshkov #size-cells = <0>; 1073e5813b15SDmitry Baryshkov status = "disabled"; 1074e5813b15SDmitry Baryshkov }; 1075e5813b15SDmitry Baryshkov 1076e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1077e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1078e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1079e5813b15SDmitry Baryshkov clock-names = "se"; 1080e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1081e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1082e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi12_default>; 1083e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1084e5813b15SDmitry Baryshkov #address-cells = <1>; 1085e5813b15SDmitry Baryshkov #size-cells = <0>; 108601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 108701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1088e5813b15SDmitry Baryshkov status = "disabled"; 1089e5813b15SDmitry Baryshkov }; 1090e5813b15SDmitry Baryshkov 1091bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 109260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 109360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 109460378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1095fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1096bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1097bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 109860378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 109901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 110001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 110160378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 110260378f1aSVenkata Narendra Kumar Gutta }; 1103e5813b15SDmitry Baryshkov 1104e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1105e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1106e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1107e5813b15SDmitry Baryshkov clock-names = "se"; 1108e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1109e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1110e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1111e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1112e5813b15SDmitry Baryshkov #address-cells = <1>; 1113e5813b15SDmitry Baryshkov #size-cells = <0>; 1114e5813b15SDmitry Baryshkov status = "disabled"; 1115e5813b15SDmitry Baryshkov }; 1116e5813b15SDmitry Baryshkov 1117e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1118e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1119e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1120e5813b15SDmitry Baryshkov clock-names = "se"; 1121e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1122e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1123e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi13_default>; 1124e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1125e5813b15SDmitry Baryshkov #address-cells = <1>; 1126e5813b15SDmitry Baryshkov #size-cells = <0>; 112701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 112801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1129e5813b15SDmitry Baryshkov status = "disabled"; 1130e5813b15SDmitry Baryshkov }; 113160378f1aSVenkata Narendra Kumar Gutta }; 113260378f1aSVenkata Narendra Kumar Gutta 1133e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1134e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1135e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1136e7e41a20SJonathan Marek #interconnect-cells = <1>; 1137e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1138e7e41a20SJonathan Marek }; 1139e7e41a20SJonathan Marek 1140e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1141e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1142e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1143e7e41a20SJonathan Marek #interconnect-cells = <1>; 1144e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1145e7e41a20SJonathan Marek }; 1146e7e41a20SJonathan Marek 1147e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1148e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1149e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1150e7e41a20SJonathan Marek #interconnect-cells = <1>; 1151e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1152e7e41a20SJonathan Marek }; 1153e7e41a20SJonathan Marek 1154e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1155e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1156e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1157e7e41a20SJonathan Marek #interconnect-cells = <1>; 1158e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1159e7e41a20SJonathan Marek }; 1160e7e41a20SJonathan Marek 1161e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1162e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1163e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1164e7e41a20SJonathan Marek #interconnect-cells = <1>; 1165e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1166e7e41a20SJonathan Marek }; 1167e7e41a20SJonathan Marek 1168e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1169e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1170e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1171e7e41a20SJonathan Marek #interconnect-cells = <1>; 1172e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1173e7e41a20SJonathan Marek }; 1174e7e41a20SJonathan Marek 1175e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1176e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1177e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1178e7e41a20SJonathan Marek #interconnect-cells = <1>; 1179e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1180e7e41a20SJonathan Marek }; 1181e7e41a20SJonathan Marek 11826b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 1183b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 1184b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 1185b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 1186b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 1187b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 1188b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 1189b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 1190b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 1191b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 1192b7e2fba0SBryan O'Donoghue reset-names = "rst"; 1193b7e2fba0SBryan O'Donoghue 1194b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 1195b7e2fba0SBryan O'Donoghue 1196a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 1197a89441fcSJonathan Marek 1198b7e2fba0SBryan O'Donoghue clock-names = 1199b7e2fba0SBryan O'Donoghue "core_clk", 1200b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 1201b7e2fba0SBryan O'Donoghue "iface_clk", 1202b7e2fba0SBryan O'Donoghue "core_clk_unipro", 1203b7e2fba0SBryan O'Donoghue "ref_clk", 1204b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 1205b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 1206b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 1207b7e2fba0SBryan O'Donoghue clocks = 1208b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 1209b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 1210b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 1211b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 1212b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 1213b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 1214b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 1215b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 1216b7e2fba0SBryan O'Donoghue freq-table-hz = 1217b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1218b7e2fba0SBryan O'Donoghue <0 0>, 1219b7e2fba0SBryan O'Donoghue <0 0>, 1220b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1221b7e2fba0SBryan O'Donoghue <0 0>, 1222b7e2fba0SBryan O'Donoghue <0 0>, 1223b7e2fba0SBryan O'Donoghue <0 0>, 1224b7e2fba0SBryan O'Donoghue <0 0>; 1225b7e2fba0SBryan O'Donoghue 1226b7e2fba0SBryan O'Donoghue status = "disabled"; 1227b7e2fba0SBryan O'Donoghue }; 1228b7e2fba0SBryan O'Donoghue 1229b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 1230b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 1231b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 1232b7e2fba0SBryan O'Donoghue #address-cells = <2>; 1233b7e2fba0SBryan O'Donoghue #size-cells = <2>; 1234b7e2fba0SBryan O'Donoghue ranges; 1235b7e2fba0SBryan O'Donoghue clock-names = "ref", 1236b7e2fba0SBryan O'Donoghue "ref_aux"; 1237b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 1238b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 1239b7e2fba0SBryan O'Donoghue 1240b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 1241b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 1242b7e2fba0SBryan O'Donoghue status = "disabled"; 1243b7e2fba0SBryan O'Donoghue 1244b7e2fba0SBryan O'Donoghue ufs_mem_phy_lanes: lanes@1d87400 { 1245b7e2fba0SBryan O'Donoghue reg = <0 0x01d87400 0 0x108>, 1246b7e2fba0SBryan O'Donoghue <0 0x01d87600 0 0x1e0>, 1247b7e2fba0SBryan O'Donoghue <0 0x01d87c00 0 0x1dc>, 1248b7e2fba0SBryan O'Donoghue <0 0x01d87800 0 0x108>, 1249b7e2fba0SBryan O'Donoghue <0 0x01d87a00 0 0x1e0>; 1250b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 1251b7e2fba0SBryan O'Donoghue }; 1252b7e2fba0SBryan O'Donoghue }; 1253b7e2fba0SBryan O'Donoghue 1254e7e41a20SJonathan Marek ipa_virt: interconnect@1e00000 { 1255e7e41a20SJonathan Marek compatible = "qcom,sm8250-ipa-virt"; 1256e7e41a20SJonathan Marek reg = <0 0x01e00000 0 0x1000>; 1257e7e41a20SJonathan Marek #interconnect-cells = <1>; 1258e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1259e7e41a20SJonathan Marek }; 1260e7e41a20SJonathan Marek 1261dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 1262dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 1263b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 1264dff0f49cSBjorn Andersson #hwlock-cells = <1>; 126560378f1aSVenkata Narendra Kumar Gutta }; 126660378f1aSVenkata Narendra Kumar Gutta 1267768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 1268768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 1269768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 1270768270caSSrinivas Kandagatla clocks = <&audiocc 1>, 1271768270caSSrinivas Kandagatla <&audiocc 0>, 1272768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1273768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1274768270caSSrinivas Kandagatla <&aoncc 0>, 1275768270caSSrinivas Kandagatla <&vamacro>; 1276768270caSSrinivas Kandagatla 1277768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 1278768270caSSrinivas Kandagatla 1279768270caSSrinivas Kandagatla #clock-cells = <0>; 1280768270caSSrinivas Kandagatla clock-frequency = <9600000>; 1281768270caSSrinivas Kandagatla clock-output-names = "mclk"; 1282768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1283768270caSSrinivas Kandagatla 1284768270caSSrinivas Kandagatla pinctrl-names = "default"; 1285768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 1286768270caSSrinivas Kandagatla }; 1287768270caSSrinivas Kandagatla 1288768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 1289768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 1290768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 1291768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 1292768270caSSrinivas Kandagatla clocks = <&wsamacro>; 1293768270caSSrinivas Kandagatla clock-names = "iface"; 1294768270caSSrinivas Kandagatla 1295768270caSSrinivas Kandagatla qcom,din-ports = <2>; 1296768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 1297768270caSSrinivas Kandagatla 1298768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 1299768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 1300768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 1301768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 1302768270caSSrinivas Kandagatla 1303768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1304768270caSSrinivas Kandagatla #address-cells = <2>; 1305768270caSSrinivas Kandagatla #size-cells = <0>; 1306768270caSSrinivas Kandagatla }; 1307768270caSSrinivas Kandagatla 1308793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 1309793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 1310793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 1311793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 1312793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1313793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1314793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1315793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 1316793bbd2dSSrinivas Kandagatla }; 1317793bbd2dSSrinivas Kandagatla 1318768270caSSrinivas Kandagatla vamacro: codec@3370000 { 1319768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 1320768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 1321768270caSSrinivas Kandagatla clocks = <&aoncc 0>, 1322768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1323768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1324768270caSSrinivas Kandagatla 1325768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 1326768270caSSrinivas Kandagatla 1327768270caSSrinivas Kandagatla #clock-cells = <0>; 1328768270caSSrinivas Kandagatla clock-frequency = <9600000>; 1329768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 1330768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1331768270caSSrinivas Kandagatla }; 1332768270caSSrinivas Kandagatla 1333793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 1334793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 1335793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 1336793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 1337793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1338793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1339793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1340793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 1341793bbd2dSSrinivas Kandagatla }; 1342793bbd2dSSrinivas Kandagatla 13433160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000{ 13443160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 13453160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 13463160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 13473160c1b8SSrinivas Kandagatla gpio-controller; 13483160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 13493160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 13503160c1b8SSrinivas Kandagatla 13513160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 13523160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 13533160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 13543160c1b8SSrinivas Kandagatla 13553160c1b8SSrinivas Kandagatla wsa_swr_active: wsa-swr-active-pins { 13563160c1b8SSrinivas Kandagatla clk { 13573160c1b8SSrinivas Kandagatla pins = "gpio10"; 13583160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 13593160c1b8SSrinivas Kandagatla drive-strength = <2>; 13603160c1b8SSrinivas Kandagatla slew-rate = <1>; 13613160c1b8SSrinivas Kandagatla bias-disable; 13623160c1b8SSrinivas Kandagatla }; 13633160c1b8SSrinivas Kandagatla 13643160c1b8SSrinivas Kandagatla data { 13653160c1b8SSrinivas Kandagatla pins = "gpio11"; 13663160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 13673160c1b8SSrinivas Kandagatla drive-strength = <2>; 13683160c1b8SSrinivas Kandagatla slew-rate = <1>; 13693160c1b8SSrinivas Kandagatla bias-bus-hold; 13703160c1b8SSrinivas Kandagatla 13713160c1b8SSrinivas Kandagatla }; 13723160c1b8SSrinivas Kandagatla }; 13733160c1b8SSrinivas Kandagatla 13743160c1b8SSrinivas Kandagatla wsa_swr_sleep: wsa-swr-sleep-pins { 13753160c1b8SSrinivas Kandagatla clk { 13763160c1b8SSrinivas Kandagatla pins = "gpio10"; 13773160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 13783160c1b8SSrinivas Kandagatla drive-strength = <2>; 13793160c1b8SSrinivas Kandagatla input-enable; 13803160c1b8SSrinivas Kandagatla bias-pull-down; 13813160c1b8SSrinivas Kandagatla }; 13823160c1b8SSrinivas Kandagatla 13833160c1b8SSrinivas Kandagatla data { 13843160c1b8SSrinivas Kandagatla pins = "gpio11"; 13853160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 13863160c1b8SSrinivas Kandagatla drive-strength = <2>; 13873160c1b8SSrinivas Kandagatla input-enable; 13883160c1b8SSrinivas Kandagatla bias-pull-down; 13893160c1b8SSrinivas Kandagatla 13903160c1b8SSrinivas Kandagatla }; 13913160c1b8SSrinivas Kandagatla }; 13923160c1b8SSrinivas Kandagatla 13933160c1b8SSrinivas Kandagatla dmic01_active: dmic01-active-pins { 13943160c1b8SSrinivas Kandagatla clk { 13953160c1b8SSrinivas Kandagatla pins = "gpio6"; 13963160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 13973160c1b8SSrinivas Kandagatla drive-strength = <8>; 13983160c1b8SSrinivas Kandagatla output-high; 13993160c1b8SSrinivas Kandagatla }; 14003160c1b8SSrinivas Kandagatla data { 14013160c1b8SSrinivas Kandagatla pins = "gpio7"; 14023160c1b8SSrinivas Kandagatla function = "dmic1_data"; 14033160c1b8SSrinivas Kandagatla drive-strength = <8>; 14043160c1b8SSrinivas Kandagatla input-enable; 14053160c1b8SSrinivas Kandagatla }; 14063160c1b8SSrinivas Kandagatla }; 14073160c1b8SSrinivas Kandagatla 14083160c1b8SSrinivas Kandagatla dmic01_sleep: dmic01-sleep-pins { 14093160c1b8SSrinivas Kandagatla clk { 14103160c1b8SSrinivas Kandagatla pins = "gpio6"; 14113160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 14123160c1b8SSrinivas Kandagatla drive-strength = <2>; 14133160c1b8SSrinivas Kandagatla bias-disable; 14143160c1b8SSrinivas Kandagatla output-low; 14153160c1b8SSrinivas Kandagatla }; 14163160c1b8SSrinivas Kandagatla 14173160c1b8SSrinivas Kandagatla data { 14183160c1b8SSrinivas Kandagatla pins = "gpio7"; 14193160c1b8SSrinivas Kandagatla function = "dmic1_data"; 14203160c1b8SSrinivas Kandagatla drive-strength = <2>; 14213160c1b8SSrinivas Kandagatla pull-down; 14223160c1b8SSrinivas Kandagatla input-enable; 14233160c1b8SSrinivas Kandagatla }; 14243160c1b8SSrinivas Kandagatla }; 14253160c1b8SSrinivas Kandagatla }; 14263160c1b8SSrinivas Kandagatla 142704a3605bSJonathan Marek gpu: gpu@3d00000 { 142804a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 14297c1dffd4SDmitry Baryshkov "qcom,adreno"; 143004a3605bSJonathan Marek #stream-id-cells = <16>; 143104a3605bSJonathan Marek 143204a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 143304a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 143404a3605bSJonathan Marek 143504a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 143604a3605bSJonathan Marek 143704a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 143804a3605bSJonathan Marek 143904a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 144004a3605bSJonathan Marek 144104a3605bSJonathan Marek qcom,gmu = <&gmu>; 144204a3605bSJonathan Marek 144304a3605bSJonathan Marek zap-shader { 144404a3605bSJonathan Marek memory-region = <&gpu_mem>; 144504a3605bSJonathan Marek }; 144604a3605bSJonathan Marek 144704a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 144804a3605bSJonathan Marek gpu_opp_table: opp-table { 144904a3605bSJonathan Marek compatible = "operating-points-v2"; 145004a3605bSJonathan Marek 145104a3605bSJonathan Marek opp-670000000 { 145204a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 145304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 145404a3605bSJonathan Marek }; 145504a3605bSJonathan Marek 145604a3605bSJonathan Marek opp-587000000 { 145704a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 145804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 145904a3605bSJonathan Marek }; 146004a3605bSJonathan Marek 146104a3605bSJonathan Marek opp-525000000 { 146204a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 146304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 146404a3605bSJonathan Marek }; 146504a3605bSJonathan Marek 146604a3605bSJonathan Marek opp-490000000 { 146704a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 146804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 146904a3605bSJonathan Marek }; 147004a3605bSJonathan Marek 147104a3605bSJonathan Marek opp-441600000 { 147204a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 147304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 147404a3605bSJonathan Marek }; 147504a3605bSJonathan Marek 147604a3605bSJonathan Marek opp-400000000 { 147704a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 147804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 147904a3605bSJonathan Marek }; 148004a3605bSJonathan Marek 148104a3605bSJonathan Marek opp-305000000 { 148204a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 148304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 148404a3605bSJonathan Marek }; 148504a3605bSJonathan Marek }; 148604a3605bSJonathan Marek }; 148704a3605bSJonathan Marek 148804a3605bSJonathan Marek gmu: gmu@3d6a000 { 148904a3605bSJonathan Marek compatible="qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 149004a3605bSJonathan Marek 149104a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 149204a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 149304a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 149404a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 149504a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 149604a3605bSJonathan Marek 149704a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 149804a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 149904a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 150004a3605bSJonathan Marek 15010e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 15020e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 15030e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 150404a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 150504a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 150604a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 150704a3605bSJonathan Marek 15080e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 15090e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 151004a3605bSJonathan Marek power-domain-names = "cx", "gx"; 151104a3605bSJonathan Marek 151204a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 151304a3605bSJonathan Marek 151404a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 151504a3605bSJonathan Marek 151604a3605bSJonathan Marek gmu_opp_table: opp-table { 151704a3605bSJonathan Marek compatible = "operating-points-v2"; 151804a3605bSJonathan Marek 151904a3605bSJonathan Marek opp-200000000 { 152004a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 152104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 152204a3605bSJonathan Marek }; 152304a3605bSJonathan Marek }; 152404a3605bSJonathan Marek }; 152504a3605bSJonathan Marek 152604a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 152704a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 152804a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 152904a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 153004a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 153104a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 153204a3605bSJonathan Marek clock-names = "bi_tcxo", 153304a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 153404a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 153504a3605bSJonathan Marek #clock-cells = <1>; 153604a3605bSJonathan Marek #reset-cells = <1>; 153704a3605bSJonathan Marek #power-domain-cells = <1>; 153804a3605bSJonathan Marek }; 153904a3605bSJonathan Marek 154004a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 154104a3605bSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 154204a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 154304a3605bSJonathan Marek #iommu-cells = <2>; 154404a3605bSJonathan Marek #global-interrupts = <2>; 154504a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 154604a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 154704a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 154804a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 154904a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 155004a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 155104a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 155204a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 155304a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 155404a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 15550e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 155604a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 155704a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 155804a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 155904a3605bSJonathan Marek 15600e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 156104a3605bSJonathan Marek }; 156204a3605bSJonathan Marek 156323a89037SBjorn Andersson slpi: remoteproc@5c00000 { 156423a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 156523a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 156623a89037SBjorn Andersson 156723a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 156823a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 156923a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 157023a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 157123a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 157223a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 157323a89037SBjorn Andersson "handover", "stop-ack"; 157423a89037SBjorn Andersson 157523a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 157623a89037SBjorn Andersson clock-names = "xo"; 157723a89037SBjorn Andersson 157823a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 157923a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 158023a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 158123a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 158223a89037SBjorn Andersson 158323a89037SBjorn Andersson memory-region = <&slpi_mem>; 158423a89037SBjorn Andersson 158523a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 158623a89037SBjorn Andersson qcom,smem-state-names = "stop"; 158723a89037SBjorn Andersson 158823a89037SBjorn Andersson status = "disabled"; 158923a89037SBjorn Andersson 159023a89037SBjorn Andersson glink-edge { 159123a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 159223a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 159323a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 159423a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 159523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 159623a89037SBjorn Andersson 159725695808SJonathan Marek label = "slpi"; 159823a89037SBjorn Andersson qcom,remote-pid = <3>; 159925695808SJonathan Marek 160025695808SJonathan Marek fastrpc { 160125695808SJonathan Marek compatible = "qcom,fastrpc"; 160225695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 160325695808SJonathan Marek label = "sdsp"; 160425695808SJonathan Marek #address-cells = <1>; 160525695808SJonathan Marek #size-cells = <0>; 160625695808SJonathan Marek 160725695808SJonathan Marek compute-cb@1 { 160825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 160925695808SJonathan Marek reg = <1>; 161025695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 161125695808SJonathan Marek }; 161225695808SJonathan Marek 161325695808SJonathan Marek compute-cb@2 { 161425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 161525695808SJonathan Marek reg = <2>; 161625695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 161725695808SJonathan Marek }; 161825695808SJonathan Marek 161925695808SJonathan Marek compute-cb@3 { 162025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 162125695808SJonathan Marek reg = <3>; 162225695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 162325695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 162425695808SJonathan Marek }; 162525695808SJonathan Marek }; 162623a89037SBjorn Andersson }; 162723a89037SBjorn Andersson }; 162823a89037SBjorn Andersson 162923a89037SBjorn Andersson cdsp: remoteproc@8300000 { 163023a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 163123a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 163223a89037SBjorn Andersson 163323a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 163423a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 163523a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 163623a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 163723a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 163823a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 163923a89037SBjorn Andersson "handover", "stop-ack"; 164023a89037SBjorn Andersson 164123a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 164223a89037SBjorn Andersson clock-names = "xo"; 164323a89037SBjorn Andersson 164423a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 164523a89037SBjorn Andersson <&rpmhpd SM8250_CX>; 164623a89037SBjorn Andersson power-domain-names = "load_state", "cx"; 164723a89037SBjorn Andersson 164823a89037SBjorn Andersson memory-region = <&cdsp_mem>; 164923a89037SBjorn Andersson 165023a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 165123a89037SBjorn Andersson qcom,smem-state-names = "stop"; 165223a89037SBjorn Andersson 165323a89037SBjorn Andersson status = "disabled"; 165423a89037SBjorn Andersson 165523a89037SBjorn Andersson glink-edge { 165623a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 165723a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 165823a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 165923a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 166023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 166123a89037SBjorn Andersson 166225695808SJonathan Marek label = "cdsp"; 166323a89037SBjorn Andersson qcom,remote-pid = <5>; 166425695808SJonathan Marek 166525695808SJonathan Marek fastrpc { 166625695808SJonathan Marek compatible = "qcom,fastrpc"; 166725695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 166825695808SJonathan Marek label = "cdsp"; 166925695808SJonathan Marek #address-cells = <1>; 167025695808SJonathan Marek #size-cells = <0>; 167125695808SJonathan Marek 167225695808SJonathan Marek compute-cb@1 { 167325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 167425695808SJonathan Marek reg = <1>; 167525695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 167625695808SJonathan Marek }; 167725695808SJonathan Marek 167825695808SJonathan Marek compute-cb@2 { 167925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 168025695808SJonathan Marek reg = <2>; 168125695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 168225695808SJonathan Marek }; 168325695808SJonathan Marek 168425695808SJonathan Marek compute-cb@3 { 168525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 168625695808SJonathan Marek reg = <3>; 168725695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 168825695808SJonathan Marek }; 168925695808SJonathan Marek 169025695808SJonathan Marek compute-cb@4 { 169125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 169225695808SJonathan Marek reg = <4>; 169325695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 169425695808SJonathan Marek }; 169525695808SJonathan Marek 169625695808SJonathan Marek compute-cb@5 { 169725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 169825695808SJonathan Marek reg = <5>; 169925695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 170025695808SJonathan Marek }; 170125695808SJonathan Marek 170225695808SJonathan Marek compute-cb@6 { 170325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 170425695808SJonathan Marek reg = <6>; 170525695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 170625695808SJonathan Marek }; 170725695808SJonathan Marek 170825695808SJonathan Marek compute-cb@7 { 170925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 171025695808SJonathan Marek reg = <7>; 171125695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 171225695808SJonathan Marek }; 171325695808SJonathan Marek 171425695808SJonathan Marek compute-cb@8 { 171525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 171625695808SJonathan Marek reg = <8>; 171725695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 171825695808SJonathan Marek }; 171925695808SJonathan Marek 172025695808SJonathan Marek /* note: secure cb9 in downstream */ 172125695808SJonathan Marek }; 172223a89037SBjorn Andersson }; 172323a89037SBjorn Andersson }; 172423a89037SBjorn Andersson 1725*590a135eSSrinivas Kandagatla sound: sound { 1726*590a135eSSrinivas Kandagatla }; 1727*590a135eSSrinivas Kandagatla 172846a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 172946a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 173046a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 173146a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 173246a6f297SJonathan Marek status = "disabled"; 173346a6f297SJonathan Marek #phy-cells = <0>; 173446a6f297SJonathan Marek 173546a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 173646a6f297SJonathan Marek clock-names = "ref"; 173746a6f297SJonathan Marek 173846a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 173946a6f297SJonathan Marek }; 174046a6f297SJonathan Marek 174146a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 174246a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 174346a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 174446a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 174546a6f297SJonathan Marek status = "disabled"; 174646a6f297SJonathan Marek #phy-cells = <0>; 174746a6f297SJonathan Marek 174846a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 174946a6f297SJonathan Marek clock-names = "ref"; 175046a6f297SJonathan Marek 175146a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 175246a6f297SJonathan Marek }; 175346a6f297SJonathan Marek 175446a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 175546a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-phy"; 175646a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 175746a6f297SJonathan Marek <0 0x088e8000 0 0x20>; 175846a6f297SJonathan Marek reg-names = "reg-base", "dp_com"; 175946a6f297SJonathan Marek status = "disabled"; 176046a6f297SJonathan Marek #clock-cells = <1>; 176146a6f297SJonathan Marek #address-cells = <2>; 176246a6f297SJonathan Marek #size-cells = <2>; 176346a6f297SJonathan Marek ranges; 176446a6f297SJonathan Marek 176546a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 176646a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 176746a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 176846a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 176946a6f297SJonathan Marek 177046a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 177146a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 177246a6f297SJonathan Marek reset-names = "phy", "common"; 177346a6f297SJonathan Marek 177446a6f297SJonathan Marek usb_1_ssphy: lanes@88e9200 { 177546a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 177646a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 177746a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 177846a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 177946a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 178046a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 178146a6f297SJonathan Marek #phy-cells = <0>; 178246a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 178346a6f297SJonathan Marek clock-names = "pipe0"; 178446a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 178546a6f297SJonathan Marek }; 178646a6f297SJonathan Marek }; 178746a6f297SJonathan Marek 178846a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 178946a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 179046a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 179146a6f297SJonathan Marek status = "disabled"; 179246a6f297SJonathan Marek #clock-cells = <1>; 179346a6f297SJonathan Marek #address-cells = <2>; 179446a6f297SJonathan Marek #size-cells = <2>; 179546a6f297SJonathan Marek ranges; 179646a6f297SJonathan Marek 179746a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 179846a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 179946a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 180046a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 180146a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 180246a6f297SJonathan Marek 180346a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 180446a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 180546a6f297SJonathan Marek reset-names = "phy", "common"; 180646a6f297SJonathan Marek 180746a6f297SJonathan Marek usb_2_ssphy: lane@88eb200 { 180846a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 180946a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 181046a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 181146a6f297SJonathan Marek #phy-cells = <0>; 181246a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 181346a6f297SJonathan Marek clock-names = "pipe0"; 181446a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 181546a6f297SJonathan Marek }; 181646a6f297SJonathan Marek }; 181746a6f297SJonathan Marek 1818c4cf0300SManivannan Sadhasivam sdhc_2: sdhci@8804000 { 1819c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 1820c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 1821c4cf0300SManivannan Sadhasivam 1822c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1823c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 1824c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 1825c4cf0300SManivannan Sadhasivam 1826c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 1827c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 1828c4cf0300SManivannan Sadhasivam <&xo_board>; 1829c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 1830c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 1831c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 1832c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 1833c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 1834c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 1835c4cf0300SManivannan Sadhasivam 1836c4cf0300SManivannan Sadhasivam status = "disabled"; 1837c4cf0300SManivannan Sadhasivam 1838c4cf0300SManivannan Sadhasivam sdhc2_opp_table: sdhc2-opp-table { 1839c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 1840c4cf0300SManivannan Sadhasivam 1841c4cf0300SManivannan Sadhasivam opp-19200000 { 1842c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 1843c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 1844c4cf0300SManivannan Sadhasivam }; 1845c4cf0300SManivannan Sadhasivam 1846c4cf0300SManivannan Sadhasivam opp-50000000 { 1847c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 1848c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 1849c4cf0300SManivannan Sadhasivam }; 1850c4cf0300SManivannan Sadhasivam 1851c4cf0300SManivannan Sadhasivam opp-100000000 { 1852c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 1853c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 1854c4cf0300SManivannan Sadhasivam }; 1855c4cf0300SManivannan Sadhasivam 1856c4cf0300SManivannan Sadhasivam opp-202000000 { 1857c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 1858c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 1859c4cf0300SManivannan Sadhasivam }; 1860c4cf0300SManivannan Sadhasivam }; 1861c4cf0300SManivannan Sadhasivam }; 1862c4cf0300SManivannan Sadhasivam 1863e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 1864e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 1865e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 1866e7e41a20SJonathan Marek #interconnect-cells = <1>; 1867e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1868e7e41a20SJonathan Marek }; 1869e7e41a20SJonathan Marek 1870e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 1871e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 1872e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 1873e7e41a20SJonathan Marek #interconnect-cells = <1>; 1874e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1875e7e41a20SJonathan Marek }; 1876e7e41a20SJonathan Marek 1877e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 1878e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 1879e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 1880e7e41a20SJonathan Marek #interconnect-cells = <1>; 1881e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1882e7e41a20SJonathan Marek }; 1883e7e41a20SJonathan Marek 188446a6f297SJonathan Marek usb_1: usb@a6f8800 { 188546a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 188646a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 188746a6f297SJonathan Marek status = "disabled"; 188846a6f297SJonathan Marek #address-cells = <2>; 188946a6f297SJonathan Marek #size-cells = <2>; 189046a6f297SJonathan Marek ranges; 189146a6f297SJonathan Marek dma-ranges; 189246a6f297SJonathan Marek 189346a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 189446a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 189546a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 189646a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 189746a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 189846a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 189946a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 190046a6f297SJonathan Marek "sleep", "xo"; 190146a6f297SJonathan Marek 190246a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 190346a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 190446a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 190546a6f297SJonathan Marek 190646a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 190746a6f297SJonathan Marek <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 190846a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 190946a6f297SJonathan Marek <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 191046a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 191146a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 191246a6f297SJonathan Marek 191346a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 191446a6f297SJonathan Marek 191546a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 191646a6f297SJonathan Marek 191746a6f297SJonathan Marek usb_1_dwc3: dwc3@a600000 { 191846a6f297SJonathan Marek compatible = "snps,dwc3"; 191946a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 192046a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 192146a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 192246a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 192346a6f297SJonathan Marek snps,dis_enblslpm_quirk; 192446a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 192546a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 192646a6f297SJonathan Marek }; 192746a6f297SJonathan Marek }; 192846a6f297SJonathan Marek 19290085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 19300085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 19310085a33aSManivannan Sadhasivam reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 19320085a33aSManivannan Sadhasivam reg-names = "llcc_base", "llcc_broadcast_base"; 19330085a33aSManivannan Sadhasivam }; 19340085a33aSManivannan Sadhasivam 193546a6f297SJonathan Marek usb_2: usb@a8f8800 { 193646a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 193746a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 193846a6f297SJonathan Marek status = "disabled"; 193946a6f297SJonathan Marek #address-cells = <2>; 194046a6f297SJonathan Marek #size-cells = <2>; 194146a6f297SJonathan Marek ranges; 194246a6f297SJonathan Marek dma-ranges; 194346a6f297SJonathan Marek 194446a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 194546a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 194646a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 194746a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 194846a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 194946a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 195046a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 195146a6f297SJonathan Marek "sleep", "xo"; 195246a6f297SJonathan Marek 195346a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 195446a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 195546a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 195646a6f297SJonathan Marek 195746a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 195846a6f297SJonathan Marek <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 195946a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 196046a6f297SJonathan Marek <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 196146a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 196246a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 196346a6f297SJonathan Marek 196446a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 196546a6f297SJonathan Marek 196646a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 196746a6f297SJonathan Marek 196846a6f297SJonathan Marek usb_2_dwc3: dwc3@a800000 { 196946a6f297SJonathan Marek compatible = "snps,dwc3"; 197046a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 197146a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 197246a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 197346a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 197446a6f297SJonathan Marek snps,dis_enblslpm_quirk; 197546a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 197646a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 197746a6f297SJonathan Marek }; 197846a6f297SJonathan Marek }; 197946a6f297SJonathan Marek 19807c1dffd4SDmitry Baryshkov mdss: mdss@ae00000 { 19817c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-mdss"; 19827c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 19837c1dffd4SDmitry Baryshkov reg-names = "mdss"; 19847c1dffd4SDmitry Baryshkov 19857c1dffd4SDmitry Baryshkov interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>, 19867c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, 19877c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; 19887c1dffd4SDmitry Baryshkov interconnect-names = "notused", "mdp0-mem", "mdp1-mem"; 19897c1dffd4SDmitry Baryshkov 19907c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 19917c1dffd4SDmitry Baryshkov 19927c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 19937c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 19947c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 19957c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 19967c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "nrt_bus", "core"; 19977c1dffd4SDmitry Baryshkov 19987c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; 19997c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>; 20007c1dffd4SDmitry Baryshkov 20017c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 20027c1dffd4SDmitry Baryshkov interrupt-controller; 20037c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 20047c1dffd4SDmitry Baryshkov 20057c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 20067c1dffd4SDmitry Baryshkov 20077c1dffd4SDmitry Baryshkov status = "disabled"; 20087c1dffd4SDmitry Baryshkov 20097c1dffd4SDmitry Baryshkov #address-cells = <2>; 20107c1dffd4SDmitry Baryshkov #size-cells = <2>; 20117c1dffd4SDmitry Baryshkov ranges; 20127c1dffd4SDmitry Baryshkov 20137c1dffd4SDmitry Baryshkov mdss_mdp: mdp@ae01000 { 20147c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-dpu"; 20157c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 20167c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 20177c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 20187c1dffd4SDmitry Baryshkov 20197c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 20207c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 20217c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 20227c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 20237c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 20247c1dffd4SDmitry Baryshkov 20257c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, 20267c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 20277c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>, 20287c1dffd4SDmitry Baryshkov <19200000>; 20297c1dffd4SDmitry Baryshkov 20307c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 20317c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 20327c1dffd4SDmitry Baryshkov 20337c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 20347c1dffd4SDmitry Baryshkov interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 20357c1dffd4SDmitry Baryshkov 20367c1dffd4SDmitry Baryshkov status = "disabled"; 20377c1dffd4SDmitry Baryshkov 20387c1dffd4SDmitry Baryshkov ports { 20397c1dffd4SDmitry Baryshkov #address-cells = <1>; 20407c1dffd4SDmitry Baryshkov #size-cells = <0>; 20417c1dffd4SDmitry Baryshkov 20427c1dffd4SDmitry Baryshkov port@0 { 20437c1dffd4SDmitry Baryshkov reg = <0>; 20447c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 20457c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 20467c1dffd4SDmitry Baryshkov }; 20477c1dffd4SDmitry Baryshkov }; 20487c1dffd4SDmitry Baryshkov 20497c1dffd4SDmitry Baryshkov port@1 { 20507c1dffd4SDmitry Baryshkov reg = <1>; 20517c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 20527c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 20537c1dffd4SDmitry Baryshkov }; 20547c1dffd4SDmitry Baryshkov }; 20557c1dffd4SDmitry Baryshkov }; 20567c1dffd4SDmitry Baryshkov 20577c1dffd4SDmitry Baryshkov mdp_opp_table: mdp-opp-table { 20587c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 20597c1dffd4SDmitry Baryshkov 20607c1dffd4SDmitry Baryshkov opp-200000000 { 20617c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 20627c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 20637c1dffd4SDmitry Baryshkov }; 20647c1dffd4SDmitry Baryshkov 20657c1dffd4SDmitry Baryshkov opp-300000000 { 20667c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 20677c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 20687c1dffd4SDmitry Baryshkov }; 20697c1dffd4SDmitry Baryshkov 20707c1dffd4SDmitry Baryshkov opp-345000000 { 20717c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 20727c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 20737c1dffd4SDmitry Baryshkov }; 20747c1dffd4SDmitry Baryshkov 20757c1dffd4SDmitry Baryshkov opp-460000000 { 20767c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 20777c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 20787c1dffd4SDmitry Baryshkov }; 20797c1dffd4SDmitry Baryshkov }; 20807c1dffd4SDmitry Baryshkov }; 20817c1dffd4SDmitry Baryshkov 20827c1dffd4SDmitry Baryshkov dsi0: dsi@ae94000 { 20837c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 20847c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 20857c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 20867c1dffd4SDmitry Baryshkov 20877c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 20887c1dffd4SDmitry Baryshkov interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 20897c1dffd4SDmitry Baryshkov 20907c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 20917c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 20927c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 20937c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 20947c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 20957c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 20967c1dffd4SDmitry Baryshkov clock-names = "byte", 20977c1dffd4SDmitry Baryshkov "byte_intf", 20987c1dffd4SDmitry Baryshkov "pixel", 20997c1dffd4SDmitry Baryshkov "core", 21007c1dffd4SDmitry Baryshkov "iface", 21017c1dffd4SDmitry Baryshkov "bus"; 21027c1dffd4SDmitry Baryshkov 21037c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 21047c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 21057c1dffd4SDmitry Baryshkov 21067c1dffd4SDmitry Baryshkov phys = <&dsi0_phy>; 21077c1dffd4SDmitry Baryshkov phy-names = "dsi"; 21087c1dffd4SDmitry Baryshkov 21097c1dffd4SDmitry Baryshkov status = "disabled"; 21107c1dffd4SDmitry Baryshkov 21117c1dffd4SDmitry Baryshkov ports { 21127c1dffd4SDmitry Baryshkov #address-cells = <1>; 21137c1dffd4SDmitry Baryshkov #size-cells = <0>; 21147c1dffd4SDmitry Baryshkov 21157c1dffd4SDmitry Baryshkov port@0 { 21167c1dffd4SDmitry Baryshkov reg = <0>; 21177c1dffd4SDmitry Baryshkov dsi0_in: endpoint { 21187c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 21197c1dffd4SDmitry Baryshkov }; 21207c1dffd4SDmitry Baryshkov }; 21217c1dffd4SDmitry Baryshkov 21227c1dffd4SDmitry Baryshkov port@1 { 21237c1dffd4SDmitry Baryshkov reg = <1>; 21247c1dffd4SDmitry Baryshkov dsi0_out: endpoint { 21257c1dffd4SDmitry Baryshkov }; 21267c1dffd4SDmitry Baryshkov }; 21277c1dffd4SDmitry Baryshkov }; 21287c1dffd4SDmitry Baryshkov }; 21297c1dffd4SDmitry Baryshkov 21307c1dffd4SDmitry Baryshkov dsi0_phy: dsi-phy@ae94400 { 21317c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 21327c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 21337c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 21347c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 21357c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 21367c1dffd4SDmitry Baryshkov "dsi_phy_lane", 21377c1dffd4SDmitry Baryshkov "dsi_pll"; 21387c1dffd4SDmitry Baryshkov 21397c1dffd4SDmitry Baryshkov #clock-cells = <1>; 21407c1dffd4SDmitry Baryshkov #phy-cells = <0>; 21417c1dffd4SDmitry Baryshkov 21427c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 21437c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 21447c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 21457c1dffd4SDmitry Baryshkov 21467c1dffd4SDmitry Baryshkov status = "disabled"; 21477c1dffd4SDmitry Baryshkov }; 21487c1dffd4SDmitry Baryshkov 21497c1dffd4SDmitry Baryshkov dsi1: dsi@ae96000 { 21507c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 21517c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 21527c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 21537c1dffd4SDmitry Baryshkov 21547c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 21557c1dffd4SDmitry Baryshkov interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 21567c1dffd4SDmitry Baryshkov 21577c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 21587c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 21597c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 21607c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 21617c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 21627c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 21637c1dffd4SDmitry Baryshkov clock-names = "byte", 21647c1dffd4SDmitry Baryshkov "byte_intf", 21657c1dffd4SDmitry Baryshkov "pixel", 21667c1dffd4SDmitry Baryshkov "core", 21677c1dffd4SDmitry Baryshkov "iface", 21687c1dffd4SDmitry Baryshkov "bus"; 21697c1dffd4SDmitry Baryshkov 21707c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 21717c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 21727c1dffd4SDmitry Baryshkov 21737c1dffd4SDmitry Baryshkov phys = <&dsi1_phy>; 21747c1dffd4SDmitry Baryshkov phy-names = "dsi"; 21757c1dffd4SDmitry Baryshkov 21767c1dffd4SDmitry Baryshkov status = "disabled"; 21777c1dffd4SDmitry Baryshkov 21787c1dffd4SDmitry Baryshkov ports { 21797c1dffd4SDmitry Baryshkov #address-cells = <1>; 21807c1dffd4SDmitry Baryshkov #size-cells = <0>; 21817c1dffd4SDmitry Baryshkov 21827c1dffd4SDmitry Baryshkov port@0 { 21837c1dffd4SDmitry Baryshkov reg = <0>; 21847c1dffd4SDmitry Baryshkov dsi1_in: endpoint { 21857c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 21867c1dffd4SDmitry Baryshkov }; 21877c1dffd4SDmitry Baryshkov }; 21887c1dffd4SDmitry Baryshkov 21897c1dffd4SDmitry Baryshkov port@1 { 21907c1dffd4SDmitry Baryshkov reg = <1>; 21917c1dffd4SDmitry Baryshkov dsi1_out: endpoint { 21927c1dffd4SDmitry Baryshkov }; 21937c1dffd4SDmitry Baryshkov }; 21947c1dffd4SDmitry Baryshkov }; 21957c1dffd4SDmitry Baryshkov }; 21967c1dffd4SDmitry Baryshkov 21977c1dffd4SDmitry Baryshkov dsi1_phy: dsi-phy@ae96400 { 21987c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 21997c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 22007c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 22017c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 22027c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 22037c1dffd4SDmitry Baryshkov "dsi_phy_lane", 22047c1dffd4SDmitry Baryshkov "dsi_pll"; 22057c1dffd4SDmitry Baryshkov 22067c1dffd4SDmitry Baryshkov #clock-cells = <1>; 22077c1dffd4SDmitry Baryshkov #phy-cells = <0>; 22087c1dffd4SDmitry Baryshkov 22097c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 22107c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 22117c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 22127c1dffd4SDmitry Baryshkov 22137c1dffd4SDmitry Baryshkov status = "disabled"; 22147c1dffd4SDmitry Baryshkov 22157c1dffd4SDmitry Baryshkov dsi_opp_table: dsi-opp-table { 22167c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 22177c1dffd4SDmitry Baryshkov 22187c1dffd4SDmitry Baryshkov opp-187500000 { 22197c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 22207c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 22217c1dffd4SDmitry Baryshkov }; 22227c1dffd4SDmitry Baryshkov 22237c1dffd4SDmitry Baryshkov opp-300000000 { 22247c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 22257c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 22267c1dffd4SDmitry Baryshkov }; 22277c1dffd4SDmitry Baryshkov 22287c1dffd4SDmitry Baryshkov opp-358000000 { 22297c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 22307c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 22317c1dffd4SDmitry Baryshkov }; 22327c1dffd4SDmitry Baryshkov }; 22337c1dffd4SDmitry Baryshkov }; 22347c1dffd4SDmitry Baryshkov }; 22357c1dffd4SDmitry Baryshkov 22367c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 22377c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 22387c1dffd4SDmitry Baryshkov reg = <0 0x0af00000 0 0x20000>; 22393f2094dfSDmitry Baryshkov mmcx-supply = <&mmcx_reg>; 22407c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 22417c1dffd4SDmitry Baryshkov <&dsi0_phy 0>, 22427c1dffd4SDmitry Baryshkov <&dsi0_phy 1>, 22437c1dffd4SDmitry Baryshkov <&dsi1_phy 0>, 22447c1dffd4SDmitry Baryshkov <&dsi1_phy 1>, 22457c1dffd4SDmitry Baryshkov <0>, 22467c1dffd4SDmitry Baryshkov <0>, 22477c1dffd4SDmitry Baryshkov <0>, 22487c1dffd4SDmitry Baryshkov <0>, 22497c1dffd4SDmitry Baryshkov <0>, 22507c1dffd4SDmitry Baryshkov <0>, 22517c1dffd4SDmitry Baryshkov <0>, 22527c1dffd4SDmitry Baryshkov <0>, 22537c1dffd4SDmitry Baryshkov <&sleep_clk>; 22547c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 22557c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 22567c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 22577c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 22587c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 22597c1dffd4SDmitry Baryshkov "dp_link_clk_divsel_ten", 22607c1dffd4SDmitry Baryshkov "dp_vco_divided_clk_src_mux", 22617c1dffd4SDmitry Baryshkov "dptx1_phy_pll_link_clk", 22627c1dffd4SDmitry Baryshkov "dptx1_phy_pll_vco_div_clk", 22637c1dffd4SDmitry Baryshkov "dptx2_phy_pll_link_clk", 22647c1dffd4SDmitry Baryshkov "dptx2_phy_pll_vco_div_clk", 22657c1dffd4SDmitry Baryshkov "edp_phy_pll_link_clk", 22667c1dffd4SDmitry Baryshkov "edp_phy_pll_vco_div_clk", 22677c1dffd4SDmitry Baryshkov "sleep_clk"; 22687c1dffd4SDmitry Baryshkov #clock-cells = <1>; 22697c1dffd4SDmitry Baryshkov #reset-cells = <1>; 22707c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 22717c1dffd4SDmitry Baryshkov }; 22727c1dffd4SDmitry Baryshkov 227360378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 227424003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 227524003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 227660378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 227760378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 227860378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 227960378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 228060378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 228160378f1aSVenkata Narendra Kumar Gutta }; 228260378f1aSVenkata Narendra Kumar Gutta 2283bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 2284bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2285bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 2286bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 2287bac12f25SAmit Kucheria #qcom,sensors = <16>; 2288bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 2289bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 2290bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2291bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2292bac12f25SAmit Kucheria }; 2293bac12f25SAmit Kucheria 2294bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 2295bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2296bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 2297bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 2298bac12f25SAmit Kucheria #qcom,sensors = <9>; 2299bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 2300bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 2301bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2302bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2303bac12f25SAmit Kucheria }; 2304bac12f25SAmit Kucheria 2305087d537aSBjorn Andersson aoss_qmp: qmp@c300000 { 2306087d537aSBjorn Andersson compatible = "qcom,sm8250-aoss-qmp"; 2307087d537aSBjorn Andersson reg = <0 0x0c300000 0 0x100000>; 2308087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 2309087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 2310087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 2311087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 2312087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 2313087d537aSBjorn Andersson 2314087d537aSBjorn Andersson #clock-cells = <0>; 2315087d537aSBjorn Andersson #power-domain-cells = <1>; 2316087d537aSBjorn Andersson }; 2317087d537aSBjorn Andersson 2318bccc7dd2SJonathan Marek spmi_bus: spmi@c440000 { 231960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 232060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 232160378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 232260378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e600000 0x0 0x0100000>, 232360378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e700000 0x0 0x00a0000>, 232460378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c40a000 0x0 0x0026000>; 232560378f1aSVenkata Narendra Kumar Gutta reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 232660378f1aSVenkata Narendra Kumar Gutta interrupt-names = "periph_irq"; 232760378f1aSVenkata Narendra Kumar Gutta interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 232860378f1aSVenkata Narendra Kumar Gutta qcom,ee = <0>; 232960378f1aSVenkata Narendra Kumar Gutta qcom,channel = <0>; 233060378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 233160378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 233260378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 233360378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <4>; 233460378f1aSVenkata Narendra Kumar Gutta }; 233560378f1aSVenkata Narendra Kumar Gutta 233616951b49SBjorn Andersson tlmm: pinctrl@f100000 { 233716951b49SBjorn Andersson compatible = "qcom,sm8250-pinctrl"; 233816951b49SBjorn Andersson reg = <0 0x0f100000 0 0x300000>, 233916951b49SBjorn Andersson <0 0x0f500000 0 0x300000>, 234016951b49SBjorn Andersson <0 0x0f900000 0 0x300000>; 234116951b49SBjorn Andersson reg-names = "west", "south", "north"; 234216951b49SBjorn Andersson interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 234316951b49SBjorn Andersson gpio-controller; 234416951b49SBjorn Andersson #gpio-cells = <2>; 234516951b49SBjorn Andersson interrupt-controller; 234616951b49SBjorn Andersson #interrupt-cells = <2>; 234716951b49SBjorn Andersson gpio-ranges = <&tlmm 0 0 180>; 234816951b49SBjorn Andersson wakeup-parent = <&pdc>; 2349e5813b15SDmitry Baryshkov 2350b657d372SSrinivas Kandagatla pri_mi2s_active: pri-mi2s-active { 2351b657d372SSrinivas Kandagatla sclk { 2352b657d372SSrinivas Kandagatla pins = "gpio138"; 2353b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 2354b657d372SSrinivas Kandagatla drive-strength = <8>; 2355b657d372SSrinivas Kandagatla bias-disable; 2356b657d372SSrinivas Kandagatla }; 2357b657d372SSrinivas Kandagatla 2358b657d372SSrinivas Kandagatla ws { 2359b657d372SSrinivas Kandagatla pins = "gpio141"; 2360b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 2361b657d372SSrinivas Kandagatla drive-strength = <8>; 2362b657d372SSrinivas Kandagatla output-high; 2363b657d372SSrinivas Kandagatla }; 2364b657d372SSrinivas Kandagatla 2365b657d372SSrinivas Kandagatla data0 { 2366b657d372SSrinivas Kandagatla pins = "gpio139"; 2367b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 2368b657d372SSrinivas Kandagatla drive-strength = <8>; 2369b657d372SSrinivas Kandagatla bias-disable; 2370b657d372SSrinivas Kandagatla output-high; 2371b657d372SSrinivas Kandagatla }; 2372b657d372SSrinivas Kandagatla 2373b657d372SSrinivas Kandagatla data1 { 2374b657d372SSrinivas Kandagatla pins = "gpio140"; 2375b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 2376b657d372SSrinivas Kandagatla drive-strength = <8>; 2377b657d372SSrinivas Kandagatla output-high; 2378b657d372SSrinivas Kandagatla }; 2379b657d372SSrinivas Kandagatla }; 2380b657d372SSrinivas Kandagatla 2381e5813b15SDmitry Baryshkov qup_i2c0_default: qup-i2c0-default { 2382e5813b15SDmitry Baryshkov mux { 2383e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2384e5813b15SDmitry Baryshkov function = "qup0"; 2385e5813b15SDmitry Baryshkov }; 2386e5813b15SDmitry Baryshkov 2387e5813b15SDmitry Baryshkov config { 2388e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2389e5813b15SDmitry Baryshkov drive-strength = <2>; 2390e5813b15SDmitry Baryshkov bias-disable; 2391e5813b15SDmitry Baryshkov }; 2392e5813b15SDmitry Baryshkov }; 2393e5813b15SDmitry Baryshkov 2394e5813b15SDmitry Baryshkov qup_i2c1_default: qup-i2c1-default { 2395e5813b15SDmitry Baryshkov pinmux { 2396e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2397e5813b15SDmitry Baryshkov function = "qup1"; 2398e5813b15SDmitry Baryshkov }; 2399e5813b15SDmitry Baryshkov 2400e5813b15SDmitry Baryshkov config { 2401e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2402e5813b15SDmitry Baryshkov drive-strength = <2>; 2403e5813b15SDmitry Baryshkov bias-disable; 2404e5813b15SDmitry Baryshkov }; 2405e5813b15SDmitry Baryshkov }; 2406e5813b15SDmitry Baryshkov 2407e5813b15SDmitry Baryshkov qup_i2c2_default: qup-i2c2-default { 2408e5813b15SDmitry Baryshkov mux { 2409e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2410e5813b15SDmitry Baryshkov function = "qup2"; 2411e5813b15SDmitry Baryshkov }; 2412e5813b15SDmitry Baryshkov 2413e5813b15SDmitry Baryshkov config { 2414e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2415e5813b15SDmitry Baryshkov drive-strength = <2>; 2416e5813b15SDmitry Baryshkov bias-disable; 2417e5813b15SDmitry Baryshkov }; 2418e5813b15SDmitry Baryshkov }; 2419e5813b15SDmitry Baryshkov 2420e5813b15SDmitry Baryshkov qup_i2c3_default: qup-i2c3-default { 2421e5813b15SDmitry Baryshkov mux { 2422e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2423e5813b15SDmitry Baryshkov function = "qup3"; 2424e5813b15SDmitry Baryshkov }; 2425e5813b15SDmitry Baryshkov 2426e5813b15SDmitry Baryshkov config { 2427e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2428e5813b15SDmitry Baryshkov drive-strength = <2>; 2429e5813b15SDmitry Baryshkov bias-disable; 2430e5813b15SDmitry Baryshkov }; 2431e5813b15SDmitry Baryshkov }; 2432e5813b15SDmitry Baryshkov 2433e5813b15SDmitry Baryshkov qup_i2c4_default: qup-i2c4-default { 2434e5813b15SDmitry Baryshkov mux { 2435e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2436e5813b15SDmitry Baryshkov function = "qup4"; 2437e5813b15SDmitry Baryshkov }; 2438e5813b15SDmitry Baryshkov 2439e5813b15SDmitry Baryshkov config { 2440e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2441e5813b15SDmitry Baryshkov drive-strength = <2>; 2442e5813b15SDmitry Baryshkov bias-disable; 2443e5813b15SDmitry Baryshkov }; 2444e5813b15SDmitry Baryshkov }; 2445e5813b15SDmitry Baryshkov 2446e5813b15SDmitry Baryshkov qup_i2c5_default: qup-i2c5-default { 2447e5813b15SDmitry Baryshkov mux { 2448e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2449e5813b15SDmitry Baryshkov function = "qup5"; 2450e5813b15SDmitry Baryshkov }; 2451e5813b15SDmitry Baryshkov 2452e5813b15SDmitry Baryshkov config { 2453e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2454e5813b15SDmitry Baryshkov drive-strength = <2>; 2455e5813b15SDmitry Baryshkov bias-disable; 2456e5813b15SDmitry Baryshkov }; 2457e5813b15SDmitry Baryshkov }; 2458e5813b15SDmitry Baryshkov 2459e5813b15SDmitry Baryshkov qup_i2c6_default: qup-i2c6-default { 2460e5813b15SDmitry Baryshkov mux { 2461e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2462e5813b15SDmitry Baryshkov function = "qup6"; 2463e5813b15SDmitry Baryshkov }; 2464e5813b15SDmitry Baryshkov 2465e5813b15SDmitry Baryshkov config { 2466e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2467e5813b15SDmitry Baryshkov drive-strength = <2>; 2468e5813b15SDmitry Baryshkov bias-disable; 2469e5813b15SDmitry Baryshkov }; 2470e5813b15SDmitry Baryshkov }; 2471e5813b15SDmitry Baryshkov 2472e5813b15SDmitry Baryshkov qup_i2c7_default: qup-i2c7-default { 2473e5813b15SDmitry Baryshkov mux { 2474e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2475e5813b15SDmitry Baryshkov function = "qup7"; 2476e5813b15SDmitry Baryshkov }; 2477e5813b15SDmitry Baryshkov 2478e5813b15SDmitry Baryshkov config { 2479e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2480e5813b15SDmitry Baryshkov drive-strength = <2>; 2481e5813b15SDmitry Baryshkov bias-disable; 2482e5813b15SDmitry Baryshkov }; 2483e5813b15SDmitry Baryshkov }; 2484e5813b15SDmitry Baryshkov 2485e5813b15SDmitry Baryshkov qup_i2c8_default: qup-i2c8-default { 2486e5813b15SDmitry Baryshkov mux { 2487e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2488e5813b15SDmitry Baryshkov function = "qup8"; 2489e5813b15SDmitry Baryshkov }; 2490e5813b15SDmitry Baryshkov 2491e5813b15SDmitry Baryshkov config { 2492e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2493e5813b15SDmitry Baryshkov drive-strength = <2>; 2494e5813b15SDmitry Baryshkov bias-disable; 2495e5813b15SDmitry Baryshkov }; 2496e5813b15SDmitry Baryshkov }; 2497e5813b15SDmitry Baryshkov 2498e5813b15SDmitry Baryshkov qup_i2c9_default: qup-i2c9-default { 2499e5813b15SDmitry Baryshkov mux { 2500e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2501e5813b15SDmitry Baryshkov function = "qup9"; 2502e5813b15SDmitry Baryshkov }; 2503e5813b15SDmitry Baryshkov 2504e5813b15SDmitry Baryshkov config { 2505e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2506e5813b15SDmitry Baryshkov drive-strength = <2>; 2507e5813b15SDmitry Baryshkov bias-disable; 2508e5813b15SDmitry Baryshkov }; 2509e5813b15SDmitry Baryshkov }; 2510e5813b15SDmitry Baryshkov 2511e5813b15SDmitry Baryshkov qup_i2c10_default: qup-i2c10-default { 2512e5813b15SDmitry Baryshkov mux { 2513e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2514e5813b15SDmitry Baryshkov function = "qup10"; 2515e5813b15SDmitry Baryshkov }; 2516e5813b15SDmitry Baryshkov 2517e5813b15SDmitry Baryshkov config { 2518e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2519e5813b15SDmitry Baryshkov drive-strength = <2>; 2520e5813b15SDmitry Baryshkov bias-disable; 2521e5813b15SDmitry Baryshkov }; 2522e5813b15SDmitry Baryshkov }; 2523e5813b15SDmitry Baryshkov 2524e5813b15SDmitry Baryshkov qup_i2c11_default: qup-i2c11-default { 2525e5813b15SDmitry Baryshkov mux { 2526e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2527e5813b15SDmitry Baryshkov function = "qup11"; 2528e5813b15SDmitry Baryshkov }; 2529e5813b15SDmitry Baryshkov 2530e5813b15SDmitry Baryshkov config { 2531e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2532e5813b15SDmitry Baryshkov drive-strength = <2>; 2533e5813b15SDmitry Baryshkov bias-disable; 2534e5813b15SDmitry Baryshkov }; 2535e5813b15SDmitry Baryshkov }; 2536e5813b15SDmitry Baryshkov 2537e5813b15SDmitry Baryshkov qup_i2c12_default: qup-i2c12-default { 2538e5813b15SDmitry Baryshkov mux { 2539e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2540e5813b15SDmitry Baryshkov function = "qup12"; 2541e5813b15SDmitry Baryshkov }; 2542e5813b15SDmitry Baryshkov 2543e5813b15SDmitry Baryshkov config { 2544e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2545e5813b15SDmitry Baryshkov drive-strength = <2>; 2546e5813b15SDmitry Baryshkov bias-disable; 2547e5813b15SDmitry Baryshkov }; 2548e5813b15SDmitry Baryshkov }; 2549e5813b15SDmitry Baryshkov 2550e5813b15SDmitry Baryshkov qup_i2c13_default: qup-i2c13-default { 2551e5813b15SDmitry Baryshkov mux { 2552e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2553e5813b15SDmitry Baryshkov function = "qup13"; 2554e5813b15SDmitry Baryshkov }; 2555e5813b15SDmitry Baryshkov 2556e5813b15SDmitry Baryshkov config { 2557e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2558e5813b15SDmitry Baryshkov drive-strength = <2>; 2559e5813b15SDmitry Baryshkov bias-disable; 2560e5813b15SDmitry Baryshkov }; 2561e5813b15SDmitry Baryshkov }; 2562e5813b15SDmitry Baryshkov 2563e5813b15SDmitry Baryshkov qup_i2c14_default: qup-i2c14-default { 2564e5813b15SDmitry Baryshkov mux { 2565e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2566e5813b15SDmitry Baryshkov function = "qup14"; 2567e5813b15SDmitry Baryshkov }; 2568e5813b15SDmitry Baryshkov 2569e5813b15SDmitry Baryshkov config { 2570e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2571e5813b15SDmitry Baryshkov drive-strength = <2>; 2572e5813b15SDmitry Baryshkov bias-disable; 2573e5813b15SDmitry Baryshkov }; 2574e5813b15SDmitry Baryshkov }; 2575e5813b15SDmitry Baryshkov 2576e5813b15SDmitry Baryshkov qup_i2c15_default: qup-i2c15-default { 2577e5813b15SDmitry Baryshkov mux { 2578e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2579e5813b15SDmitry Baryshkov function = "qup15"; 2580e5813b15SDmitry Baryshkov }; 2581e5813b15SDmitry Baryshkov 2582e5813b15SDmitry Baryshkov config { 2583e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2584e5813b15SDmitry Baryshkov drive-strength = <2>; 2585e5813b15SDmitry Baryshkov bias-disable; 2586e5813b15SDmitry Baryshkov }; 2587e5813b15SDmitry Baryshkov }; 2588e5813b15SDmitry Baryshkov 2589e5813b15SDmitry Baryshkov qup_i2c16_default: qup-i2c16-default { 2590e5813b15SDmitry Baryshkov mux { 2591e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2592e5813b15SDmitry Baryshkov function = "qup16"; 2593e5813b15SDmitry Baryshkov }; 2594e5813b15SDmitry Baryshkov 2595e5813b15SDmitry Baryshkov config { 2596e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2597e5813b15SDmitry Baryshkov drive-strength = <2>; 2598e5813b15SDmitry Baryshkov bias-disable; 2599e5813b15SDmitry Baryshkov }; 2600e5813b15SDmitry Baryshkov }; 2601e5813b15SDmitry Baryshkov 2602e5813b15SDmitry Baryshkov qup_i2c17_default: qup-i2c17-default { 2603e5813b15SDmitry Baryshkov mux { 2604e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2605e5813b15SDmitry Baryshkov function = "qup17"; 2606e5813b15SDmitry Baryshkov }; 2607e5813b15SDmitry Baryshkov 2608e5813b15SDmitry Baryshkov config { 2609e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2610e5813b15SDmitry Baryshkov drive-strength = <2>; 2611e5813b15SDmitry Baryshkov bias-disable; 2612e5813b15SDmitry Baryshkov }; 2613e5813b15SDmitry Baryshkov }; 2614e5813b15SDmitry Baryshkov 2615e5813b15SDmitry Baryshkov qup_i2c18_default: qup-i2c18-default { 2616e5813b15SDmitry Baryshkov mux { 2617e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2618e5813b15SDmitry Baryshkov function = "qup18"; 2619e5813b15SDmitry Baryshkov }; 2620e5813b15SDmitry Baryshkov 2621e5813b15SDmitry Baryshkov config { 2622e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2623e5813b15SDmitry Baryshkov drive-strength = <2>; 2624e5813b15SDmitry Baryshkov bias-disable; 2625e5813b15SDmitry Baryshkov }; 2626e5813b15SDmitry Baryshkov }; 2627e5813b15SDmitry Baryshkov 2628e5813b15SDmitry Baryshkov qup_i2c19_default: qup-i2c19-default { 2629e5813b15SDmitry Baryshkov mux { 2630e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2631e5813b15SDmitry Baryshkov function = "qup19"; 2632e5813b15SDmitry Baryshkov }; 2633e5813b15SDmitry Baryshkov 2634e5813b15SDmitry Baryshkov config { 2635e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2636e5813b15SDmitry Baryshkov drive-strength = <2>; 2637e5813b15SDmitry Baryshkov bias-disable; 2638e5813b15SDmitry Baryshkov }; 2639e5813b15SDmitry Baryshkov }; 2640e5813b15SDmitry Baryshkov 2641e5813b15SDmitry Baryshkov qup_spi0_default: qup-spi0-default { 2642e5813b15SDmitry Baryshkov mux { 2643e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2644e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2645e5813b15SDmitry Baryshkov function = "qup0"; 2646e5813b15SDmitry Baryshkov }; 2647e5813b15SDmitry Baryshkov 2648e5813b15SDmitry Baryshkov config { 2649e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2650e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2651e5813b15SDmitry Baryshkov drive-strength = <6>; 2652e5813b15SDmitry Baryshkov bias-disable; 2653e5813b15SDmitry Baryshkov }; 2654e5813b15SDmitry Baryshkov }; 2655e5813b15SDmitry Baryshkov 2656e5813b15SDmitry Baryshkov qup_spi1_default: qup-spi1-default { 2657e5813b15SDmitry Baryshkov mux { 2658e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2659e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2660e5813b15SDmitry Baryshkov function = "qup1"; 2661e5813b15SDmitry Baryshkov }; 2662e5813b15SDmitry Baryshkov 2663e5813b15SDmitry Baryshkov config { 2664e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2665e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2666e5813b15SDmitry Baryshkov drive-strength = <6>; 2667e5813b15SDmitry Baryshkov bias-disable; 2668e5813b15SDmitry Baryshkov }; 2669e5813b15SDmitry Baryshkov }; 2670e5813b15SDmitry Baryshkov 2671e5813b15SDmitry Baryshkov qup_spi2_default: qup-spi2-default { 2672e5813b15SDmitry Baryshkov mux { 2673e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2674e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2675e5813b15SDmitry Baryshkov function = "qup2"; 2676e5813b15SDmitry Baryshkov }; 2677e5813b15SDmitry Baryshkov 2678e5813b15SDmitry Baryshkov config { 2679e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2680e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2681e5813b15SDmitry Baryshkov drive-strength = <6>; 2682e5813b15SDmitry Baryshkov bias-disable; 2683e5813b15SDmitry Baryshkov }; 2684e5813b15SDmitry Baryshkov }; 2685e5813b15SDmitry Baryshkov 2686e5813b15SDmitry Baryshkov qup_spi3_default: qup-spi3-default { 2687e5813b15SDmitry Baryshkov mux { 2688e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2689e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2690e5813b15SDmitry Baryshkov function = "qup3"; 2691e5813b15SDmitry Baryshkov }; 2692e5813b15SDmitry Baryshkov 2693e5813b15SDmitry Baryshkov config { 2694e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2695e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2696e5813b15SDmitry Baryshkov drive-strength = <6>; 2697e5813b15SDmitry Baryshkov bias-disable; 2698e5813b15SDmitry Baryshkov }; 2699e5813b15SDmitry Baryshkov }; 2700e5813b15SDmitry Baryshkov 2701e5813b15SDmitry Baryshkov qup_spi4_default: qup-spi4-default { 2702e5813b15SDmitry Baryshkov mux { 2703e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2704e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2705e5813b15SDmitry Baryshkov function = "qup4"; 2706e5813b15SDmitry Baryshkov }; 2707e5813b15SDmitry Baryshkov 2708e5813b15SDmitry Baryshkov config { 2709e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2710e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2711e5813b15SDmitry Baryshkov drive-strength = <6>; 2712e5813b15SDmitry Baryshkov bias-disable; 2713e5813b15SDmitry Baryshkov }; 2714e5813b15SDmitry Baryshkov }; 2715e5813b15SDmitry Baryshkov 2716e5813b15SDmitry Baryshkov qup_spi5_default: qup-spi5-default { 2717e5813b15SDmitry Baryshkov mux { 2718e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2719e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2720e5813b15SDmitry Baryshkov function = "qup5"; 2721e5813b15SDmitry Baryshkov }; 2722e5813b15SDmitry Baryshkov 2723e5813b15SDmitry Baryshkov config { 2724e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2725e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2726e5813b15SDmitry Baryshkov drive-strength = <6>; 2727e5813b15SDmitry Baryshkov bias-disable; 2728e5813b15SDmitry Baryshkov }; 2729e5813b15SDmitry Baryshkov }; 2730e5813b15SDmitry Baryshkov 2731e5813b15SDmitry Baryshkov qup_spi6_default: qup-spi6-default { 2732e5813b15SDmitry Baryshkov mux { 2733e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2734e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2735e5813b15SDmitry Baryshkov function = "qup6"; 2736e5813b15SDmitry Baryshkov }; 2737e5813b15SDmitry Baryshkov 2738e5813b15SDmitry Baryshkov config { 2739e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2740e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2741e5813b15SDmitry Baryshkov drive-strength = <6>; 2742e5813b15SDmitry Baryshkov bias-disable; 2743e5813b15SDmitry Baryshkov }; 2744e5813b15SDmitry Baryshkov }; 2745e5813b15SDmitry Baryshkov 2746e5813b15SDmitry Baryshkov qup_spi7_default: qup-spi7-default { 2747e5813b15SDmitry Baryshkov mux { 2748e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2749e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2750e5813b15SDmitry Baryshkov function = "qup7"; 2751e5813b15SDmitry Baryshkov }; 2752e5813b15SDmitry Baryshkov 2753e5813b15SDmitry Baryshkov config { 2754e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2755e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2756e5813b15SDmitry Baryshkov drive-strength = <6>; 2757e5813b15SDmitry Baryshkov bias-disable; 2758e5813b15SDmitry Baryshkov }; 2759e5813b15SDmitry Baryshkov }; 2760e5813b15SDmitry Baryshkov 2761e5813b15SDmitry Baryshkov qup_spi8_default: qup-spi8-default { 2762e5813b15SDmitry Baryshkov mux { 2763e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2764e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2765e5813b15SDmitry Baryshkov function = "qup8"; 2766e5813b15SDmitry Baryshkov }; 2767e5813b15SDmitry Baryshkov 2768e5813b15SDmitry Baryshkov config { 2769e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2770e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2771e5813b15SDmitry Baryshkov drive-strength = <6>; 2772e5813b15SDmitry Baryshkov bias-disable; 2773e5813b15SDmitry Baryshkov }; 2774e5813b15SDmitry Baryshkov }; 2775e5813b15SDmitry Baryshkov 2776e5813b15SDmitry Baryshkov qup_spi9_default: qup-spi9-default { 2777e5813b15SDmitry Baryshkov mux { 2778e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2779e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2780e5813b15SDmitry Baryshkov function = "qup9"; 2781e5813b15SDmitry Baryshkov }; 2782e5813b15SDmitry Baryshkov 2783e5813b15SDmitry Baryshkov config { 2784e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2785e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2786e5813b15SDmitry Baryshkov drive-strength = <6>; 2787e5813b15SDmitry Baryshkov bias-disable; 2788e5813b15SDmitry Baryshkov }; 2789e5813b15SDmitry Baryshkov }; 2790e5813b15SDmitry Baryshkov 2791e5813b15SDmitry Baryshkov qup_spi10_default: qup-spi10-default { 2792e5813b15SDmitry Baryshkov mux { 2793e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2794e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2795e5813b15SDmitry Baryshkov function = "qup10"; 2796e5813b15SDmitry Baryshkov }; 2797e5813b15SDmitry Baryshkov 2798e5813b15SDmitry Baryshkov config { 2799e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2800e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2801e5813b15SDmitry Baryshkov drive-strength = <6>; 2802e5813b15SDmitry Baryshkov bias-disable; 2803e5813b15SDmitry Baryshkov }; 2804e5813b15SDmitry Baryshkov }; 2805e5813b15SDmitry Baryshkov 2806e5813b15SDmitry Baryshkov qup_spi11_default: qup-spi11-default { 2807e5813b15SDmitry Baryshkov mux { 2808e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2809e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2810e5813b15SDmitry Baryshkov function = "qup11"; 2811e5813b15SDmitry Baryshkov }; 2812e5813b15SDmitry Baryshkov 2813e5813b15SDmitry Baryshkov config { 2814e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2815e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2816e5813b15SDmitry Baryshkov drive-strength = <6>; 2817e5813b15SDmitry Baryshkov bias-disable; 2818e5813b15SDmitry Baryshkov }; 2819e5813b15SDmitry Baryshkov }; 2820e5813b15SDmitry Baryshkov 2821e5813b15SDmitry Baryshkov qup_spi12_default: qup-spi12-default { 2822e5813b15SDmitry Baryshkov mux { 2823e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2824e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2825e5813b15SDmitry Baryshkov function = "qup12"; 2826e5813b15SDmitry Baryshkov }; 2827e5813b15SDmitry Baryshkov 2828e5813b15SDmitry Baryshkov config { 2829e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2830e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2831e5813b15SDmitry Baryshkov drive-strength = <6>; 2832e5813b15SDmitry Baryshkov bias-disable; 2833e5813b15SDmitry Baryshkov }; 2834e5813b15SDmitry Baryshkov }; 2835e5813b15SDmitry Baryshkov 2836e5813b15SDmitry Baryshkov qup_spi13_default: qup-spi13-default { 2837e5813b15SDmitry Baryshkov mux { 2838e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2839e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2840e5813b15SDmitry Baryshkov function = "qup13"; 2841e5813b15SDmitry Baryshkov }; 2842e5813b15SDmitry Baryshkov 2843e5813b15SDmitry Baryshkov config { 2844e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2845e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2846e5813b15SDmitry Baryshkov drive-strength = <6>; 2847e5813b15SDmitry Baryshkov bias-disable; 2848e5813b15SDmitry Baryshkov }; 2849e5813b15SDmitry Baryshkov }; 2850e5813b15SDmitry Baryshkov 2851e5813b15SDmitry Baryshkov qup_spi14_default: qup-spi14-default { 2852e5813b15SDmitry Baryshkov mux { 2853e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2854e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2855e5813b15SDmitry Baryshkov function = "qup14"; 2856e5813b15SDmitry Baryshkov }; 2857e5813b15SDmitry Baryshkov 2858e5813b15SDmitry Baryshkov config { 2859e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2860e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2861e5813b15SDmitry Baryshkov drive-strength = <6>; 2862e5813b15SDmitry Baryshkov bias-disable; 2863e5813b15SDmitry Baryshkov }; 2864e5813b15SDmitry Baryshkov }; 2865e5813b15SDmitry Baryshkov 2866e5813b15SDmitry Baryshkov qup_spi15_default: qup-spi15-default { 2867e5813b15SDmitry Baryshkov mux { 2868e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2869e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2870e5813b15SDmitry Baryshkov function = "qup15"; 2871e5813b15SDmitry Baryshkov }; 2872e5813b15SDmitry Baryshkov 2873e5813b15SDmitry Baryshkov config { 2874e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2875e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2876e5813b15SDmitry Baryshkov drive-strength = <6>; 2877e5813b15SDmitry Baryshkov bias-disable; 2878e5813b15SDmitry Baryshkov }; 2879e5813b15SDmitry Baryshkov }; 2880e5813b15SDmitry Baryshkov 2881e5813b15SDmitry Baryshkov qup_spi16_default: qup-spi16-default { 2882e5813b15SDmitry Baryshkov mux { 2883e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2884e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2885e5813b15SDmitry Baryshkov function = "qup16"; 2886e5813b15SDmitry Baryshkov }; 2887e5813b15SDmitry Baryshkov 2888e5813b15SDmitry Baryshkov config { 2889e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2890e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2891e5813b15SDmitry Baryshkov drive-strength = <6>; 2892e5813b15SDmitry Baryshkov bias-disable; 2893e5813b15SDmitry Baryshkov }; 2894e5813b15SDmitry Baryshkov }; 2895e5813b15SDmitry Baryshkov 2896e5813b15SDmitry Baryshkov qup_spi17_default: qup-spi17-default { 2897e5813b15SDmitry Baryshkov mux { 2898e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2899e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2900e5813b15SDmitry Baryshkov function = "qup17"; 2901e5813b15SDmitry Baryshkov }; 2902e5813b15SDmitry Baryshkov 2903e5813b15SDmitry Baryshkov config { 2904e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2905e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2906e5813b15SDmitry Baryshkov drive-strength = <6>; 2907e5813b15SDmitry Baryshkov bias-disable; 2908e5813b15SDmitry Baryshkov }; 2909e5813b15SDmitry Baryshkov }; 2910e5813b15SDmitry Baryshkov 2911e5813b15SDmitry Baryshkov qup_spi18_default: qup-spi18-default { 2912e5813b15SDmitry Baryshkov mux { 2913e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2914e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2915e5813b15SDmitry Baryshkov function = "qup18"; 2916e5813b15SDmitry Baryshkov }; 2917e5813b15SDmitry Baryshkov 2918e5813b15SDmitry Baryshkov config { 2919e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2920e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2921e5813b15SDmitry Baryshkov drive-strength = <6>; 2922e5813b15SDmitry Baryshkov bias-disable; 2923e5813b15SDmitry Baryshkov }; 2924e5813b15SDmitry Baryshkov }; 2925e5813b15SDmitry Baryshkov 2926e5813b15SDmitry Baryshkov qup_spi19_default: qup-spi19-default { 2927e5813b15SDmitry Baryshkov mux { 2928e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2929e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2930e5813b15SDmitry Baryshkov function = "qup19"; 2931e5813b15SDmitry Baryshkov }; 2932e5813b15SDmitry Baryshkov 2933e5813b15SDmitry Baryshkov config { 2934e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2935e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2936e5813b15SDmitry Baryshkov drive-strength = <6>; 2937e5813b15SDmitry Baryshkov bias-disable; 2938e5813b15SDmitry Baryshkov }; 2939e5813b15SDmitry Baryshkov }; 2940bb1dfb4dSManivannan Sadhasivam 294108a9ae2dSDmitry Baryshkov qup_uart2_default: qup-uart2-default { 294208a9ae2dSDmitry Baryshkov mux { 294308a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 294408a9ae2dSDmitry Baryshkov function = "qup2"; 294508a9ae2dSDmitry Baryshkov }; 294608a9ae2dSDmitry Baryshkov }; 294708a9ae2dSDmitry Baryshkov 294808a9ae2dSDmitry Baryshkov qup_uart6_default: qup-uart6-default { 294908a9ae2dSDmitry Baryshkov mux { 295008a9ae2dSDmitry Baryshkov pins = "gpio16", "gpio17", 295108a9ae2dSDmitry Baryshkov "gpio18", "gpio19"; 295208a9ae2dSDmitry Baryshkov function = "qup6"; 295308a9ae2dSDmitry Baryshkov }; 295408a9ae2dSDmitry Baryshkov }; 295508a9ae2dSDmitry Baryshkov 2956bb1dfb4dSManivannan Sadhasivam qup_uart12_default: qup-uart12-default { 2957bb1dfb4dSManivannan Sadhasivam mux { 2958bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 2959bb1dfb4dSManivannan Sadhasivam function = "qup12"; 2960bb1dfb4dSManivannan Sadhasivam }; 2961bb1dfb4dSManivannan Sadhasivam }; 296208a9ae2dSDmitry Baryshkov 296308a9ae2dSDmitry Baryshkov qup_uart17_default: qup-uart17-default { 296408a9ae2dSDmitry Baryshkov mux { 296508a9ae2dSDmitry Baryshkov pins = "gpio52", "gpio53", 296608a9ae2dSDmitry Baryshkov "gpio54", "gpio55"; 296708a9ae2dSDmitry Baryshkov function = "qup17"; 296808a9ae2dSDmitry Baryshkov }; 296908a9ae2dSDmitry Baryshkov }; 297008a9ae2dSDmitry Baryshkov 297108a9ae2dSDmitry Baryshkov qup_uart18_default: qup-uart18-default { 297208a9ae2dSDmitry Baryshkov mux { 297308a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 297408a9ae2dSDmitry Baryshkov function = "qup18"; 297508a9ae2dSDmitry Baryshkov }; 297608a9ae2dSDmitry Baryshkov }; 2977b657d372SSrinivas Kandagatla 2978b657d372SSrinivas Kandagatla tert_mi2s_active: tert-mi2s-active { 2979b657d372SSrinivas Kandagatla sck { 2980b657d372SSrinivas Kandagatla pins = "gpio133"; 2981b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 2982b657d372SSrinivas Kandagatla drive-strength = <8>; 2983b657d372SSrinivas Kandagatla bias-disable; 2984b657d372SSrinivas Kandagatla }; 2985b657d372SSrinivas Kandagatla 2986b657d372SSrinivas Kandagatla data0 { 2987b657d372SSrinivas Kandagatla pins = "gpio134"; 2988b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 2989b657d372SSrinivas Kandagatla drive-strength = <8>; 2990b657d372SSrinivas Kandagatla bias-disable; 2991b657d372SSrinivas Kandagatla output-high; 2992b657d372SSrinivas Kandagatla }; 2993b657d372SSrinivas Kandagatla 2994b657d372SSrinivas Kandagatla ws { 2995b657d372SSrinivas Kandagatla pins = "gpio135"; 2996b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 2997b657d372SSrinivas Kandagatla drive-strength = <8>; 2998b657d372SSrinivas Kandagatla output-high; 2999b657d372SSrinivas Kandagatla }; 3000b657d372SSrinivas Kandagatla }; 300116951b49SBjorn Andersson }; 300216951b49SBjorn Andersson 3003a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 3004a89441fcSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 3005a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 3006a89441fcSJonathan Marek #iommu-cells = <2>; 3007a89441fcSJonathan Marek #global-interrupts = <2>; 3008a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 3009a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 3010a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 3011a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 3012a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 3013a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 3014a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 3015a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 3016a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 3017a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 3018a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 3019a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 3020a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 3021a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 3022a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 3023a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 3024a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 3025a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 3026a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 3027a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 3028a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 3029a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 3030a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 3031a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 3032a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 3033a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 3034a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 3035a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 3036a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 3037a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 3038a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 3039a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 3040a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 3041a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 3042a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 3043a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 3044a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 3045a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 3046a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 3047a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 3048a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 3049a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 3050a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 3051a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 3052a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 3053a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 3054a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 3055a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 3056a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 3057a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 3058a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 3059a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 3060a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 3061a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 3062a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 3063a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 3064a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 3065a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 3066a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 3067a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 3068a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 3069a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 3070a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 3071a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 3072a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 3073a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 3074a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 3075a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 3076a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 3077a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 3078a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 3079a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 3080a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 3081a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 3082a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 3083a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 3084a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 3085a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 3086a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 3087a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 3088a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 3089a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 3090a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 3091a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 3092a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 3093a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 3094a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 3095a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 3096a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 3097a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 3098a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 3099a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 3100a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 3101a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 3102a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 3103a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 3104a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 3105a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 3106a89441fcSJonathan Marek }; 3107a89441fcSJonathan Marek 310823a89037SBjorn Andersson adsp: remoteproc@17300000 { 310923a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 311023a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 311123a89037SBjorn Andersson 311223a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 311323a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 311423a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 311523a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 311623a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 311723a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 311823a89037SBjorn Andersson "handover", "stop-ack"; 311923a89037SBjorn Andersson 312023a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 312123a89037SBjorn Andersson clock-names = "xo"; 312223a89037SBjorn Andersson 312323a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 312423a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 312523a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 312623a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 312723a89037SBjorn Andersson 312823a89037SBjorn Andersson memory-region = <&adsp_mem>; 312923a89037SBjorn Andersson 313023a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 313123a89037SBjorn Andersson qcom,smem-state-names = "stop"; 313223a89037SBjorn Andersson 313323a89037SBjorn Andersson status = "disabled"; 313423a89037SBjorn Andersson 313523a89037SBjorn Andersson glink-edge { 313623a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 313723a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 313823a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 313923a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 314023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 314123a89037SBjorn Andersson 314223a89037SBjorn Andersson label = "lpass"; 314323a89037SBjorn Andersson qcom,remote-pid = <2>; 314425695808SJonathan Marek 314563e10791SSrinivas Kandagatla apr { 314663e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 314763e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 314863e10791SSrinivas Kandagatla qcom,apr-domain = <APR_DOMAIN_ADSP>; 314963e10791SSrinivas Kandagatla #address-cells = <1>; 315063e10791SSrinivas Kandagatla #size-cells = <0>; 315163e10791SSrinivas Kandagatla 315263e10791SSrinivas Kandagatla apr-service@3 { 315363e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 315463e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 315563e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 315663e10791SSrinivas Kandagatla }; 315763e10791SSrinivas Kandagatla 315863e10791SSrinivas Kandagatla q6afe: apr-service@4 { 315963e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 316063e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 316163e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 316263e10791SSrinivas Kandagatla q6afedai: dais { 316363e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 316463e10791SSrinivas Kandagatla #address-cells = <1>; 316563e10791SSrinivas Kandagatla #size-cells = <0>; 316663e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 316763e10791SSrinivas Kandagatla }; 316863e10791SSrinivas Kandagatla 316963e10791SSrinivas Kandagatla q6afecc: cc { 317063e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 317163e10791SSrinivas Kandagatla #clock-cells = <2>; 317263e10791SSrinivas Kandagatla }; 317363e10791SSrinivas Kandagatla }; 317463e10791SSrinivas Kandagatla 317563e10791SSrinivas Kandagatla q6asm: apr-service@7 { 317663e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 317763e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 317863e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 317963e10791SSrinivas Kandagatla q6asmdai: dais { 318063e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 318163e10791SSrinivas Kandagatla #address-cells = <1>; 318263e10791SSrinivas Kandagatla #size-cells = <0>; 318363e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 318463e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 318563e10791SSrinivas Kandagatla }; 318663e10791SSrinivas Kandagatla }; 318763e10791SSrinivas Kandagatla 318863e10791SSrinivas Kandagatla q6adm: apr-service@8 { 318963e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 319063e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 319163e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 319263e10791SSrinivas Kandagatla q6routing: routing { 319363e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 319463e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 319563e10791SSrinivas Kandagatla }; 319663e10791SSrinivas Kandagatla }; 319763e10791SSrinivas Kandagatla }; 319863e10791SSrinivas Kandagatla 319925695808SJonathan Marek fastrpc { 320025695808SJonathan Marek compatible = "qcom,fastrpc"; 320125695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 320225695808SJonathan Marek label = "adsp"; 320325695808SJonathan Marek #address-cells = <1>; 320425695808SJonathan Marek #size-cells = <0>; 320525695808SJonathan Marek 320625695808SJonathan Marek compute-cb@3 { 320725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 320825695808SJonathan Marek reg = <3>; 320925695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 321025695808SJonathan Marek }; 321125695808SJonathan Marek 321225695808SJonathan Marek compute-cb@4 { 321325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 321425695808SJonathan Marek reg = <4>; 321525695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 321625695808SJonathan Marek }; 321725695808SJonathan Marek 321825695808SJonathan Marek compute-cb@5 { 321925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 322025695808SJonathan Marek reg = <5>; 322125695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 322225695808SJonathan Marek }; 322325695808SJonathan Marek }; 322423a89037SBjorn Andersson }; 322523a89037SBjorn Andersson }; 322623a89037SBjorn Andersson 3227b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 3228b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 3229b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 3230b9ec8cbcSJonathan Marek interrupt-controller; 3231b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 3232b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 3233b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 3234b9ec8cbcSJonathan Marek }; 3235b9ec8cbcSJonathan Marek 3236e0d9acceSDmitry Baryshkov watchdog@17c10000 { 3237e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 3238e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 3239e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 3240e0d9acceSDmitry Baryshkov }; 3241e0d9acceSDmitry Baryshkov 3242b9ec8cbcSJonathan Marek timer@17c20000 { 3243b9ec8cbcSJonathan Marek #address-cells = <2>; 3244b9ec8cbcSJonathan Marek #size-cells = <2>; 3245b9ec8cbcSJonathan Marek ranges; 3246b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 3247b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 3248b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 3249b9ec8cbcSJonathan Marek 3250b9ec8cbcSJonathan Marek frame@17c21000 { 3251b9ec8cbcSJonathan Marek frame-number = <0>; 3252b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 3253b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 3254b9ec8cbcSJonathan Marek reg = <0x0 0x17c21000 0x0 0x1000>, 3255b9ec8cbcSJonathan Marek <0x0 0x17c22000 0x0 0x1000>; 3256b9ec8cbcSJonathan Marek }; 3257b9ec8cbcSJonathan Marek 3258b9ec8cbcSJonathan Marek frame@17c23000 { 3259b9ec8cbcSJonathan Marek frame-number = <1>; 3260b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 3261b9ec8cbcSJonathan Marek reg = <0x0 0x17c23000 0x0 0x1000>; 3262b9ec8cbcSJonathan Marek status = "disabled"; 3263b9ec8cbcSJonathan Marek }; 3264b9ec8cbcSJonathan Marek 3265b9ec8cbcSJonathan Marek frame@17c25000 { 3266b9ec8cbcSJonathan Marek frame-number = <2>; 3267b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 3268b9ec8cbcSJonathan Marek reg = <0x0 0x17c25000 0x0 0x1000>; 3269b9ec8cbcSJonathan Marek status = "disabled"; 3270b9ec8cbcSJonathan Marek }; 3271b9ec8cbcSJonathan Marek 3272b9ec8cbcSJonathan Marek frame@17c27000 { 3273b9ec8cbcSJonathan Marek frame-number = <3>; 3274b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 3275b9ec8cbcSJonathan Marek reg = <0x0 0x17c27000 0x0 0x1000>; 3276b9ec8cbcSJonathan Marek status = "disabled"; 3277b9ec8cbcSJonathan Marek }; 3278b9ec8cbcSJonathan Marek 3279b9ec8cbcSJonathan Marek frame@17c29000 { 3280b9ec8cbcSJonathan Marek frame-number = <4>; 3281b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 3282b9ec8cbcSJonathan Marek reg = <0x0 0x17c29000 0x0 0x1000>; 3283b9ec8cbcSJonathan Marek status = "disabled"; 3284b9ec8cbcSJonathan Marek }; 3285b9ec8cbcSJonathan Marek 3286b9ec8cbcSJonathan Marek frame@17c2b000 { 3287b9ec8cbcSJonathan Marek frame-number = <5>; 3288b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 3289b9ec8cbcSJonathan Marek reg = <0x0 0x17c2b000 0x0 0x1000>; 3290b9ec8cbcSJonathan Marek status = "disabled"; 3291b9ec8cbcSJonathan Marek }; 3292b9ec8cbcSJonathan Marek 3293b9ec8cbcSJonathan Marek frame@17c2d000 { 3294b9ec8cbcSJonathan Marek frame-number = <6>; 3295b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 3296b9ec8cbcSJonathan Marek reg = <0x0 0x17c2d000 0x0 0x1000>; 3297b9ec8cbcSJonathan Marek status = "disabled"; 3298b9ec8cbcSJonathan Marek }; 3299b9ec8cbcSJonathan Marek }; 3300b9ec8cbcSJonathan Marek 330160378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 330260378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 330360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 330460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 330560378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 330660378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 330760378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 330860378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 330960378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 331060378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 331160378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 331260378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 331360378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 331460378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 331560378f1aSVenkata Narendra Kumar Gutta 331660378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 331760378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 331860378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 331960378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 332060378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 332160378f1aSVenkata Narendra Kumar Gutta }; 3322b6f78e27SBjorn Andersson 3323b6f78e27SBjorn Andersson rpmhpd: power-controller { 3324b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 3325b6f78e27SBjorn Andersson #power-domain-cells = <1>; 3326b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 3327b6f78e27SBjorn Andersson 3328b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 3329b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 3330b6f78e27SBjorn Andersson 3331b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 3332b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 3333b6f78e27SBjorn Andersson }; 3334b6f78e27SBjorn Andersson 3335b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 3336b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 3337b6f78e27SBjorn Andersson }; 3338b6f78e27SBjorn Andersson 3339b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 3340b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 3341b6f78e27SBjorn Andersson }; 3342b6f78e27SBjorn Andersson 3343b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 3344b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 3345b6f78e27SBjorn Andersson }; 3346b6f78e27SBjorn Andersson 3347b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 3348b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 3349b6f78e27SBjorn Andersson }; 3350b6f78e27SBjorn Andersson 3351b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 3352b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 3353b6f78e27SBjorn Andersson }; 3354b6f78e27SBjorn Andersson 3355b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 3356b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 3357b6f78e27SBjorn Andersson }; 3358b6f78e27SBjorn Andersson 3359b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 3360b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 3361b6f78e27SBjorn Andersson }; 3362b6f78e27SBjorn Andersson 3363b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 3364b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 3365b6f78e27SBjorn Andersson }; 3366b6f78e27SBjorn Andersson 3367b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 3368b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 3369b6f78e27SBjorn Andersson }; 3370b6f78e27SBjorn Andersson }; 3371b6f78e27SBjorn Andersson }; 3372e7e41a20SJonathan Marek 3373e7e41a20SJonathan Marek apps_bcm_voter: bcm_voter { 3374e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 3375e7e41a20SJonathan Marek }; 337660378f1aSVenkata Narendra Kumar Gutta }; 337779a595bbSSibi Sankar 337879a595bbSSibi Sankar epss_l3: interconnect@18591000 { 337979a595bbSSibi Sankar compatible = "qcom,sm8250-epss-l3"; 338079a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 338179a595bbSSibi Sankar 338279a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 338379a595bbSSibi Sankar clock-names = "xo", "alternate"; 338479a595bbSSibi Sankar 338579a595bbSSibi Sankar #interconnect-cells = <1>; 338679a595bbSSibi Sankar }; 338702ae4a0eSBjorn Andersson 338802ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 338902ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 339002ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 339102ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 339202ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 339302ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 339402ae4a0eSBjorn Andersson "freq-domain2"; 339502ae4a0eSBjorn Andersson 339602ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 339702ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 339802ae4a0eSBjorn Andersson 339902ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 340002ae4a0eSBjorn Andersson }; 340160378f1aSVenkata Narendra Kumar Gutta }; 340260378f1aSVenkata Narendra Kumar Gutta 340360378f1aSVenkata Narendra Kumar Gutta timer { 340460378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 340560378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 340660378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 340760378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 340860378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 340960378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 341060378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 341160378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 12 341260378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 341360378f1aSVenkata Narendra Kumar Gutta }; 3414bac12f25SAmit Kucheria 3415bac12f25SAmit Kucheria thermal-zones { 3416bac12f25SAmit Kucheria cpu0-thermal { 3417bac12f25SAmit Kucheria polling-delay-passive = <250>; 3418bac12f25SAmit Kucheria polling-delay = <1000>; 3419bac12f25SAmit Kucheria 3420bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 3421bac12f25SAmit Kucheria 3422bac12f25SAmit Kucheria trips { 3423bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 3424bac12f25SAmit Kucheria temperature = <90000>; 3425bac12f25SAmit Kucheria hysteresis = <2000>; 3426bac12f25SAmit Kucheria type = "passive"; 3427bac12f25SAmit Kucheria }; 3428bac12f25SAmit Kucheria 3429bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 3430bac12f25SAmit Kucheria temperature = <95000>; 3431bac12f25SAmit Kucheria hysteresis = <2000>; 3432bac12f25SAmit Kucheria type = "passive"; 3433bac12f25SAmit Kucheria }; 3434bac12f25SAmit Kucheria 3435bac12f25SAmit Kucheria cpu0_crit: cpu_crit { 3436bac12f25SAmit Kucheria temperature = <110000>; 3437bac12f25SAmit Kucheria hysteresis = <1000>; 3438bac12f25SAmit Kucheria type = "critical"; 3439bac12f25SAmit Kucheria }; 3440bac12f25SAmit Kucheria }; 3441bac12f25SAmit Kucheria 3442bac12f25SAmit Kucheria cooling-maps { 3443bac12f25SAmit Kucheria map0 { 3444bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 3445bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3446bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3447bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3448bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3449bac12f25SAmit Kucheria }; 3450bac12f25SAmit Kucheria map1 { 3451bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 3452bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3453bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3454bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3455bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3456bac12f25SAmit Kucheria }; 3457bac12f25SAmit Kucheria }; 3458bac12f25SAmit Kucheria }; 3459bac12f25SAmit Kucheria 3460bac12f25SAmit Kucheria cpu1-thermal { 3461bac12f25SAmit Kucheria polling-delay-passive = <250>; 3462bac12f25SAmit Kucheria polling-delay = <1000>; 3463bac12f25SAmit Kucheria 3464bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 3465bac12f25SAmit Kucheria 3466bac12f25SAmit Kucheria trips { 3467bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 3468bac12f25SAmit Kucheria temperature = <90000>; 3469bac12f25SAmit Kucheria hysteresis = <2000>; 3470bac12f25SAmit Kucheria type = "passive"; 3471bac12f25SAmit Kucheria }; 3472bac12f25SAmit Kucheria 3473bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 3474bac12f25SAmit Kucheria temperature = <95000>; 3475bac12f25SAmit Kucheria hysteresis = <2000>; 3476bac12f25SAmit Kucheria type = "passive"; 3477bac12f25SAmit Kucheria }; 3478bac12f25SAmit Kucheria 3479bac12f25SAmit Kucheria cpu1_crit: cpu_crit { 3480bac12f25SAmit Kucheria temperature = <110000>; 3481bac12f25SAmit Kucheria hysteresis = <1000>; 3482bac12f25SAmit Kucheria type = "critical"; 3483bac12f25SAmit Kucheria }; 3484bac12f25SAmit Kucheria }; 3485bac12f25SAmit Kucheria 3486bac12f25SAmit Kucheria cooling-maps { 3487bac12f25SAmit Kucheria map0 { 3488bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 3489bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3490bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3491bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3492bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3493bac12f25SAmit Kucheria }; 3494bac12f25SAmit Kucheria map1 { 3495bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 3496bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3497bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3498bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3499bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3500bac12f25SAmit Kucheria }; 3501bac12f25SAmit Kucheria }; 3502bac12f25SAmit Kucheria }; 3503bac12f25SAmit Kucheria 3504bac12f25SAmit Kucheria cpu2-thermal { 3505bac12f25SAmit Kucheria polling-delay-passive = <250>; 3506bac12f25SAmit Kucheria polling-delay = <1000>; 3507bac12f25SAmit Kucheria 3508bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 3509bac12f25SAmit Kucheria 3510bac12f25SAmit Kucheria trips { 3511bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 3512bac12f25SAmit Kucheria temperature = <90000>; 3513bac12f25SAmit Kucheria hysteresis = <2000>; 3514bac12f25SAmit Kucheria type = "passive"; 3515bac12f25SAmit Kucheria }; 3516bac12f25SAmit Kucheria 3517bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 3518bac12f25SAmit Kucheria temperature = <95000>; 3519bac12f25SAmit Kucheria hysteresis = <2000>; 3520bac12f25SAmit Kucheria type = "passive"; 3521bac12f25SAmit Kucheria }; 3522bac12f25SAmit Kucheria 3523bac12f25SAmit Kucheria cpu2_crit: cpu_crit { 3524bac12f25SAmit Kucheria temperature = <110000>; 3525bac12f25SAmit Kucheria hysteresis = <1000>; 3526bac12f25SAmit Kucheria type = "critical"; 3527bac12f25SAmit Kucheria }; 3528bac12f25SAmit Kucheria }; 3529bac12f25SAmit Kucheria 3530bac12f25SAmit Kucheria cooling-maps { 3531bac12f25SAmit Kucheria map0 { 3532bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 3533bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3534bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3535bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3536bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3537bac12f25SAmit Kucheria }; 3538bac12f25SAmit Kucheria map1 { 3539bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 3540bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3541bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3542bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3543bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3544bac12f25SAmit Kucheria }; 3545bac12f25SAmit Kucheria }; 3546bac12f25SAmit Kucheria }; 3547bac12f25SAmit Kucheria 3548bac12f25SAmit Kucheria cpu3-thermal { 3549bac12f25SAmit Kucheria polling-delay-passive = <250>; 3550bac12f25SAmit Kucheria polling-delay = <1000>; 3551bac12f25SAmit Kucheria 3552bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 3553bac12f25SAmit Kucheria 3554bac12f25SAmit Kucheria trips { 3555bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 3556bac12f25SAmit Kucheria temperature = <90000>; 3557bac12f25SAmit Kucheria hysteresis = <2000>; 3558bac12f25SAmit Kucheria type = "passive"; 3559bac12f25SAmit Kucheria }; 3560bac12f25SAmit Kucheria 3561bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 3562bac12f25SAmit Kucheria temperature = <95000>; 3563bac12f25SAmit Kucheria hysteresis = <2000>; 3564bac12f25SAmit Kucheria type = "passive"; 3565bac12f25SAmit Kucheria }; 3566bac12f25SAmit Kucheria 3567bac12f25SAmit Kucheria cpu3_crit: cpu_crit { 3568bac12f25SAmit Kucheria temperature = <110000>; 3569bac12f25SAmit Kucheria hysteresis = <1000>; 3570bac12f25SAmit Kucheria type = "critical"; 3571bac12f25SAmit Kucheria }; 3572bac12f25SAmit Kucheria }; 3573bac12f25SAmit Kucheria 3574bac12f25SAmit Kucheria cooling-maps { 3575bac12f25SAmit Kucheria map0 { 3576bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 3577bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3578bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3579bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3580bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3581bac12f25SAmit Kucheria }; 3582bac12f25SAmit Kucheria map1 { 3583bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 3584bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3585bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3586bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3587bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3588bac12f25SAmit Kucheria }; 3589bac12f25SAmit Kucheria }; 3590bac12f25SAmit Kucheria }; 3591bac12f25SAmit Kucheria 3592bac12f25SAmit Kucheria cpu4-top-thermal { 3593bac12f25SAmit Kucheria polling-delay-passive = <250>; 3594bac12f25SAmit Kucheria polling-delay = <1000>; 3595bac12f25SAmit Kucheria 3596bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 3597bac12f25SAmit Kucheria 3598bac12f25SAmit Kucheria trips { 3599bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 3600bac12f25SAmit Kucheria temperature = <90000>; 3601bac12f25SAmit Kucheria hysteresis = <2000>; 3602bac12f25SAmit Kucheria type = "passive"; 3603bac12f25SAmit Kucheria }; 3604bac12f25SAmit Kucheria 3605bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 3606bac12f25SAmit Kucheria temperature = <95000>; 3607bac12f25SAmit Kucheria hysteresis = <2000>; 3608bac12f25SAmit Kucheria type = "passive"; 3609bac12f25SAmit Kucheria }; 3610bac12f25SAmit Kucheria 3611bac12f25SAmit Kucheria cpu4_top_crit: cpu_crit { 3612bac12f25SAmit Kucheria temperature = <110000>; 3613bac12f25SAmit Kucheria hysteresis = <1000>; 3614bac12f25SAmit Kucheria type = "critical"; 3615bac12f25SAmit Kucheria }; 3616bac12f25SAmit Kucheria }; 3617bac12f25SAmit Kucheria 3618bac12f25SAmit Kucheria cooling-maps { 3619bac12f25SAmit Kucheria map0 { 3620bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 3621bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3622bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3623bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3624bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3625bac12f25SAmit Kucheria }; 3626bac12f25SAmit Kucheria map1 { 3627bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 3628bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3629bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3630bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3631bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3632bac12f25SAmit Kucheria }; 3633bac12f25SAmit Kucheria }; 3634bac12f25SAmit Kucheria }; 3635bac12f25SAmit Kucheria 3636bac12f25SAmit Kucheria cpu5-top-thermal { 3637bac12f25SAmit Kucheria polling-delay-passive = <250>; 3638bac12f25SAmit Kucheria polling-delay = <1000>; 3639bac12f25SAmit Kucheria 3640bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 3641bac12f25SAmit Kucheria 3642bac12f25SAmit Kucheria trips { 3643bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 3644bac12f25SAmit Kucheria temperature = <90000>; 3645bac12f25SAmit Kucheria hysteresis = <2000>; 3646bac12f25SAmit Kucheria type = "passive"; 3647bac12f25SAmit Kucheria }; 3648bac12f25SAmit Kucheria 3649bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 3650bac12f25SAmit Kucheria temperature = <95000>; 3651bac12f25SAmit Kucheria hysteresis = <2000>; 3652bac12f25SAmit Kucheria type = "passive"; 3653bac12f25SAmit Kucheria }; 3654bac12f25SAmit Kucheria 3655bac12f25SAmit Kucheria cpu5_top_crit: cpu_crit { 3656bac12f25SAmit Kucheria temperature = <110000>; 3657bac12f25SAmit Kucheria hysteresis = <1000>; 3658bac12f25SAmit Kucheria type = "critical"; 3659bac12f25SAmit Kucheria }; 3660bac12f25SAmit Kucheria }; 3661bac12f25SAmit Kucheria 3662bac12f25SAmit Kucheria cooling-maps { 3663bac12f25SAmit Kucheria map0 { 3664bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 3665bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3666bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3667bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3668bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3669bac12f25SAmit Kucheria }; 3670bac12f25SAmit Kucheria map1 { 3671bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 3672bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3673bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3674bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3675bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3676bac12f25SAmit Kucheria }; 3677bac12f25SAmit Kucheria }; 3678bac12f25SAmit Kucheria }; 3679bac12f25SAmit Kucheria 3680bac12f25SAmit Kucheria cpu6-top-thermal { 3681bac12f25SAmit Kucheria polling-delay-passive = <250>; 3682bac12f25SAmit Kucheria polling-delay = <1000>; 3683bac12f25SAmit Kucheria 3684bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 3685bac12f25SAmit Kucheria 3686bac12f25SAmit Kucheria trips { 3687bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 3688bac12f25SAmit Kucheria temperature = <90000>; 3689bac12f25SAmit Kucheria hysteresis = <2000>; 3690bac12f25SAmit Kucheria type = "passive"; 3691bac12f25SAmit Kucheria }; 3692bac12f25SAmit Kucheria 3693bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 3694bac12f25SAmit Kucheria temperature = <95000>; 3695bac12f25SAmit Kucheria hysteresis = <2000>; 3696bac12f25SAmit Kucheria type = "passive"; 3697bac12f25SAmit Kucheria }; 3698bac12f25SAmit Kucheria 3699bac12f25SAmit Kucheria cpu6_top_crit: cpu_crit { 3700bac12f25SAmit Kucheria temperature = <110000>; 3701bac12f25SAmit Kucheria hysteresis = <1000>; 3702bac12f25SAmit Kucheria type = "critical"; 3703bac12f25SAmit Kucheria }; 3704bac12f25SAmit Kucheria }; 3705bac12f25SAmit Kucheria 3706bac12f25SAmit Kucheria cooling-maps { 3707bac12f25SAmit Kucheria map0 { 3708bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 3709bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3710bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3711bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3712bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3713bac12f25SAmit Kucheria }; 3714bac12f25SAmit Kucheria map1 { 3715bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 3716bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3717bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3718bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3719bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3720bac12f25SAmit Kucheria }; 3721bac12f25SAmit Kucheria }; 3722bac12f25SAmit Kucheria }; 3723bac12f25SAmit Kucheria 3724bac12f25SAmit Kucheria cpu7-top-thermal { 3725bac12f25SAmit Kucheria polling-delay-passive = <250>; 3726bac12f25SAmit Kucheria polling-delay = <1000>; 3727bac12f25SAmit Kucheria 3728bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 3729bac12f25SAmit Kucheria 3730bac12f25SAmit Kucheria trips { 3731bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 3732bac12f25SAmit Kucheria temperature = <90000>; 3733bac12f25SAmit Kucheria hysteresis = <2000>; 3734bac12f25SAmit Kucheria type = "passive"; 3735bac12f25SAmit Kucheria }; 3736bac12f25SAmit Kucheria 3737bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 3738bac12f25SAmit Kucheria temperature = <95000>; 3739bac12f25SAmit Kucheria hysteresis = <2000>; 3740bac12f25SAmit Kucheria type = "passive"; 3741bac12f25SAmit Kucheria }; 3742bac12f25SAmit Kucheria 3743bac12f25SAmit Kucheria cpu7_top_crit: cpu_crit { 3744bac12f25SAmit Kucheria temperature = <110000>; 3745bac12f25SAmit Kucheria hysteresis = <1000>; 3746bac12f25SAmit Kucheria type = "critical"; 3747bac12f25SAmit Kucheria }; 3748bac12f25SAmit Kucheria }; 3749bac12f25SAmit Kucheria 3750bac12f25SAmit Kucheria cooling-maps { 3751bac12f25SAmit Kucheria map0 { 3752bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 3753bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3754bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3755bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3756bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3757bac12f25SAmit Kucheria }; 3758bac12f25SAmit Kucheria map1 { 3759bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 3760bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3761bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3762bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3763bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3764bac12f25SAmit Kucheria }; 3765bac12f25SAmit Kucheria }; 3766bac12f25SAmit Kucheria }; 3767bac12f25SAmit Kucheria 3768bac12f25SAmit Kucheria cpu4-bottom-thermal { 3769bac12f25SAmit Kucheria polling-delay-passive = <250>; 3770bac12f25SAmit Kucheria polling-delay = <1000>; 3771bac12f25SAmit Kucheria 3772bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 3773bac12f25SAmit Kucheria 3774bac12f25SAmit Kucheria trips { 3775bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 3776bac12f25SAmit Kucheria temperature = <90000>; 3777bac12f25SAmit Kucheria hysteresis = <2000>; 3778bac12f25SAmit Kucheria type = "passive"; 3779bac12f25SAmit Kucheria }; 3780bac12f25SAmit Kucheria 3781bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 3782bac12f25SAmit Kucheria temperature = <95000>; 3783bac12f25SAmit Kucheria hysteresis = <2000>; 3784bac12f25SAmit Kucheria type = "passive"; 3785bac12f25SAmit Kucheria }; 3786bac12f25SAmit Kucheria 3787bac12f25SAmit Kucheria cpu4_bottom_crit: cpu_crit { 3788bac12f25SAmit Kucheria temperature = <110000>; 3789bac12f25SAmit Kucheria hysteresis = <1000>; 3790bac12f25SAmit Kucheria type = "critical"; 3791bac12f25SAmit Kucheria }; 3792bac12f25SAmit Kucheria }; 3793bac12f25SAmit Kucheria 3794bac12f25SAmit Kucheria cooling-maps { 3795bac12f25SAmit Kucheria map0 { 3796bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 3797bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3798bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3799bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3800bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3801bac12f25SAmit Kucheria }; 3802bac12f25SAmit Kucheria map1 { 3803bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 3804bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3805bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3806bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3807bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3808bac12f25SAmit Kucheria }; 3809bac12f25SAmit Kucheria }; 3810bac12f25SAmit Kucheria }; 3811bac12f25SAmit Kucheria 3812bac12f25SAmit Kucheria cpu5-bottom-thermal { 3813bac12f25SAmit Kucheria polling-delay-passive = <250>; 3814bac12f25SAmit Kucheria polling-delay = <1000>; 3815bac12f25SAmit Kucheria 3816bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 3817bac12f25SAmit Kucheria 3818bac12f25SAmit Kucheria trips { 3819bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 3820bac12f25SAmit Kucheria temperature = <90000>; 3821bac12f25SAmit Kucheria hysteresis = <2000>; 3822bac12f25SAmit Kucheria type = "passive"; 3823bac12f25SAmit Kucheria }; 3824bac12f25SAmit Kucheria 3825bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 3826bac12f25SAmit Kucheria temperature = <95000>; 3827bac12f25SAmit Kucheria hysteresis = <2000>; 3828bac12f25SAmit Kucheria type = "passive"; 3829bac12f25SAmit Kucheria }; 3830bac12f25SAmit Kucheria 3831bac12f25SAmit Kucheria cpu5_bottom_crit: cpu_crit { 3832bac12f25SAmit Kucheria temperature = <110000>; 3833bac12f25SAmit Kucheria hysteresis = <1000>; 3834bac12f25SAmit Kucheria type = "critical"; 3835bac12f25SAmit Kucheria }; 3836bac12f25SAmit Kucheria }; 3837bac12f25SAmit Kucheria 3838bac12f25SAmit Kucheria cooling-maps { 3839bac12f25SAmit Kucheria map0 { 3840bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 3841bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3842bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3843bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3844bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3845bac12f25SAmit Kucheria }; 3846bac12f25SAmit Kucheria map1 { 3847bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 3848bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3849bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3850bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3851bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3852bac12f25SAmit Kucheria }; 3853bac12f25SAmit Kucheria }; 3854bac12f25SAmit Kucheria }; 3855bac12f25SAmit Kucheria 3856bac12f25SAmit Kucheria cpu6-bottom-thermal { 3857bac12f25SAmit Kucheria polling-delay-passive = <250>; 3858bac12f25SAmit Kucheria polling-delay = <1000>; 3859bac12f25SAmit Kucheria 3860bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 3861bac12f25SAmit Kucheria 3862bac12f25SAmit Kucheria trips { 3863bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 3864bac12f25SAmit Kucheria temperature = <90000>; 3865bac12f25SAmit Kucheria hysteresis = <2000>; 3866bac12f25SAmit Kucheria type = "passive"; 3867bac12f25SAmit Kucheria }; 3868bac12f25SAmit Kucheria 3869bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 3870bac12f25SAmit Kucheria temperature = <95000>; 3871bac12f25SAmit Kucheria hysteresis = <2000>; 3872bac12f25SAmit Kucheria type = "passive"; 3873bac12f25SAmit Kucheria }; 3874bac12f25SAmit Kucheria 3875bac12f25SAmit Kucheria cpu6_bottom_crit: cpu_crit { 3876bac12f25SAmit Kucheria temperature = <110000>; 3877bac12f25SAmit Kucheria hysteresis = <1000>; 3878bac12f25SAmit Kucheria type = "critical"; 3879bac12f25SAmit Kucheria }; 3880bac12f25SAmit Kucheria }; 3881bac12f25SAmit Kucheria 3882bac12f25SAmit Kucheria cooling-maps { 3883bac12f25SAmit Kucheria map0 { 3884bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 3885bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3886bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3887bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3888bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3889bac12f25SAmit Kucheria }; 3890bac12f25SAmit Kucheria map1 { 3891bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 3892bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3893bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3894bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3895bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3896bac12f25SAmit Kucheria }; 3897bac12f25SAmit Kucheria }; 3898bac12f25SAmit Kucheria }; 3899bac12f25SAmit Kucheria 3900bac12f25SAmit Kucheria cpu7-bottom-thermal { 3901bac12f25SAmit Kucheria polling-delay-passive = <250>; 3902bac12f25SAmit Kucheria polling-delay = <1000>; 3903bac12f25SAmit Kucheria 3904bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 3905bac12f25SAmit Kucheria 3906bac12f25SAmit Kucheria trips { 3907bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 3908bac12f25SAmit Kucheria temperature = <90000>; 3909bac12f25SAmit Kucheria hysteresis = <2000>; 3910bac12f25SAmit Kucheria type = "passive"; 3911bac12f25SAmit Kucheria }; 3912bac12f25SAmit Kucheria 3913bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 3914bac12f25SAmit Kucheria temperature = <95000>; 3915bac12f25SAmit Kucheria hysteresis = <2000>; 3916bac12f25SAmit Kucheria type = "passive"; 3917bac12f25SAmit Kucheria }; 3918bac12f25SAmit Kucheria 3919bac12f25SAmit Kucheria cpu7_bottom_crit: cpu_crit { 3920bac12f25SAmit Kucheria temperature = <110000>; 3921bac12f25SAmit Kucheria hysteresis = <1000>; 3922bac12f25SAmit Kucheria type = "critical"; 3923bac12f25SAmit Kucheria }; 3924bac12f25SAmit Kucheria }; 3925bac12f25SAmit Kucheria 3926bac12f25SAmit Kucheria cooling-maps { 3927bac12f25SAmit Kucheria map0 { 3928bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 3929bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3930bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3931bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3932bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3933bac12f25SAmit Kucheria }; 3934bac12f25SAmit Kucheria map1 { 3935bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 3936bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3937bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3938bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3939bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3940bac12f25SAmit Kucheria }; 3941bac12f25SAmit Kucheria }; 3942bac12f25SAmit Kucheria }; 3943bac12f25SAmit Kucheria 3944bac12f25SAmit Kucheria aoss0-thermal { 3945bac12f25SAmit Kucheria polling-delay-passive = <250>; 3946bac12f25SAmit Kucheria polling-delay = <1000>; 3947bac12f25SAmit Kucheria 3948bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 3949bac12f25SAmit Kucheria 3950bac12f25SAmit Kucheria trips { 3951bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 3952bac12f25SAmit Kucheria temperature = <90000>; 3953bac12f25SAmit Kucheria hysteresis = <2000>; 3954bac12f25SAmit Kucheria type = "hot"; 3955bac12f25SAmit Kucheria }; 3956bac12f25SAmit Kucheria }; 3957bac12f25SAmit Kucheria }; 3958bac12f25SAmit Kucheria 3959bac12f25SAmit Kucheria cluster0-thermal { 3960bac12f25SAmit Kucheria polling-delay-passive = <250>; 3961bac12f25SAmit Kucheria polling-delay = <1000>; 3962bac12f25SAmit Kucheria 3963bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 3964bac12f25SAmit Kucheria 3965bac12f25SAmit Kucheria trips { 3966bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 3967bac12f25SAmit Kucheria temperature = <90000>; 3968bac12f25SAmit Kucheria hysteresis = <2000>; 3969bac12f25SAmit Kucheria type = "hot"; 3970bac12f25SAmit Kucheria }; 3971bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 3972bac12f25SAmit Kucheria temperature = <110000>; 3973bac12f25SAmit Kucheria hysteresis = <2000>; 3974bac12f25SAmit Kucheria type = "critical"; 3975bac12f25SAmit Kucheria }; 3976bac12f25SAmit Kucheria }; 3977bac12f25SAmit Kucheria }; 3978bac12f25SAmit Kucheria 3979bac12f25SAmit Kucheria cluster1-thermal { 3980bac12f25SAmit Kucheria polling-delay-passive = <250>; 3981bac12f25SAmit Kucheria polling-delay = <1000>; 3982bac12f25SAmit Kucheria 3983bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 3984bac12f25SAmit Kucheria 3985bac12f25SAmit Kucheria trips { 3986bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 3987bac12f25SAmit Kucheria temperature = <90000>; 3988bac12f25SAmit Kucheria hysteresis = <2000>; 3989bac12f25SAmit Kucheria type = "hot"; 3990bac12f25SAmit Kucheria }; 3991bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 3992bac12f25SAmit Kucheria temperature = <110000>; 3993bac12f25SAmit Kucheria hysteresis = <2000>; 3994bac12f25SAmit Kucheria type = "critical"; 3995bac12f25SAmit Kucheria }; 3996bac12f25SAmit Kucheria }; 3997bac12f25SAmit Kucheria }; 3998bac12f25SAmit Kucheria 3999bac12f25SAmit Kucheria gpu-thermal-top { 4000bac12f25SAmit Kucheria polling-delay-passive = <250>; 4001bac12f25SAmit Kucheria polling-delay = <1000>; 4002bac12f25SAmit Kucheria 4003bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 4004bac12f25SAmit Kucheria 4005bac12f25SAmit Kucheria trips { 4006bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 4007bac12f25SAmit Kucheria temperature = <90000>; 4008bac12f25SAmit Kucheria hysteresis = <2000>; 4009bac12f25SAmit Kucheria type = "hot"; 4010bac12f25SAmit Kucheria }; 4011bac12f25SAmit Kucheria }; 4012bac12f25SAmit Kucheria }; 4013bac12f25SAmit Kucheria 4014bac12f25SAmit Kucheria aoss1-thermal { 4015bac12f25SAmit Kucheria polling-delay-passive = <250>; 4016bac12f25SAmit Kucheria polling-delay = <1000>; 4017bac12f25SAmit Kucheria 4018bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 4019bac12f25SAmit Kucheria 4020bac12f25SAmit Kucheria trips { 4021bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 4022bac12f25SAmit Kucheria temperature = <90000>; 4023bac12f25SAmit Kucheria hysteresis = <2000>; 4024bac12f25SAmit Kucheria type = "hot"; 4025bac12f25SAmit Kucheria }; 4026bac12f25SAmit Kucheria }; 4027bac12f25SAmit Kucheria }; 4028bac12f25SAmit Kucheria 4029bac12f25SAmit Kucheria wlan-thermal { 4030bac12f25SAmit Kucheria polling-delay-passive = <250>; 4031bac12f25SAmit Kucheria polling-delay = <1000>; 4032bac12f25SAmit Kucheria 4033bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 4034bac12f25SAmit Kucheria 4035bac12f25SAmit Kucheria trips { 4036bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 4037bac12f25SAmit Kucheria temperature = <90000>; 4038bac12f25SAmit Kucheria hysteresis = <2000>; 4039bac12f25SAmit Kucheria type = "hot"; 4040bac12f25SAmit Kucheria }; 4041bac12f25SAmit Kucheria }; 4042bac12f25SAmit Kucheria }; 4043bac12f25SAmit Kucheria 4044bac12f25SAmit Kucheria video-thermal { 4045bac12f25SAmit Kucheria polling-delay-passive = <250>; 4046bac12f25SAmit Kucheria polling-delay = <1000>; 4047bac12f25SAmit Kucheria 4048bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 4049bac12f25SAmit Kucheria 4050bac12f25SAmit Kucheria trips { 4051bac12f25SAmit Kucheria video_alert0: trip-point0 { 4052bac12f25SAmit Kucheria temperature = <90000>; 4053bac12f25SAmit Kucheria hysteresis = <2000>; 4054bac12f25SAmit Kucheria type = "hot"; 4055bac12f25SAmit Kucheria }; 4056bac12f25SAmit Kucheria }; 4057bac12f25SAmit Kucheria }; 4058bac12f25SAmit Kucheria 4059bac12f25SAmit Kucheria mem-thermal { 4060bac12f25SAmit Kucheria polling-delay-passive = <250>; 4061bac12f25SAmit Kucheria polling-delay = <1000>; 4062bac12f25SAmit Kucheria 4063bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 4064bac12f25SAmit Kucheria 4065bac12f25SAmit Kucheria trips { 4066bac12f25SAmit Kucheria mem_alert0: trip-point0 { 4067bac12f25SAmit Kucheria temperature = <90000>; 4068bac12f25SAmit Kucheria hysteresis = <2000>; 4069bac12f25SAmit Kucheria type = "hot"; 4070bac12f25SAmit Kucheria }; 4071bac12f25SAmit Kucheria }; 4072bac12f25SAmit Kucheria }; 4073bac12f25SAmit Kucheria 4074bac12f25SAmit Kucheria q6-hvx-thermal { 4075bac12f25SAmit Kucheria polling-delay-passive = <250>; 4076bac12f25SAmit Kucheria polling-delay = <1000>; 4077bac12f25SAmit Kucheria 4078bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 4079bac12f25SAmit Kucheria 4080bac12f25SAmit Kucheria trips { 4081bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 4082bac12f25SAmit Kucheria temperature = <90000>; 4083bac12f25SAmit Kucheria hysteresis = <2000>; 4084bac12f25SAmit Kucheria type = "hot"; 4085bac12f25SAmit Kucheria }; 4086bac12f25SAmit Kucheria }; 4087bac12f25SAmit Kucheria }; 4088bac12f25SAmit Kucheria 4089bac12f25SAmit Kucheria camera-thermal { 4090bac12f25SAmit Kucheria polling-delay-passive = <250>; 4091bac12f25SAmit Kucheria polling-delay = <1000>; 4092bac12f25SAmit Kucheria 4093bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 4094bac12f25SAmit Kucheria 4095bac12f25SAmit Kucheria trips { 4096bac12f25SAmit Kucheria camera_alert0: trip-point0 { 4097bac12f25SAmit Kucheria temperature = <90000>; 4098bac12f25SAmit Kucheria hysteresis = <2000>; 4099bac12f25SAmit Kucheria type = "hot"; 4100bac12f25SAmit Kucheria }; 4101bac12f25SAmit Kucheria }; 4102bac12f25SAmit Kucheria }; 4103bac12f25SAmit Kucheria 4104bac12f25SAmit Kucheria compute-thermal { 4105bac12f25SAmit Kucheria polling-delay-passive = <250>; 4106bac12f25SAmit Kucheria polling-delay = <1000>; 4107bac12f25SAmit Kucheria 4108bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 4109bac12f25SAmit Kucheria 4110bac12f25SAmit Kucheria trips { 4111bac12f25SAmit Kucheria compute_alert0: trip-point0 { 4112bac12f25SAmit Kucheria temperature = <90000>; 4113bac12f25SAmit Kucheria hysteresis = <2000>; 4114bac12f25SAmit Kucheria type = "hot"; 4115bac12f25SAmit Kucheria }; 4116bac12f25SAmit Kucheria }; 4117bac12f25SAmit Kucheria }; 4118bac12f25SAmit Kucheria 4119bac12f25SAmit Kucheria npu-thermal { 4120bac12f25SAmit Kucheria polling-delay-passive = <250>; 4121bac12f25SAmit Kucheria polling-delay = <1000>; 4122bac12f25SAmit Kucheria 4123bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 4124bac12f25SAmit Kucheria 4125bac12f25SAmit Kucheria trips { 4126bac12f25SAmit Kucheria npu_alert0: trip-point0 { 4127bac12f25SAmit Kucheria temperature = <90000>; 4128bac12f25SAmit Kucheria hysteresis = <2000>; 4129bac12f25SAmit Kucheria type = "hot"; 4130bac12f25SAmit Kucheria }; 4131bac12f25SAmit Kucheria }; 4132bac12f25SAmit Kucheria }; 4133bac12f25SAmit Kucheria 4134bac12f25SAmit Kucheria gpu-thermal-bottom { 4135bac12f25SAmit Kucheria polling-delay-passive = <250>; 4136bac12f25SAmit Kucheria polling-delay = <1000>; 4137bac12f25SAmit Kucheria 4138bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 4139bac12f25SAmit Kucheria 4140bac12f25SAmit Kucheria trips { 4141bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 4142bac12f25SAmit Kucheria temperature = <90000>; 4143bac12f25SAmit Kucheria hysteresis = <2000>; 4144bac12f25SAmit Kucheria type = "hot"; 4145bac12f25SAmit Kucheria }; 4146bac12f25SAmit Kucheria }; 4147bac12f25SAmit Kucheria }; 4148bac12f25SAmit Kucheria }; 414960378f1aSVenkata Narendra Kumar Gutta}; 4150