160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 117858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> 127858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> 1315049bb5SKonrad Dybcio#include <dt-bindings/dma/qcom-gpi.h> 1475948800SKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1579a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 167c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 17e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 18b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1963e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 2060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 2163e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 22bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 23ca79a997SBryan O'Donoghue#include <dt-bindings/clock/qcom,camcc-sm8250.h> 245b9ec225Sjonathan@marek.ca#include <dt-bindings/clock/qcom,videocc-sm8250.h> 2560378f1aSVenkata Narendra Kumar Gutta 2660378f1aSVenkata Narendra Kumar Gutta/ { 2760378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2860378f1aSVenkata Narendra Kumar Gutta 2960378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 3060378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 3160378f1aSVenkata Narendra Kumar Gutta 32e5813b15SDmitry Baryshkov aliases { 33e5813b15SDmitry Baryshkov i2c0 = &i2c0; 34e5813b15SDmitry Baryshkov i2c1 = &i2c1; 35e5813b15SDmitry Baryshkov i2c2 = &i2c2; 36e5813b15SDmitry Baryshkov i2c3 = &i2c3; 37e5813b15SDmitry Baryshkov i2c4 = &i2c4; 38e5813b15SDmitry Baryshkov i2c5 = &i2c5; 39e5813b15SDmitry Baryshkov i2c6 = &i2c6; 40e5813b15SDmitry Baryshkov i2c7 = &i2c7; 41e5813b15SDmitry Baryshkov i2c8 = &i2c8; 42e5813b15SDmitry Baryshkov i2c9 = &i2c9; 43e5813b15SDmitry Baryshkov i2c10 = &i2c10; 44e5813b15SDmitry Baryshkov i2c11 = &i2c11; 45e5813b15SDmitry Baryshkov i2c12 = &i2c12; 46e5813b15SDmitry Baryshkov i2c13 = &i2c13; 47e5813b15SDmitry Baryshkov i2c14 = &i2c14; 48e5813b15SDmitry Baryshkov i2c15 = &i2c15; 49e5813b15SDmitry Baryshkov i2c16 = &i2c16; 50e5813b15SDmitry Baryshkov i2c17 = &i2c17; 51e5813b15SDmitry Baryshkov i2c18 = &i2c18; 52e5813b15SDmitry Baryshkov i2c19 = &i2c19; 53e5813b15SDmitry Baryshkov spi0 = &spi0; 54e5813b15SDmitry Baryshkov spi1 = &spi1; 55e5813b15SDmitry Baryshkov spi2 = &spi2; 56e5813b15SDmitry Baryshkov spi3 = &spi3; 57e5813b15SDmitry Baryshkov spi4 = &spi4; 58e5813b15SDmitry Baryshkov spi5 = &spi5; 59e5813b15SDmitry Baryshkov spi6 = &spi6; 60e5813b15SDmitry Baryshkov spi7 = &spi7; 61e5813b15SDmitry Baryshkov spi8 = &spi8; 62e5813b15SDmitry Baryshkov spi9 = &spi9; 63e5813b15SDmitry Baryshkov spi10 = &spi10; 64e5813b15SDmitry Baryshkov spi11 = &spi11; 65e5813b15SDmitry Baryshkov spi12 = &spi12; 66e5813b15SDmitry Baryshkov spi13 = &spi13; 67e5813b15SDmitry Baryshkov spi14 = &spi14; 68e5813b15SDmitry Baryshkov spi15 = &spi15; 69e5813b15SDmitry Baryshkov spi16 = &spi16; 70e5813b15SDmitry Baryshkov spi17 = &spi17; 71e5813b15SDmitry Baryshkov spi18 = &spi18; 72e5813b15SDmitry Baryshkov spi19 = &spi19; 73e5813b15SDmitry Baryshkov }; 74e5813b15SDmitry Baryshkov 7560378f1aSVenkata Narendra Kumar Gutta chosen { }; 7660378f1aSVenkata Narendra Kumar Gutta 7760378f1aSVenkata Narendra Kumar Gutta clocks { 7860378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7960378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 8060378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8160378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 8260378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 8360378f1aSVenkata Narendra Kumar Gutta }; 8460378f1aSVenkata Narendra Kumar Gutta 8560378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8660378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 879ff8b059SJonathan Marek clock-frequency = <32768>; 8860378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8960378f1aSVenkata Narendra Kumar Gutta }; 9060378f1aSVenkata Narendra Kumar Gutta }; 9160378f1aSVenkata Narendra Kumar Gutta 9260378f1aSVenkata Narendra Kumar Gutta cpus { 9360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 9460378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9560378f1aSVenkata Narendra Kumar Gutta 9660378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 100d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 10160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1026aabed55SDanny Lin capacity-dmips-mhz = <448>; 103775a5283SVincent Guittot dynamic-power-coefficient = <105>; 10460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 10532bc936dSMaulik Shah power-domains = <&CPU_PD0>; 10632bc936dSMaulik Shah power-domain-names = "psci"; 10702ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1088e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 109b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 110b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 111bac12f25SAmit Kucheria #cooling-cells = <2>; 11260378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 11360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1149435294cSPierre Gondois cache-level = <2>; 115ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 116ac1d8a8eSKrzysztof Kozlowski cache-unified; 11760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11860378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 11960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1209435294cSPierre Gondois cache-level = <3>; 121ac1d8a8eSKrzysztof Kozlowski cache-size = <0x400000>; 122ac1d8a8eSKrzysztof Kozlowski cache-unified; 12360378f1aSVenkata Narendra Kumar Gutta }; 12460378f1aSVenkata Narendra Kumar Gutta }; 12560378f1aSVenkata Narendra Kumar Gutta }; 12660378f1aSVenkata Narendra Kumar Gutta 12760378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 12860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 131d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 13260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1336aabed55SDanny Lin capacity-dmips-mhz = <448>; 134775a5283SVincent Guittot dynamic-power-coefficient = <105>; 13560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 13632bc936dSMaulik Shah power-domains = <&CPU_PD1>; 13732bc936dSMaulik Shah power-domain-names = "psci"; 13802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1398e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 140b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 141b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 142bac12f25SAmit Kucheria #cooling-cells = <2>; 14360378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 14460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1459435294cSPierre Gondois cache-level = <2>; 146ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 147ac1d8a8eSKrzysztof Kozlowski cache-unified; 14860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 14960378f1aSVenkata Narendra Kumar Gutta }; 15060378f1aSVenkata Narendra Kumar Gutta }; 15160378f1aSVenkata Narendra Kumar Gutta 15260378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 15360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 15460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 15560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 156d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 15760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1586aabed55SDanny Lin capacity-dmips-mhz = <448>; 159775a5283SVincent Guittot dynamic-power-coefficient = <105>; 16060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 16132bc936dSMaulik Shah power-domains = <&CPU_PD2>; 16232bc936dSMaulik Shah power-domain-names = "psci"; 16302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1648e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 165b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 166b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 167bac12f25SAmit Kucheria #cooling-cells = <2>; 16860378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 16960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1709435294cSPierre Gondois cache-level = <2>; 171ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 172ac1d8a8eSKrzysztof Kozlowski cache-unified; 17360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17460378f1aSVenkata Narendra Kumar Gutta }; 17560378f1aSVenkata Narendra Kumar Gutta }; 17660378f1aSVenkata Narendra Kumar Gutta 17760378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 17860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 17960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 181d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 0>; 18260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1836aabed55SDanny Lin capacity-dmips-mhz = <448>; 184775a5283SVincent Guittot dynamic-power-coefficient = <105>; 18560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 18632bc936dSMaulik Shah power-domains = <&CPU_PD3>; 18732bc936dSMaulik Shah power-domain-names = "psci"; 18802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1898e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 190b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 191b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 192bac12f25SAmit Kucheria #cooling-cells = <2>; 19360378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 19460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 1959435294cSPierre Gondois cache-level = <2>; 196ac1d8a8eSKrzysztof Kozlowski cache-size = <0x20000>; 197ac1d8a8eSKrzysztof Kozlowski cache-unified; 19860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 19960378f1aSVenkata Narendra Kumar Gutta }; 20060378f1aSVenkata Narendra Kumar Gutta }; 20160378f1aSVenkata Narendra Kumar Gutta 20260378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 20360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 20460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 20560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 206d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 20760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2086aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2096aabed55SDanny Lin dynamic-power-coefficient = <379>; 21060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 21132bc936dSMaulik Shah power-domains = <&CPU_PD4>; 21232bc936dSMaulik Shah power-domain-names = "psci"; 21302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2148e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 215b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 216b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 217bac12f25SAmit Kucheria #cooling-cells = <2>; 21860378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 21960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2209435294cSPierre Gondois cache-level = <2>; 221ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 222ac1d8a8eSKrzysztof Kozlowski cache-unified; 22360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 22460378f1aSVenkata Narendra Kumar Gutta }; 22560378f1aSVenkata Narendra Kumar Gutta }; 22660378f1aSVenkata Narendra Kumar Gutta 22760378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 22860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 22960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 23060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 231d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 23260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2336aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2346aabed55SDanny Lin dynamic-power-coefficient = <379>; 23560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 23632bc936dSMaulik Shah power-domains = <&CPU_PD5>; 23732bc936dSMaulik Shah power-domain-names = "psci"; 23802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2398e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 240b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 241b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 242bac12f25SAmit Kucheria #cooling-cells = <2>; 24360378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 24460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2459435294cSPierre Gondois cache-level = <2>; 246ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 247ac1d8a8eSKrzysztof Kozlowski cache-unified; 24860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 24960378f1aSVenkata Narendra Kumar Gutta }; 25060378f1aSVenkata Narendra Kumar Gutta }; 25160378f1aSVenkata Narendra Kumar Gutta 25260378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 25360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 25460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 25560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 256d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 1>; 25760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2586aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2596aabed55SDanny Lin dynamic-power-coefficient = <379>; 26060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 26132bc936dSMaulik Shah power-domains = <&CPU_PD6>; 26232bc936dSMaulik Shah power-domain-names = "psci"; 26302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2648e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 265b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 266b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 267bac12f25SAmit Kucheria #cooling-cells = <2>; 26860378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 26960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2709435294cSPierre Gondois cache-level = <2>; 271ac1d8a8eSKrzysztof Kozlowski cache-size = <0x40000>; 272ac1d8a8eSKrzysztof Kozlowski cache-unified; 27360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 27460378f1aSVenkata Narendra Kumar Gutta }; 27560378f1aSVenkata Narendra Kumar Gutta }; 27660378f1aSVenkata Narendra Kumar Gutta 27760378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 27860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 27960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 28060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 281d78cb07dSManivannan Sadhasivam clocks = <&cpufreq_hw 2>; 28260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2836aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2846aabed55SDanny Lin dynamic-power-coefficient = <444>; 28560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 28632bc936dSMaulik Shah power-domains = <&CPU_PD7>; 28732bc936dSMaulik Shah power-domain-names = "psci"; 28802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 2898e0e8016SThara Gopinath operating-points-v2 = <&cpu7_opp_table>; 290b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 291b5a12438SAbel Vesa <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>; 292bac12f25SAmit Kucheria #cooling-cells = <2>; 29360378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 29460378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 2959435294cSPierre Gondois cache-level = <2>; 296ac1d8a8eSKrzysztof Kozlowski cache-size = <0x80000>; 297ac1d8a8eSKrzysztof Kozlowski cache-unified; 29860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 29960378f1aSVenkata Narendra Kumar Gutta }; 30060378f1aSVenkata Narendra Kumar Gutta }; 301b4791e69SDanny Lin 302b4791e69SDanny Lin cpu-map { 303b4791e69SDanny Lin cluster0 { 304b4791e69SDanny Lin core0 { 305b4791e69SDanny Lin cpu = <&CPU0>; 306b4791e69SDanny Lin }; 307b4791e69SDanny Lin 308b4791e69SDanny Lin core1 { 309b4791e69SDanny Lin cpu = <&CPU1>; 310b4791e69SDanny Lin }; 311b4791e69SDanny Lin 312b4791e69SDanny Lin core2 { 313b4791e69SDanny Lin cpu = <&CPU2>; 314b4791e69SDanny Lin }; 315b4791e69SDanny Lin 316b4791e69SDanny Lin core3 { 317b4791e69SDanny Lin cpu = <&CPU3>; 318b4791e69SDanny Lin }; 319b4791e69SDanny Lin 320b4791e69SDanny Lin core4 { 321b4791e69SDanny Lin cpu = <&CPU4>; 322b4791e69SDanny Lin }; 323b4791e69SDanny Lin 324b4791e69SDanny Lin core5 { 325b4791e69SDanny Lin cpu = <&CPU5>; 326b4791e69SDanny Lin }; 327b4791e69SDanny Lin 328b4791e69SDanny Lin core6 { 329b4791e69SDanny Lin cpu = <&CPU6>; 330b4791e69SDanny Lin }; 331b4791e69SDanny Lin 332b4791e69SDanny Lin core7 { 333b4791e69SDanny Lin cpu = <&CPU7>; 334b4791e69SDanny Lin }; 335b4791e69SDanny Lin }; 336b4791e69SDanny Lin }; 33732bc936dSMaulik Shah 33832bc936dSMaulik Shah idle-states { 33932bc936dSMaulik Shah entry-method = "psci"; 34032bc936dSMaulik Shah 34132bc936dSMaulik Shah LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 34232bc936dSMaulik Shah compatible = "arm,idle-state"; 34332bc936dSMaulik Shah idle-state-name = "silver-rail-power-collapse"; 34432bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 34532bc936dSMaulik Shah entry-latency-us = <360>; 34632bc936dSMaulik Shah exit-latency-us = <531>; 34732bc936dSMaulik Shah min-residency-us = <3934>; 34832bc936dSMaulik Shah local-timer-stop; 34932bc936dSMaulik Shah }; 35032bc936dSMaulik Shah 35132bc936dSMaulik Shah BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 35232bc936dSMaulik Shah compatible = "arm,idle-state"; 35332bc936dSMaulik Shah idle-state-name = "gold-rail-power-collapse"; 35432bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 35532bc936dSMaulik Shah entry-latency-us = <702>; 35632bc936dSMaulik Shah exit-latency-us = <1061>; 35732bc936dSMaulik Shah min-residency-us = <4488>; 35832bc936dSMaulik Shah local-timer-stop; 35932bc936dSMaulik Shah }; 36032bc936dSMaulik Shah }; 36132bc936dSMaulik Shah 36232bc936dSMaulik Shah domain-idle-states { 36332bc936dSMaulik Shah CLUSTER_SLEEP_0: cluster-sleep-0 { 36432bc936dSMaulik Shah compatible = "domain-idle-state"; 36532bc936dSMaulik Shah arm,psci-suspend-param = <0x4100c244>; 36632bc936dSMaulik Shah entry-latency-us = <3264>; 36732bc936dSMaulik Shah exit-latency-us = <6562>; 36832bc936dSMaulik Shah min-residency-us = <9987>; 36932bc936dSMaulik Shah }; 37032bc936dSMaulik Shah }; 37160378f1aSVenkata Narendra Kumar Gutta }; 37260378f1aSVenkata Narendra Kumar Gutta 3730e3e6546SKrzysztof Kozlowski cpu0_opp_table: opp-table-cpu0 { 3748e0e8016SThara Gopinath compatible = "operating-points-v2"; 3758e0e8016SThara Gopinath opp-shared; 3768e0e8016SThara Gopinath 3778e0e8016SThara Gopinath cpu0_opp1: opp-300000000 { 3788e0e8016SThara Gopinath opp-hz = /bits/ 64 <300000000>; 3798e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3808e0e8016SThara Gopinath }; 3818e0e8016SThara Gopinath 3828e0e8016SThara Gopinath cpu0_opp2: opp-403200000 { 3838e0e8016SThara Gopinath opp-hz = /bits/ 64 <403200000>; 3848e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3858e0e8016SThara Gopinath }; 3868e0e8016SThara Gopinath 3878e0e8016SThara Gopinath cpu0_opp3: opp-518400000 { 3888e0e8016SThara Gopinath opp-hz = /bits/ 64 <518400000>; 3898e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3908e0e8016SThara Gopinath }; 3918e0e8016SThara Gopinath 3928e0e8016SThara Gopinath cpu0_opp4: opp-614400000 { 3938e0e8016SThara Gopinath opp-hz = /bits/ 64 <614400000>; 3948e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3958e0e8016SThara Gopinath }; 3968e0e8016SThara Gopinath 3978e0e8016SThara Gopinath cpu0_opp5: opp-691200000 { 3988e0e8016SThara Gopinath opp-hz = /bits/ 64 <691200000>; 3998e0e8016SThara Gopinath opp-peak-kBps = <800000 19660800>; 4008e0e8016SThara Gopinath }; 4018e0e8016SThara Gopinath 4028e0e8016SThara Gopinath cpu0_opp6: opp-787200000 { 4038e0e8016SThara Gopinath opp-hz = /bits/ 64 <787200000>; 4048e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4058e0e8016SThara Gopinath }; 4068e0e8016SThara Gopinath 4078e0e8016SThara Gopinath cpu0_opp7: opp-883200000 { 4088e0e8016SThara Gopinath opp-hz = /bits/ 64 <883200000>; 4098e0e8016SThara Gopinath opp-peak-kBps = <1804000 23347200>; 4108e0e8016SThara Gopinath }; 4118e0e8016SThara Gopinath 4128e0e8016SThara Gopinath cpu0_opp8: opp-979200000 { 4138e0e8016SThara Gopinath opp-hz = /bits/ 64 <979200000>; 4148e0e8016SThara Gopinath opp-peak-kBps = <1804000 26419200>; 4158e0e8016SThara Gopinath }; 4168e0e8016SThara Gopinath 4178e0e8016SThara Gopinath cpu0_opp9: opp-1075200000 { 4188e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 4198e0e8016SThara Gopinath opp-peak-kBps = <1804000 29491200>; 4208e0e8016SThara Gopinath }; 4218e0e8016SThara Gopinath 4228e0e8016SThara Gopinath cpu0_opp10: opp-1171200000 { 4238e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4248e0e8016SThara Gopinath opp-peak-kBps = <1804000 32563200>; 4258e0e8016SThara Gopinath }; 4268e0e8016SThara Gopinath 4278e0e8016SThara Gopinath cpu0_opp11: opp-1248000000 { 4288e0e8016SThara Gopinath opp-hz = /bits/ 64 <1248000000>; 4298e0e8016SThara Gopinath opp-peak-kBps = <1804000 36249600>; 4308e0e8016SThara Gopinath }; 4318e0e8016SThara Gopinath 4328e0e8016SThara Gopinath cpu0_opp12: opp-1344000000 { 4338e0e8016SThara Gopinath opp-hz = /bits/ 64 <1344000000>; 4348e0e8016SThara Gopinath opp-peak-kBps = <2188000 36249600>; 4358e0e8016SThara Gopinath }; 4368e0e8016SThara Gopinath 4378e0e8016SThara Gopinath cpu0_opp13: opp-1420800000 { 4388e0e8016SThara Gopinath opp-hz = /bits/ 64 <1420800000>; 4398e0e8016SThara Gopinath opp-peak-kBps = <2188000 39321600>; 4408e0e8016SThara Gopinath }; 4418e0e8016SThara Gopinath 4428e0e8016SThara Gopinath cpu0_opp14: opp-1516800000 { 4438e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 4448e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4458e0e8016SThara Gopinath }; 4468e0e8016SThara Gopinath 4478e0e8016SThara Gopinath cpu0_opp15: opp-1612800000 { 4488e0e8016SThara Gopinath opp-hz = /bits/ 64 <1612800000>; 4498e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4508e0e8016SThara Gopinath }; 4518e0e8016SThara Gopinath 4528e0e8016SThara Gopinath cpu0_opp16: opp-1708800000 { 4538e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 4548e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4558e0e8016SThara Gopinath }; 4568e0e8016SThara Gopinath 4578e0e8016SThara Gopinath cpu0_opp17: opp-1804800000 { 4588e0e8016SThara Gopinath opp-hz = /bits/ 64 <1804800000>; 4598e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4608e0e8016SThara Gopinath }; 4618e0e8016SThara Gopinath }; 4628e0e8016SThara Gopinath 4630e3e6546SKrzysztof Kozlowski cpu4_opp_table: opp-table-cpu4 { 4648e0e8016SThara Gopinath compatible = "operating-points-v2"; 4658e0e8016SThara Gopinath opp-shared; 4668e0e8016SThara Gopinath 4678e0e8016SThara Gopinath cpu4_opp1: opp-710400000 { 4688e0e8016SThara Gopinath opp-hz = /bits/ 64 <710400000>; 4698e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4708e0e8016SThara Gopinath }; 4718e0e8016SThara Gopinath 4728e0e8016SThara Gopinath cpu4_opp2: opp-825600000 { 4738e0e8016SThara Gopinath opp-hz = /bits/ 64 <825600000>; 4748e0e8016SThara Gopinath opp-peak-kBps = <2188000 23347200>; 4758e0e8016SThara Gopinath }; 4768e0e8016SThara Gopinath 4778e0e8016SThara Gopinath cpu4_opp3: opp-940800000 { 4788e0e8016SThara Gopinath opp-hz = /bits/ 64 <940800000>; 4798e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 4808e0e8016SThara Gopinath }; 4818e0e8016SThara Gopinath 4828e0e8016SThara Gopinath cpu4_opp4: opp-1056000000 { 4838e0e8016SThara Gopinath opp-hz = /bits/ 64 <1056000000>; 4848e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 4858e0e8016SThara Gopinath }; 4868e0e8016SThara Gopinath 4878e0e8016SThara Gopinath cpu4_opp5: opp-1171200000 { 4888e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4898e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 4908e0e8016SThara Gopinath }; 4918e0e8016SThara Gopinath 4928e0e8016SThara Gopinath cpu4_opp6: opp-1286400000 { 4938e0e8016SThara Gopinath opp-hz = /bits/ 64 <1286400000>; 4948e0e8016SThara Gopinath opp-peak-kBps = <4068000 29491200>; 4958e0e8016SThara Gopinath }; 4968e0e8016SThara Gopinath 4978e0e8016SThara Gopinath cpu4_opp7: opp-1382400000 { 4988e0e8016SThara Gopinath opp-hz = /bits/ 64 <1382400000>; 4998e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5008e0e8016SThara Gopinath }; 5018e0e8016SThara Gopinath 5028e0e8016SThara Gopinath cpu4_opp8: opp-1478400000 { 5038e0e8016SThara Gopinath opp-hz = /bits/ 64 <1478400000>; 5048e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5058e0e8016SThara Gopinath }; 5068e0e8016SThara Gopinath 5078e0e8016SThara Gopinath cpu4_opp9: opp-1574400000 { 5088e0e8016SThara Gopinath opp-hz = /bits/ 64 <1574400000>; 5098e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 5108e0e8016SThara Gopinath }; 5118e0e8016SThara Gopinath 5128e0e8016SThara Gopinath cpu4_opp10: opp-1670400000 { 5138e0e8016SThara Gopinath opp-hz = /bits/ 64 <1670400000>; 5148e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 5158e0e8016SThara Gopinath }; 5168e0e8016SThara Gopinath 5178e0e8016SThara Gopinath cpu4_opp11: opp-1766400000 { 5188e0e8016SThara Gopinath opp-hz = /bits/ 64 <1766400000>; 5198e0e8016SThara Gopinath opp-peak-kBps = <5412000 45465600>; 5208e0e8016SThara Gopinath }; 5218e0e8016SThara Gopinath 5228e0e8016SThara Gopinath cpu4_opp12: opp-1862400000 { 5238e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 5248e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 5258e0e8016SThara Gopinath }; 5268e0e8016SThara Gopinath 5278e0e8016SThara Gopinath cpu4_opp13: opp-1958400000 { 5288e0e8016SThara Gopinath opp-hz = /bits/ 64 <1958400000>; 5298e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 5308e0e8016SThara Gopinath }; 5318e0e8016SThara Gopinath 5328e0e8016SThara Gopinath cpu4_opp14: opp-2054400000 { 5338e0e8016SThara Gopinath opp-hz = /bits/ 64 <2054400000>; 5348e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 5358e0e8016SThara Gopinath }; 5368e0e8016SThara Gopinath 5378e0e8016SThara Gopinath cpu4_opp15: opp-2150400000 { 5388e0e8016SThara Gopinath opp-hz = /bits/ 64 <2150400000>; 5398e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5408e0e8016SThara Gopinath }; 5418e0e8016SThara Gopinath 5428e0e8016SThara Gopinath cpu4_opp16: opp-2246400000 { 5438e0e8016SThara Gopinath opp-hz = /bits/ 64 <2246400000>; 5448e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5458e0e8016SThara Gopinath }; 5468e0e8016SThara Gopinath 5478e0e8016SThara Gopinath cpu4_opp17: opp-2342400000 { 5488e0e8016SThara Gopinath opp-hz = /bits/ 64 <2342400000>; 5498e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5508e0e8016SThara Gopinath }; 5518e0e8016SThara Gopinath 5528e0e8016SThara Gopinath cpu4_opp18: opp-2419200000 { 5538e0e8016SThara Gopinath opp-hz = /bits/ 64 <2419200000>; 5548e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5558e0e8016SThara Gopinath }; 5568e0e8016SThara Gopinath }; 5578e0e8016SThara Gopinath 5580e3e6546SKrzysztof Kozlowski cpu7_opp_table: opp-table-cpu7 { 5598e0e8016SThara Gopinath compatible = "operating-points-v2"; 5608e0e8016SThara Gopinath opp-shared; 5618e0e8016SThara Gopinath 5628e0e8016SThara Gopinath cpu7_opp1: opp-844800000 { 5638e0e8016SThara Gopinath opp-hz = /bits/ 64 <844800000>; 5648e0e8016SThara Gopinath opp-peak-kBps = <2188000 19660800>; 5658e0e8016SThara Gopinath }; 5668e0e8016SThara Gopinath 5678e0e8016SThara Gopinath cpu7_opp2: opp-960000000 { 5688e0e8016SThara Gopinath opp-hz = /bits/ 64 <960000000>; 5698e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 5708e0e8016SThara Gopinath }; 5718e0e8016SThara Gopinath 5728e0e8016SThara Gopinath cpu7_opp3: opp-1075200000 { 5738e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 5748e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 5758e0e8016SThara Gopinath }; 5768e0e8016SThara Gopinath 5778e0e8016SThara Gopinath cpu7_opp4: opp-1190400000 { 5788e0e8016SThara Gopinath opp-hz = /bits/ 64 <1190400000>; 5798e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 5808e0e8016SThara Gopinath }; 5818e0e8016SThara Gopinath 5828e0e8016SThara Gopinath cpu7_opp5: opp-1305600000 { 5838e0e8016SThara Gopinath opp-hz = /bits/ 64 <1305600000>; 5848e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5858e0e8016SThara Gopinath }; 5868e0e8016SThara Gopinath 5878e0e8016SThara Gopinath cpu7_opp6: opp-1401600000 { 5888e0e8016SThara Gopinath opp-hz = /bits/ 64 <1401600000>; 5898e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5908e0e8016SThara Gopinath }; 5918e0e8016SThara Gopinath 5928e0e8016SThara Gopinath cpu7_opp7: opp-1516800000 { 5938e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 5948e0e8016SThara Gopinath opp-peak-kBps = <4068000 36249600>; 5958e0e8016SThara Gopinath }; 5968e0e8016SThara Gopinath 5978e0e8016SThara Gopinath cpu7_opp8: opp-1632000000 { 5988e0e8016SThara Gopinath opp-hz = /bits/ 64 <1632000000>; 5998e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 6008e0e8016SThara Gopinath }; 6018e0e8016SThara Gopinath 6028e0e8016SThara Gopinath cpu7_opp9: opp-1747200000 { 6038e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 6048e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 6058e0e8016SThara Gopinath }; 6068e0e8016SThara Gopinath 6078e0e8016SThara Gopinath cpu7_opp10: opp-1862400000 { 6088e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 6098e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 6108e0e8016SThara Gopinath }; 6118e0e8016SThara Gopinath 6128e0e8016SThara Gopinath cpu7_opp11: opp-1977600000 { 6138e0e8016SThara Gopinath opp-hz = /bits/ 64 <1977600000>; 6148e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 6158e0e8016SThara Gopinath }; 6168e0e8016SThara Gopinath 6178e0e8016SThara Gopinath cpu7_opp12: opp-2073600000 { 6188e0e8016SThara Gopinath opp-hz = /bits/ 64 <2073600000>; 6198e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 6208e0e8016SThara Gopinath }; 6218e0e8016SThara Gopinath 6228e0e8016SThara Gopinath cpu7_opp13: opp-2169600000 { 6238e0e8016SThara Gopinath opp-hz = /bits/ 64 <2169600000>; 6248e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6258e0e8016SThara Gopinath }; 6268e0e8016SThara Gopinath 6278e0e8016SThara Gopinath cpu7_opp14: opp-2265600000 { 6288e0e8016SThara Gopinath opp-hz = /bits/ 64 <2265600000>; 6298e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 6308e0e8016SThara Gopinath }; 6318e0e8016SThara Gopinath 6328e0e8016SThara Gopinath cpu7_opp15: opp-2361600000 { 6338e0e8016SThara Gopinath opp-hz = /bits/ 64 <2361600000>; 6348e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6358e0e8016SThara Gopinath }; 6368e0e8016SThara Gopinath 6378e0e8016SThara Gopinath cpu7_opp16: opp-2457600000 { 6388e0e8016SThara Gopinath opp-hz = /bits/ 64 <2457600000>; 6398e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6408e0e8016SThara Gopinath }; 6418e0e8016SThara Gopinath 6428e0e8016SThara Gopinath cpu7_opp17: opp-2553600000 { 6438e0e8016SThara Gopinath opp-hz = /bits/ 64 <2553600000>; 6448e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6458e0e8016SThara Gopinath }; 6468e0e8016SThara Gopinath 6478e0e8016SThara Gopinath cpu7_opp18: opp-2649600000 { 6488e0e8016SThara Gopinath opp-hz = /bits/ 64 <2649600000>; 6498e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6508e0e8016SThara Gopinath }; 6518e0e8016SThara Gopinath 6528e0e8016SThara Gopinath cpu7_opp19: opp-2745600000 { 6538e0e8016SThara Gopinath opp-hz = /bits/ 64 <2745600000>; 6548e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6558e0e8016SThara Gopinath }; 6568e0e8016SThara Gopinath 6578e0e8016SThara Gopinath cpu7_opp20: opp-2841600000 { 6588e0e8016SThara Gopinath opp-hz = /bits/ 64 <2841600000>; 6598e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6608e0e8016SThara Gopinath }; 6618e0e8016SThara Gopinath }; 6628e0e8016SThara Gopinath 66360378f1aSVenkata Narendra Kumar Gutta firmware { 66460378f1aSVenkata Narendra Kumar Gutta scm: scm { 665b9c0c0e5SDavid Heidelberg compatible = "qcom,scm-sm8250", "qcom,scm"; 66660378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 66760378f1aSVenkata Narendra Kumar Gutta }; 66860378f1aSVenkata Narendra Kumar Gutta }; 66960378f1aSVenkata Narendra Kumar Gutta 67060378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 67160378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 67260378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 67360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 67460378f1aSVenkata Narendra Kumar Gutta }; 67560378f1aSVenkata Narendra Kumar Gutta 67660378f1aSVenkata Narendra Kumar Gutta pmu { 67760378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 67893138ef5SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 67960378f1aSVenkata Narendra Kumar Gutta }; 68060378f1aSVenkata Narendra Kumar Gutta 68160378f1aSVenkata Narendra Kumar Gutta psci { 68260378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 68360378f1aSVenkata Narendra Kumar Gutta method = "smc"; 68432bc936dSMaulik Shah 68556d59002SKrzysztof Kozlowski CPU_PD0: power-domain-cpu0 { 68632bc936dSMaulik Shah #power-domain-cells = <0>; 68732bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 68832bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 68932bc936dSMaulik Shah }; 69032bc936dSMaulik Shah 69156d59002SKrzysztof Kozlowski CPU_PD1: power-domain-cpu1 { 69232bc936dSMaulik Shah #power-domain-cells = <0>; 69332bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69432bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 69532bc936dSMaulik Shah }; 69632bc936dSMaulik Shah 69756d59002SKrzysztof Kozlowski CPU_PD2: power-domain-cpu2 { 69832bc936dSMaulik Shah #power-domain-cells = <0>; 69932bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70032bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 70132bc936dSMaulik Shah }; 70232bc936dSMaulik Shah 70356d59002SKrzysztof Kozlowski CPU_PD3: power-domain-cpu3 { 70432bc936dSMaulik Shah #power-domain-cells = <0>; 70532bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 70632bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 70732bc936dSMaulik Shah }; 70832bc936dSMaulik Shah 70956d59002SKrzysztof Kozlowski CPU_PD4: power-domain-cpu4 { 71032bc936dSMaulik Shah #power-domain-cells = <0>; 71132bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 71232bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 71332bc936dSMaulik Shah }; 71432bc936dSMaulik Shah 71556d59002SKrzysztof Kozlowski CPU_PD5: power-domain-cpu5 { 71632bc936dSMaulik Shah #power-domain-cells = <0>; 71732bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 71832bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 71932bc936dSMaulik Shah }; 72032bc936dSMaulik Shah 72156d59002SKrzysztof Kozlowski CPU_PD6: power-domain-cpu6 { 72232bc936dSMaulik Shah #power-domain-cells = <0>; 72332bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 72432bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 72532bc936dSMaulik Shah }; 72632bc936dSMaulik Shah 72756d59002SKrzysztof Kozlowski CPU_PD7: power-domain-cpu7 { 72832bc936dSMaulik Shah #power-domain-cells = <0>; 72932bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 73032bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 73132bc936dSMaulik Shah }; 73232bc936dSMaulik Shah 73356d59002SKrzysztof Kozlowski CLUSTER_PD: power-domain-cpu-cluster0 { 73432bc936dSMaulik Shah #power-domain-cells = <0>; 73532bc936dSMaulik Shah domain-idle-states = <&CLUSTER_SLEEP_0>; 73632bc936dSMaulik Shah }; 73760378f1aSVenkata Narendra Kumar Gutta }; 73860378f1aSVenkata Narendra Kumar Gutta 739191c85b8SVinod Koul qup_opp_table: opp-table-qup { 740191c85b8SVinod Koul compatible = "operating-points-v2"; 741191c85b8SVinod Koul 742191c85b8SVinod Koul opp-50000000 { 743191c85b8SVinod Koul opp-hz = /bits/ 64 <50000000>; 744191c85b8SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 745191c85b8SVinod Koul }; 746191c85b8SVinod Koul 747191c85b8SVinod Koul opp-75000000 { 748191c85b8SVinod Koul opp-hz = /bits/ 64 <75000000>; 749191c85b8SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 750191c85b8SVinod Koul }; 751191c85b8SVinod Koul 752191c85b8SVinod Koul opp-120000000 { 753191c85b8SVinod Koul opp-hz = /bits/ 64 <120000000>; 754191c85b8SVinod Koul required-opps = <&rpmhpd_opp_svs>; 755191c85b8SVinod Koul }; 756191c85b8SVinod Koul }; 757191c85b8SVinod Koul 75860378f1aSVenkata Narendra Kumar Gutta reserved-memory { 75960378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 76060378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 76160378f1aSVenkata Narendra Kumar Gutta ranges; 76260378f1aSVenkata Narendra Kumar Gutta 76360378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 76460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 76560378f1aSVenkata Narendra Kumar Gutta no-map; 76660378f1aSVenkata Narendra Kumar Gutta }; 76760378f1aSVenkata Narendra Kumar Gutta 76860378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 76960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 77060378f1aSVenkata Narendra Kumar Gutta no-map; 77160378f1aSVenkata Narendra Kumar Gutta }; 77260378f1aSVenkata Narendra Kumar Gutta 77360378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 77460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 77560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 77660378f1aSVenkata Narendra Kumar Gutta no-map; 77760378f1aSVenkata Narendra Kumar Gutta }; 77860378f1aSVenkata Narendra Kumar Gutta 77960378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 78060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 78160378f1aSVenkata Narendra Kumar Gutta no-map; 78260378f1aSVenkata Narendra Kumar Gutta }; 78360378f1aSVenkata Narendra Kumar Gutta 78460378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 78560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 78660378f1aSVenkata Narendra Kumar Gutta no-map; 78760378f1aSVenkata Narendra Kumar Gutta }; 78860378f1aSVenkata Narendra Kumar Gutta 78960378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 79060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 79160378f1aSVenkata Narendra Kumar Gutta no-map; 79260378f1aSVenkata Narendra Kumar Gutta }; 79360378f1aSVenkata Narendra Kumar Gutta 79460378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 79560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 79660378f1aSVenkata Narendra Kumar Gutta no-map; 79760378f1aSVenkata Narendra Kumar Gutta }; 79860378f1aSVenkata Narendra Kumar Gutta 79960378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 80060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 80160378f1aSVenkata Narendra Kumar Gutta no-map; 80260378f1aSVenkata Narendra Kumar Gutta }; 80360378f1aSVenkata Narendra Kumar Gutta 80460378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 80560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 80660378f1aSVenkata Narendra Kumar Gutta no-map; 80760378f1aSVenkata Narendra Kumar Gutta }; 80860378f1aSVenkata Narendra Kumar Gutta 80960378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 81060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 81160378f1aSVenkata Narendra Kumar Gutta no-map; 81260378f1aSVenkata Narendra Kumar Gutta }; 81360378f1aSVenkata Narendra Kumar Gutta 81460378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 81560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 81660378f1aSVenkata Narendra Kumar Gutta no-map; 81760378f1aSVenkata Narendra Kumar Gutta }; 81860378f1aSVenkata Narendra Kumar Gutta 81960378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 82060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 82160378f1aSVenkata Narendra Kumar Gutta no-map; 82260378f1aSVenkata Narendra Kumar Gutta }; 82360378f1aSVenkata Narendra Kumar Gutta 82460378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 82560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 82660378f1aSVenkata Narendra Kumar Gutta no-map; 82760378f1aSVenkata Narendra Kumar Gutta }; 82860378f1aSVenkata Narendra Kumar Gutta 82960378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 83060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 83160378f1aSVenkata Narendra Kumar Gutta no-map; 83260378f1aSVenkata Narendra Kumar Gutta }; 83360378f1aSVenkata Narendra Kumar Gutta 83460378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 83560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 83660378f1aSVenkata Narendra Kumar Gutta no-map; 83760378f1aSVenkata Narendra Kumar Gutta }; 83860378f1aSVenkata Narendra Kumar Gutta 83960378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 84060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 84160378f1aSVenkata Narendra Kumar Gutta no-map; 84260378f1aSVenkata Narendra Kumar Gutta }; 84360378f1aSVenkata Narendra Kumar Gutta 84460378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 84560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 84660378f1aSVenkata Narendra Kumar Gutta no-map; 84760378f1aSVenkata Narendra Kumar Gutta }; 84860378f1aSVenkata Narendra Kumar Gutta 84960378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 85060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 85160378f1aSVenkata Narendra Kumar Gutta no-map; 85260378f1aSVenkata Narendra Kumar Gutta }; 85360378f1aSVenkata Narendra Kumar Gutta }; 85460378f1aSVenkata Narendra Kumar Gutta 85588b57bc3SDmitry Baryshkov smem { 85660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 85760378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 85860378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 85960378f1aSVenkata Narendra Kumar Gutta }; 86060378f1aSVenkata Narendra Kumar Gutta 8618770a2a8SBjorn Andersson smp2p-adsp { 8628770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8638770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 8648770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 8658770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8668770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8678770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 8688770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8698770a2a8SBjorn Andersson 8708770a2a8SBjorn Andersson qcom,local-pid = <0>; 8718770a2a8SBjorn Andersson qcom,remote-pid = <2>; 8728770a2a8SBjorn Andersson 8738770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 8748770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8758770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8768770a2a8SBjorn Andersson }; 8778770a2a8SBjorn Andersson 8788770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 8798770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8808770a2a8SBjorn Andersson interrupt-controller; 8818770a2a8SBjorn Andersson #interrupt-cells = <2>; 8828770a2a8SBjorn Andersson }; 8838770a2a8SBjorn Andersson }; 8848770a2a8SBjorn Andersson 8858770a2a8SBjorn Andersson smp2p-cdsp { 8868770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8878770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 8888770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 8898770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8908770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8918770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 8928770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8938770a2a8SBjorn Andersson 8948770a2a8SBjorn Andersson qcom,local-pid = <0>; 8958770a2a8SBjorn Andersson qcom,remote-pid = <5>; 8968770a2a8SBjorn Andersson 8978770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 8988770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8998770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9008770a2a8SBjorn Andersson }; 9018770a2a8SBjorn Andersson 9028770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 9038770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9048770a2a8SBjorn Andersson interrupt-controller; 9058770a2a8SBjorn Andersson #interrupt-cells = <2>; 9068770a2a8SBjorn Andersson }; 9078770a2a8SBjorn Andersson }; 9088770a2a8SBjorn Andersson 9098770a2a8SBjorn Andersson smp2p-slpi { 9108770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 9118770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 9128770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 9138770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 9148770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 9158770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 9168770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 9178770a2a8SBjorn Andersson 9188770a2a8SBjorn Andersson qcom,local-pid = <0>; 9198770a2a8SBjorn Andersson qcom,remote-pid = <3>; 9208770a2a8SBjorn Andersson 9218770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 9228770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 9238770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 9248770a2a8SBjorn Andersson }; 9258770a2a8SBjorn Andersson 9268770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 9278770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 9288770a2a8SBjorn Andersson interrupt-controller; 9298770a2a8SBjorn Andersson #interrupt-cells = <2>; 9308770a2a8SBjorn Andersson }; 9318770a2a8SBjorn Andersson }; 9328770a2a8SBjorn Andersson 93360378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 93460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 93560378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 93660378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 93760378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 93860378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 93960378f1aSVenkata Narendra Kumar Gutta 94060378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 94160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 94260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 94360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 94460378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 94560378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 94676bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 94776bd127eSDmitry Baryshkov "bi_tcxo_ao", 94876bd127eSDmitry Baryshkov "sleep_clk"; 94976bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 95076bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 95176bd127eSDmitry Baryshkov <&sleep_clk>; 95260378f1aSVenkata Narendra Kumar Gutta }; 95360378f1aSVenkata Narendra Kumar Gutta 954e5361e75SBjorn Andersson ipcc: mailbox@408000 { 955e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 956e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 957e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 958e5361e75SBjorn Andersson interrupt-controller; 959e5361e75SBjorn Andersson #interrupt-cells = <3>; 960e5361e75SBjorn Andersson #mbox-cells = <2>; 961e5361e75SBjorn Andersson }; 962e5361e75SBjorn Andersson 9632a50d1a0SKonrad Dybcio qfprom: efuse@784000 { 9642a50d1a0SKonrad Dybcio compatible = "qcom,sm8250-qfprom", "qcom,qfprom"; 9652a50d1a0SKonrad Dybcio reg = <0 0x00784000 0 0x8ff>; 9662a50d1a0SKonrad Dybcio #address-cells = <1>; 9672a50d1a0SKonrad Dybcio #size-cells = <1>; 9682a50d1a0SKonrad Dybcio 9692a50d1a0SKonrad Dybcio gpu_speed_bin: gpu_speed_bin@19b { 9702a50d1a0SKonrad Dybcio reg = <0x19b 0x1>; 9712a50d1a0SKonrad Dybcio bits = <5 3>; 9722a50d1a0SKonrad Dybcio }; 9732a50d1a0SKonrad Dybcio }; 9742a50d1a0SKonrad Dybcio 97565389ce6SManivannan Sadhasivam rng: rng@793000 { 97665389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 97765389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 97865389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 97965389ce6SManivannan Sadhasivam clock-names = "core"; 98065389ce6SManivannan Sadhasivam }; 98165389ce6SManivannan Sadhasivam 98215049bb5SKonrad Dybcio gpi_dma2: dma-controller@800000 { 983e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 98415049bb5SKonrad Dybcio reg = <0 0x00800000 0 0x70000>; 98515049bb5SKonrad Dybcio interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>, 98615049bb5SKonrad Dybcio <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>, 98715049bb5SKonrad Dybcio <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, 98815049bb5SKonrad Dybcio <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>, 98915049bb5SKonrad Dybcio <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>, 99015049bb5SKonrad Dybcio <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>, 99115049bb5SKonrad Dybcio <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>, 99215049bb5SKonrad Dybcio <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>, 99315049bb5SKonrad Dybcio <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>, 99415049bb5SKonrad Dybcio <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>; 99515049bb5SKonrad Dybcio dma-channels = <10>; 99615049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 99715049bb5SKonrad Dybcio iommus = <&apps_smmu 0x76 0x0>; 99815049bb5SKonrad Dybcio #dma-cells = <3>; 99915049bb5SKonrad Dybcio status = "disabled"; 100015049bb5SKonrad Dybcio }; 100115049bb5SKonrad Dybcio 1002e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 1003e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1004e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 1005e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1006e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 1007e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 1008e5813b15SDmitry Baryshkov #address-cells = <2>; 1009e5813b15SDmitry Baryshkov #size-cells = <2>; 101085309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 1011e5813b15SDmitry Baryshkov ranges; 1012e5813b15SDmitry Baryshkov status = "disabled"; 1013e5813b15SDmitry Baryshkov 1014e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 1015e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1016e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1017e5813b15SDmitry Baryshkov clock-names = "se"; 1018e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1019e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1020e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 1021e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 102259983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, 102359983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_I2C>; 102459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1025e5813b15SDmitry Baryshkov #address-cells = <1>; 1026e5813b15SDmitry Baryshkov #size-cells = <0>; 1027e5813b15SDmitry Baryshkov status = "disabled"; 1028e5813b15SDmitry Baryshkov }; 1029e5813b15SDmitry Baryshkov 1030e5813b15SDmitry Baryshkov spi14: spi@880000 { 1031e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1032e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 1033e5813b15SDmitry Baryshkov clock-names = "se"; 1034e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 1035e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 103659983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, 103759983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_SPI>; 103859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 103901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 104001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 104159983a5cSKonrad Dybcio #address-cells = <1>; 104259983a5cSKonrad Dybcio #size-cells = <0>; 1043e5813b15SDmitry Baryshkov status = "disabled"; 1044e5813b15SDmitry Baryshkov }; 1045e5813b15SDmitry Baryshkov 1046e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 1047e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1048e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1049e5813b15SDmitry Baryshkov clock-names = "se"; 1050e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1051e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1052e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 1053e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 105459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, 105559983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_I2C>; 105659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1057e5813b15SDmitry Baryshkov #address-cells = <1>; 1058e5813b15SDmitry Baryshkov #size-cells = <0>; 1059e5813b15SDmitry Baryshkov status = "disabled"; 1060e5813b15SDmitry Baryshkov }; 1061e5813b15SDmitry Baryshkov 1062e5813b15SDmitry Baryshkov spi15: spi@884000 { 1063e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1064e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1065e5813b15SDmitry Baryshkov clock-names = "se"; 1066e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1067e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 106859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, 106959983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_SPI>; 107059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 107101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 107201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 107359983a5cSKonrad Dybcio #address-cells = <1>; 107459983a5cSKonrad Dybcio #size-cells = <0>; 1075e5813b15SDmitry Baryshkov status = "disabled"; 1076e5813b15SDmitry Baryshkov }; 1077e5813b15SDmitry Baryshkov 1078e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 1079e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1080e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1081e5813b15SDmitry Baryshkov clock-names = "se"; 1082e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1083e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1084e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 1085e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 108659983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, 108759983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_I2C>; 108859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1089e5813b15SDmitry Baryshkov #address-cells = <1>; 1090e5813b15SDmitry Baryshkov #size-cells = <0>; 1091e5813b15SDmitry Baryshkov status = "disabled"; 1092e5813b15SDmitry Baryshkov }; 1093e5813b15SDmitry Baryshkov 1094e5813b15SDmitry Baryshkov spi16: spi@888000 { 1095e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1096e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1097e5813b15SDmitry Baryshkov clock-names = "se"; 1098e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1099e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 110059983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, 110159983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_SPI>; 110259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 110301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 110401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 110559983a5cSKonrad Dybcio #address-cells = <1>; 110659983a5cSKonrad Dybcio #size-cells = <0>; 1107e5813b15SDmitry Baryshkov status = "disabled"; 1108e5813b15SDmitry Baryshkov }; 1109e5813b15SDmitry Baryshkov 1110e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 1111e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1112e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1113e5813b15SDmitry Baryshkov clock-names = "se"; 1114e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1115e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1116e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 1117e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 111859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, 111959983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_I2C>; 112059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1121e5813b15SDmitry Baryshkov #address-cells = <1>; 1122e5813b15SDmitry Baryshkov #size-cells = <0>; 1123e5813b15SDmitry Baryshkov status = "disabled"; 1124e5813b15SDmitry Baryshkov }; 1125e5813b15SDmitry Baryshkov 1126e5813b15SDmitry Baryshkov spi17: spi@88c000 { 1127e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1128e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1129e5813b15SDmitry Baryshkov clock-names = "se"; 1130e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1131e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 113259983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, 113359983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_SPI>; 113459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 113501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 113601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 113759983a5cSKonrad Dybcio #address-cells = <1>; 113859983a5cSKonrad Dybcio #size-cells = <0>; 1139e5813b15SDmitry Baryshkov status = "disabled"; 1140e5813b15SDmitry Baryshkov }; 1141e5813b15SDmitry Baryshkov 114208a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 114308a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 114408a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 114508a9ae2dSDmitry Baryshkov clock-names = "se"; 114608a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 114708a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 114808a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 114908a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 115001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 115101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 115208a9ae2dSDmitry Baryshkov status = "disabled"; 115308a9ae2dSDmitry Baryshkov }; 115408a9ae2dSDmitry Baryshkov 1155e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 1156e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1157e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1158e5813b15SDmitry Baryshkov clock-names = "se"; 1159e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1160e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1161e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 1162e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 116359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, 116459983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_I2C>; 116559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1166e5813b15SDmitry Baryshkov #address-cells = <1>; 1167e5813b15SDmitry Baryshkov #size-cells = <0>; 1168e5813b15SDmitry Baryshkov status = "disabled"; 1169e5813b15SDmitry Baryshkov }; 1170e5813b15SDmitry Baryshkov 1171e5813b15SDmitry Baryshkov spi18: spi@890000 { 1172e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1173e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1174e5813b15SDmitry Baryshkov clock-names = "se"; 1175e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1176e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 117759983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, 117859983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_SPI>; 117959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 118001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 118101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 118259983a5cSKonrad Dybcio #address-cells = <1>; 118359983a5cSKonrad Dybcio #size-cells = <0>; 1184e5813b15SDmitry Baryshkov status = "disabled"; 1185e5813b15SDmitry Baryshkov }; 1186e5813b15SDmitry Baryshkov 118708a9ae2dSDmitry Baryshkov uart18: serial@890000 { 118808a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 118908a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 119008a9ae2dSDmitry Baryshkov clock-names = "se"; 119108a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 119208a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 119308a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 119408a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 119501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 119601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 119708a9ae2dSDmitry Baryshkov status = "disabled"; 119808a9ae2dSDmitry Baryshkov }; 119908a9ae2dSDmitry Baryshkov 1200e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 1201e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1202e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1203e5813b15SDmitry Baryshkov clock-names = "se"; 1204e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1205e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1206e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 1207e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 120859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, 120959983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_I2C>; 121059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1211e5813b15SDmitry Baryshkov #address-cells = <1>; 1212e5813b15SDmitry Baryshkov #size-cells = <0>; 1213e5813b15SDmitry Baryshkov status = "disabled"; 1214e5813b15SDmitry Baryshkov }; 1215e5813b15SDmitry Baryshkov 1216e5813b15SDmitry Baryshkov spi19: spi@894000 { 1217e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1218e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1219e5813b15SDmitry Baryshkov clock-names = "se"; 1220e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1221e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 122259983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, 122359983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_SPI>; 122459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 122501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 122601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 122759983a5cSKonrad Dybcio #address-cells = <1>; 122859983a5cSKonrad Dybcio #size-cells = <0>; 1229e5813b15SDmitry Baryshkov status = "disabled"; 1230e5813b15SDmitry Baryshkov }; 1231e5813b15SDmitry Baryshkov }; 1232e5813b15SDmitry Baryshkov 123315049bb5SKonrad Dybcio gpi_dma0: dma-controller@900000 { 1234e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 123515049bb5SKonrad Dybcio reg = <0 0x00900000 0 0x70000>; 123615049bb5SKonrad Dybcio interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 123715049bb5SKonrad Dybcio <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 123815049bb5SKonrad Dybcio <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 123915049bb5SKonrad Dybcio <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, 124015049bb5SKonrad Dybcio <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 124115049bb5SKonrad Dybcio <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, 124215049bb5SKonrad Dybcio <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, 124315049bb5SKonrad Dybcio <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 124415049bb5SKonrad Dybcio <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 124515049bb5SKonrad Dybcio <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 124615049bb5SKonrad Dybcio <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 124715049bb5SKonrad Dybcio <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, 124815049bb5SKonrad Dybcio <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; 124915049bb5SKonrad Dybcio dma-channels = <15>; 125015049bb5SKonrad Dybcio dma-channel-mask = <0x7ff>; 125115049bb5SKonrad Dybcio iommus = <&apps_smmu 0x5b6 0x0>; 125215049bb5SKonrad Dybcio #dma-cells = <3>; 125315049bb5SKonrad Dybcio status = "disabled"; 125415049bb5SKonrad Dybcio }; 125515049bb5SKonrad Dybcio 1256e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 1257e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1258e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 1259e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1260e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 1261e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 1262e5813b15SDmitry Baryshkov #address-cells = <2>; 1263e5813b15SDmitry Baryshkov #size-cells = <2>; 126485309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 1265e5813b15SDmitry Baryshkov ranges; 1266e5813b15SDmitry Baryshkov status = "disabled"; 1267e5813b15SDmitry Baryshkov 1268e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 1269e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1270e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1271e5813b15SDmitry Baryshkov clock-names = "se"; 1272e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1273e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1274e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 1275e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 127659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, 127759983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_I2C>; 127859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1279e5813b15SDmitry Baryshkov #address-cells = <1>; 1280e5813b15SDmitry Baryshkov #size-cells = <0>; 1281e5813b15SDmitry Baryshkov status = "disabled"; 1282e5813b15SDmitry Baryshkov }; 1283e5813b15SDmitry Baryshkov 1284e5813b15SDmitry Baryshkov spi0: spi@980000 { 1285e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1286e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1287e5813b15SDmitry Baryshkov clock-names = "se"; 1288e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1289e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 129059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, 129159983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_SPI>; 129259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 129301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 129401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 129559983a5cSKonrad Dybcio #address-cells = <1>; 129659983a5cSKonrad Dybcio #size-cells = <0>; 1297e5813b15SDmitry Baryshkov status = "disabled"; 1298e5813b15SDmitry Baryshkov }; 1299e5813b15SDmitry Baryshkov 1300e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 1301e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1302e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1303e5813b15SDmitry Baryshkov clock-names = "se"; 1304e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1305e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1306e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 1307e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 130859983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, 130959983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_I2C>; 131059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1311e5813b15SDmitry Baryshkov #address-cells = <1>; 1312e5813b15SDmitry Baryshkov #size-cells = <0>; 1313e5813b15SDmitry Baryshkov status = "disabled"; 1314e5813b15SDmitry Baryshkov }; 1315e5813b15SDmitry Baryshkov 1316e5813b15SDmitry Baryshkov spi1: spi@984000 { 1317e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1318e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1319e5813b15SDmitry Baryshkov clock-names = "se"; 1320e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1321e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 132259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 132359983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_SPI>; 132459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 132501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 132601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 132759983a5cSKonrad Dybcio #address-cells = <1>; 132859983a5cSKonrad Dybcio #size-cells = <0>; 1329e5813b15SDmitry Baryshkov status = "disabled"; 1330e5813b15SDmitry Baryshkov }; 1331e5813b15SDmitry Baryshkov 1332e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 1333e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1334e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1335e5813b15SDmitry Baryshkov clock-names = "se"; 1336e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1337e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1338e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 1339e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 134059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, 134159983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_I2C>; 134259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1343e5813b15SDmitry Baryshkov #address-cells = <1>; 1344e5813b15SDmitry Baryshkov #size-cells = <0>; 1345e5813b15SDmitry Baryshkov status = "disabled"; 1346e5813b15SDmitry Baryshkov }; 1347e5813b15SDmitry Baryshkov 1348e5813b15SDmitry Baryshkov spi2: spi@988000 { 1349e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1350e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1351e5813b15SDmitry Baryshkov clock-names = "se"; 1352e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1353e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 135459983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, 135559983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_SPI>; 135659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 135701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 135801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 135959983a5cSKonrad Dybcio #address-cells = <1>; 136059983a5cSKonrad Dybcio #size-cells = <0>; 1361e5813b15SDmitry Baryshkov status = "disabled"; 1362e5813b15SDmitry Baryshkov }; 1363e5813b15SDmitry Baryshkov 136408a9ae2dSDmitry Baryshkov uart2: serial@988000 { 136508a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 136608a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 136708a9ae2dSDmitry Baryshkov clock-names = "se"; 136808a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 136908a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 137008a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 137108a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 137201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 137301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 137408a9ae2dSDmitry Baryshkov status = "disabled"; 137508a9ae2dSDmitry Baryshkov }; 137608a9ae2dSDmitry Baryshkov 1377e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 1378e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1379e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1380e5813b15SDmitry Baryshkov clock-names = "se"; 1381e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1382e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1383e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 1384e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 138559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, 138659983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_I2C>; 138759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1388e5813b15SDmitry Baryshkov #address-cells = <1>; 1389e5813b15SDmitry Baryshkov #size-cells = <0>; 1390e5813b15SDmitry Baryshkov status = "disabled"; 1391e5813b15SDmitry Baryshkov }; 1392e5813b15SDmitry Baryshkov 1393e5813b15SDmitry Baryshkov spi3: spi@98c000 { 1394e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1395e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1396e5813b15SDmitry Baryshkov clock-names = "se"; 1397e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1398e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 139959983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, 140059983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_SPI>; 140159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 140201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 140301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 140459983a5cSKonrad Dybcio #address-cells = <1>; 140559983a5cSKonrad Dybcio #size-cells = <0>; 1406e5813b15SDmitry Baryshkov status = "disabled"; 1407e5813b15SDmitry Baryshkov }; 1408e5813b15SDmitry Baryshkov 1409e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 1410e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1411e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1412e5813b15SDmitry Baryshkov clock-names = "se"; 1413e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1414e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1415e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 1416e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 141759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, 141859983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_I2C>; 141959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1420e5813b15SDmitry Baryshkov #address-cells = <1>; 1421e5813b15SDmitry Baryshkov #size-cells = <0>; 1422e5813b15SDmitry Baryshkov status = "disabled"; 1423e5813b15SDmitry Baryshkov }; 1424e5813b15SDmitry Baryshkov 1425e5813b15SDmitry Baryshkov spi4: spi@990000 { 1426e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1427e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1428e5813b15SDmitry Baryshkov clock-names = "se"; 1429e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1430e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 143159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, 143259983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_SPI>; 143359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 143401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 143501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 143659983a5cSKonrad Dybcio #address-cells = <1>; 143759983a5cSKonrad Dybcio #size-cells = <0>; 1438e5813b15SDmitry Baryshkov status = "disabled"; 1439e5813b15SDmitry Baryshkov }; 1440e5813b15SDmitry Baryshkov 1441e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 1442e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1443e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1444e5813b15SDmitry Baryshkov clock-names = "se"; 1445e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1446e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1447e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 1448e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 144959983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, 145059983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_I2C>; 145159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1452e5813b15SDmitry Baryshkov #address-cells = <1>; 1453e5813b15SDmitry Baryshkov #size-cells = <0>; 1454e5813b15SDmitry Baryshkov status = "disabled"; 1455e5813b15SDmitry Baryshkov }; 1456e5813b15SDmitry Baryshkov 1457e5813b15SDmitry Baryshkov spi5: spi@994000 { 1458e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1459e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1460e5813b15SDmitry Baryshkov clock-names = "se"; 1461e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1462e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 146359983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, 146459983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_SPI>; 146559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 146601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 146701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 146859983a5cSKonrad Dybcio #address-cells = <1>; 146959983a5cSKonrad Dybcio #size-cells = <0>; 1470e5813b15SDmitry Baryshkov status = "disabled"; 1471e5813b15SDmitry Baryshkov }; 1472e5813b15SDmitry Baryshkov 1473e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 1474e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1475e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1476e5813b15SDmitry Baryshkov clock-names = "se"; 1477e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1478e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1479e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 1480e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 148159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, 148259983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_I2C>; 148359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1484e5813b15SDmitry Baryshkov #address-cells = <1>; 1485e5813b15SDmitry Baryshkov #size-cells = <0>; 1486e5813b15SDmitry Baryshkov status = "disabled"; 1487e5813b15SDmitry Baryshkov }; 1488e5813b15SDmitry Baryshkov 1489e5813b15SDmitry Baryshkov spi6: spi@998000 { 1490e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1491e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1492e5813b15SDmitry Baryshkov clock-names = "se"; 1493e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1494e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 149559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, 149659983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_SPI>; 149759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 149801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 149901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 150059983a5cSKonrad Dybcio #address-cells = <1>; 150159983a5cSKonrad Dybcio #size-cells = <0>; 1502e5813b15SDmitry Baryshkov status = "disabled"; 1503e5813b15SDmitry Baryshkov }; 1504e5813b15SDmitry Baryshkov 150508a9ae2dSDmitry Baryshkov uart6: serial@998000 { 150608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 150708a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 150808a9ae2dSDmitry Baryshkov clock-names = "se"; 150908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 151008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 151108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 151208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 151301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 151401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 151508a9ae2dSDmitry Baryshkov status = "disabled"; 151608a9ae2dSDmitry Baryshkov }; 151708a9ae2dSDmitry Baryshkov 1518e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 1519e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1520e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1521e5813b15SDmitry Baryshkov clock-names = "se"; 1522e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1523e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1524e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 1525e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 152659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, 152759983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_I2C>; 152859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1529e5813b15SDmitry Baryshkov #address-cells = <1>; 1530e5813b15SDmitry Baryshkov #size-cells = <0>; 1531e5813b15SDmitry Baryshkov status = "disabled"; 1532e5813b15SDmitry Baryshkov }; 1533e5813b15SDmitry Baryshkov 1534e5813b15SDmitry Baryshkov spi7: spi@99c000 { 1535e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1536e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1537e5813b15SDmitry Baryshkov clock-names = "se"; 1538e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1539e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 154059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, 154159983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_SPI>; 154259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 154301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 154401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 154559983a5cSKonrad Dybcio #address-cells = <1>; 154659983a5cSKonrad Dybcio #size-cells = <0>; 1547e5813b15SDmitry Baryshkov status = "disabled"; 1548e5813b15SDmitry Baryshkov }; 1549e5813b15SDmitry Baryshkov }; 1550e5813b15SDmitry Baryshkov 155115049bb5SKonrad Dybcio gpi_dma1: dma-controller@a00000 { 1552e7e24786SRichard Acayan compatible = "qcom,sm8250-gpi-dma", "qcom,sdm845-gpi-dma"; 155315049bb5SKonrad Dybcio reg = <0 0x00a00000 0 0x70000>; 155415049bb5SKonrad Dybcio interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 155515049bb5SKonrad Dybcio <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 155615049bb5SKonrad Dybcio <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 155715049bb5SKonrad Dybcio <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 155815049bb5SKonrad Dybcio <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 155915049bb5SKonrad Dybcio <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 156015049bb5SKonrad Dybcio <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 156115049bb5SKonrad Dybcio <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 156215049bb5SKonrad Dybcio <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 156315049bb5SKonrad Dybcio <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>; 156415049bb5SKonrad Dybcio dma-channels = <10>; 156515049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 156615049bb5SKonrad Dybcio iommus = <&apps_smmu 0x56 0x0>; 156715049bb5SKonrad Dybcio #dma-cells = <3>; 156815049bb5SKonrad Dybcio status = "disabled"; 156915049bb5SKonrad Dybcio }; 157015049bb5SKonrad Dybcio 157160378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 157260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 157360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 157460378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 1575fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 1576fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 157760378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 157860378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 157985309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 158060378f1aSVenkata Narendra Kumar Gutta ranges; 158160378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 158260378f1aSVenkata Narendra Kumar Gutta 1583e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 1584e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1585e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1586e5813b15SDmitry Baryshkov clock-names = "se"; 1587e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1588e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1589e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 1590e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 159159983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, 159259983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_I2C>; 159359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1594e5813b15SDmitry Baryshkov #address-cells = <1>; 1595e5813b15SDmitry Baryshkov #size-cells = <0>; 1596e5813b15SDmitry Baryshkov status = "disabled"; 1597e5813b15SDmitry Baryshkov }; 1598e5813b15SDmitry Baryshkov 1599e5813b15SDmitry Baryshkov spi8: spi@a80000 { 1600e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1601e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1602e5813b15SDmitry Baryshkov clock-names = "se"; 1603e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1604e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 160559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, 160659983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_SPI>; 160759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 160801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 160901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 161059983a5cSKonrad Dybcio #address-cells = <1>; 161159983a5cSKonrad Dybcio #size-cells = <0>; 1612e5813b15SDmitry Baryshkov status = "disabled"; 1613e5813b15SDmitry Baryshkov }; 1614e5813b15SDmitry Baryshkov 1615e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 1616e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1617e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1618e5813b15SDmitry Baryshkov clock-names = "se"; 1619e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1620e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1621e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 1622e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 162359983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, 162459983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_I2C>; 162559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1626e5813b15SDmitry Baryshkov #address-cells = <1>; 1627e5813b15SDmitry Baryshkov #size-cells = <0>; 1628e5813b15SDmitry Baryshkov status = "disabled"; 1629e5813b15SDmitry Baryshkov }; 1630e5813b15SDmitry Baryshkov 1631e5813b15SDmitry Baryshkov spi9: spi@a84000 { 1632e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1633e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1634e5813b15SDmitry Baryshkov clock-names = "se"; 1635e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1636e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 163759983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, 163859983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_SPI>; 163959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 164001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 164101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 164259983a5cSKonrad Dybcio #address-cells = <1>; 164359983a5cSKonrad Dybcio #size-cells = <0>; 1644e5813b15SDmitry Baryshkov status = "disabled"; 1645e5813b15SDmitry Baryshkov }; 1646e5813b15SDmitry Baryshkov 1647e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1648e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1649e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1650e5813b15SDmitry Baryshkov clock-names = "se"; 1651e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1652e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1653e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1654e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 165559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, 165659983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_I2C>; 165759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1658e5813b15SDmitry Baryshkov #address-cells = <1>; 1659e5813b15SDmitry Baryshkov #size-cells = <0>; 1660e5813b15SDmitry Baryshkov status = "disabled"; 1661e5813b15SDmitry Baryshkov }; 1662e5813b15SDmitry Baryshkov 1663e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1664e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1665e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1666e5813b15SDmitry Baryshkov clock-names = "se"; 1667e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1668e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 166959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, 167059983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_SPI>; 167159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 167201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 167301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 167459983a5cSKonrad Dybcio #address-cells = <1>; 167559983a5cSKonrad Dybcio #size-cells = <0>; 1676e5813b15SDmitry Baryshkov status = "disabled"; 1677e5813b15SDmitry Baryshkov }; 1678e5813b15SDmitry Baryshkov 1679e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1680e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1681e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1682e5813b15SDmitry Baryshkov clock-names = "se"; 1683e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1684e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1685e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1686e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 168759983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, 168859983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_I2C>; 168959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1690e5813b15SDmitry Baryshkov #address-cells = <1>; 1691e5813b15SDmitry Baryshkov #size-cells = <0>; 1692e5813b15SDmitry Baryshkov status = "disabled"; 1693e5813b15SDmitry Baryshkov }; 1694e5813b15SDmitry Baryshkov 1695e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1696e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1697e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1698e5813b15SDmitry Baryshkov clock-names = "se"; 1699e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1700e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 170159983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, 170259983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_SPI>; 170359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 170401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 170501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 170659983a5cSKonrad Dybcio #address-cells = <1>; 170759983a5cSKonrad Dybcio #size-cells = <0>; 1708e5813b15SDmitry Baryshkov status = "disabled"; 1709e5813b15SDmitry Baryshkov }; 1710e5813b15SDmitry Baryshkov 1711e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1712e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1713e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1714e5813b15SDmitry Baryshkov clock-names = "se"; 1715e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1716e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1717e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1718e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 171959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, 172059983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_I2C>; 172159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1722e5813b15SDmitry Baryshkov #address-cells = <1>; 1723e5813b15SDmitry Baryshkov #size-cells = <0>; 1724e5813b15SDmitry Baryshkov status = "disabled"; 1725e5813b15SDmitry Baryshkov }; 1726e5813b15SDmitry Baryshkov 1727e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1728e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1729e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1730e5813b15SDmitry Baryshkov clock-names = "se"; 1731e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1732e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 173359983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, 173459983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_SPI>; 173559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 173601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 173701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 173859983a5cSKonrad Dybcio #address-cells = <1>; 173959983a5cSKonrad Dybcio #size-cells = <0>; 1740e5813b15SDmitry Baryshkov status = "disabled"; 1741e5813b15SDmitry Baryshkov }; 1742e5813b15SDmitry Baryshkov 1743bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 174460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 174560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 174660378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1747fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1748bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1749bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 175060378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 175101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 175201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 175360378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 175460378f1aSVenkata Narendra Kumar Gutta }; 1755e5813b15SDmitry Baryshkov 1756e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1757e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1758e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1759e5813b15SDmitry Baryshkov clock-names = "se"; 1760e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1761e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1762e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1763e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 176459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, 176559983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_I2C>; 176659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1767e5813b15SDmitry Baryshkov #address-cells = <1>; 1768e5813b15SDmitry Baryshkov #size-cells = <0>; 1769e5813b15SDmitry Baryshkov status = "disabled"; 1770e5813b15SDmitry Baryshkov }; 1771e5813b15SDmitry Baryshkov 1772e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1773e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1774e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1775e5813b15SDmitry Baryshkov clock-names = "se"; 1776e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1777e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 177859983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, 177959983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_SPI>; 178059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 178101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 178201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 178359983a5cSKonrad Dybcio #address-cells = <1>; 178459983a5cSKonrad Dybcio #size-cells = <0>; 1785e5813b15SDmitry Baryshkov status = "disabled"; 1786e5813b15SDmitry Baryshkov }; 178760378f1aSVenkata Narendra Kumar Gutta }; 178860378f1aSVenkata Narendra Kumar Gutta 1789e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1790e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1791e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1792b5a12438SAbel Vesa #interconnect-cells = <2>; 1793e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1794e7e41a20SJonathan Marek }; 1795e7e41a20SJonathan Marek 1796e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1797e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1798e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1799b5a12438SAbel Vesa #interconnect-cells = <2>; 1800e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1801e7e41a20SJonathan Marek }; 1802e7e41a20SJonathan Marek 1803e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1804e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1805e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1806b5a12438SAbel Vesa #interconnect-cells = <2>; 1807e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1808e7e41a20SJonathan Marek }; 1809e7e41a20SJonathan Marek 1810e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1811e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1812e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1813b5a12438SAbel Vesa #interconnect-cells = <2>; 1814e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1815e7e41a20SJonathan Marek }; 1816e7e41a20SJonathan Marek 1817e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1818e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1819e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1820b5a12438SAbel Vesa #interconnect-cells = <2>; 1821e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1822e7e41a20SJonathan Marek }; 1823e7e41a20SJonathan Marek 1824e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1825e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1826e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1827b5a12438SAbel Vesa #interconnect-cells = <2>; 1828e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1829e7e41a20SJonathan Marek }; 1830e7e41a20SJonathan Marek 1831e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1832e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1833e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1834b5a12438SAbel Vesa #interconnect-cells = <2>; 1835e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1836e7e41a20SJonathan Marek }; 1837e7e41a20SJonathan Marek 1838e53bdfc0SManivannan Sadhasivam pcie0: pci@1c00000 { 18393e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1840e53bdfc0SManivannan Sadhasivam reg = <0 0x01c00000 0 0x3000>, 1841e53bdfc0SManivannan Sadhasivam <0 0x60000000 0 0xf1d>, 1842e53bdfc0SManivannan Sadhasivam <0 0x60000f20 0 0xa8>, 1843e53bdfc0SManivannan Sadhasivam <0 0x60001000 0 0x1000>, 184489210342SManivannan Sadhasivam <0 0x60100000 0 0x100000>, 184589210342SManivannan Sadhasivam <0 0x01c03000 0 0x1000>; 184689210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 1847e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1848e53bdfc0SManivannan Sadhasivam linux,pci-domain = <0>; 1849e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1850e53bdfc0SManivannan Sadhasivam num-lanes = <1>; 1851e53bdfc0SManivannan Sadhasivam 1852e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1853e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1854e53bdfc0SManivannan Sadhasivam 1855e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, 1856e115a449SManivannan Sadhasivam <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; 1857e53bdfc0SManivannan Sadhasivam 1858f2819650SDmitry Baryshkov interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 1859f2819650SDmitry Baryshkov <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1860f2819650SDmitry Baryshkov <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 1861f2819650SDmitry Baryshkov <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 1862f2819650SDmitry Baryshkov <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 1863f2819650SDmitry Baryshkov <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 1864f2819650SDmitry Baryshkov <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 1865f2819650SDmitry Baryshkov <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1866f2819650SDmitry Baryshkov interrupt-names = "msi0", "msi1", "msi2", "msi3", 1867f2819650SDmitry Baryshkov "msi4", "msi5", "msi6", "msi7"; 1868e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1869e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1870e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1871e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1872e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1873e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1874e53bdfc0SManivannan Sadhasivam 1875e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, 1876e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_AUX_CLK>, 1877e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1878e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, 1879e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_AXI_CLK>, 1880e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, 1881e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1882e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1883e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1884e53bdfc0SManivannan Sadhasivam "aux", 1885e53bdfc0SManivannan Sadhasivam "cfg", 1886e53bdfc0SManivannan Sadhasivam "bus_master", 1887e53bdfc0SManivannan Sadhasivam "bus_slave", 1888e53bdfc0SManivannan Sadhasivam "slave_q2a", 1889e53bdfc0SManivannan Sadhasivam "tbu", 1890e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1891e53bdfc0SManivannan Sadhasivam 1892e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, 1893e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c01 0x1>; 1894e53bdfc0SManivannan Sadhasivam 1895e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_BCR>; 1896e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1897e53bdfc0SManivannan Sadhasivam 1898e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_0_GDSC>; 1899e53bdfc0SManivannan Sadhasivam 1900e53bdfc0SManivannan Sadhasivam phys = <&pcie0_lane>; 1901e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1902e53bdfc0SManivannan Sadhasivam 1903d6050720SDmitry Baryshkov perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; 1904d6050720SDmitry Baryshkov wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 190513e948a3SKonrad Dybcio 190613e948a3SKonrad Dybcio pinctrl-names = "default"; 190713e948a3SKonrad Dybcio pinctrl-0 = <&pcie0_default_state>; 1908339d38a4SKonrad Dybcio dma-coherent; 190913e948a3SKonrad Dybcio 1910e53bdfc0SManivannan Sadhasivam status = "disabled"; 1911e53bdfc0SManivannan Sadhasivam }; 1912e53bdfc0SManivannan Sadhasivam 1913e53bdfc0SManivannan Sadhasivam pcie0_phy: phy@1c06000 { 1914e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy"; 1915e53bdfc0SManivannan Sadhasivam reg = <0 0x01c06000 0 0x1c0>; 1916e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 1917e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1918e53bdfc0SManivannan Sadhasivam ranges; 1919e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 1920e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1921e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIFI_CLKREF_EN>, 1922e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1923e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 1924e53bdfc0SManivannan Sadhasivam 1925e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_PHY_BCR>; 1926e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 1927e53bdfc0SManivannan Sadhasivam 1928e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1929e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 1930e53bdfc0SManivannan Sadhasivam 1931e53bdfc0SManivannan Sadhasivam status = "disabled"; 1932e53bdfc0SManivannan Sadhasivam 19331351512fSShawn Guo pcie0_lane: phy@1c06200 { 193481f43efcSKonrad Dybcio reg = <0 0x01c06200 0 0x170>, /* tx */ 193581f43efcSKonrad Dybcio <0 0x01c06400 0 0x200>, /* rx */ 193681f43efcSKonrad Dybcio <0 0x01c06800 0 0x1f0>, /* pcs */ 193781f43efcSKonrad Dybcio <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ 1938e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; 1939e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 1940e53bdfc0SManivannan Sadhasivam 1941e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 1942d9fd162cSJohan Hovold 1943d9fd162cSJohan Hovold #clock-cells = <0>; 1944e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_0_pipe_clk"; 1945e53bdfc0SManivannan Sadhasivam }; 1946e53bdfc0SManivannan Sadhasivam }; 1947e53bdfc0SManivannan Sadhasivam 1948e53bdfc0SManivannan Sadhasivam pcie1: pci@1c08000 { 19493e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 1950e53bdfc0SManivannan Sadhasivam reg = <0 0x01c08000 0 0x3000>, 1951e53bdfc0SManivannan Sadhasivam <0 0x40000000 0 0xf1d>, 1952e53bdfc0SManivannan Sadhasivam <0 0x40000f20 0 0xa8>, 1953e53bdfc0SManivannan Sadhasivam <0 0x40001000 0 0x1000>, 195489210342SManivannan Sadhasivam <0 0x40100000 0 0x100000>, 195589210342SManivannan Sadhasivam <0 0x01c0b000 0 0x1000>; 195689210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 1957e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1958e53bdfc0SManivannan Sadhasivam linux,pci-domain = <1>; 1959e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1960e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 1961e53bdfc0SManivannan Sadhasivam 1962e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1963e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1964e53bdfc0SManivannan Sadhasivam 1965e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, 1966e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 1967e53bdfc0SManivannan Sadhasivam 19681b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 1969e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 1970e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1971e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1972e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1973e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1974e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1975e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1976e53bdfc0SManivannan Sadhasivam 1977e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, 1978e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_AUX_CLK>, 1979e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 1980e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, 1981e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_AXI_CLK>, 1982e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 1983e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 1984e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1985e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1986e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1987e53bdfc0SManivannan Sadhasivam "aux", 1988e53bdfc0SManivannan Sadhasivam "cfg", 1989e53bdfc0SManivannan Sadhasivam "bus_master", 1990e53bdfc0SManivannan Sadhasivam "bus_slave", 1991e53bdfc0SManivannan Sadhasivam "slave_q2a", 1992e53bdfc0SManivannan Sadhasivam "ref", 1993e53bdfc0SManivannan Sadhasivam "tbu", 1994e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1995e53bdfc0SManivannan Sadhasivam 1996e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; 1997e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 1998e53bdfc0SManivannan Sadhasivam 1999e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, 2000e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c81 0x1>; 2001e53bdfc0SManivannan Sadhasivam 2002e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_BCR>; 2003e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2004e53bdfc0SManivannan Sadhasivam 2005e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_1_GDSC>; 2006e53bdfc0SManivannan Sadhasivam 2007e53bdfc0SManivannan Sadhasivam phys = <&pcie1_lane>; 2008e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2009e53bdfc0SManivannan Sadhasivam 2010d6050720SDmitry Baryshkov perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; 2011d6050720SDmitry Baryshkov wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>; 201213e948a3SKonrad Dybcio 201313e948a3SKonrad Dybcio pinctrl-names = "default"; 201413e948a3SKonrad Dybcio pinctrl-0 = <&pcie1_default_state>; 2015339d38a4SKonrad Dybcio dma-coherent; 201613e948a3SKonrad Dybcio 2017e53bdfc0SManivannan Sadhasivam status = "disabled"; 2018e53bdfc0SManivannan Sadhasivam }; 2019e53bdfc0SManivannan Sadhasivam 2020e53bdfc0SManivannan Sadhasivam pcie1_phy: phy@1c0e000 { 2021e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy"; 2022e53bdfc0SManivannan Sadhasivam reg = <0 0x01c0e000 0 0x1c0>; 2023e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2024e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2025e53bdfc0SManivannan Sadhasivam ranges; 2026e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2027e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 2028e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 2029e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2030e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2031e53bdfc0SManivannan Sadhasivam 2032e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_PHY_BCR>; 2033e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2034e53bdfc0SManivannan Sadhasivam 2035e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 2036e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2037e53bdfc0SManivannan Sadhasivam 2038e53bdfc0SManivannan Sadhasivam status = "disabled"; 2039e53bdfc0SManivannan Sadhasivam 20401351512fSShawn Guo pcie1_lane: phy@1c0e200 { 204181f43efcSKonrad Dybcio reg = <0 0x01c0e200 0 0x170>, /* tx0 */ 204281f43efcSKonrad Dybcio <0 0x01c0e400 0 0x200>, /* rx0 */ 204381f43efcSKonrad Dybcio <0 0x01c0ea00 0 0x1f0>, /* pcs */ 204481f43efcSKonrad Dybcio <0 0x01c0e600 0 0x170>, /* tx1 */ 204581f43efcSKonrad Dybcio <0 0x01c0e800 0 0x200>, /* rx1 */ 204681f43efcSKonrad Dybcio <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2047e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; 2048e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2049e53bdfc0SManivannan Sadhasivam 2050e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2051d9fd162cSJohan Hovold 2052d9fd162cSJohan Hovold #clock-cells = <0>; 2053e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_1_pipe_clk"; 2054e53bdfc0SManivannan Sadhasivam }; 2055e53bdfc0SManivannan Sadhasivam }; 2056e53bdfc0SManivannan Sadhasivam 2057e53bdfc0SManivannan Sadhasivam pcie2: pci@1c10000 { 20583e4fec3bSDmitry Baryshkov compatible = "qcom,pcie-sm8250"; 2059e53bdfc0SManivannan Sadhasivam reg = <0 0x01c10000 0 0x3000>, 2060e53bdfc0SManivannan Sadhasivam <0 0x64000000 0 0xf1d>, 2061e53bdfc0SManivannan Sadhasivam <0 0x64000f20 0 0xa8>, 2062e53bdfc0SManivannan Sadhasivam <0 0x64001000 0 0x1000>, 206389210342SManivannan Sadhasivam <0 0x64100000 0 0x100000>, 206489210342SManivannan Sadhasivam <0 0x01c13000 0 0x1000>; 206589210342SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi"; 2066e53bdfc0SManivannan Sadhasivam device_type = "pci"; 2067e53bdfc0SManivannan Sadhasivam linux,pci-domain = <2>; 2068e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 2069e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 2070e53bdfc0SManivannan Sadhasivam 2071e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 2072e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2073e53bdfc0SManivannan Sadhasivam 2074e115a449SManivannan Sadhasivam ranges = <0x01000000 0x0 0x00000000 0x0 0x64200000 0x0 0x100000>, 2075e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>; 2076e53bdfc0SManivannan Sadhasivam 20771b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 2078e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 2079e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 2080e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 2081e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 2082e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 415 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 2083e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 416 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 2084e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 417 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 2085e53bdfc0SManivannan Sadhasivam 2086e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, 2087e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_AUX_CLK>, 2088e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2089e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, 2090e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_AXI_CLK>, 2091e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, 2092e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2093e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 2094e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 2095e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 2096e53bdfc0SManivannan Sadhasivam "aux", 2097e53bdfc0SManivannan Sadhasivam "cfg", 2098e53bdfc0SManivannan Sadhasivam "bus_master", 2099e53bdfc0SManivannan Sadhasivam "bus_slave", 2100e53bdfc0SManivannan Sadhasivam "slave_q2a", 2101e53bdfc0SManivannan Sadhasivam "ref", 2102e53bdfc0SManivannan Sadhasivam "tbu", 2103e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 2104e53bdfc0SManivannan Sadhasivam 2105e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>; 2106e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 2107e53bdfc0SManivannan Sadhasivam 2108e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1d00 0x1>, 2109e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1d01 0x1>; 2110e53bdfc0SManivannan Sadhasivam 2111e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_BCR>; 2112e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2113e53bdfc0SManivannan Sadhasivam 2114e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_2_GDSC>; 2115e53bdfc0SManivannan Sadhasivam 2116e53bdfc0SManivannan Sadhasivam phys = <&pcie2_lane>; 2117e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2118e53bdfc0SManivannan Sadhasivam 2119d6050720SDmitry Baryshkov perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>; 2120d6050720SDmitry Baryshkov wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; 212113e948a3SKonrad Dybcio 212213e948a3SKonrad Dybcio pinctrl-names = "default"; 212313e948a3SKonrad Dybcio pinctrl-0 = <&pcie2_default_state>; 2124339d38a4SKonrad Dybcio dma-coherent; 212513e948a3SKonrad Dybcio 2126e53bdfc0SManivannan Sadhasivam status = "disabled"; 2127e53bdfc0SManivannan Sadhasivam }; 2128e53bdfc0SManivannan Sadhasivam 2129e53bdfc0SManivannan Sadhasivam pcie2_phy: phy@1c16000 { 2130e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-modem-pcie-phy"; 213181f43efcSKonrad Dybcio reg = <0 0x01c16000 0 0x1c0>; 2132e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2133e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2134e53bdfc0SManivannan Sadhasivam ranges; 2135e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2136e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2137e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2138e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2139e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2140e53bdfc0SManivannan Sadhasivam 2141e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_PHY_BCR>; 2142e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2143e53bdfc0SManivannan Sadhasivam 2144e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2145e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2146e53bdfc0SManivannan Sadhasivam 2147e53bdfc0SManivannan Sadhasivam status = "disabled"; 2148e53bdfc0SManivannan Sadhasivam 21491351512fSShawn Guo pcie2_lane: phy@1c16200 { 215081f43efcSKonrad Dybcio reg = <0 0x01c16200 0 0x170>, /* tx0 */ 215181f43efcSKonrad Dybcio <0 0x01c16400 0 0x200>, /* rx0 */ 215281f43efcSKonrad Dybcio <0 0x01c16a00 0 0x1f0>, /* pcs */ 215381f43efcSKonrad Dybcio <0 0x01c16600 0 0x170>, /* tx1 */ 215481f43efcSKonrad Dybcio <0 0x01c16800 0 0x200>, /* rx1 */ 215581f43efcSKonrad Dybcio <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2156e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; 2157e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2158e53bdfc0SManivannan Sadhasivam 2159e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2160d9fd162cSJohan Hovold 2161d9fd162cSJohan Hovold #clock-cells = <0>; 2162e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_2_pipe_clk"; 2163e53bdfc0SManivannan Sadhasivam }; 2164e53bdfc0SManivannan Sadhasivam }; 2165e53bdfc0SManivannan Sadhasivam 21666b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 2167b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 2168b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 2169b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 2170b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 2171b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 2172b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 2173b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 2174b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 2175b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 2176b7e2fba0SBryan O'Donoghue reset-names = "rst"; 2177b7e2fba0SBryan O'Donoghue 2178b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 2179b7e2fba0SBryan O'Donoghue 2180a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 2181a89441fcSJonathan Marek 2182b7e2fba0SBryan O'Donoghue clock-names = 2183b7e2fba0SBryan O'Donoghue "core_clk", 2184b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 2185b7e2fba0SBryan O'Donoghue "iface_clk", 2186b7e2fba0SBryan O'Donoghue "core_clk_unipro", 2187b7e2fba0SBryan O'Donoghue "ref_clk", 2188b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 2189b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 2190b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 2191b7e2fba0SBryan O'Donoghue clocks = 2192b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 2193b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 2194b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 2195b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 2196b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 2197b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 2198b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 2199b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 2200b7e2fba0SBryan O'Donoghue freq-table-hz = 2201b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2202b7e2fba0SBryan O'Donoghue <0 0>, 2203b7e2fba0SBryan O'Donoghue <0 0>, 2204b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2205b7e2fba0SBryan O'Donoghue <0 0>, 2206b7e2fba0SBryan O'Donoghue <0 0>, 2207b7e2fba0SBryan O'Donoghue <0 0>, 2208b7e2fba0SBryan O'Donoghue <0 0>; 2209b7e2fba0SBryan O'Donoghue 2210b7e2fba0SBryan O'Donoghue status = "disabled"; 2211b7e2fba0SBryan O'Donoghue }; 2212b7e2fba0SBryan O'Donoghue 2213b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 2214b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 2215b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 2216b7e2fba0SBryan O'Donoghue #address-cells = <2>; 2217b7e2fba0SBryan O'Donoghue #size-cells = <2>; 2218b7e2fba0SBryan O'Donoghue ranges; 2219b7e2fba0SBryan O'Donoghue clock-names = "ref", 2220b7e2fba0SBryan O'Donoghue "ref_aux"; 2221b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 2222b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 2223b7e2fba0SBryan O'Donoghue 2224b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 2225b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 2226b7e2fba0SBryan O'Donoghue status = "disabled"; 2227b7e2fba0SBryan O'Donoghue 22281351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 22297f8b37ddSJohan Hovold reg = <0 0x01d87400 0 0x16c>, 22307f8b37ddSJohan Hovold <0 0x01d87600 0 0x200>, 22317f8b37ddSJohan Hovold <0 0x01d87c00 0 0x200>, 22327f8b37ddSJohan Hovold <0 0x01d87800 0 0x16c>, 22337f8b37ddSJohan Hovold <0 0x01d87a00 0 0x200>; 2234b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 2235b7e2fba0SBryan O'Donoghue }; 2236b7e2fba0SBryan O'Donoghue }; 2237b7e2fba0SBryan O'Donoghue 2238c58be6c8SBhupesh Sharma cryptobam: dma-controller@1dc4000 { 2239c58be6c8SBhupesh Sharma compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; 2240c58be6c8SBhupesh Sharma reg = <0 0x01dc4000 0 0x24000>; 2241c58be6c8SBhupesh Sharma interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 2242c58be6c8SBhupesh Sharma #dma-cells = <1>; 2243c58be6c8SBhupesh Sharma qcom,ee = <0>; 2244c58be6c8SBhupesh Sharma qcom,controlled-remotely; 2245c58be6c8SBhupesh Sharma num-channels = <8>; 2246c58be6c8SBhupesh Sharma qcom,num-ees = <2>; 2247c58be6c8SBhupesh Sharma iommus = <&apps_smmu 0x592 0x0000>, 2248c58be6c8SBhupesh Sharma <&apps_smmu 0x598 0x0000>, 2249c58be6c8SBhupesh Sharma <&apps_smmu 0x599 0x0000>, 2250c58be6c8SBhupesh Sharma <&apps_smmu 0x59f 0x0000>, 2251c58be6c8SBhupesh Sharma <&apps_smmu 0x586 0x0011>, 2252c58be6c8SBhupesh Sharma <&apps_smmu 0x596 0x0011>; 2253c58be6c8SBhupesh Sharma }; 2254c58be6c8SBhupesh Sharma 2255c58be6c8SBhupesh Sharma crypto: crypto@1dfa000 { 2256c58be6c8SBhupesh Sharma compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce"; 2257c58be6c8SBhupesh Sharma reg = <0 0x01dfa000 0 0x6000>; 2258c58be6c8SBhupesh Sharma dmas = <&cryptobam 4>, <&cryptobam 5>; 2259c58be6c8SBhupesh Sharma dma-names = "rx", "tx"; 2260c58be6c8SBhupesh Sharma iommus = <&apps_smmu 0x592 0x0000>, 2261c58be6c8SBhupesh Sharma <&apps_smmu 0x598 0x0000>, 2262c58be6c8SBhupesh Sharma <&apps_smmu 0x599 0x0000>, 2263c58be6c8SBhupesh Sharma <&apps_smmu 0x59f 0x0000>, 2264c58be6c8SBhupesh Sharma <&apps_smmu 0x586 0x0011>, 2265c58be6c8SBhupesh Sharma <&apps_smmu 0x596 0x0011>; 2266b5a12438SAbel Vesa interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>; 2267c58be6c8SBhupesh Sharma interconnect-names = "memory"; 2268c58be6c8SBhupesh Sharma }; 2269c58be6c8SBhupesh Sharma 2270dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 2271dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 2272b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 2273dff0f49cSBjorn Andersson #hwlock-cells = <1>; 227460378f1aSVenkata Narendra Kumar Gutta }; 227560378f1aSVenkata Narendra Kumar Gutta 2276768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 2277768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 2278768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 22797858ef3cSLuca Weiss clocks = <&audiocc LPASS_CDC_WSA_MCLK>, 22807858ef3cSLuca Weiss <&audiocc LPASS_CDC_WSA_NPL>, 2281768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2282768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 22837858ef3cSLuca Weiss <&aoncc LPASS_CDC_VA_MCLK>, 2284768270caSSrinivas Kandagatla <&vamacro>; 2285768270caSSrinivas Kandagatla 2286768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 2287768270caSSrinivas Kandagatla 2288768270caSSrinivas Kandagatla #clock-cells = <0>; 2289768270caSSrinivas Kandagatla clock-output-names = "mclk"; 2290768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2291768270caSSrinivas Kandagatla 2292768270caSSrinivas Kandagatla pinctrl-names = "default"; 2293768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 2294ba23455eSKonrad Dybcio 2295ba23455eSKonrad Dybcio status = "disabled"; 2296768270caSSrinivas Kandagatla }; 2297768270caSSrinivas Kandagatla 2298768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 2299768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 2300768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 2301768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 2302768270caSSrinivas Kandagatla clocks = <&wsamacro>; 2303768270caSSrinivas Kandagatla clock-names = "iface"; 2304768270caSSrinivas Kandagatla 2305768270caSSrinivas Kandagatla qcom,din-ports = <2>; 2306768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 2307768270caSSrinivas Kandagatla 2308768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 2309768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 2310768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 2311768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 2312768270caSSrinivas Kandagatla 2313768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2314768270caSSrinivas Kandagatla #address-cells = <2>; 2315768270caSSrinivas Kandagatla #size-cells = <0>; 2316ba23455eSKonrad Dybcio 2317ba23455eSKonrad Dybcio status = "disabled"; 2318768270caSSrinivas Kandagatla }; 2319768270caSSrinivas Kandagatla 2320793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 2321793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 2322793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 2323793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2324793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2325793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2326793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2327793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2328793bbd2dSSrinivas Kandagatla }; 2329793bbd2dSSrinivas Kandagatla 2330768270caSSrinivas Kandagatla vamacro: codec@3370000 { 2331768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 2332768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 23337858ef3cSLuca Weiss clocks = <&aoncc LPASS_CDC_VA_MCLK>, 2334768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2335768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2336768270caSSrinivas Kandagatla 2337768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 2338768270caSSrinivas Kandagatla 2339768270caSSrinivas Kandagatla #clock-cells = <0>; 2340768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 2341768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2342768270caSSrinivas Kandagatla }; 2343768270caSSrinivas Kandagatla 234424f52ef0SSrinivas Kandagatla rxmacro: rxmacro@3200000 { 234524f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 234624f52ef0SSrinivas Kandagatla pinctrl-0 = <&rx_swr_active>; 234724f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-rx-macro"; 2348d8b4ee93SKonrad Dybcio reg = <0 0x03200000 0 0x1000>; 234918019eb6SDmitry Baryshkov status = "disabled"; 235024f52ef0SSrinivas Kandagatla 235124f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235224f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235324f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235424f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 235524f52ef0SSrinivas Kandagatla <&vamacro>; 235624f52ef0SSrinivas Kandagatla 235724f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 235824f52ef0SSrinivas Kandagatla 235924f52ef0SSrinivas Kandagatla #clock-cells = <0>; 236024f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 236124f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 236224f52ef0SSrinivas Kandagatla }; 236324f52ef0SSrinivas Kandagatla 236424f52ef0SSrinivas Kandagatla swr1: soundwire-controller@3210000 { 2365d8b4ee93SKonrad Dybcio reg = <0 0x03210000 0 0x2000>; 236624f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 236718019eb6SDmitry Baryshkov status = "disabled"; 236824f52ef0SSrinivas Kandagatla interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 236924f52ef0SSrinivas Kandagatla clocks = <&rxmacro>; 237024f52ef0SSrinivas Kandagatla clock-names = "iface"; 237124f52ef0SSrinivas Kandagatla label = "RX"; 237224f52ef0SSrinivas Kandagatla qcom,din-ports = <0>; 237324f52ef0SSrinivas Kandagatla qcom,dout-ports = <5>; 237424f52ef0SSrinivas Kandagatla 237574f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; 237674f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; 237774f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; 237874f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; 237974f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; 238074f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; 238174f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; 238224f52ef0SSrinivas Kandagatla qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; 238374f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; 238424f52ef0SSrinivas Kandagatla 238524f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 238624f52ef0SSrinivas Kandagatla #address-cells = <2>; 238724f52ef0SSrinivas Kandagatla #size-cells = <0>; 238824f52ef0SSrinivas Kandagatla }; 238924f52ef0SSrinivas Kandagatla 239024f52ef0SSrinivas Kandagatla txmacro: txmacro@3220000 { 239124f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 239224f52ef0SSrinivas Kandagatla pinctrl-0 = <&tx_swr_active>; 239324f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-tx-macro"; 2394d8b4ee93SKonrad Dybcio reg = <0 0x03220000 0 0x1000>; 239518019eb6SDmitry Baryshkov status = "disabled"; 239624f52ef0SSrinivas Kandagatla 239724f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 239824f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 239924f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240024f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 240124f52ef0SSrinivas Kandagatla <&vamacro>; 240224f52ef0SSrinivas Kandagatla 240324f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 240424f52ef0SSrinivas Kandagatla 240524f52ef0SSrinivas Kandagatla #clock-cells = <0>; 240624f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 240724f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 240824f52ef0SSrinivas Kandagatla }; 240924f52ef0SSrinivas Kandagatla 241024f52ef0SSrinivas Kandagatla /* tx macro */ 241124f52ef0SSrinivas Kandagatla swr2: soundwire-controller@3230000 { 2412d8b4ee93SKonrad Dybcio reg = <0 0x03230000 0 0x2000>; 241324f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 241456306502SKrzysztof Kozlowski interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; 241524f52ef0SSrinivas Kandagatla interrupt-names = "core"; 241618019eb6SDmitry Baryshkov status = "disabled"; 241724f52ef0SSrinivas Kandagatla 241824f52ef0SSrinivas Kandagatla clocks = <&txmacro>; 241924f52ef0SSrinivas Kandagatla clock-names = "iface"; 242024f52ef0SSrinivas Kandagatla label = "TX"; 242124f52ef0SSrinivas Kandagatla 242224f52ef0SSrinivas Kandagatla qcom,din-ports = <5>; 242324f52ef0SSrinivas Kandagatla qcom,dout-ports = <0>; 242474f91659SKonrad Dybcio qcom,ports-sinterval-low = /bits/ 8 <0xff 0x01 0x01 0x03 0x03>; 242574f91659SKonrad Dybcio qcom,ports-offset1 = /bits/ 8 <0xff 0x01 0x00 0x02 0x00>; 242674f91659SKonrad Dybcio qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x00 0x00 0x00>; 242774f91659SKonrad Dybcio qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 242874f91659SKonrad Dybcio qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 242974f91659SKonrad Dybcio qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243074f91659SKonrad Dybcio qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243174f91659SKonrad Dybcio qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; 243274f91659SKonrad Dybcio qcom,ports-lane-control = /bits/ 8 <0xff 0x00 0x01 0x00 0x01>; 243324f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 243424f52ef0SSrinivas Kandagatla #address-cells = <2>; 243524f52ef0SSrinivas Kandagatla #size-cells = <0>; 243624f52ef0SSrinivas Kandagatla }; 243724f52ef0SSrinivas Kandagatla 2438793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 2439793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 2440793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 2441793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2442793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2443793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2444793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2445793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2446793bbd2dSSrinivas Kandagatla }; 2447793bbd2dSSrinivas Kandagatla 24483160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000 { 24493160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 24503160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 24513160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 24523160c1b8SSrinivas Kandagatla gpio-controller; 24533160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 24543160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 24553160c1b8SSrinivas Kandagatla 24563160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 24573160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 24583160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 24593160c1b8SSrinivas Kandagatla 2460031f5436SKrzysztof Kozlowski wsa_swr_active: wsa-swr-active-state { 2461031f5436SKrzysztof Kozlowski clk-pins { 24623160c1b8SSrinivas Kandagatla pins = "gpio10"; 24633160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24643160c1b8SSrinivas Kandagatla drive-strength = <2>; 24653160c1b8SSrinivas Kandagatla slew-rate = <1>; 24663160c1b8SSrinivas Kandagatla bias-disable; 24673160c1b8SSrinivas Kandagatla }; 24683160c1b8SSrinivas Kandagatla 2469031f5436SKrzysztof Kozlowski data-pins { 24703160c1b8SSrinivas Kandagatla pins = "gpio11"; 24713160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24723160c1b8SSrinivas Kandagatla drive-strength = <2>; 24733160c1b8SSrinivas Kandagatla slew-rate = <1>; 24743160c1b8SSrinivas Kandagatla bias-bus-hold; 24753160c1b8SSrinivas Kandagatla }; 24763160c1b8SSrinivas Kandagatla }; 24773160c1b8SSrinivas Kandagatla 2478031f5436SKrzysztof Kozlowski wsa_swr_sleep: wsa-swr-sleep-state { 2479031f5436SKrzysztof Kozlowski clk-pins { 24803160c1b8SSrinivas Kandagatla pins = "gpio10"; 24813160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24823160c1b8SSrinivas Kandagatla drive-strength = <2>; 24833160c1b8SSrinivas Kandagatla bias-pull-down; 24843160c1b8SSrinivas Kandagatla }; 24853160c1b8SSrinivas Kandagatla 2486031f5436SKrzysztof Kozlowski data-pins { 24873160c1b8SSrinivas Kandagatla pins = "gpio11"; 24883160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24893160c1b8SSrinivas Kandagatla drive-strength = <2>; 24903160c1b8SSrinivas Kandagatla bias-pull-down; 24913160c1b8SSrinivas Kandagatla }; 24923160c1b8SSrinivas Kandagatla }; 24933160c1b8SSrinivas Kandagatla 2494031f5436SKrzysztof Kozlowski dmic01_active: dmic01-active-state { 2495031f5436SKrzysztof Kozlowski clk-pins { 24963160c1b8SSrinivas Kandagatla pins = "gpio6"; 24973160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 24983160c1b8SSrinivas Kandagatla drive-strength = <8>; 24993160c1b8SSrinivas Kandagatla output-high; 25003160c1b8SSrinivas Kandagatla }; 2501031f5436SKrzysztof Kozlowski data-pins { 25023160c1b8SSrinivas Kandagatla pins = "gpio7"; 25033160c1b8SSrinivas Kandagatla function = "dmic1_data"; 25043160c1b8SSrinivas Kandagatla drive-strength = <8>; 25053160c1b8SSrinivas Kandagatla }; 25063160c1b8SSrinivas Kandagatla }; 25073160c1b8SSrinivas Kandagatla 2508031f5436SKrzysztof Kozlowski dmic01_sleep: dmic01-sleep-state { 2509031f5436SKrzysztof Kozlowski clk-pins { 25103160c1b8SSrinivas Kandagatla pins = "gpio6"; 25113160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 25123160c1b8SSrinivas Kandagatla drive-strength = <2>; 25133160c1b8SSrinivas Kandagatla bias-disable; 25143160c1b8SSrinivas Kandagatla output-low; 25153160c1b8SSrinivas Kandagatla }; 25163160c1b8SSrinivas Kandagatla 2517031f5436SKrzysztof Kozlowski data-pins { 25183160c1b8SSrinivas Kandagatla pins = "gpio7"; 25193160c1b8SSrinivas Kandagatla function = "dmic1_data"; 25203160c1b8SSrinivas Kandagatla drive-strength = <2>; 2521195a0a11SKrzysztof Kozlowski bias-pull-down; 25223160c1b8SSrinivas Kandagatla }; 25233160c1b8SSrinivas Kandagatla }; 252424f52ef0SSrinivas Kandagatla 2525031f5436SKrzysztof Kozlowski rx_swr_active: rx-swr-active-state { 2526031f5436SKrzysztof Kozlowski clk-pins { 252724f52ef0SSrinivas Kandagatla pins = "gpio3"; 252824f52ef0SSrinivas Kandagatla function = "swr_rx_clk"; 252924f52ef0SSrinivas Kandagatla drive-strength = <2>; 253024f52ef0SSrinivas Kandagatla slew-rate = <1>; 253124f52ef0SSrinivas Kandagatla bias-disable; 253224f52ef0SSrinivas Kandagatla }; 253324f52ef0SSrinivas Kandagatla 2534031f5436SKrzysztof Kozlowski data-pins { 253524f52ef0SSrinivas Kandagatla pins = "gpio4", "gpio5"; 253624f52ef0SSrinivas Kandagatla function = "swr_rx_data"; 253724f52ef0SSrinivas Kandagatla drive-strength = <2>; 253824f52ef0SSrinivas Kandagatla slew-rate = <1>; 253924f52ef0SSrinivas Kandagatla bias-bus-hold; 254024f52ef0SSrinivas Kandagatla }; 254124f52ef0SSrinivas Kandagatla }; 254224f52ef0SSrinivas Kandagatla 2543031f5436SKrzysztof Kozlowski tx_swr_active: tx-swr-active-state { 2544031f5436SKrzysztof Kozlowski clk-pins { 254524f52ef0SSrinivas Kandagatla pins = "gpio0"; 254624f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 254724f52ef0SSrinivas Kandagatla drive-strength = <2>; 254824f52ef0SSrinivas Kandagatla slew-rate = <1>; 254924f52ef0SSrinivas Kandagatla bias-disable; 255024f52ef0SSrinivas Kandagatla }; 255124f52ef0SSrinivas Kandagatla 2552031f5436SKrzysztof Kozlowski data-pins { 255324f52ef0SSrinivas Kandagatla pins = "gpio1", "gpio2"; 255424f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 255524f52ef0SSrinivas Kandagatla drive-strength = <2>; 255624f52ef0SSrinivas Kandagatla slew-rate = <1>; 255724f52ef0SSrinivas Kandagatla bias-bus-hold; 255824f52ef0SSrinivas Kandagatla }; 255924f52ef0SSrinivas Kandagatla }; 256024f52ef0SSrinivas Kandagatla 2561031f5436SKrzysztof Kozlowski tx_swr_sleep: tx-swr-sleep-state { 2562031f5436SKrzysztof Kozlowski clk-pins { 256324f52ef0SSrinivas Kandagatla pins = "gpio0"; 256424f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 256524f52ef0SSrinivas Kandagatla drive-strength = <2>; 256624f52ef0SSrinivas Kandagatla bias-pull-down; 256724f52ef0SSrinivas Kandagatla }; 256824f52ef0SSrinivas Kandagatla 2569031f5436SKrzysztof Kozlowski data1-pins { 257024f52ef0SSrinivas Kandagatla pins = "gpio1"; 257124f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 257224f52ef0SSrinivas Kandagatla drive-strength = <2>; 257324f52ef0SSrinivas Kandagatla bias-bus-hold; 257424f52ef0SSrinivas Kandagatla }; 257524f52ef0SSrinivas Kandagatla 2576031f5436SKrzysztof Kozlowski data2-pins { 257724f52ef0SSrinivas Kandagatla pins = "gpio2"; 257824f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 257924f52ef0SSrinivas Kandagatla drive-strength = <2>; 258024f52ef0SSrinivas Kandagatla bias-pull-down; 258124f52ef0SSrinivas Kandagatla }; 258224f52ef0SSrinivas Kandagatla }; 25833160c1b8SSrinivas Kandagatla }; 25843160c1b8SSrinivas Kandagatla 258504a3605bSJonathan Marek gpu: gpu@3d00000 { 258604a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 25877c1dffd4SDmitry Baryshkov "qcom,adreno"; 258804a3605bSJonathan Marek 258904a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 259004a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 259104a3605bSJonathan Marek 259204a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 259304a3605bSJonathan Marek 259404a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 259504a3605bSJonathan Marek 259604a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 259704a3605bSJonathan Marek 259804a3605bSJonathan Marek qcom,gmu = <&gmu>; 259904a3605bSJonathan Marek 26002a50d1a0SKonrad Dybcio nvmem-cells = <&gpu_speed_bin>; 26012a50d1a0SKonrad Dybcio nvmem-cell-names = "speed_bin"; 26022a50d1a0SKonrad Dybcio 2603ece28cb5SKonrad Dybcio status = "disabled"; 2604ece28cb5SKonrad Dybcio 260504a3605bSJonathan Marek zap-shader { 260604a3605bSJonathan Marek memory-region = <&gpu_mem>; 260704a3605bSJonathan Marek }; 260804a3605bSJonathan Marek 260904a3605bSJonathan Marek gpu_opp_table: opp-table { 261004a3605bSJonathan Marek compatible = "operating-points-v2"; 261104a3605bSJonathan Marek 261204a3605bSJonathan Marek opp-670000000 { 261304a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 261404a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 26152a50d1a0SKonrad Dybcio opp-supported-hw = <0xa>; 261604a3605bSJonathan Marek }; 261704a3605bSJonathan Marek 261804a3605bSJonathan Marek opp-587000000 { 261904a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 262004a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 26212a50d1a0SKonrad Dybcio opp-supported-hw = <0xb>; 262204a3605bSJonathan Marek }; 262304a3605bSJonathan Marek 262404a3605bSJonathan Marek opp-525000000 { 262504a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 262604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 26272a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 262804a3605bSJonathan Marek }; 262904a3605bSJonathan Marek 263004a3605bSJonathan Marek opp-490000000 { 263104a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 263204a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 26332a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 263404a3605bSJonathan Marek }; 263504a3605bSJonathan Marek 263604a3605bSJonathan Marek opp-441600000 { 263704a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 263804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 26392a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 264004a3605bSJonathan Marek }; 264104a3605bSJonathan Marek 264204a3605bSJonathan Marek opp-400000000 { 264304a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 264404a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 26452a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 264604a3605bSJonathan Marek }; 264704a3605bSJonathan Marek 264804a3605bSJonathan Marek opp-305000000 { 264904a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 265004a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 26512a50d1a0SKonrad Dybcio opp-supported-hw = <0xf>; 265204a3605bSJonathan Marek }; 265304a3605bSJonathan Marek }; 265404a3605bSJonathan Marek }; 265504a3605bSJonathan Marek 265604a3605bSJonathan Marek gmu: gmu@3d6a000 { 265704a3605bSJonathan Marek compatible = "qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 265804a3605bSJonathan Marek 265904a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 266004a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 266104a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 266204a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 266304a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 266404a3605bSJonathan Marek 266504a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 266604a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 266704a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 266804a3605bSJonathan Marek 26690e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 26700e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 26710e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 267204a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 267304a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 267404a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 267504a3605bSJonathan Marek 26760e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 26770e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 267804a3605bSJonathan Marek power-domain-names = "cx", "gx"; 267904a3605bSJonathan Marek 268004a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 268104a3605bSJonathan Marek 268204a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 268304a3605bSJonathan Marek 2684ece28cb5SKonrad Dybcio status = "disabled"; 2685ece28cb5SKonrad Dybcio 268604a3605bSJonathan Marek gmu_opp_table: opp-table { 268704a3605bSJonathan Marek compatible = "operating-points-v2"; 268804a3605bSJonathan Marek 268904a3605bSJonathan Marek opp-200000000 { 269004a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 269104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 269204a3605bSJonathan Marek }; 269304a3605bSJonathan Marek }; 269404a3605bSJonathan Marek }; 269504a3605bSJonathan Marek 269604a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 269704a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 269804a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 269904a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 270004a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 270104a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 270204a3605bSJonathan Marek clock-names = "bi_tcxo", 270304a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 270404a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 270504a3605bSJonathan Marek #clock-cells = <1>; 270604a3605bSJonathan Marek #reset-cells = <1>; 270704a3605bSJonathan Marek #power-domain-cells = <1>; 270804a3605bSJonathan Marek }; 270904a3605bSJonathan Marek 271004a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 27118347b12eSKonrad Dybcio compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", 27128347b12eSKonrad Dybcio "qcom,smmu-500", "arm,mmu-500"; 271304a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 271404a3605bSJonathan Marek #iommu-cells = <2>; 271504a3605bSJonathan Marek #global-interrupts = <2>; 271604a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 271704a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 271804a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 271904a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 272004a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 272104a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 272204a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 272304a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 272404a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 272504a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 27260e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 272704a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 272804a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 272904a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 273004a3605bSJonathan Marek 27310e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 2732*4cb19bd7SKonrad Dybcio dma-coherent; 273304a3605bSJonathan Marek }; 273404a3605bSJonathan Marek 273523a89037SBjorn Andersson slpi: remoteproc@5c00000 { 273623a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 273723a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 273823a89037SBjorn Andersson 273923a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 274023a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 274123a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 274223a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 274323a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 274423a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 274523a89037SBjorn Andersson "handover", "stop-ack"; 274623a89037SBjorn Andersson 274723a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 274823a89037SBjorn Andersson clock-names = "xo"; 274923a89037SBjorn Andersson 2750b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 275123a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 2752b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 275323a89037SBjorn Andersson 275423a89037SBjorn Andersson memory-region = <&slpi_mem>; 275523a89037SBjorn Andersson 2756b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 2757b74ee2d7SSibi Sankar 275823a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 275923a89037SBjorn Andersson qcom,smem-state-names = "stop"; 276023a89037SBjorn Andersson 276123a89037SBjorn Andersson status = "disabled"; 276223a89037SBjorn Andersson 276323a89037SBjorn Andersson glink-edge { 276423a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 276523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 276623a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 276723a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 276823a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 276923a89037SBjorn Andersson 277025695808SJonathan Marek label = "slpi"; 277123a89037SBjorn Andersson qcom,remote-pid = <3>; 277225695808SJonathan Marek 277325695808SJonathan Marek fastrpc { 277425695808SJonathan Marek compatible = "qcom,fastrpc"; 277525695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 277625695808SJonathan Marek label = "sdsp"; 27778c8ce95bSJeya R qcom,non-secure-domain; 277825695808SJonathan Marek #address-cells = <1>; 277925695808SJonathan Marek #size-cells = <0>; 278025695808SJonathan Marek 278125695808SJonathan Marek compute-cb@1 { 278225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 278325695808SJonathan Marek reg = <1>; 278425695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 278525695808SJonathan Marek }; 278625695808SJonathan Marek 278725695808SJonathan Marek compute-cb@2 { 278825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 278925695808SJonathan Marek reg = <2>; 279025695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 279125695808SJonathan Marek }; 279225695808SJonathan Marek 279325695808SJonathan Marek compute-cb@3 { 279425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 279525695808SJonathan Marek reg = <3>; 279625695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 279725695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 279825695808SJonathan Marek }; 279925695808SJonathan Marek }; 280023a89037SBjorn Andersson }; 280123a89037SBjorn Andersson }; 280223a89037SBjorn Andersson 28037960de64SMao Jinlong stm@6002000 { 28047960de64SMao Jinlong compatible = "arm,coresight-stm", "arm,primecell"; 28057960de64SMao Jinlong reg = <0 0x06002000 0 0x1000>, <0 0x16280000 0 0x180000>; 28067960de64SMao Jinlong reg-names = "stm-base", "stm-stimulus-base"; 28077960de64SMao Jinlong 28087960de64SMao Jinlong clocks = <&aoss_qmp>; 28097960de64SMao Jinlong clock-names = "apb_pclk"; 28107960de64SMao Jinlong 28117960de64SMao Jinlong out-ports { 28127960de64SMao Jinlong port { 28137960de64SMao Jinlong stm_out: endpoint { 28147960de64SMao Jinlong remote-endpoint = <&funnel0_in7>; 28157960de64SMao Jinlong }; 28167960de64SMao Jinlong }; 28177960de64SMao Jinlong }; 28187960de64SMao Jinlong }; 28197960de64SMao Jinlong 2820fb1fe154SMao Jinlong tpda@6004000 { 2821fb1fe154SMao Jinlong compatible = "qcom,coresight-tpda", "arm,primecell"; 2822fb1fe154SMao Jinlong reg = <0 0x06004000 0 0x1000>; 2823fb1fe154SMao Jinlong 2824fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 2825fb1fe154SMao Jinlong clock-names = "apb_pclk"; 2826fb1fe154SMao Jinlong 2827fb1fe154SMao Jinlong out-ports { 2828fb1fe154SMao Jinlong #address-cells = <1>; 2829fb1fe154SMao Jinlong #size-cells = <0>; 2830fb1fe154SMao Jinlong 2831fb1fe154SMao Jinlong port@0 { 2832fb1fe154SMao Jinlong reg = <0>; 2833fb1fe154SMao Jinlong tpda_out_funnel_qatb: endpoint { 2834fb1fe154SMao Jinlong remote-endpoint = <&funnel_qatb_in_tpda>; 2835fb1fe154SMao Jinlong }; 2836fb1fe154SMao Jinlong }; 2837fb1fe154SMao Jinlong }; 2838fb1fe154SMao Jinlong 2839fb1fe154SMao Jinlong in-ports { 2840fb1fe154SMao Jinlong #address-cells = <1>; 2841fb1fe154SMao Jinlong #size-cells = <0>; 2842fb1fe154SMao Jinlong 2843fb1fe154SMao Jinlong port@9 { 2844fb1fe154SMao Jinlong reg = <9>; 2845fb1fe154SMao Jinlong tpda_9_in_tpdm_mm: endpoint { 2846fb1fe154SMao Jinlong remote-endpoint = <&tpdm_mm_out_tpda9>; 2847fb1fe154SMao Jinlong }; 2848fb1fe154SMao Jinlong }; 2849fb1fe154SMao Jinlong 2850fb1fe154SMao Jinlong port@17 { 2851fb1fe154SMao Jinlong reg = <23>; 2852fb1fe154SMao Jinlong tpda_23_in_tpdm_prng: endpoint { 2853fb1fe154SMao Jinlong remote-endpoint = <&tpdm_prng_out_tpda_23>; 2854fb1fe154SMao Jinlong }; 2855fb1fe154SMao Jinlong }; 2856fb1fe154SMao Jinlong }; 2857fb1fe154SMao Jinlong }; 2858fb1fe154SMao Jinlong 2859fb1fe154SMao Jinlong funnel@6005000 { 2860fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 2861fb1fe154SMao Jinlong reg = <0 0x06005000 0 0x1000>; 2862fb1fe154SMao Jinlong 2863fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 2864fb1fe154SMao Jinlong clock-names = "apb_pclk"; 2865fb1fe154SMao Jinlong 2866fb1fe154SMao Jinlong out-ports { 2867fb1fe154SMao Jinlong port { 2868fb1fe154SMao Jinlong funnel_qatb_out_funnel_in0: endpoint { 2869fb1fe154SMao Jinlong remote-endpoint = <&funnel_in0_in_funnel_qatb>; 2870fb1fe154SMao Jinlong }; 2871fb1fe154SMao Jinlong }; 2872fb1fe154SMao Jinlong }; 2873fb1fe154SMao Jinlong 2874fb1fe154SMao Jinlong in-ports { 2875fb1fe154SMao Jinlong #address-cells = <1>; 2876fb1fe154SMao Jinlong #size-cells = <0>; 2877fb1fe154SMao Jinlong 2878fb1fe154SMao Jinlong port@0 { 2879fb1fe154SMao Jinlong reg = <0>; 2880fb1fe154SMao Jinlong funnel_qatb_in_tpda: endpoint { 2881fb1fe154SMao Jinlong remote-endpoint = <&tpda_out_funnel_qatb>; 2882fb1fe154SMao Jinlong }; 2883fb1fe154SMao Jinlong }; 2884fb1fe154SMao Jinlong }; 2885fb1fe154SMao Jinlong }; 2886fb1fe154SMao Jinlong 28877960de64SMao Jinlong funnel@6041000 { 28887960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 28897960de64SMao Jinlong reg = <0 0x06041000 0 0x1000>; 28907960de64SMao Jinlong 28917960de64SMao Jinlong clocks = <&aoss_qmp>; 28927960de64SMao Jinlong clock-names = "apb_pclk"; 28937960de64SMao Jinlong 28947960de64SMao Jinlong out-ports { 28957960de64SMao Jinlong port { 28967960de64SMao Jinlong funnel_in0_out_funnel_merg: endpoint { 28977960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in0>; 28987960de64SMao Jinlong }; 28997960de64SMao Jinlong }; 29007960de64SMao Jinlong }; 29017960de64SMao Jinlong 29027960de64SMao Jinlong in-ports { 29037960de64SMao Jinlong #address-cells = <1>; 29047960de64SMao Jinlong #size-cells = <0>; 29057960de64SMao Jinlong 2906fb1fe154SMao Jinlong port@6 { 2907fb1fe154SMao Jinlong reg = <6>; 2908fb1fe154SMao Jinlong funnel_in0_in_funnel_qatb: endpoint { 2909fb1fe154SMao Jinlong remote-endpoint = <&funnel_qatb_out_funnel_in0>; 2910fb1fe154SMao Jinlong }; 2911fb1fe154SMao Jinlong }; 2912fb1fe154SMao Jinlong 29137960de64SMao Jinlong port@7 { 29147960de64SMao Jinlong reg = <7>; 29157960de64SMao Jinlong funnel0_in7: endpoint { 29167960de64SMao Jinlong remote-endpoint = <&stm_out>; 29177960de64SMao Jinlong }; 29187960de64SMao Jinlong }; 29197960de64SMao Jinlong }; 29207960de64SMao Jinlong }; 29217960de64SMao Jinlong 29227960de64SMao Jinlong funnel@6042000 { 29237960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 29247960de64SMao Jinlong reg = <0 0x06042000 0 0x1000>; 29257960de64SMao Jinlong 29267960de64SMao Jinlong clocks = <&aoss_qmp>; 29277960de64SMao Jinlong clock-names = "apb_pclk"; 29287960de64SMao Jinlong 29297960de64SMao Jinlong out-ports { 2930d24539a6SKrzysztof Kozlowski port { 29317960de64SMao Jinlong funnel_in1_out_funnel_merg: endpoint { 29327960de64SMao Jinlong remote-endpoint = <&funnel_merg_in_funnel_in1>; 29337960de64SMao Jinlong }; 29347960de64SMao Jinlong }; 29357960de64SMao Jinlong }; 29367960de64SMao Jinlong 29377960de64SMao Jinlong in-ports { 29387960de64SMao Jinlong #address-cells = <1>; 29397960de64SMao Jinlong #size-cells = <0>; 29407960de64SMao Jinlong 29417960de64SMao Jinlong port@4 { 29427960de64SMao Jinlong reg = <4>; 29437960de64SMao Jinlong funnel_in1_in_funnel_apss_merg: endpoint { 29447960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_out_funnel_in1>; 29457960de64SMao Jinlong }; 29467960de64SMao Jinlong }; 29477960de64SMao Jinlong }; 29487960de64SMao Jinlong }; 29497960de64SMao Jinlong 29507960de64SMao Jinlong funnel@6045000 { 29517960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 29527960de64SMao Jinlong reg = <0 0x06045000 0 0x1000>; 29537960de64SMao Jinlong 29547960de64SMao Jinlong clocks = <&aoss_qmp>; 29557960de64SMao Jinlong clock-names = "apb_pclk"; 29567960de64SMao Jinlong 29577960de64SMao Jinlong out-ports { 29587960de64SMao Jinlong port { 29597960de64SMao Jinlong funnel_merg_out_funnel_swao: endpoint { 29607960de64SMao Jinlong remote-endpoint = <&funnel_swao_in_funnel_merg>; 29617960de64SMao Jinlong }; 29627960de64SMao Jinlong }; 29637960de64SMao Jinlong }; 29647960de64SMao Jinlong 29657960de64SMao Jinlong in-ports { 29667960de64SMao Jinlong #address-cells = <1>; 29677960de64SMao Jinlong #size-cells = <0>; 29687960de64SMao Jinlong 29697960de64SMao Jinlong port@0 { 29707960de64SMao Jinlong reg = <0>; 29717960de64SMao Jinlong funnel_merg_in_funnel_in0: endpoint { 29727960de64SMao Jinlong remote-endpoint = <&funnel_in0_out_funnel_merg>; 29737960de64SMao Jinlong }; 29747960de64SMao Jinlong }; 29757960de64SMao Jinlong 29767960de64SMao Jinlong port@1 { 29777960de64SMao Jinlong reg = <1>; 29787960de64SMao Jinlong funnel_merg_in_funnel_in1: endpoint { 29797960de64SMao Jinlong remote-endpoint = <&funnel_in1_out_funnel_merg>; 29807960de64SMao Jinlong }; 29817960de64SMao Jinlong }; 29827960de64SMao Jinlong }; 29837960de64SMao Jinlong }; 29847960de64SMao Jinlong 29857960de64SMao Jinlong replicator@6046000 { 29867960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 29877960de64SMao Jinlong reg = <0 0x06046000 0 0x1000>; 29887960de64SMao Jinlong 29897960de64SMao Jinlong clocks = <&aoss_qmp>; 29907960de64SMao Jinlong clock-names = "apb_pclk"; 29917960de64SMao Jinlong 29927960de64SMao Jinlong out-ports { 29937960de64SMao Jinlong port { 29947960de64SMao Jinlong replicator_out: endpoint { 29957960de64SMao Jinlong remote-endpoint = <&etr_in>; 29967960de64SMao Jinlong }; 29977960de64SMao Jinlong }; 29987960de64SMao Jinlong }; 29997960de64SMao Jinlong 30007960de64SMao Jinlong in-ports { 30017960de64SMao Jinlong port { 30027960de64SMao Jinlong replicator_cx_in_swao_out: endpoint { 30037960de64SMao Jinlong remote-endpoint = <&replicator_swao_out_cx_in>; 30047960de64SMao Jinlong }; 30057960de64SMao Jinlong }; 30067960de64SMao Jinlong }; 30077960de64SMao Jinlong }; 30087960de64SMao Jinlong 30097960de64SMao Jinlong etr@6048000 { 30107960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 30117960de64SMao Jinlong reg = <0 0x06048000 0 0x1000>; 30127960de64SMao Jinlong 30137960de64SMao Jinlong clocks = <&aoss_qmp>; 30147960de64SMao Jinlong clock-names = "apb_pclk"; 30157960de64SMao Jinlong arm,scatter-gather; 30167960de64SMao Jinlong 30177960de64SMao Jinlong in-ports { 30187960de64SMao Jinlong port { 30197960de64SMao Jinlong etr_in: endpoint { 30207960de64SMao Jinlong remote-endpoint = <&replicator_out>; 30217960de64SMao Jinlong }; 30227960de64SMao Jinlong }; 30237960de64SMao Jinlong }; 30247960de64SMao Jinlong }; 30257960de64SMao Jinlong 3026fb1fe154SMao Jinlong tpdm@684c000 { 3027fb1fe154SMao Jinlong compatible = "qcom,coresight-tpdm", "arm,primecell"; 3028fb1fe154SMao Jinlong reg = <0 0x0684c000 0 0x1000>; 3029fb1fe154SMao Jinlong 3030fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3031fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3032fb1fe154SMao Jinlong 3033fb1fe154SMao Jinlong out-ports { 3034fb1fe154SMao Jinlong port { 3035fb1fe154SMao Jinlong tpdm_prng_out_tpda_23: endpoint { 3036fb1fe154SMao Jinlong remote-endpoint = <&tpda_23_in_tpdm_prng>; 3037fb1fe154SMao Jinlong }; 3038fb1fe154SMao Jinlong }; 3039fb1fe154SMao Jinlong }; 3040fb1fe154SMao Jinlong }; 3041fb1fe154SMao Jinlong 30427960de64SMao Jinlong funnel@6b04000 { 30437960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 30447960de64SMao Jinlong arm,primecell-periphid = <0x000bb908>; 30457960de64SMao Jinlong 30467960de64SMao Jinlong reg = <0 0x06b04000 0 0x1000>; 30477960de64SMao Jinlong 30487960de64SMao Jinlong clocks = <&aoss_qmp>; 30497960de64SMao Jinlong clock-names = "apb_pclk"; 30507960de64SMao Jinlong 30517960de64SMao Jinlong out-ports { 30527960de64SMao Jinlong port { 30537960de64SMao Jinlong funnel_swao_out_etf: endpoint { 30547960de64SMao Jinlong remote-endpoint = <&etf_in_funnel_swao_out>; 30557960de64SMao Jinlong }; 30567960de64SMao Jinlong }; 30577960de64SMao Jinlong }; 30587960de64SMao Jinlong 30597960de64SMao Jinlong in-ports { 30607960de64SMao Jinlong #address-cells = <1>; 30617960de64SMao Jinlong #size-cells = <0>; 30627960de64SMao Jinlong 30637960de64SMao Jinlong port@7 { 30647960de64SMao Jinlong reg = <7>; 30657960de64SMao Jinlong funnel_swao_in_funnel_merg: endpoint { 30667960de64SMao Jinlong remote-endpoint = <&funnel_merg_out_funnel_swao>; 30677960de64SMao Jinlong }; 30687960de64SMao Jinlong }; 30697960de64SMao Jinlong }; 30707960de64SMao Jinlong }; 30717960de64SMao Jinlong 30727960de64SMao Jinlong etf@6b05000 { 30737960de64SMao Jinlong compatible = "arm,coresight-tmc", "arm,primecell"; 30747960de64SMao Jinlong reg = <0 0x06b05000 0 0x1000>; 30757960de64SMao Jinlong 30767960de64SMao Jinlong clocks = <&aoss_qmp>; 30777960de64SMao Jinlong clock-names = "apb_pclk"; 30787960de64SMao Jinlong 30797960de64SMao Jinlong out-ports { 30807960de64SMao Jinlong port { 30817960de64SMao Jinlong etf_out: endpoint { 30827960de64SMao Jinlong remote-endpoint = <&replicator_in>; 30837960de64SMao Jinlong }; 30847960de64SMao Jinlong }; 30857960de64SMao Jinlong }; 30867960de64SMao Jinlong 30877960de64SMao Jinlong in-ports { 30887960de64SMao Jinlong #address-cells = <1>; 30897960de64SMao Jinlong #size-cells = <0>; 30907960de64SMao Jinlong 30917960de64SMao Jinlong port@0 { 30927960de64SMao Jinlong reg = <0>; 30937960de64SMao Jinlong etf_in_funnel_swao_out: endpoint { 30947960de64SMao Jinlong remote-endpoint = <&funnel_swao_out_etf>; 30957960de64SMao Jinlong }; 30967960de64SMao Jinlong }; 30977960de64SMao Jinlong }; 30987960de64SMao Jinlong }; 30997960de64SMao Jinlong 31007960de64SMao Jinlong replicator@6b06000 { 31017960de64SMao Jinlong compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 31027960de64SMao Jinlong reg = <0 0x06b06000 0 0x1000>; 31037960de64SMao Jinlong 31047960de64SMao Jinlong clocks = <&aoss_qmp>; 31057960de64SMao Jinlong clock-names = "apb_pclk"; 31067960de64SMao Jinlong 31077960de64SMao Jinlong out-ports { 31087960de64SMao Jinlong port { 31097960de64SMao Jinlong replicator_swao_out_cx_in: endpoint { 31107960de64SMao Jinlong remote-endpoint = <&replicator_cx_in_swao_out>; 31117960de64SMao Jinlong }; 31127960de64SMao Jinlong }; 31137960de64SMao Jinlong }; 31147960de64SMao Jinlong 31157960de64SMao Jinlong in-ports { 31167960de64SMao Jinlong port { 31177960de64SMao Jinlong replicator_in: endpoint { 31187960de64SMao Jinlong remote-endpoint = <&etf_out>; 31197960de64SMao Jinlong }; 31207960de64SMao Jinlong }; 31217960de64SMao Jinlong }; 31227960de64SMao Jinlong }; 31237960de64SMao Jinlong 3124fb1fe154SMao Jinlong tpdm@6c08000 { 3125fb1fe154SMao Jinlong compatible = "qcom,coresight-tpdm", "arm,primecell"; 3126fb1fe154SMao Jinlong reg = <0 0x06c08000 0 0x1000>; 3127fb1fe154SMao Jinlong 3128fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3129fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3130fb1fe154SMao Jinlong 3131fb1fe154SMao Jinlong out-ports { 3132fb1fe154SMao Jinlong port { 3133fb1fe154SMao Jinlong tpdm_mm_out_funnel_dl_mm: endpoint { 3134fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>; 3135fb1fe154SMao Jinlong }; 3136fb1fe154SMao Jinlong }; 3137fb1fe154SMao Jinlong }; 3138fb1fe154SMao Jinlong }; 3139fb1fe154SMao Jinlong 3140fb1fe154SMao Jinlong funnel@6c0b000 { 3141fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 3142fb1fe154SMao Jinlong reg = <0 0x06c0b000 0 0x1000>; 3143fb1fe154SMao Jinlong 3144fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3145fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3146fb1fe154SMao Jinlong 3147fb1fe154SMao Jinlong out-ports { 3148fb1fe154SMao Jinlong port { 3149fb1fe154SMao Jinlong funnel_dl_mm_out_funnel_dl_center: endpoint { 3150fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_center_in_funnel_dl_mm>; 3151fb1fe154SMao Jinlong }; 3152fb1fe154SMao Jinlong }; 3153fb1fe154SMao Jinlong }; 3154fb1fe154SMao Jinlong 3155fb1fe154SMao Jinlong in-ports { 3156fb1fe154SMao Jinlong #address-cells = <1>; 3157fb1fe154SMao Jinlong #size-cells = <0>; 3158fb1fe154SMao Jinlong 3159fb1fe154SMao Jinlong port@3 { 3160fb1fe154SMao Jinlong reg = <3>; 3161fb1fe154SMao Jinlong funnel_dl_mm_in_tpdm_mm: endpoint { 3162fb1fe154SMao Jinlong remote-endpoint = <&tpdm_mm_out_funnel_dl_mm>; 3163fb1fe154SMao Jinlong }; 3164fb1fe154SMao Jinlong }; 3165fb1fe154SMao Jinlong }; 3166fb1fe154SMao Jinlong }; 3167fb1fe154SMao Jinlong 3168fb1fe154SMao Jinlong funnel@6c2d000 { 3169fb1fe154SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 3170fb1fe154SMao Jinlong reg = <0 0x06c2d000 0 0x1000>; 3171fb1fe154SMao Jinlong 3172fb1fe154SMao Jinlong clocks = <&aoss_qmp>; 3173fb1fe154SMao Jinlong clock-names = "apb_pclk"; 3174fb1fe154SMao Jinlong 3175fb1fe154SMao Jinlong out-ports { 3176fb1fe154SMao Jinlong #address-cells = <1>; 3177fb1fe154SMao Jinlong #size-cells = <0>; 3178fb1fe154SMao Jinlong port { 3179fb1fe154SMao Jinlong tpdm_mm_out_tpda9: endpoint { 3180fb1fe154SMao Jinlong remote-endpoint = <&tpda_9_in_tpdm_mm>; 3181fb1fe154SMao Jinlong }; 3182fb1fe154SMao Jinlong }; 3183fb1fe154SMao Jinlong }; 3184fb1fe154SMao Jinlong 3185fb1fe154SMao Jinlong in-ports { 3186fb1fe154SMao Jinlong #address-cells = <1>; 3187fb1fe154SMao Jinlong #size-cells = <0>; 3188fb1fe154SMao Jinlong 3189fb1fe154SMao Jinlong port@2 { 3190fb1fe154SMao Jinlong reg = <2>; 3191fb1fe154SMao Jinlong funnel_dl_center_in_funnel_dl_mm: endpoint { 3192fb1fe154SMao Jinlong remote-endpoint = <&funnel_dl_mm_out_funnel_dl_center>; 3193fb1fe154SMao Jinlong }; 3194fb1fe154SMao Jinlong }; 3195fb1fe154SMao Jinlong }; 3196fb1fe154SMao Jinlong }; 3197fb1fe154SMao Jinlong 31987960de64SMao Jinlong etm@7040000 { 31997960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32007960de64SMao Jinlong reg = <0 0x07040000 0 0x1000>; 32017960de64SMao Jinlong 32027960de64SMao Jinlong cpu = <&CPU0>; 32037960de64SMao Jinlong 32047960de64SMao Jinlong clocks = <&aoss_qmp>; 32057960de64SMao Jinlong clock-names = "apb_pclk"; 32067960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32077960de64SMao Jinlong 32087960de64SMao Jinlong out-ports { 32097960de64SMao Jinlong port { 32107960de64SMao Jinlong etm0_out: endpoint { 32117960de64SMao Jinlong remote-endpoint = <&apss_funnel_in0>; 32127960de64SMao Jinlong }; 32137960de64SMao Jinlong }; 32147960de64SMao Jinlong }; 32157960de64SMao Jinlong }; 32167960de64SMao Jinlong 32177960de64SMao Jinlong etm@7140000 { 32187960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32197960de64SMao Jinlong reg = <0 0x07140000 0 0x1000>; 32207960de64SMao Jinlong 32217960de64SMao Jinlong cpu = <&CPU1>; 32227960de64SMao Jinlong 32237960de64SMao Jinlong clocks = <&aoss_qmp>; 32247960de64SMao Jinlong clock-names = "apb_pclk"; 32257960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32267960de64SMao Jinlong 32277960de64SMao Jinlong out-ports { 32287960de64SMao Jinlong port { 32297960de64SMao Jinlong etm1_out: endpoint { 32307960de64SMao Jinlong remote-endpoint = <&apss_funnel_in1>; 32317960de64SMao Jinlong }; 32327960de64SMao Jinlong }; 32337960de64SMao Jinlong }; 32347960de64SMao Jinlong }; 32357960de64SMao Jinlong 32367960de64SMao Jinlong etm@7240000 { 32377960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32387960de64SMao Jinlong reg = <0 0x07240000 0 0x1000>; 32397960de64SMao Jinlong 32407960de64SMao Jinlong cpu = <&CPU2>; 32417960de64SMao Jinlong 32427960de64SMao Jinlong clocks = <&aoss_qmp>; 32437960de64SMao Jinlong clock-names = "apb_pclk"; 32447960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32457960de64SMao Jinlong 32467960de64SMao Jinlong out-ports { 32477960de64SMao Jinlong port { 32487960de64SMao Jinlong etm2_out: endpoint { 32497960de64SMao Jinlong remote-endpoint = <&apss_funnel_in2>; 32507960de64SMao Jinlong }; 32517960de64SMao Jinlong }; 32527960de64SMao Jinlong }; 32537960de64SMao Jinlong }; 32547960de64SMao Jinlong 32557960de64SMao Jinlong etm@7340000 { 32567960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32577960de64SMao Jinlong reg = <0 0x07340000 0 0x1000>; 32587960de64SMao Jinlong 32597960de64SMao Jinlong cpu = <&CPU3>; 32607960de64SMao Jinlong 32617960de64SMao Jinlong clocks = <&aoss_qmp>; 32627960de64SMao Jinlong clock-names = "apb_pclk"; 32637960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32647960de64SMao Jinlong 32657960de64SMao Jinlong out-ports { 32667960de64SMao Jinlong port { 32677960de64SMao Jinlong etm3_out: endpoint { 32687960de64SMao Jinlong remote-endpoint = <&apss_funnel_in3>; 32697960de64SMao Jinlong }; 32707960de64SMao Jinlong }; 32717960de64SMao Jinlong }; 32727960de64SMao Jinlong }; 32737960de64SMao Jinlong 32747960de64SMao Jinlong etm@7440000 { 32757960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32767960de64SMao Jinlong reg = <0 0x07440000 0 0x1000>; 32777960de64SMao Jinlong 32787960de64SMao Jinlong cpu = <&CPU4>; 32797960de64SMao Jinlong 32807960de64SMao Jinlong clocks = <&aoss_qmp>; 32817960de64SMao Jinlong clock-names = "apb_pclk"; 32827960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 32837960de64SMao Jinlong 32847960de64SMao Jinlong out-ports { 32857960de64SMao Jinlong port { 32867960de64SMao Jinlong etm4_out: endpoint { 32877960de64SMao Jinlong remote-endpoint = <&apss_funnel_in4>; 32887960de64SMao Jinlong }; 32897960de64SMao Jinlong }; 32907960de64SMao Jinlong }; 32917960de64SMao Jinlong }; 32927960de64SMao Jinlong 32937960de64SMao Jinlong etm@7540000 { 32947960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 32957960de64SMao Jinlong reg = <0 0x07540000 0 0x1000>; 32967960de64SMao Jinlong 32977960de64SMao Jinlong cpu = <&CPU5>; 32987960de64SMao Jinlong 32997960de64SMao Jinlong clocks = <&aoss_qmp>; 33007960de64SMao Jinlong clock-names = "apb_pclk"; 33017960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 33027960de64SMao Jinlong 33037960de64SMao Jinlong out-ports { 33047960de64SMao Jinlong port { 33057960de64SMao Jinlong etm5_out: endpoint { 33067960de64SMao Jinlong remote-endpoint = <&apss_funnel_in5>; 33077960de64SMao Jinlong }; 33087960de64SMao Jinlong }; 33097960de64SMao Jinlong }; 33107960de64SMao Jinlong }; 33117960de64SMao Jinlong 33127960de64SMao Jinlong etm@7640000 { 33137960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 33147960de64SMao Jinlong reg = <0 0x07640000 0 0x1000>; 33157960de64SMao Jinlong 33167960de64SMao Jinlong cpu = <&CPU6>; 33177960de64SMao Jinlong 33187960de64SMao Jinlong clocks = <&aoss_qmp>; 33197960de64SMao Jinlong clock-names = "apb_pclk"; 33207960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 33217960de64SMao Jinlong 33227960de64SMao Jinlong out-ports { 33237960de64SMao Jinlong port { 33247960de64SMao Jinlong etm6_out: endpoint { 33257960de64SMao Jinlong remote-endpoint = <&apss_funnel_in6>; 33267960de64SMao Jinlong }; 33277960de64SMao Jinlong }; 33287960de64SMao Jinlong }; 33297960de64SMao Jinlong }; 33307960de64SMao Jinlong 33317960de64SMao Jinlong etm@7740000 { 33327960de64SMao Jinlong compatible = "arm,coresight-etm4x", "arm,primecell"; 33337960de64SMao Jinlong reg = <0 0x07740000 0 0x1000>; 33347960de64SMao Jinlong 33357960de64SMao Jinlong cpu = <&CPU7>; 33367960de64SMao Jinlong 33377960de64SMao Jinlong clocks = <&aoss_qmp>; 33387960de64SMao Jinlong clock-names = "apb_pclk"; 33397960de64SMao Jinlong arm,coresight-loses-context-with-cpu; 33407960de64SMao Jinlong 33417960de64SMao Jinlong out-ports { 33427960de64SMao Jinlong port { 33437960de64SMao Jinlong etm7_out: endpoint { 33447960de64SMao Jinlong remote-endpoint = <&apss_funnel_in7>; 33457960de64SMao Jinlong }; 33467960de64SMao Jinlong }; 33477960de64SMao Jinlong }; 33487960de64SMao Jinlong }; 33497960de64SMao Jinlong 33507960de64SMao Jinlong funnel@7800000 { 33517960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 33527960de64SMao Jinlong reg = <0 0x07800000 0 0x1000>; 33537960de64SMao Jinlong 33547960de64SMao Jinlong clocks = <&aoss_qmp>; 33557960de64SMao Jinlong clock-names = "apb_pclk"; 33567960de64SMao Jinlong 33577960de64SMao Jinlong out-ports { 33587960de64SMao Jinlong port { 33597960de64SMao Jinlong funnel_apss_out_funnel_apss_merg: endpoint { 33607960de64SMao Jinlong remote-endpoint = <&funnel_apss_merg_in_funnel_apss>; 33617960de64SMao Jinlong }; 33627960de64SMao Jinlong }; 33637960de64SMao Jinlong }; 33647960de64SMao Jinlong 33657960de64SMao Jinlong in-ports { 33667960de64SMao Jinlong #address-cells = <1>; 33677960de64SMao Jinlong #size-cells = <0>; 33687960de64SMao Jinlong 33697960de64SMao Jinlong port@0 { 33707960de64SMao Jinlong reg = <0>; 33717960de64SMao Jinlong apss_funnel_in0: endpoint { 33727960de64SMao Jinlong remote-endpoint = <&etm0_out>; 33737960de64SMao Jinlong }; 33747960de64SMao Jinlong }; 33757960de64SMao Jinlong 33767960de64SMao Jinlong port@1 { 33777960de64SMao Jinlong reg = <1>; 33787960de64SMao Jinlong apss_funnel_in1: endpoint { 33797960de64SMao Jinlong remote-endpoint = <&etm1_out>; 33807960de64SMao Jinlong }; 33817960de64SMao Jinlong }; 33827960de64SMao Jinlong 33837960de64SMao Jinlong port@2 { 33847960de64SMao Jinlong reg = <2>; 33857960de64SMao Jinlong apss_funnel_in2: endpoint { 33867960de64SMao Jinlong remote-endpoint = <&etm2_out>; 33877960de64SMao Jinlong }; 33887960de64SMao Jinlong }; 33897960de64SMao Jinlong 33907960de64SMao Jinlong port@3 { 33917960de64SMao Jinlong reg = <3>; 33927960de64SMao Jinlong apss_funnel_in3: endpoint { 33937960de64SMao Jinlong remote-endpoint = <&etm3_out>; 33947960de64SMao Jinlong }; 33957960de64SMao Jinlong }; 33967960de64SMao Jinlong 33977960de64SMao Jinlong port@4 { 33987960de64SMao Jinlong reg = <4>; 33997960de64SMao Jinlong apss_funnel_in4: endpoint { 34007960de64SMao Jinlong remote-endpoint = <&etm4_out>; 34017960de64SMao Jinlong }; 34027960de64SMao Jinlong }; 34037960de64SMao Jinlong 34047960de64SMao Jinlong port@5 { 34057960de64SMao Jinlong reg = <5>; 34067960de64SMao Jinlong apss_funnel_in5: endpoint { 34077960de64SMao Jinlong remote-endpoint = <&etm5_out>; 34087960de64SMao Jinlong }; 34097960de64SMao Jinlong }; 34107960de64SMao Jinlong 34117960de64SMao Jinlong port@6 { 34127960de64SMao Jinlong reg = <6>; 34137960de64SMao Jinlong apss_funnel_in6: endpoint { 34147960de64SMao Jinlong remote-endpoint = <&etm6_out>; 34157960de64SMao Jinlong }; 34167960de64SMao Jinlong }; 34177960de64SMao Jinlong 34187960de64SMao Jinlong port@7 { 34197960de64SMao Jinlong reg = <7>; 34207960de64SMao Jinlong apss_funnel_in7: endpoint { 34217960de64SMao Jinlong remote-endpoint = <&etm7_out>; 34227960de64SMao Jinlong }; 34237960de64SMao Jinlong }; 34247960de64SMao Jinlong }; 34257960de64SMao Jinlong }; 34267960de64SMao Jinlong 34277960de64SMao Jinlong funnel@7810000 { 34287960de64SMao Jinlong compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 34297960de64SMao Jinlong reg = <0 0x07810000 0 0x1000>; 34307960de64SMao Jinlong 34317960de64SMao Jinlong clocks = <&aoss_qmp>; 34327960de64SMao Jinlong clock-names = "apb_pclk"; 34337960de64SMao Jinlong 34347960de64SMao Jinlong out-ports { 34357960de64SMao Jinlong port { 34367960de64SMao Jinlong funnel_apss_merg_out_funnel_in1: endpoint { 34377960de64SMao Jinlong remote-endpoint = <&funnel_in1_in_funnel_apss_merg>; 34387960de64SMao Jinlong }; 34397960de64SMao Jinlong }; 34407960de64SMao Jinlong }; 34417960de64SMao Jinlong 34427960de64SMao Jinlong in-ports { 34437960de64SMao Jinlong #address-cells = <1>; 34447960de64SMao Jinlong #size-cells = <0>; 34457960de64SMao Jinlong 34467960de64SMao Jinlong port@0 { 34477960de64SMao Jinlong reg = <0>; 34487960de64SMao Jinlong funnel_apss_merg_in_funnel_apss: endpoint { 34497960de64SMao Jinlong remote-endpoint = <&funnel_apss_out_funnel_apss_merg>; 34507960de64SMao Jinlong }; 34517960de64SMao Jinlong }; 34527960de64SMao Jinlong }; 34537960de64SMao Jinlong }; 34547960de64SMao Jinlong 345523a89037SBjorn Andersson cdsp: remoteproc@8300000 { 345623a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 345723a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 345823a89037SBjorn Andersson 345923a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 346023a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 346123a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 346223a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 346323a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 346423a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 346523a89037SBjorn Andersson "handover", "stop-ack"; 346623a89037SBjorn Andersson 346723a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 346823a89037SBjorn Andersson clock-names = "xo"; 346923a89037SBjorn Andersson 3470b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_CX>; 347123a89037SBjorn Andersson 347223a89037SBjorn Andersson memory-region = <&cdsp_mem>; 347323a89037SBjorn Andersson 3474b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 3475b74ee2d7SSibi Sankar 347623a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 347723a89037SBjorn Andersson qcom,smem-state-names = "stop"; 347823a89037SBjorn Andersson 347923a89037SBjorn Andersson status = "disabled"; 348023a89037SBjorn Andersson 348123a89037SBjorn Andersson glink-edge { 348223a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 348323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 348423a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 348523a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 348623a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 348723a89037SBjorn Andersson 348825695808SJonathan Marek label = "cdsp"; 348923a89037SBjorn Andersson qcom,remote-pid = <5>; 349025695808SJonathan Marek 349125695808SJonathan Marek fastrpc { 349225695808SJonathan Marek compatible = "qcom,fastrpc"; 349325695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 349425695808SJonathan Marek label = "cdsp"; 34958c8ce95bSJeya R qcom,non-secure-domain; 349625695808SJonathan Marek #address-cells = <1>; 349725695808SJonathan Marek #size-cells = <0>; 349825695808SJonathan Marek 349925695808SJonathan Marek compute-cb@1 { 350025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 350125695808SJonathan Marek reg = <1>; 350225695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 350325695808SJonathan Marek }; 350425695808SJonathan Marek 350525695808SJonathan Marek compute-cb@2 { 350625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 350725695808SJonathan Marek reg = <2>; 350825695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 350925695808SJonathan Marek }; 351025695808SJonathan Marek 351125695808SJonathan Marek compute-cb@3 { 351225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 351325695808SJonathan Marek reg = <3>; 351425695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 351525695808SJonathan Marek }; 351625695808SJonathan Marek 351725695808SJonathan Marek compute-cb@4 { 351825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 351925695808SJonathan Marek reg = <4>; 352025695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 352125695808SJonathan Marek }; 352225695808SJonathan Marek 352325695808SJonathan Marek compute-cb@5 { 352425695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 352525695808SJonathan Marek reg = <5>; 352625695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 352725695808SJonathan Marek }; 352825695808SJonathan Marek 352925695808SJonathan Marek compute-cb@6 { 353025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 353125695808SJonathan Marek reg = <6>; 353225695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 353325695808SJonathan Marek }; 353425695808SJonathan Marek 353525695808SJonathan Marek compute-cb@7 { 353625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 353725695808SJonathan Marek reg = <7>; 353825695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 353925695808SJonathan Marek }; 354025695808SJonathan Marek 354125695808SJonathan Marek compute-cb@8 { 354225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 354325695808SJonathan Marek reg = <8>; 354425695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 354525695808SJonathan Marek }; 354625695808SJonathan Marek 354725695808SJonathan Marek /* note: secure cb9 in downstream */ 354825695808SJonathan Marek }; 354923a89037SBjorn Andersson }; 355023a89037SBjorn Andersson }; 355123a89037SBjorn Andersson 355246a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 355346a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 355446a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 355546a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 355646a6f297SJonathan Marek status = "disabled"; 355746a6f297SJonathan Marek #phy-cells = <0>; 355846a6f297SJonathan Marek 355946a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 356046a6f297SJonathan Marek clock-names = "ref"; 356146a6f297SJonathan Marek 356246a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 356346a6f297SJonathan Marek }; 356446a6f297SJonathan Marek 356546a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 356646a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 356746a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 356846a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 356946a6f297SJonathan Marek status = "disabled"; 357046a6f297SJonathan Marek #phy-cells = <0>; 357146a6f297SJonathan Marek 357246a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 357346a6f297SJonathan Marek clock-names = "ref"; 357446a6f297SJonathan Marek 357546a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 357646a6f297SJonathan Marek }; 357746a6f297SJonathan Marek 357846a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 35795aa0d1beSDmitry Baryshkov compatible = "qcom,sm8250-qmp-usb3-dp-phy"; 358046a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 35815aa0d1beSDmitry Baryshkov <0 0x088e8000 0 0x40>, 35825aa0d1beSDmitry Baryshkov <0 0x088ea000 0 0x200>; 358346a6f297SJonathan Marek status = "disabled"; 358446a6f297SJonathan Marek #address-cells = <2>; 358546a6f297SJonathan Marek #size-cells = <2>; 358646a6f297SJonathan Marek ranges; 358746a6f297SJonathan Marek 358846a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 358946a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 359046a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 359146a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 359246a6f297SJonathan Marek 359346a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 359446a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 359546a6f297SJonathan Marek reset-names = "phy", "common"; 359646a6f297SJonathan Marek 35975aa0d1beSDmitry Baryshkov usb_1_ssphy: usb3-phy@88e9200 { 359846a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 359946a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 360046a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 360146a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 360246a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 360346a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 36047178d4ccSJonathan Marek #clock-cells = <0>; 360546a6f297SJonathan Marek #phy-cells = <0>; 360646a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 360746a6f297SJonathan Marek clock-names = "pipe0"; 360846a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 360946a6f297SJonathan Marek }; 36105aa0d1beSDmitry Baryshkov 36115aa0d1beSDmitry Baryshkov dp_phy: dp-phy@88ea200 { 36125aa0d1beSDmitry Baryshkov reg = <0 0x088ea200 0 0x200>, 36135aa0d1beSDmitry Baryshkov <0 0x088ea400 0 0x200>, 3614f8d8840cSJohan Hovold <0 0x088eaa00 0 0x200>, 36155aa0d1beSDmitry Baryshkov <0 0x088ea600 0 0x200>, 3616f8d8840cSJohan Hovold <0 0x088ea800 0 0x200>; 36175aa0d1beSDmitry Baryshkov #phy-cells = <0>; 36185aa0d1beSDmitry Baryshkov #clock-cells = <1>; 36195aa0d1beSDmitry Baryshkov }; 362046a6f297SJonathan Marek }; 362146a6f297SJonathan Marek 362246a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 362346a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 362446a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 362546a6f297SJonathan Marek status = "disabled"; 362646a6f297SJonathan Marek #address-cells = <2>; 362746a6f297SJonathan Marek #size-cells = <2>; 362846a6f297SJonathan Marek ranges; 362946a6f297SJonathan Marek 363046a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 363146a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 363246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 363346a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 363446a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 363546a6f297SJonathan Marek 363646a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 363746a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 363846a6f297SJonathan Marek reset-names = "phy", "common"; 363946a6f297SJonathan Marek 36401351512fSShawn Guo usb_2_ssphy: phy@88eb200 { 364146a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 364246a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 364346a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 36447178d4ccSJonathan Marek #clock-cells = <0>; 364546a6f297SJonathan Marek #phy-cells = <0>; 364646a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 364746a6f297SJonathan Marek clock-names = "pipe0"; 364846a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 364946a6f297SJonathan Marek }; 365046a6f297SJonathan Marek }; 365146a6f297SJonathan Marek 365296bb736fSBhupesh Sharma sdhc_2: mmc@8804000 { 3653c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 3654c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 3655c4cf0300SManivannan Sadhasivam 3656c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 3657c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 3658c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 3659c4cf0300SManivannan Sadhasivam 3660c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 3661c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 366274097d80SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 3663c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 3664c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 3665c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 3666c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 3667c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 3668c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 3669c4cf0300SManivannan Sadhasivam 3670c4cf0300SManivannan Sadhasivam status = "disabled"; 3671c4cf0300SManivannan Sadhasivam 36720e3e6546SKrzysztof Kozlowski sdhc2_opp_table: opp-table { 3673c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 3674c4cf0300SManivannan Sadhasivam 3675c4cf0300SManivannan Sadhasivam opp-19200000 { 3676c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 3677c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 3678c4cf0300SManivannan Sadhasivam }; 3679c4cf0300SManivannan Sadhasivam 3680c4cf0300SManivannan Sadhasivam opp-50000000 { 3681c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 3682c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 3683c4cf0300SManivannan Sadhasivam }; 3684c4cf0300SManivannan Sadhasivam 3685c4cf0300SManivannan Sadhasivam opp-100000000 { 3686c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 3687c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 3688c4cf0300SManivannan Sadhasivam }; 3689c4cf0300SManivannan Sadhasivam 3690c4cf0300SManivannan Sadhasivam opp-202000000 { 3691c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 3692c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 3693c4cf0300SManivannan Sadhasivam }; 3694c4cf0300SManivannan Sadhasivam }; 3695c4cf0300SManivannan Sadhasivam }; 3696c4cf0300SManivannan Sadhasivam 3697e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 3698e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 3699e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 3700b5a12438SAbel Vesa #interconnect-cells = <2>; 3701e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3702e7e41a20SJonathan Marek }; 3703e7e41a20SJonathan Marek 3704e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 3705e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 3706e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 3707b5a12438SAbel Vesa #interconnect-cells = <2>; 3708e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3709e7e41a20SJonathan Marek }; 3710e7e41a20SJonathan Marek 3711e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 3712e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 3713e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 3714b5a12438SAbel Vesa #interconnect-cells = <2>; 3715e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 3716e7e41a20SJonathan Marek }; 3717e7e41a20SJonathan Marek 371846a6f297SJonathan Marek usb_1: usb@a6f8800 { 371946a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 372046a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 372146a6f297SJonathan Marek status = "disabled"; 372246a6f297SJonathan Marek #address-cells = <2>; 372346a6f297SJonathan Marek #size-cells = <2>; 372446a6f297SJonathan Marek ranges; 372546a6f297SJonathan Marek dma-ranges; 372646a6f297SJonathan Marek 372746a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 372846a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 372946a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 373046a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 37318d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 373246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 37338d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 37348d5fd4e4SKrzysztof Kozlowski "core", 37358d5fd4e4SKrzysztof Kozlowski "iface", 37368d5fd4e4SKrzysztof Kozlowski "sleep", 37378d5fd4e4SKrzysztof Kozlowski "mock_utmi", 37388d5fd4e4SKrzysztof Kozlowski "xo"; 373946a6f297SJonathan Marek 374046a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 374146a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 374246a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 374346a6f297SJonathan Marek 374446a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 37455b7e3499SJohan Hovold <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, 374646a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 37475b7e3499SJohan Hovold <&pdc 14 IRQ_TYPE_EDGE_BOTH>; 37485b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 37495b7e3499SJohan Hovold "ss_phy_irq", 37505b7e3499SJohan Hovold "dm_hs_phy_irq", 37515b7e3499SJohan Hovold "dp_hs_phy_irq"; 375246a6f297SJonathan Marek 375346a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 375446a6f297SJonathan Marek 375546a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 375646a6f297SJonathan Marek 3757fd62fd1cSAbel Vesa interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>, 3758fd62fd1cSAbel Vesa <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>; 3759fd62fd1cSAbel Vesa interconnect-names = "usb-ddr", "apps-usb"; 3760fd62fd1cSAbel Vesa 37612aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 376246a6f297SJonathan Marek compatible = "snps,dwc3"; 376346a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 376446a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 376546a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 376646a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 376746a6f297SJonathan Marek snps,dis_enblslpm_quirk; 376846a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 376946a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 377046a6f297SJonathan Marek }; 377146a6f297SJonathan Marek }; 377246a6f297SJonathan Marek 37730085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 37740085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 377542c9b157SManivannan Sadhasivam reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, 377642c9b157SManivannan Sadhasivam <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, 377742c9b157SManivannan Sadhasivam <0 0x09600000 0 0x50000>; 377842c9b157SManivannan Sadhasivam reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 377942c9b157SManivannan Sadhasivam "llcc3_base", "llcc_broadcast_base"; 37800085a33aSManivannan Sadhasivam }; 37810085a33aSManivannan Sadhasivam 378246a6f297SJonathan Marek usb_2: usb@a8f8800 { 378346a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 378446a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 378546a6f297SJonathan Marek status = "disabled"; 378646a6f297SJonathan Marek #address-cells = <2>; 378746a6f297SJonathan Marek #size-cells = <2>; 378846a6f297SJonathan Marek ranges; 378946a6f297SJonathan Marek dma-ranges; 379046a6f297SJonathan Marek 379146a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 379246a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 379346a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 379446a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 37958d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 379646a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 37978d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 37988d5fd4e4SKrzysztof Kozlowski "core", 37998d5fd4e4SKrzysztof Kozlowski "iface", 38008d5fd4e4SKrzysztof Kozlowski "sleep", 38018d5fd4e4SKrzysztof Kozlowski "mock_utmi", 38028d5fd4e4SKrzysztof Kozlowski "xo"; 380346a6f297SJonathan Marek 380446a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 380546a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 380646a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 380746a6f297SJonathan Marek 380846a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 38095b7e3499SJohan Hovold <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, 381046a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 38115b7e3499SJohan Hovold <&pdc 12 IRQ_TYPE_EDGE_BOTH>; 38125b7e3499SJohan Hovold interrupt-names = "hs_phy_irq", 38135b7e3499SJohan Hovold "ss_phy_irq", 38145b7e3499SJohan Hovold "dm_hs_phy_irq", 38155b7e3499SJohan Hovold "dp_hs_phy_irq"; 381646a6f297SJonathan Marek 381746a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 381846a6f297SJonathan Marek 381946a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 382046a6f297SJonathan Marek 3821fd62fd1cSAbel Vesa interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>, 3822fd62fd1cSAbel Vesa <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>; 3823fd62fd1cSAbel Vesa interconnect-names = "usb-ddr", "apps-usb"; 3824fd62fd1cSAbel Vesa 38252aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 382646a6f297SJonathan Marek compatible = "snps,dwc3"; 382746a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 382846a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 382946a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 383046a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 383146a6f297SJonathan Marek snps,dis_enblslpm_quirk; 383246a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 383346a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 383446a6f297SJonathan Marek }; 383546a6f297SJonathan Marek }; 383646a6f297SJonathan Marek 3837fa245b3fSBryan O'Donoghue venus: video-codec@aa00000 { 3838fa245b3fSBryan O'Donoghue compatible = "qcom,sm8250-venus"; 3839fa245b3fSBryan O'Donoghue reg = <0 0x0aa00000 0 0x100000>; 3840fa245b3fSBryan O'Donoghue interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 3841fa245b3fSBryan O'Donoghue power-domains = <&videocc MVS0C_GDSC>, 3842fa245b3fSBryan O'Donoghue <&videocc MVS0_GDSC>, 3843fa245b3fSBryan O'Donoghue <&rpmhpd SM8250_MX>; 3844fa245b3fSBryan O'Donoghue power-domain-names = "venus", "vcodec0", "mx"; 3845fa245b3fSBryan O'Donoghue operating-points-v2 = <&venus_opp_table>; 3846fa245b3fSBryan O'Donoghue 3847fa245b3fSBryan O'Donoghue clocks = <&gcc GCC_VIDEO_AXI0_CLK>, 3848fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK>, 3849fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0_CLK>; 3850fa245b3fSBryan O'Donoghue clock-names = "iface", "core", "vcodec0_core"; 3851fa245b3fSBryan O'Donoghue 3852b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>, 3853b5a12438SAbel Vesa <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>; 3854fa245b3fSBryan O'Donoghue interconnect-names = "cpu-cfg", "video-mem"; 3855fa245b3fSBryan O'Donoghue 3856fa245b3fSBryan O'Donoghue iommus = <&apps_smmu 0x2100 0x0400>; 3857fa245b3fSBryan O'Donoghue memory-region = <&video_mem>; 3858fa245b3fSBryan O'Donoghue 3859fa245b3fSBryan O'Donoghue resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, 3860fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK_ARES>; 3861fa245b3fSBryan O'Donoghue reset-names = "bus", "core"; 3862fa245b3fSBryan O'Donoghue 3863ece28cb5SKonrad Dybcio status = "disabled"; 3864ece28cb5SKonrad Dybcio 3865fa245b3fSBryan O'Donoghue video-decoder { 3866fa245b3fSBryan O'Donoghue compatible = "venus-decoder"; 3867fa245b3fSBryan O'Donoghue }; 3868fa245b3fSBryan O'Donoghue 3869fa245b3fSBryan O'Donoghue video-encoder { 3870fa245b3fSBryan O'Donoghue compatible = "venus-encoder"; 3871fa245b3fSBryan O'Donoghue }; 3872fa245b3fSBryan O'Donoghue 38730e3e6546SKrzysztof Kozlowski venus_opp_table: opp-table { 3874fa245b3fSBryan O'Donoghue compatible = "operating-points-v2"; 3875fa245b3fSBryan O'Donoghue 3876fa245b3fSBryan O'Donoghue opp-720000000 { 3877fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <720000000>; 3878fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 3879fa245b3fSBryan O'Donoghue }; 3880fa245b3fSBryan O'Donoghue 3881fa245b3fSBryan O'Donoghue opp-1014000000 { 3882fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1014000000>; 3883fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs>; 3884fa245b3fSBryan O'Donoghue }; 3885fa245b3fSBryan O'Donoghue 3886fa245b3fSBryan O'Donoghue opp-1098000000 { 3887fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1098000000>; 3888fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs_l1>; 3889fa245b3fSBryan O'Donoghue }; 3890fa245b3fSBryan O'Donoghue 3891fa245b3fSBryan O'Donoghue opp-1332000000 { 3892fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1332000000>; 3893fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_nom>; 3894fa245b3fSBryan O'Donoghue }; 3895fa245b3fSBryan O'Donoghue }; 3896fa245b3fSBryan O'Donoghue }; 3897fa245b3fSBryan O'Donoghue 38985b9ec225Sjonathan@marek.ca videocc: clock-controller@abf0000 { 38995b9ec225Sjonathan@marek.ca compatible = "qcom,sm8250-videocc"; 39005b9ec225Sjonathan@marek.ca reg = <0 0x0abf0000 0 0x10000>; 39015b9ec225Sjonathan@marek.ca clocks = <&gcc GCC_VIDEO_AHB_CLK>, 39025b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK>, 39035b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK_A>; 3904266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 3905266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 39065b9ec225Sjonathan@marek.ca clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; 39075b9ec225Sjonathan@marek.ca #clock-cells = <1>; 39085b9ec225Sjonathan@marek.ca #reset-cells = <1>; 39095b9ec225Sjonathan@marek.ca #power-domain-cells = <1>; 39105b9ec225Sjonathan@marek.ca }; 39115b9ec225Sjonathan@marek.ca 3912e7173009SBryan O'Donoghue cci0: cci@ac4f000 { 3913dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 3914e7173009SBryan O'Donoghue #address-cells = <1>; 3915e7173009SBryan O'Donoghue #size-cells = <0>; 3916e7173009SBryan O'Donoghue 3917e7173009SBryan O'Donoghue reg = <0 0x0ac4f000 0 0x1000>; 3918e7173009SBryan O'Donoghue interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; 3919e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3920e7173009SBryan O'Donoghue 3921e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3922e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3923e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3924e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK>, 3925e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK_SRC>; 3926e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3927e7173009SBryan O'Donoghue "slow_ahb_src", 3928e7173009SBryan O'Donoghue "cpas_ahb", 3929e7173009SBryan O'Donoghue "cci", 3930e7173009SBryan O'Donoghue "cci_src"; 3931e7173009SBryan O'Donoghue 3932e7173009SBryan O'Donoghue pinctrl-0 = <&cci0_default>; 3933e7173009SBryan O'Donoghue pinctrl-1 = <&cci0_sleep>; 3934e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3935e7173009SBryan O'Donoghue 3936e7173009SBryan O'Donoghue status = "disabled"; 3937e7173009SBryan O'Donoghue 3938e7173009SBryan O'Donoghue cci0_i2c0: i2c-bus@0 { 3939e7173009SBryan O'Donoghue reg = <0>; 3940e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3941e7173009SBryan O'Donoghue #address-cells = <1>; 3942e7173009SBryan O'Donoghue #size-cells = <0>; 3943e7173009SBryan O'Donoghue }; 3944e7173009SBryan O'Donoghue 3945e7173009SBryan O'Donoghue cci0_i2c1: i2c-bus@1 { 3946e7173009SBryan O'Donoghue reg = <1>; 3947e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3948e7173009SBryan O'Donoghue #address-cells = <1>; 3949e7173009SBryan O'Donoghue #size-cells = <0>; 3950e7173009SBryan O'Donoghue }; 3951e7173009SBryan O'Donoghue }; 3952e7173009SBryan O'Donoghue 3953e7173009SBryan O'Donoghue cci1: cci@ac50000 { 3954dd45008bSKonrad Dybcio compatible = "qcom,sm8250-cci", "qcom,msm8996-cci"; 3955e7173009SBryan O'Donoghue #address-cells = <1>; 3956e7173009SBryan O'Donoghue #size-cells = <0>; 3957e7173009SBryan O'Donoghue 3958e7173009SBryan O'Donoghue reg = <0 0x0ac50000 0 0x1000>; 3959e7173009SBryan O'Donoghue interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>; 3960e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3961e7173009SBryan O'Donoghue 3962e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3963e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3964e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3965e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK>, 3966e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK_SRC>; 3967e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3968e7173009SBryan O'Donoghue "slow_ahb_src", 3969e7173009SBryan O'Donoghue "cpas_ahb", 3970e7173009SBryan O'Donoghue "cci", 3971e7173009SBryan O'Donoghue "cci_src"; 3972e7173009SBryan O'Donoghue 3973e7173009SBryan O'Donoghue pinctrl-0 = <&cci1_default>; 3974e7173009SBryan O'Donoghue pinctrl-1 = <&cci1_sleep>; 3975e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3976e7173009SBryan O'Donoghue 3977e7173009SBryan O'Donoghue status = "disabled"; 3978e7173009SBryan O'Donoghue 3979e7173009SBryan O'Donoghue cci1_i2c0: i2c-bus@0 { 3980e7173009SBryan O'Donoghue reg = <0>; 3981e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3982e7173009SBryan O'Donoghue #address-cells = <1>; 3983e7173009SBryan O'Donoghue #size-cells = <0>; 3984e7173009SBryan O'Donoghue }; 3985e7173009SBryan O'Donoghue 3986e7173009SBryan O'Donoghue cci1_i2c1: i2c-bus@1 { 3987e7173009SBryan O'Donoghue reg = <1>; 3988e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3989e7173009SBryan O'Donoghue #address-cells = <1>; 3990e7173009SBryan O'Donoghue #size-cells = <0>; 3991e7173009SBryan O'Donoghue }; 3992e7173009SBryan O'Donoghue }; 3993e7173009SBryan O'Donoghue 399430325603SBryan O'Donoghue camss: camss@ac6a000 { 399530325603SBryan O'Donoghue compatible = "qcom,sm8250-camss"; 399630325603SBryan O'Donoghue status = "disabled"; 399730325603SBryan O'Donoghue 399881f43efcSKonrad Dybcio reg = <0 0x0ac6a000 0 0x2000>, 399981f43efcSKonrad Dybcio <0 0x0ac6c000 0 0x2000>, 400081f43efcSKonrad Dybcio <0 0x0ac6e000 0 0x1000>, 400181f43efcSKonrad Dybcio <0 0x0ac70000 0 0x1000>, 400281f43efcSKonrad Dybcio <0 0x0ac72000 0 0x1000>, 400381f43efcSKonrad Dybcio <0 0x0ac74000 0 0x1000>, 400481f43efcSKonrad Dybcio <0 0x0acb4000 0 0xd000>, 400581f43efcSKonrad Dybcio <0 0x0acc3000 0 0xd000>, 400681f43efcSKonrad Dybcio <0 0x0acd9000 0 0x2200>, 400781f43efcSKonrad Dybcio <0 0x0acdb200 0 0x2200>; 400830325603SBryan O'Donoghue reg-names = "csiphy0", 400930325603SBryan O'Donoghue "csiphy1", 401030325603SBryan O'Donoghue "csiphy2", 401130325603SBryan O'Donoghue "csiphy3", 401230325603SBryan O'Donoghue "csiphy4", 401330325603SBryan O'Donoghue "csiphy5", 401430325603SBryan O'Donoghue "vfe0", 401530325603SBryan O'Donoghue "vfe1", 401630325603SBryan O'Donoghue "vfe_lite0", 401730325603SBryan O'Donoghue "vfe_lite1"; 401830325603SBryan O'Donoghue 401930325603SBryan O'Donoghue interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 402030325603SBryan O'Donoghue <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, 402130325603SBryan O'Donoghue <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, 402230325603SBryan O'Donoghue <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 402330325603SBryan O'Donoghue <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 402430325603SBryan O'Donoghue <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 402530325603SBryan O'Donoghue <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 402630325603SBryan O'Donoghue <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 402730325603SBryan O'Donoghue <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 402830325603SBryan O'Donoghue <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 402930325603SBryan O'Donoghue <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 403030325603SBryan O'Donoghue <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 403130325603SBryan O'Donoghue <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 403230325603SBryan O'Donoghue <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 403330325603SBryan O'Donoghue interrupt-names = "csiphy0", 403430325603SBryan O'Donoghue "csiphy1", 403530325603SBryan O'Donoghue "csiphy2", 403630325603SBryan O'Donoghue "csiphy3", 403730325603SBryan O'Donoghue "csiphy4", 403830325603SBryan O'Donoghue "csiphy5", 403930325603SBryan O'Donoghue "csid0", 404030325603SBryan O'Donoghue "csid1", 404130325603SBryan O'Donoghue "csid2", 404230325603SBryan O'Donoghue "csid3", 404330325603SBryan O'Donoghue "vfe0", 404430325603SBryan O'Donoghue "vfe1", 404530325603SBryan O'Donoghue "vfe_lite0", 404630325603SBryan O'Donoghue "vfe_lite1"; 404730325603SBryan O'Donoghue 404830325603SBryan O'Donoghue power-domains = <&camcc IFE_0_GDSC>, 404930325603SBryan O'Donoghue <&camcc IFE_1_GDSC>, 405030325603SBryan O'Donoghue <&camcc TITAN_TOP_GDSC>; 405130325603SBryan O'Donoghue 405230325603SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 405330325603SBryan O'Donoghue <&gcc GCC_CAMERA_HF_AXI_CLK>, 405430325603SBryan O'Donoghue <&gcc GCC_CAMERA_SF_AXI_CLK>, 405530325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK>, 405630325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, 405730325603SBryan O'Donoghue <&camcc CAM_CC_CORE_AHB_CLK>, 405830325603SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 405930325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY0_CLK>, 406030325603SBryan O'Donoghue <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 406130325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY1_CLK>, 406230325603SBryan O'Donoghue <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 406330325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY2_CLK>, 406430325603SBryan O'Donoghue <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 406530325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY3_CLK>, 406630325603SBryan O'Donoghue <&camcc CAM_CC_CSI3PHYTIMER_CLK>, 406730325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY4_CLK>, 406830325603SBryan O'Donoghue <&camcc CAM_CC_CSI4PHYTIMER_CLK>, 406930325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY5_CLK>, 407030325603SBryan O'Donoghue <&camcc CAM_CC_CSI5PHYTIMER_CLK>, 407130325603SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 407230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AHB_CLK>, 407330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AXI_CLK>, 407430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CLK>, 407530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, 407630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CSID_CLK>, 407730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AREG_CLK>, 407830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AHB_CLK>, 407930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AXI_CLK>, 408030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CLK>, 408130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, 408230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CSID_CLK>, 408330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AREG_CLK>, 408430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AHB_CLK>, 408530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AXI_CLK>, 408630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CLK>, 408730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 408830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CSID_CLK>; 408930325603SBryan O'Donoghue 409030325603SBryan O'Donoghue clock-names = "cam_ahb_clk", 409130325603SBryan O'Donoghue "cam_hf_axi", 409230325603SBryan O'Donoghue "cam_sf_axi", 409330325603SBryan O'Donoghue "camnoc_axi", 409430325603SBryan O'Donoghue "camnoc_axi_src", 409530325603SBryan O'Donoghue "core_ahb", 409630325603SBryan O'Donoghue "cpas_ahb", 409730325603SBryan O'Donoghue "csiphy0", 409830325603SBryan O'Donoghue "csiphy0_timer", 409930325603SBryan O'Donoghue "csiphy1", 410030325603SBryan O'Donoghue "csiphy1_timer", 410130325603SBryan O'Donoghue "csiphy2", 410230325603SBryan O'Donoghue "csiphy2_timer", 410330325603SBryan O'Donoghue "csiphy3", 410430325603SBryan O'Donoghue "csiphy3_timer", 410530325603SBryan O'Donoghue "csiphy4", 410630325603SBryan O'Donoghue "csiphy4_timer", 410730325603SBryan O'Donoghue "csiphy5", 410830325603SBryan O'Donoghue "csiphy5_timer", 410930325603SBryan O'Donoghue "slow_ahb_src", 411030325603SBryan O'Donoghue "vfe0_ahb", 411130325603SBryan O'Donoghue "vfe0_axi", 411230325603SBryan O'Donoghue "vfe0", 411330325603SBryan O'Donoghue "vfe0_cphy_rx", 411430325603SBryan O'Donoghue "vfe0_csid", 411530325603SBryan O'Donoghue "vfe0_areg", 411630325603SBryan O'Donoghue "vfe1_ahb", 411730325603SBryan O'Donoghue "vfe1_axi", 411830325603SBryan O'Donoghue "vfe1", 411930325603SBryan O'Donoghue "vfe1_cphy_rx", 412030325603SBryan O'Donoghue "vfe1_csid", 412130325603SBryan O'Donoghue "vfe1_areg", 412230325603SBryan O'Donoghue "vfe_lite_ahb", 412330325603SBryan O'Donoghue "vfe_lite_axi", 412430325603SBryan O'Donoghue "vfe_lite", 412530325603SBryan O'Donoghue "vfe_lite_cphy_rx", 412630325603SBryan O'Donoghue "vfe_lite_csid"; 412730325603SBryan O'Donoghue 412830325603SBryan O'Donoghue iommus = <&apps_smmu 0x800 0x400>, 412930325603SBryan O'Donoghue <&apps_smmu 0x801 0x400>, 413030325603SBryan O'Donoghue <&apps_smmu 0x840 0x400>, 413130325603SBryan O'Donoghue <&apps_smmu 0x841 0x400>, 413230325603SBryan O'Donoghue <&apps_smmu 0xc00 0x400>, 413330325603SBryan O'Donoghue <&apps_smmu 0xc01 0x400>, 413430325603SBryan O'Donoghue <&apps_smmu 0xc40 0x400>, 413530325603SBryan O'Donoghue <&apps_smmu 0xc41 0x400>; 413630325603SBryan O'Donoghue 4137b5a12438SAbel Vesa interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>, 4138b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>, 4139b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>, 4140b5a12438SAbel Vesa <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>; 414130325603SBryan O'Donoghue interconnect-names = "cam_ahb", 414230325603SBryan O'Donoghue "cam_hf_0_mnoc", 414330325603SBryan O'Donoghue "cam_sf_0_mnoc", 414430325603SBryan O'Donoghue "cam_sf_icp_mnoc"; 41453c5aa4c7SBryan O'Donoghue 41463c5aa4c7SBryan O'Donoghue ports { 41473c5aa4c7SBryan O'Donoghue #address-cells = <1>; 41483c5aa4c7SBryan O'Donoghue #size-cells = <0>; 41493c5aa4c7SBryan O'Donoghue 41503c5aa4c7SBryan O'Donoghue port@0 { 41513c5aa4c7SBryan O'Donoghue reg = <0>; 41523c5aa4c7SBryan O'Donoghue }; 41533c5aa4c7SBryan O'Donoghue 41543c5aa4c7SBryan O'Donoghue port@1 { 41553c5aa4c7SBryan O'Donoghue reg = <1>; 41563c5aa4c7SBryan O'Donoghue }; 41573c5aa4c7SBryan O'Donoghue 41583c5aa4c7SBryan O'Donoghue port@2 { 41593c5aa4c7SBryan O'Donoghue reg = <2>; 41603c5aa4c7SBryan O'Donoghue }; 41613c5aa4c7SBryan O'Donoghue 41623c5aa4c7SBryan O'Donoghue port@3 { 41633c5aa4c7SBryan O'Donoghue reg = <3>; 41643c5aa4c7SBryan O'Donoghue }; 41653c5aa4c7SBryan O'Donoghue 41663c5aa4c7SBryan O'Donoghue port@4 { 41673c5aa4c7SBryan O'Donoghue reg = <4>; 41683c5aa4c7SBryan O'Donoghue }; 41693c5aa4c7SBryan O'Donoghue 41703c5aa4c7SBryan O'Donoghue port@5 { 41713c5aa4c7SBryan O'Donoghue reg = <5>; 41723c5aa4c7SBryan O'Donoghue }; 41733c5aa4c7SBryan O'Donoghue }; 417430325603SBryan O'Donoghue }; 417530325603SBryan O'Donoghue 4176ca79a997SBryan O'Donoghue camcc: clock-controller@ad00000 { 4177ca79a997SBryan O'Donoghue compatible = "qcom,sm8250-camcc"; 4178ca79a997SBryan O'Donoghue reg = <0 0x0ad00000 0 0x10000>; 4179ca79a997SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 4180ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 4181ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK_A>, 4182ca79a997SBryan O'Donoghue <&sleep_clk>; 4183ca79a997SBryan O'Donoghue clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 4184ca79a997SBryan O'Donoghue power-domains = <&rpmhpd SM8250_MMCX>; 4185ca79a997SBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 41861b3bfc40SVladimir Zapolskiy status = "disabled"; 4187ca79a997SBryan O'Donoghue #clock-cells = <1>; 4188ca79a997SBryan O'Donoghue #reset-cells = <1>; 4189ca79a997SBryan O'Donoghue #power-domain-cells = <1>; 4190ca79a997SBryan O'Donoghue }; 4191ca79a997SBryan O'Donoghue 4192ecf0f5ffSDmitry Baryshkov mdss: display-subsystem@ae00000 { 4193dc5d9125SJonathan Marek compatible = "qcom,sm8250-mdss"; 41947c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 41957c1dffd4SDmitry Baryshkov reg-names = "mdss"; 41967c1dffd4SDmitry Baryshkov 4197b5a12438SAbel Vesa interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>, 4198b5a12438SAbel Vesa <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>; 4199888771a9SJonathan Marek interconnect-names = "mdp0-mem", "mdp1-mem"; 42007c1dffd4SDmitry Baryshkov 42017c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 42027c1dffd4SDmitry Baryshkov 42037c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 4204e091b836SAmit Pundir <&gcc GCC_DISP_HF_AXI_CLK>, 42057c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 42067c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 4207e091b836SAmit Pundir clock-names = "iface", "bus", "nrt_bus", "core"; 42087c1dffd4SDmitry Baryshkov 42097c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 42107c1dffd4SDmitry Baryshkov interrupt-controller; 42117c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 42127c1dffd4SDmitry Baryshkov 42137c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 42147c1dffd4SDmitry Baryshkov 42157c1dffd4SDmitry Baryshkov status = "disabled"; 42167c1dffd4SDmitry Baryshkov 42177c1dffd4SDmitry Baryshkov #address-cells = <2>; 42187c1dffd4SDmitry Baryshkov #size-cells = <2>; 42197c1dffd4SDmitry Baryshkov ranges; 42207c1dffd4SDmitry Baryshkov 4221ce5cf986SDmitry Baryshkov mdss_mdp: display-controller@ae01000 { 4222dc5d9125SJonathan Marek compatible = "qcom,sm8250-dpu"; 42237c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 42247c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 42257c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 42267c1dffd4SDmitry Baryshkov 42277c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 42287c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 42297c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 42307c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 42317c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 42327c1dffd4SDmitry Baryshkov 42336edb3238SVinod Polimera assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 42346edb3238SVinod Polimera assigned-clock-rates = <19200000>; 42357c1dffd4SDmitry Baryshkov 42367c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 42377c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 42387c1dffd4SDmitry Baryshkov 42397c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4240be633329SDmitry Baryshkov interrupts = <0>; 42417c1dffd4SDmitry Baryshkov 42427c1dffd4SDmitry Baryshkov ports { 42437c1dffd4SDmitry Baryshkov #address-cells = <1>; 42447c1dffd4SDmitry Baryshkov #size-cells = <0>; 42457c1dffd4SDmitry Baryshkov 42467c1dffd4SDmitry Baryshkov port@0 { 42477c1dffd4SDmitry Baryshkov reg = <0>; 42487c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 4249e47a7f57SDmitry Baryshkov remote-endpoint = <&mdss_dsi0_in>; 42507c1dffd4SDmitry Baryshkov }; 42517c1dffd4SDmitry Baryshkov }; 42527c1dffd4SDmitry Baryshkov 42537c1dffd4SDmitry Baryshkov port@1 { 42547c1dffd4SDmitry Baryshkov reg = <1>; 42557c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 4256e47a7f57SDmitry Baryshkov remote-endpoint = <&mdss_dsi1_in>; 42577c1dffd4SDmitry Baryshkov }; 42587c1dffd4SDmitry Baryshkov }; 42597c1dffd4SDmitry Baryshkov }; 42607c1dffd4SDmitry Baryshkov 42610e3e6546SKrzysztof Kozlowski mdp_opp_table: opp-table { 42627c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 42637c1dffd4SDmitry Baryshkov 42647c1dffd4SDmitry Baryshkov opp-200000000 { 42657c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 42667c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 42677c1dffd4SDmitry Baryshkov }; 42687c1dffd4SDmitry Baryshkov 42697c1dffd4SDmitry Baryshkov opp-300000000 { 42707c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 42717c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 42727c1dffd4SDmitry Baryshkov }; 42737c1dffd4SDmitry Baryshkov 42747c1dffd4SDmitry Baryshkov opp-345000000 { 42757c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 42767c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 42777c1dffd4SDmitry Baryshkov }; 42787c1dffd4SDmitry Baryshkov 42797c1dffd4SDmitry Baryshkov opp-460000000 { 42807c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 42817c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 42827c1dffd4SDmitry Baryshkov }; 42837c1dffd4SDmitry Baryshkov }; 42847c1dffd4SDmitry Baryshkov }; 42857c1dffd4SDmitry Baryshkov 4286e47a7f57SDmitry Baryshkov mdss_dsi0: dsi@ae94000 { 4287ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4288ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 42897c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 42907c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 42917c1dffd4SDmitry Baryshkov 42927c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4293be633329SDmitry Baryshkov interrupts = <4>; 42947c1dffd4SDmitry Baryshkov 42957c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 42967c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 42977c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 42987c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 42997c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 43007c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 43017c1dffd4SDmitry Baryshkov clock-names = "byte", 43027c1dffd4SDmitry Baryshkov "byte_intf", 43037c1dffd4SDmitry Baryshkov "pixel", 43047c1dffd4SDmitry Baryshkov "core", 43057c1dffd4SDmitry Baryshkov "iface", 43067c1dffd4SDmitry Baryshkov "bus"; 43077c1dffd4SDmitry Baryshkov 430897ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 4309e47a7f57SDmitry Baryshkov assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; 431097ec669dSDmitry Baryshkov 43117c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 43127c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 43137c1dffd4SDmitry Baryshkov 4314e47a7f57SDmitry Baryshkov phys = <&mdss_dsi0_phy>; 43157c1dffd4SDmitry Baryshkov 43167c1dffd4SDmitry Baryshkov status = "disabled"; 43177c1dffd4SDmitry Baryshkov 431840f7d36dSKonrad Dybcio #address-cells = <1>; 431940f7d36dSKonrad Dybcio #size-cells = <0>; 432040f7d36dSKonrad Dybcio 43217c1dffd4SDmitry Baryshkov ports { 43227c1dffd4SDmitry Baryshkov #address-cells = <1>; 43237c1dffd4SDmitry Baryshkov #size-cells = <0>; 43247c1dffd4SDmitry Baryshkov 43257c1dffd4SDmitry Baryshkov port@0 { 43267c1dffd4SDmitry Baryshkov reg = <0>; 4327e47a7f57SDmitry Baryshkov mdss_dsi0_in: endpoint { 43287c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 43297c1dffd4SDmitry Baryshkov }; 43307c1dffd4SDmitry Baryshkov }; 43317c1dffd4SDmitry Baryshkov 43327c1dffd4SDmitry Baryshkov port@1 { 43337c1dffd4SDmitry Baryshkov reg = <1>; 4334e47a7f57SDmitry Baryshkov mdss_dsi0_out: endpoint { 43357c1dffd4SDmitry Baryshkov }; 43367c1dffd4SDmitry Baryshkov }; 43377c1dffd4SDmitry Baryshkov }; 43389ea5ae62SDmitry Baryshkov 43399ea5ae62SDmitry Baryshkov dsi_opp_table: opp-table { 43409ea5ae62SDmitry Baryshkov compatible = "operating-points-v2"; 43419ea5ae62SDmitry Baryshkov 43429ea5ae62SDmitry Baryshkov opp-187500000 { 43439ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 43449ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 43459ea5ae62SDmitry Baryshkov }; 43469ea5ae62SDmitry Baryshkov 43479ea5ae62SDmitry Baryshkov opp-300000000 { 43489ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 43499ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 43509ea5ae62SDmitry Baryshkov }; 43519ea5ae62SDmitry Baryshkov 43529ea5ae62SDmitry Baryshkov opp-358000000 { 43539ea5ae62SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 43549ea5ae62SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 43559ea5ae62SDmitry Baryshkov }; 43569ea5ae62SDmitry Baryshkov }; 43577c1dffd4SDmitry Baryshkov }; 43587c1dffd4SDmitry Baryshkov 4359e47a7f57SDmitry Baryshkov mdss_dsi0_phy: phy@ae94400 { 43607c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 43617c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 43627c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 43637c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 43647c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 43657c1dffd4SDmitry Baryshkov "dsi_phy_lane", 43667c1dffd4SDmitry Baryshkov "dsi_pll"; 43677c1dffd4SDmitry Baryshkov 43687c1dffd4SDmitry Baryshkov #clock-cells = <1>; 43697c1dffd4SDmitry Baryshkov #phy-cells = <0>; 43707c1dffd4SDmitry Baryshkov 43717c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 43727c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 43737c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 43747c1dffd4SDmitry Baryshkov 43757c1dffd4SDmitry Baryshkov status = "disabled"; 43767c1dffd4SDmitry Baryshkov }; 43777c1dffd4SDmitry Baryshkov 4378e47a7f57SDmitry Baryshkov mdss_dsi1: dsi@ae96000 { 4379ff114e39SBryan O'Donoghue compatible = "qcom,sm8250-dsi-ctrl", 4380ff114e39SBryan O'Donoghue "qcom,mdss-dsi-ctrl"; 43817c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 43827c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 43837c1dffd4SDmitry Baryshkov 43847c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 4385be633329SDmitry Baryshkov interrupts = <5>; 43867c1dffd4SDmitry Baryshkov 43877c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 43887c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 43897c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 43907c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 43917c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 43927c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 43937c1dffd4SDmitry Baryshkov clock-names = "byte", 43947c1dffd4SDmitry Baryshkov "byte_intf", 43957c1dffd4SDmitry Baryshkov "pixel", 43967c1dffd4SDmitry Baryshkov "core", 43977c1dffd4SDmitry Baryshkov "iface", 43987c1dffd4SDmitry Baryshkov "bus"; 43997c1dffd4SDmitry Baryshkov 440097ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 4401e47a7f57SDmitry Baryshkov assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; 440297ec669dSDmitry Baryshkov 44037c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 44047c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 44057c1dffd4SDmitry Baryshkov 4406e47a7f57SDmitry Baryshkov phys = <&mdss_dsi1_phy>; 44077c1dffd4SDmitry Baryshkov 44087c1dffd4SDmitry Baryshkov status = "disabled"; 44097c1dffd4SDmitry Baryshkov 441040f7d36dSKonrad Dybcio #address-cells = <1>; 441140f7d36dSKonrad Dybcio #size-cells = <0>; 441240f7d36dSKonrad Dybcio 44137c1dffd4SDmitry Baryshkov ports { 44147c1dffd4SDmitry Baryshkov #address-cells = <1>; 44157c1dffd4SDmitry Baryshkov #size-cells = <0>; 44167c1dffd4SDmitry Baryshkov 44177c1dffd4SDmitry Baryshkov port@0 { 44187c1dffd4SDmitry Baryshkov reg = <0>; 4419e47a7f57SDmitry Baryshkov mdss_dsi1_in: endpoint { 44207c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 44217c1dffd4SDmitry Baryshkov }; 44227c1dffd4SDmitry Baryshkov }; 44237c1dffd4SDmitry Baryshkov 44247c1dffd4SDmitry Baryshkov port@1 { 44257c1dffd4SDmitry Baryshkov reg = <1>; 4426e47a7f57SDmitry Baryshkov mdss_dsi1_out: endpoint { 44277c1dffd4SDmitry Baryshkov }; 44287c1dffd4SDmitry Baryshkov }; 44297c1dffd4SDmitry Baryshkov }; 44307c1dffd4SDmitry Baryshkov }; 44317c1dffd4SDmitry Baryshkov 4432e47a7f57SDmitry Baryshkov mdss_dsi1_phy: phy@ae96400 { 44337c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 44347c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 44357c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 44367c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 44377c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 44387c1dffd4SDmitry Baryshkov "dsi_phy_lane", 44397c1dffd4SDmitry Baryshkov "dsi_pll"; 44407c1dffd4SDmitry Baryshkov 44417c1dffd4SDmitry Baryshkov #clock-cells = <1>; 44427c1dffd4SDmitry Baryshkov #phy-cells = <0>; 44437c1dffd4SDmitry Baryshkov 44447c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 44457c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 44467c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 44477c1dffd4SDmitry Baryshkov 44487c1dffd4SDmitry Baryshkov status = "disabled"; 44497c1dffd4SDmitry Baryshkov }; 44507c1dffd4SDmitry Baryshkov }; 44517c1dffd4SDmitry Baryshkov 44527c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 44537c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 4454888771a9SJonathan Marek reg = <0 0x0af00000 0 0x10000>; 4455266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 4456266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 44577c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 4458e47a7f57SDmitry Baryshkov <&mdss_dsi0_phy 0>, 4459e47a7f57SDmitry Baryshkov <&mdss_dsi0_phy 1>, 4460e47a7f57SDmitry Baryshkov <&mdss_dsi1_phy 0>, 4461e47a7f57SDmitry Baryshkov <&mdss_dsi1_phy 1>, 44629b315324SDmitry Baryshkov <&dp_phy 0>, 44639b315324SDmitry Baryshkov <&dp_phy 1>; 44647c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 44657c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 44667c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 44677c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 44687c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 4469888771a9SJonathan Marek "dp_phy_pll_link_clk", 4470888771a9SJonathan Marek "dp_phy_pll_vco_div_clk"; 44717c1dffd4SDmitry Baryshkov #clock-cells = <1>; 44727c1dffd4SDmitry Baryshkov #reset-cells = <1>; 44737c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 44747c1dffd4SDmitry Baryshkov }; 44757c1dffd4SDmitry Baryshkov 447660378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 447724003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 447824003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 447960378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 448060378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 448160378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 448260378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 448360378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 448460378f1aSVenkata Narendra Kumar Gutta }; 448560378f1aSVenkata Narendra Kumar Gutta 4486bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 4487bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4488bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 4489bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 4490bac12f25SAmit Kucheria #qcom,sensors = <16>; 4491bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 4492bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 4493bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4494bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4495bac12f25SAmit Kucheria }; 4496bac12f25SAmit Kucheria 4497bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 4498bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 4499bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 4500bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 4501bac12f25SAmit Kucheria #qcom,sensors = <9>; 4502bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 4503bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 4504bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 4505bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 4506bac12f25SAmit Kucheria }; 4507bac12f25SAmit Kucheria 4508bb99820dSKrzysztof Kozlowski aoss_qmp: power-management@c300000 { 45096ba93ba9SKrzysztof Kozlowski compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp"; 451047cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 4511087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 4512087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 4513087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 4514087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 4515087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 4516087d537aSBjorn Andersson 4517087d537aSBjorn Andersson #clock-cells = <0>; 4518087d537aSBjorn Andersson }; 4519087d537aSBjorn Andersson 452047cb6a06SMaulik Shah sram@c3f0000 { 452147cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 452247cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 452360378f1aSVenkata Narendra Kumar Gutta }; 452460378f1aSVenkata Narendra Kumar Gutta 452560378f1aSVenkata Narendra Kumar Gutta spmi_bus: spmi@c440000 { 452660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 452760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 452860378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 452916951b49SBjorn Andersson <0x0 0x0e600000 0x0 0x0100000>, 453016951b49SBjorn Andersson <0x0 0x0e700000 0x0 0x00a0000>, 453116951b49SBjorn Andersson <0x0 0x0c40a000 0x0 0x0026000>; 453216951b49SBjorn Andersson reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 453316951b49SBjorn Andersson interrupt-names = "periph_irq"; 453416951b49SBjorn Andersson interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 453516951b49SBjorn Andersson qcom,ee = <0>; 453616951b49SBjorn Andersson qcom,channel = <0>; 453716951b49SBjorn Andersson #address-cells = <2>; 453816951b49SBjorn Andersson #size-cells = <0>; 453916951b49SBjorn Andersson interrupt-controller; 454016951b49SBjorn Andersson #interrupt-cells = <4>; 454116951b49SBjorn Andersson }; 4542e5813b15SDmitry Baryshkov 4543e5813b15SDmitry Baryshkov tlmm: pinctrl@f100000 { 4544e5813b15SDmitry Baryshkov compatible = "qcom,sm8250-pinctrl"; 4545e5813b15SDmitry Baryshkov reg = <0 0x0f100000 0 0x300000>, 4546e5813b15SDmitry Baryshkov <0 0x0f500000 0 0x300000>, 4547e5813b15SDmitry Baryshkov <0 0x0f900000 0 0x300000>; 4548e5813b15SDmitry Baryshkov reg-names = "west", "south", "north"; 4549e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 4550e5813b15SDmitry Baryshkov gpio-controller; 4551e5813b15SDmitry Baryshkov #gpio-cells = <2>; 4552e5813b15SDmitry Baryshkov interrupt-controller; 4553e5813b15SDmitry Baryshkov #interrupt-cells = <2>; 4554e526cb03SShawn Guo gpio-ranges = <&tlmm 0 0 181>; 455516951b49SBjorn Andersson wakeup-parent = <&pdc>; 4556e5813b15SDmitry Baryshkov 455716b24fe5SBryan O'Donoghue cam2_default: cam2-default-state { 455816b24fe5SBryan O'Donoghue rst-pins { 455916b24fe5SBryan O'Donoghue pins = "gpio78"; 456016b24fe5SBryan O'Donoghue function = "gpio"; 456116b24fe5SBryan O'Donoghue drive-strength = <2>; 456216b24fe5SBryan O'Donoghue bias-disable; 456316b24fe5SBryan O'Donoghue }; 456416b24fe5SBryan O'Donoghue 456516b24fe5SBryan O'Donoghue mclk-pins { 456616b24fe5SBryan O'Donoghue pins = "gpio96"; 456716b24fe5SBryan O'Donoghue function = "cam_mclk"; 456816b24fe5SBryan O'Donoghue drive-strength = <16>; 456916b24fe5SBryan O'Donoghue bias-disable; 457016b24fe5SBryan O'Donoghue }; 457116b24fe5SBryan O'Donoghue }; 457216b24fe5SBryan O'Donoghue 457316b24fe5SBryan O'Donoghue cam2_suspend: cam2-suspend-state { 457416b24fe5SBryan O'Donoghue rst-pins { 457516b24fe5SBryan O'Donoghue pins = "gpio78"; 457616b24fe5SBryan O'Donoghue function = "gpio"; 457716b24fe5SBryan O'Donoghue drive-strength = <2>; 457816b24fe5SBryan O'Donoghue bias-pull-down; 457916b24fe5SBryan O'Donoghue output-low; 458016b24fe5SBryan O'Donoghue }; 458116b24fe5SBryan O'Donoghue 458216b24fe5SBryan O'Donoghue mclk-pins { 458316b24fe5SBryan O'Donoghue pins = "gpio96"; 458416b24fe5SBryan O'Donoghue function = "cam_mclk"; 458516b24fe5SBryan O'Donoghue drive-strength = <2>; 458616b24fe5SBryan O'Donoghue bias-disable; 458716b24fe5SBryan O'Donoghue }; 458816b24fe5SBryan O'Donoghue }; 458916b24fe5SBryan O'Donoghue 4590f7636174SKrzysztof Kozlowski cci0_default: cci0-default-state { 4591f7636174SKrzysztof Kozlowski cci0_i2c0_default: cci0-i2c0-default-pins { 4592e7173009SBryan O'Donoghue /* SDA, SCL */ 4593e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4594e7173009SBryan O'Donoghue function = "cci_i2c"; 4595e7173009SBryan O'Donoghue 4596e7173009SBryan O'Donoghue bias-pull-up; 4597e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4598e7173009SBryan O'Donoghue }; 4599e7173009SBryan O'Donoghue 4600f7636174SKrzysztof Kozlowski cci0_i2c1_default: cci0-i2c1-default-pins { 4601e7173009SBryan O'Donoghue /* SDA, SCL */ 4602e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4603e7173009SBryan O'Donoghue function = "cci_i2c"; 4604e7173009SBryan O'Donoghue 4605e7173009SBryan O'Donoghue bias-pull-up; 4606e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4607e7173009SBryan O'Donoghue }; 4608e7173009SBryan O'Donoghue }; 4609e7173009SBryan O'Donoghue 4610f7636174SKrzysztof Kozlowski cci0_sleep: cci0-sleep-state { 4611f7636174SKrzysztof Kozlowski cci0_i2c0_sleep: cci0-i2c0-sleep-pins { 4612e7173009SBryan O'Donoghue /* SDA, SCL */ 4613e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 4614e7173009SBryan O'Donoghue function = "cci_i2c"; 4615e7173009SBryan O'Donoghue 4616e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4617e7173009SBryan O'Donoghue bias-pull-down; 4618e7173009SBryan O'Donoghue }; 4619e7173009SBryan O'Donoghue 4620f7636174SKrzysztof Kozlowski cci0_i2c1_sleep: cci0-i2c1-sleep-pins { 4621e7173009SBryan O'Donoghue /* SDA, SCL */ 4622e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 4623e7173009SBryan O'Donoghue function = "cci_i2c"; 4624e7173009SBryan O'Donoghue 4625e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4626e7173009SBryan O'Donoghue bias-pull-down; 4627e7173009SBryan O'Donoghue }; 4628e7173009SBryan O'Donoghue }; 4629e7173009SBryan O'Donoghue 4630f7636174SKrzysztof Kozlowski cci1_default: cci1-default-state { 4631f7636174SKrzysztof Kozlowski cci1_i2c0_default: cci1-i2c0-default-pins { 4632e7173009SBryan O'Donoghue /* SDA, SCL */ 4633e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4634e7173009SBryan O'Donoghue function = "cci_i2c"; 4635e7173009SBryan O'Donoghue 4636e7173009SBryan O'Donoghue bias-pull-up; 4637e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4638e7173009SBryan O'Donoghue }; 4639e7173009SBryan O'Donoghue 4640f7636174SKrzysztof Kozlowski cci1_i2c1_default: cci1-i2c1-default-pins { 4641e7173009SBryan O'Donoghue /* SDA, SCL */ 4642e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4643e7173009SBryan O'Donoghue function = "cci_i2c"; 4644e7173009SBryan O'Donoghue 4645e7173009SBryan O'Donoghue bias-pull-up; 4646e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4647e7173009SBryan O'Donoghue }; 4648e7173009SBryan O'Donoghue }; 4649e7173009SBryan O'Donoghue 4650f7636174SKrzysztof Kozlowski cci1_sleep: cci1-sleep-state { 4651f7636174SKrzysztof Kozlowski cci1_i2c0_sleep: cci1-i2c0-sleep-pins { 4652e7173009SBryan O'Donoghue /* SDA, SCL */ 4653e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 4654e7173009SBryan O'Donoghue function = "cci_i2c"; 4655e7173009SBryan O'Donoghue 4656e7173009SBryan O'Donoghue bias-pull-down; 4657e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4658e7173009SBryan O'Donoghue }; 4659e7173009SBryan O'Donoghue 4660f7636174SKrzysztof Kozlowski cci1_i2c1_sleep: cci1-i2c1-sleep-pins { 4661e7173009SBryan O'Donoghue /* SDA, SCL */ 4662e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 4663e7173009SBryan O'Donoghue function = "cci_i2c"; 4664e7173009SBryan O'Donoghue 4665e7173009SBryan O'Donoghue bias-pull-down; 4666e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 4667e7173009SBryan O'Donoghue }; 4668e7173009SBryan O'Donoghue }; 4669e7173009SBryan O'Donoghue 4670f7636174SKrzysztof Kozlowski pri_mi2s_active: pri-mi2s-active-state { 4671f7636174SKrzysztof Kozlowski sclk-pins { 4672b657d372SSrinivas Kandagatla pins = "gpio138"; 4673b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 4674b657d372SSrinivas Kandagatla drive-strength = <8>; 4675b657d372SSrinivas Kandagatla bias-disable; 4676b657d372SSrinivas Kandagatla }; 4677b657d372SSrinivas Kandagatla 4678f7636174SKrzysztof Kozlowski ws-pins { 4679b657d372SSrinivas Kandagatla pins = "gpio141"; 4680b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 4681b657d372SSrinivas Kandagatla drive-strength = <8>; 4682b657d372SSrinivas Kandagatla output-high; 4683b657d372SSrinivas Kandagatla }; 4684b657d372SSrinivas Kandagatla 4685f7636174SKrzysztof Kozlowski data0-pins { 4686b657d372SSrinivas Kandagatla pins = "gpio139"; 4687b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 4688b657d372SSrinivas Kandagatla drive-strength = <8>; 4689b657d372SSrinivas Kandagatla bias-disable; 4690b657d372SSrinivas Kandagatla output-high; 4691b657d372SSrinivas Kandagatla }; 4692b657d372SSrinivas Kandagatla 4693f7636174SKrzysztof Kozlowski data1-pins { 4694b657d372SSrinivas Kandagatla pins = "gpio140"; 4695b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 4696b657d372SSrinivas Kandagatla drive-strength = <8>; 4697b657d372SSrinivas Kandagatla output-high; 4698b657d372SSrinivas Kandagatla }; 4699b657d372SSrinivas Kandagatla }; 4700b657d372SSrinivas Kandagatla 4701f7636174SKrzysztof Kozlowski qup_i2c0_default: qup-i2c0-default-state { 4702e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 4703e5813b15SDmitry Baryshkov function = "qup0"; 4704e5813b15SDmitry Baryshkov drive-strength = <2>; 4705e5813b15SDmitry Baryshkov bias-disable; 4706e5813b15SDmitry Baryshkov }; 4707e5813b15SDmitry Baryshkov 4708f7636174SKrzysztof Kozlowski qup_i2c1_default: qup-i2c1-default-state { 4709e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 4710e5813b15SDmitry Baryshkov function = "qup1"; 4711e5813b15SDmitry Baryshkov drive-strength = <2>; 4712e5813b15SDmitry Baryshkov bias-disable; 4713e5813b15SDmitry Baryshkov }; 4714e5813b15SDmitry Baryshkov 4715f7636174SKrzysztof Kozlowski qup_i2c2_default: qup-i2c2-default-state { 4716e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 4717e5813b15SDmitry Baryshkov function = "qup2"; 4718e5813b15SDmitry Baryshkov drive-strength = <2>; 4719e5813b15SDmitry Baryshkov bias-disable; 4720e5813b15SDmitry Baryshkov }; 4721e5813b15SDmitry Baryshkov 4722f7636174SKrzysztof Kozlowski qup_i2c3_default: qup-i2c3-default-state { 4723e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 4724e5813b15SDmitry Baryshkov function = "qup3"; 4725e5813b15SDmitry Baryshkov drive-strength = <2>; 4726e5813b15SDmitry Baryshkov bias-disable; 4727e5813b15SDmitry Baryshkov }; 4728e5813b15SDmitry Baryshkov 4729f7636174SKrzysztof Kozlowski qup_i2c4_default: qup-i2c4-default-state { 4730e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 4731e5813b15SDmitry Baryshkov function = "qup4"; 4732e5813b15SDmitry Baryshkov drive-strength = <2>; 4733e5813b15SDmitry Baryshkov bias-disable; 4734e5813b15SDmitry Baryshkov }; 4735e5813b15SDmitry Baryshkov 4736f7636174SKrzysztof Kozlowski qup_i2c5_default: qup-i2c5-default-state { 4737e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 4738e5813b15SDmitry Baryshkov function = "qup5"; 4739e5813b15SDmitry Baryshkov drive-strength = <2>; 4740e5813b15SDmitry Baryshkov bias-disable; 4741e5813b15SDmitry Baryshkov }; 4742e5813b15SDmitry Baryshkov 4743f7636174SKrzysztof Kozlowski qup_i2c6_default: qup-i2c6-default-state { 4744e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 4745e5813b15SDmitry Baryshkov function = "qup6"; 4746e5813b15SDmitry Baryshkov drive-strength = <2>; 4747e5813b15SDmitry Baryshkov bias-disable; 4748e5813b15SDmitry Baryshkov }; 4749e5813b15SDmitry Baryshkov 4750f7636174SKrzysztof Kozlowski qup_i2c7_default: qup-i2c7-default-state { 4751e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 4752e5813b15SDmitry Baryshkov function = "qup7"; 4753e5813b15SDmitry Baryshkov drive-strength = <2>; 4754e5813b15SDmitry Baryshkov bias-disable; 4755e5813b15SDmitry Baryshkov }; 4756e5813b15SDmitry Baryshkov 4757f7636174SKrzysztof Kozlowski qup_i2c8_default: qup-i2c8-default-state { 4758e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 4759e5813b15SDmitry Baryshkov function = "qup8"; 4760e5813b15SDmitry Baryshkov drive-strength = <2>; 4761e5813b15SDmitry Baryshkov bias-disable; 4762e5813b15SDmitry Baryshkov }; 4763e5813b15SDmitry Baryshkov 4764f7636174SKrzysztof Kozlowski qup_i2c9_default: qup-i2c9-default-state { 4765e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 4766e5813b15SDmitry Baryshkov function = "qup9"; 4767e5813b15SDmitry Baryshkov drive-strength = <2>; 4768e5813b15SDmitry Baryshkov bias-disable; 4769e5813b15SDmitry Baryshkov }; 4770e5813b15SDmitry Baryshkov 4771f7636174SKrzysztof Kozlowski qup_i2c10_default: qup-i2c10-default-state { 4772e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 4773e5813b15SDmitry Baryshkov function = "qup10"; 4774e5813b15SDmitry Baryshkov drive-strength = <2>; 4775e5813b15SDmitry Baryshkov bias-disable; 4776e5813b15SDmitry Baryshkov }; 4777e5813b15SDmitry Baryshkov 4778f7636174SKrzysztof Kozlowski qup_i2c11_default: qup-i2c11-default-state { 4779e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 4780e5813b15SDmitry Baryshkov function = "qup11"; 4781e5813b15SDmitry Baryshkov drive-strength = <2>; 4782e5813b15SDmitry Baryshkov bias-disable; 4783e5813b15SDmitry Baryshkov }; 4784e5813b15SDmitry Baryshkov 4785f7636174SKrzysztof Kozlowski qup_i2c12_default: qup-i2c12-default-state { 4786e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 4787e5813b15SDmitry Baryshkov function = "qup12"; 4788e5813b15SDmitry Baryshkov drive-strength = <2>; 4789e5813b15SDmitry Baryshkov bias-disable; 4790e5813b15SDmitry Baryshkov }; 4791e5813b15SDmitry Baryshkov 4792f7636174SKrzysztof Kozlowski qup_i2c13_default: qup-i2c13-default-state { 4793e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 4794e5813b15SDmitry Baryshkov function = "qup13"; 4795e5813b15SDmitry Baryshkov drive-strength = <2>; 4796e5813b15SDmitry Baryshkov bias-disable; 4797e5813b15SDmitry Baryshkov }; 4798e5813b15SDmitry Baryshkov 4799f7636174SKrzysztof Kozlowski qup_i2c14_default: qup-i2c14-default-state { 4800e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 4801e5813b15SDmitry Baryshkov function = "qup14"; 4802e5813b15SDmitry Baryshkov drive-strength = <2>; 4803e5813b15SDmitry Baryshkov bias-disable; 4804e5813b15SDmitry Baryshkov }; 4805e5813b15SDmitry Baryshkov 4806f7636174SKrzysztof Kozlowski qup_i2c15_default: qup-i2c15-default-state { 4807e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 4808e5813b15SDmitry Baryshkov function = "qup15"; 4809e5813b15SDmitry Baryshkov drive-strength = <2>; 4810e5813b15SDmitry Baryshkov bias-disable; 4811e5813b15SDmitry Baryshkov }; 4812e5813b15SDmitry Baryshkov 4813f7636174SKrzysztof Kozlowski qup_i2c16_default: qup-i2c16-default-state { 4814e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 4815e5813b15SDmitry Baryshkov function = "qup16"; 4816e5813b15SDmitry Baryshkov drive-strength = <2>; 4817e5813b15SDmitry Baryshkov bias-disable; 4818e5813b15SDmitry Baryshkov }; 4819e5813b15SDmitry Baryshkov 4820f7636174SKrzysztof Kozlowski qup_i2c17_default: qup-i2c17-default-state { 4821e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 4822e5813b15SDmitry Baryshkov function = "qup17"; 4823e5813b15SDmitry Baryshkov drive-strength = <2>; 4824e5813b15SDmitry Baryshkov bias-disable; 4825e5813b15SDmitry Baryshkov }; 4826e5813b15SDmitry Baryshkov 4827f7636174SKrzysztof Kozlowski qup_i2c18_default: qup-i2c18-default-state { 4828e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 4829e5813b15SDmitry Baryshkov function = "qup18"; 4830e5813b15SDmitry Baryshkov drive-strength = <2>; 4831e5813b15SDmitry Baryshkov bias-disable; 4832e5813b15SDmitry Baryshkov }; 4833e5813b15SDmitry Baryshkov 4834f7636174SKrzysztof Kozlowski qup_i2c19_default: qup-i2c19-default-state { 4835e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 4836e5813b15SDmitry Baryshkov function = "qup19"; 4837e5813b15SDmitry Baryshkov drive-strength = <2>; 4838e5813b15SDmitry Baryshkov bias-disable; 4839e5813b15SDmitry Baryshkov }; 4840e5813b15SDmitry Baryshkov 4841f7636174SKrzysztof Kozlowski qup_spi0_cs: qup-spi0-cs-state { 4842c88f9eccSDmitry Baryshkov pins = "gpio31"; 4843e5813b15SDmitry Baryshkov function = "qup0"; 4844e5813b15SDmitry Baryshkov }; 4845e5813b15SDmitry Baryshkov 4846f7636174SKrzysztof Kozlowski qup_spi0_cs_gpio: qup-spi0-cs-gpio-state { 4847eb97ccbbSDmitry Baryshkov pins = "gpio31"; 4848eb97ccbbSDmitry Baryshkov function = "gpio"; 4849eb97ccbbSDmitry Baryshkov }; 4850eb97ccbbSDmitry Baryshkov 4851f7636174SKrzysztof Kozlowski qup_spi0_data_clk: qup-spi0-data-clk-state { 4852c88f9eccSDmitry Baryshkov pins = "gpio28", "gpio29", 4853c88f9eccSDmitry Baryshkov "gpio30"; 4854c88f9eccSDmitry Baryshkov function = "qup0"; 4855c88f9eccSDmitry Baryshkov }; 4856c88f9eccSDmitry Baryshkov 4857f7636174SKrzysztof Kozlowski qup_spi1_cs: qup-spi1-cs-state { 4858c88f9eccSDmitry Baryshkov pins = "gpio7"; 4859e5813b15SDmitry Baryshkov function = "qup1"; 4860e5813b15SDmitry Baryshkov }; 4861e5813b15SDmitry Baryshkov 4862f7636174SKrzysztof Kozlowski qup_spi1_cs_gpio: qup-spi1-cs-gpio-state { 4863eb97ccbbSDmitry Baryshkov pins = "gpio7"; 4864eb97ccbbSDmitry Baryshkov function = "gpio"; 4865eb97ccbbSDmitry Baryshkov }; 4866eb97ccbbSDmitry Baryshkov 4867f7636174SKrzysztof Kozlowski qup_spi1_data_clk: qup-spi1-data-clk-state { 4868c88f9eccSDmitry Baryshkov pins = "gpio4", "gpio5", 4869c88f9eccSDmitry Baryshkov "gpio6"; 4870c88f9eccSDmitry Baryshkov function = "qup1"; 4871c88f9eccSDmitry Baryshkov }; 4872c88f9eccSDmitry Baryshkov 4873f7636174SKrzysztof Kozlowski qup_spi2_cs: qup-spi2-cs-state { 4874c88f9eccSDmitry Baryshkov pins = "gpio118"; 4875e5813b15SDmitry Baryshkov function = "qup2"; 4876e5813b15SDmitry Baryshkov }; 4877e5813b15SDmitry Baryshkov 4878f7636174SKrzysztof Kozlowski qup_spi2_cs_gpio: qup-spi2-cs-gpio-state { 4879eb97ccbbSDmitry Baryshkov pins = "gpio118"; 4880eb97ccbbSDmitry Baryshkov function = "gpio"; 4881eb97ccbbSDmitry Baryshkov }; 4882eb97ccbbSDmitry Baryshkov 4883f7636174SKrzysztof Kozlowski qup_spi2_data_clk: qup-spi2-data-clk-state { 4884c88f9eccSDmitry Baryshkov pins = "gpio115", "gpio116", 4885c88f9eccSDmitry Baryshkov "gpio117"; 4886c88f9eccSDmitry Baryshkov function = "qup2"; 4887c88f9eccSDmitry Baryshkov }; 4888c88f9eccSDmitry Baryshkov 4889f7636174SKrzysztof Kozlowski qup_spi3_cs: qup-spi3-cs-state { 4890c88f9eccSDmitry Baryshkov pins = "gpio122"; 4891e5813b15SDmitry Baryshkov function = "qup3"; 4892e5813b15SDmitry Baryshkov }; 4893e5813b15SDmitry Baryshkov 4894f7636174SKrzysztof Kozlowski qup_spi3_cs_gpio: qup-spi3-cs-gpio-state { 4895eb97ccbbSDmitry Baryshkov pins = "gpio122"; 4896eb97ccbbSDmitry Baryshkov function = "gpio"; 4897eb97ccbbSDmitry Baryshkov }; 4898eb97ccbbSDmitry Baryshkov 4899f7636174SKrzysztof Kozlowski qup_spi3_data_clk: qup-spi3-data-clk-state { 4900c88f9eccSDmitry Baryshkov pins = "gpio119", "gpio120", 4901c88f9eccSDmitry Baryshkov "gpio121"; 4902c88f9eccSDmitry Baryshkov function = "qup3"; 4903c88f9eccSDmitry Baryshkov }; 4904c88f9eccSDmitry Baryshkov 4905f7636174SKrzysztof Kozlowski qup_spi4_cs: qup-spi4-cs-state { 4906c88f9eccSDmitry Baryshkov pins = "gpio11"; 4907e5813b15SDmitry Baryshkov function = "qup4"; 4908e5813b15SDmitry Baryshkov }; 4909e5813b15SDmitry Baryshkov 4910f7636174SKrzysztof Kozlowski qup_spi4_cs_gpio: qup-spi4-cs-gpio-state { 4911eb97ccbbSDmitry Baryshkov pins = "gpio11"; 4912eb97ccbbSDmitry Baryshkov function = "gpio"; 4913eb97ccbbSDmitry Baryshkov }; 4914eb97ccbbSDmitry Baryshkov 4915f7636174SKrzysztof Kozlowski qup_spi4_data_clk: qup-spi4-data-clk-state { 4916c88f9eccSDmitry Baryshkov pins = "gpio8", "gpio9", 4917c88f9eccSDmitry Baryshkov "gpio10"; 4918c88f9eccSDmitry Baryshkov function = "qup4"; 4919c88f9eccSDmitry Baryshkov }; 4920c88f9eccSDmitry Baryshkov 4921f7636174SKrzysztof Kozlowski qup_spi5_cs: qup-spi5-cs-state { 4922c88f9eccSDmitry Baryshkov pins = "gpio15"; 4923e5813b15SDmitry Baryshkov function = "qup5"; 4924e5813b15SDmitry Baryshkov }; 4925e5813b15SDmitry Baryshkov 4926f7636174SKrzysztof Kozlowski qup_spi5_cs_gpio: qup-spi5-cs-gpio-state { 4927eb97ccbbSDmitry Baryshkov pins = "gpio15"; 4928eb97ccbbSDmitry Baryshkov function = "gpio"; 4929eb97ccbbSDmitry Baryshkov }; 4930eb97ccbbSDmitry Baryshkov 4931f7636174SKrzysztof Kozlowski qup_spi5_data_clk: qup-spi5-data-clk-state { 4932c88f9eccSDmitry Baryshkov pins = "gpio12", "gpio13", 4933c88f9eccSDmitry Baryshkov "gpio14"; 4934c88f9eccSDmitry Baryshkov function = "qup5"; 4935c88f9eccSDmitry Baryshkov }; 4936c88f9eccSDmitry Baryshkov 4937f7636174SKrzysztof Kozlowski qup_spi6_cs: qup-spi6-cs-state { 4938c88f9eccSDmitry Baryshkov pins = "gpio19"; 4939e5813b15SDmitry Baryshkov function = "qup6"; 4940e5813b15SDmitry Baryshkov }; 4941e5813b15SDmitry Baryshkov 4942f7636174SKrzysztof Kozlowski qup_spi6_cs_gpio: qup-spi6-cs-gpio-state { 4943eb97ccbbSDmitry Baryshkov pins = "gpio19"; 4944eb97ccbbSDmitry Baryshkov function = "gpio"; 4945eb97ccbbSDmitry Baryshkov }; 4946eb97ccbbSDmitry Baryshkov 4947f7636174SKrzysztof Kozlowski qup_spi6_data_clk: qup-spi6-data-clk-state { 4948c88f9eccSDmitry Baryshkov pins = "gpio16", "gpio17", 4949c88f9eccSDmitry Baryshkov "gpio18"; 4950c88f9eccSDmitry Baryshkov function = "qup6"; 4951c88f9eccSDmitry Baryshkov }; 4952c88f9eccSDmitry Baryshkov 4953f7636174SKrzysztof Kozlowski qup_spi7_cs: qup-spi7-cs-state { 4954c88f9eccSDmitry Baryshkov pins = "gpio23"; 4955e5813b15SDmitry Baryshkov function = "qup7"; 4956e5813b15SDmitry Baryshkov }; 4957e5813b15SDmitry Baryshkov 4958f7636174SKrzysztof Kozlowski qup_spi7_cs_gpio: qup-spi7-cs-gpio-state { 4959eb97ccbbSDmitry Baryshkov pins = "gpio23"; 4960eb97ccbbSDmitry Baryshkov function = "gpio"; 4961eb97ccbbSDmitry Baryshkov }; 4962eb97ccbbSDmitry Baryshkov 4963f7636174SKrzysztof Kozlowski qup_spi7_data_clk: qup-spi7-data-clk-state { 4964c88f9eccSDmitry Baryshkov pins = "gpio20", "gpio21", 4965c88f9eccSDmitry Baryshkov "gpio22"; 4966c88f9eccSDmitry Baryshkov function = "qup7"; 4967c88f9eccSDmitry Baryshkov }; 4968c88f9eccSDmitry Baryshkov 4969f7636174SKrzysztof Kozlowski qup_spi8_cs: qup-spi8-cs-state { 4970c88f9eccSDmitry Baryshkov pins = "gpio27"; 4971e5813b15SDmitry Baryshkov function = "qup8"; 4972e5813b15SDmitry Baryshkov }; 4973e5813b15SDmitry Baryshkov 4974f7636174SKrzysztof Kozlowski qup_spi8_cs_gpio: qup-spi8-cs-gpio-state { 4975eb97ccbbSDmitry Baryshkov pins = "gpio27"; 4976eb97ccbbSDmitry Baryshkov function = "gpio"; 4977eb97ccbbSDmitry Baryshkov }; 4978eb97ccbbSDmitry Baryshkov 4979f7636174SKrzysztof Kozlowski qup_spi8_data_clk: qup-spi8-data-clk-state { 4980c88f9eccSDmitry Baryshkov pins = "gpio24", "gpio25", 4981c88f9eccSDmitry Baryshkov "gpio26"; 4982c88f9eccSDmitry Baryshkov function = "qup8"; 4983c88f9eccSDmitry Baryshkov }; 4984c88f9eccSDmitry Baryshkov 4985f7636174SKrzysztof Kozlowski qup_spi9_cs: qup-spi9-cs-state { 4986c88f9eccSDmitry Baryshkov pins = "gpio128"; 4987e5813b15SDmitry Baryshkov function = "qup9"; 4988e5813b15SDmitry Baryshkov }; 4989e5813b15SDmitry Baryshkov 4990f7636174SKrzysztof Kozlowski qup_spi9_cs_gpio: qup-spi9-cs-gpio-state { 4991eb97ccbbSDmitry Baryshkov pins = "gpio128"; 4992eb97ccbbSDmitry Baryshkov function = "gpio"; 4993eb97ccbbSDmitry Baryshkov }; 4994eb97ccbbSDmitry Baryshkov 4995f7636174SKrzysztof Kozlowski qup_spi9_data_clk: qup-spi9-data-clk-state { 4996c88f9eccSDmitry Baryshkov pins = "gpio125", "gpio126", 4997c88f9eccSDmitry Baryshkov "gpio127"; 4998c88f9eccSDmitry Baryshkov function = "qup9"; 4999c88f9eccSDmitry Baryshkov }; 5000c88f9eccSDmitry Baryshkov 5001f7636174SKrzysztof Kozlowski qup_spi10_cs: qup-spi10-cs-state { 5002c88f9eccSDmitry Baryshkov pins = "gpio132"; 5003e5813b15SDmitry Baryshkov function = "qup10"; 5004e5813b15SDmitry Baryshkov }; 5005e5813b15SDmitry Baryshkov 5006f7636174SKrzysztof Kozlowski qup_spi10_cs_gpio: qup-spi10-cs-gpio-state { 5007eb97ccbbSDmitry Baryshkov pins = "gpio132"; 5008eb97ccbbSDmitry Baryshkov function = "gpio"; 5009eb97ccbbSDmitry Baryshkov }; 5010eb97ccbbSDmitry Baryshkov 5011f7636174SKrzysztof Kozlowski qup_spi10_data_clk: qup-spi10-data-clk-state { 5012c88f9eccSDmitry Baryshkov pins = "gpio129", "gpio130", 5013c88f9eccSDmitry Baryshkov "gpio131"; 5014c88f9eccSDmitry Baryshkov function = "qup10"; 5015c88f9eccSDmitry Baryshkov }; 5016c88f9eccSDmitry Baryshkov 5017f7636174SKrzysztof Kozlowski qup_spi11_cs: qup-spi11-cs-state { 5018c88f9eccSDmitry Baryshkov pins = "gpio63"; 5019e5813b15SDmitry Baryshkov function = "qup11"; 5020e5813b15SDmitry Baryshkov }; 5021e5813b15SDmitry Baryshkov 5022f7636174SKrzysztof Kozlowski qup_spi11_cs_gpio: qup-spi11-cs-gpio-state { 5023eb97ccbbSDmitry Baryshkov pins = "gpio63"; 5024eb97ccbbSDmitry Baryshkov function = "gpio"; 5025eb97ccbbSDmitry Baryshkov }; 5026eb97ccbbSDmitry Baryshkov 5027f7636174SKrzysztof Kozlowski qup_spi11_data_clk: qup-spi11-data-clk-state { 5028c88f9eccSDmitry Baryshkov pins = "gpio60", "gpio61", 5029c88f9eccSDmitry Baryshkov "gpio62"; 5030c88f9eccSDmitry Baryshkov function = "qup11"; 5031c88f9eccSDmitry Baryshkov }; 5032c88f9eccSDmitry Baryshkov 5033f7636174SKrzysztof Kozlowski qup_spi12_cs: qup-spi12-cs-state { 5034c88f9eccSDmitry Baryshkov pins = "gpio35"; 5035e5813b15SDmitry Baryshkov function = "qup12"; 5036e5813b15SDmitry Baryshkov }; 5037e5813b15SDmitry Baryshkov 5038f7636174SKrzysztof Kozlowski qup_spi12_cs_gpio: qup-spi12-cs-gpio-state { 5039eb97ccbbSDmitry Baryshkov pins = "gpio35"; 5040eb97ccbbSDmitry Baryshkov function = "gpio"; 5041eb97ccbbSDmitry Baryshkov }; 5042eb97ccbbSDmitry Baryshkov 5043f7636174SKrzysztof Kozlowski qup_spi12_data_clk: qup-spi12-data-clk-state { 5044c88f9eccSDmitry Baryshkov pins = "gpio32", "gpio33", 5045c88f9eccSDmitry Baryshkov "gpio34"; 5046c88f9eccSDmitry Baryshkov function = "qup12"; 5047c88f9eccSDmitry Baryshkov }; 5048c88f9eccSDmitry Baryshkov 5049f7636174SKrzysztof Kozlowski qup_spi13_cs: qup-spi13-cs-state { 5050c88f9eccSDmitry Baryshkov pins = "gpio39"; 5051e5813b15SDmitry Baryshkov function = "qup13"; 5052e5813b15SDmitry Baryshkov }; 5053e5813b15SDmitry Baryshkov 5054f7636174SKrzysztof Kozlowski qup_spi13_cs_gpio: qup-spi13-cs-gpio-state { 5055eb97ccbbSDmitry Baryshkov pins = "gpio39"; 5056eb97ccbbSDmitry Baryshkov function = "gpio"; 5057eb97ccbbSDmitry Baryshkov }; 5058eb97ccbbSDmitry Baryshkov 5059f7636174SKrzysztof Kozlowski qup_spi13_data_clk: qup-spi13-data-clk-state { 5060c88f9eccSDmitry Baryshkov pins = "gpio36", "gpio37", 5061c88f9eccSDmitry Baryshkov "gpio38"; 5062c88f9eccSDmitry Baryshkov function = "qup13"; 5063c88f9eccSDmitry Baryshkov }; 5064c88f9eccSDmitry Baryshkov 5065f7636174SKrzysztof Kozlowski qup_spi14_cs: qup-spi14-cs-state { 5066c88f9eccSDmitry Baryshkov pins = "gpio43"; 5067e5813b15SDmitry Baryshkov function = "qup14"; 5068e5813b15SDmitry Baryshkov }; 5069e5813b15SDmitry Baryshkov 5070f7636174SKrzysztof Kozlowski qup_spi14_cs_gpio: qup-spi14-cs-gpio-state { 5071eb97ccbbSDmitry Baryshkov pins = "gpio43"; 5072eb97ccbbSDmitry Baryshkov function = "gpio"; 5073eb97ccbbSDmitry Baryshkov }; 5074eb97ccbbSDmitry Baryshkov 5075f7636174SKrzysztof Kozlowski qup_spi14_data_clk: qup-spi14-data-clk-state { 5076c88f9eccSDmitry Baryshkov pins = "gpio40", "gpio41", 5077c88f9eccSDmitry Baryshkov "gpio42"; 5078c88f9eccSDmitry Baryshkov function = "qup14"; 5079c88f9eccSDmitry Baryshkov }; 5080c88f9eccSDmitry Baryshkov 5081f7636174SKrzysztof Kozlowski qup_spi15_cs: qup-spi15-cs-state { 5082c88f9eccSDmitry Baryshkov pins = "gpio47"; 5083e5813b15SDmitry Baryshkov function = "qup15"; 5084e5813b15SDmitry Baryshkov }; 5085e5813b15SDmitry Baryshkov 5086f7636174SKrzysztof Kozlowski qup_spi15_cs_gpio: qup-spi15-cs-gpio-state { 5087eb97ccbbSDmitry Baryshkov pins = "gpio47"; 5088eb97ccbbSDmitry Baryshkov function = "gpio"; 5089eb97ccbbSDmitry Baryshkov }; 5090eb97ccbbSDmitry Baryshkov 5091f7636174SKrzysztof Kozlowski qup_spi15_data_clk: qup-spi15-data-clk-state { 5092c88f9eccSDmitry Baryshkov pins = "gpio44", "gpio45", 5093c88f9eccSDmitry Baryshkov "gpio46"; 5094c88f9eccSDmitry Baryshkov function = "qup15"; 5095c88f9eccSDmitry Baryshkov }; 5096c88f9eccSDmitry Baryshkov 5097f7636174SKrzysztof Kozlowski qup_spi16_cs: qup-spi16-cs-state { 5098c88f9eccSDmitry Baryshkov pins = "gpio51"; 5099e5813b15SDmitry Baryshkov function = "qup16"; 5100e5813b15SDmitry Baryshkov }; 5101e5813b15SDmitry Baryshkov 5102f7636174SKrzysztof Kozlowski qup_spi16_cs_gpio: qup-spi16-cs-gpio-state { 5103eb97ccbbSDmitry Baryshkov pins = "gpio51"; 5104eb97ccbbSDmitry Baryshkov function = "gpio"; 5105eb97ccbbSDmitry Baryshkov }; 5106eb97ccbbSDmitry Baryshkov 5107f7636174SKrzysztof Kozlowski qup_spi16_data_clk: qup-spi16-data-clk-state { 5108c88f9eccSDmitry Baryshkov pins = "gpio48", "gpio49", 5109c88f9eccSDmitry Baryshkov "gpio50"; 5110c88f9eccSDmitry Baryshkov function = "qup16"; 5111c88f9eccSDmitry Baryshkov }; 5112c88f9eccSDmitry Baryshkov 5113f7636174SKrzysztof Kozlowski qup_spi17_cs: qup-spi17-cs-state { 5114c88f9eccSDmitry Baryshkov pins = "gpio55"; 5115e5813b15SDmitry Baryshkov function = "qup17"; 5116e5813b15SDmitry Baryshkov }; 5117e5813b15SDmitry Baryshkov 5118f7636174SKrzysztof Kozlowski qup_spi17_cs_gpio: qup-spi17-cs-gpio-state { 5119eb97ccbbSDmitry Baryshkov pins = "gpio55"; 5120eb97ccbbSDmitry Baryshkov function = "gpio"; 5121eb97ccbbSDmitry Baryshkov }; 5122eb97ccbbSDmitry Baryshkov 5123f7636174SKrzysztof Kozlowski qup_spi17_data_clk: qup-spi17-data-clk-state { 5124c88f9eccSDmitry Baryshkov pins = "gpio52", "gpio53", 5125c88f9eccSDmitry Baryshkov "gpio54"; 5126c88f9eccSDmitry Baryshkov function = "qup17"; 5127c88f9eccSDmitry Baryshkov }; 5128c88f9eccSDmitry Baryshkov 5129f7636174SKrzysztof Kozlowski qup_spi18_cs: qup-spi18-cs-state { 5130c88f9eccSDmitry Baryshkov pins = "gpio59"; 5131e5813b15SDmitry Baryshkov function = "qup18"; 5132e5813b15SDmitry Baryshkov }; 5133e5813b15SDmitry Baryshkov 5134f7636174SKrzysztof Kozlowski qup_spi18_cs_gpio: qup-spi18-cs-gpio-state { 5135eb97ccbbSDmitry Baryshkov pins = "gpio59"; 5136eb97ccbbSDmitry Baryshkov function = "gpio"; 5137eb97ccbbSDmitry Baryshkov }; 5138eb97ccbbSDmitry Baryshkov 5139f7636174SKrzysztof Kozlowski qup_spi18_data_clk: qup-spi18-data-clk-state { 5140c88f9eccSDmitry Baryshkov pins = "gpio56", "gpio57", 5141c88f9eccSDmitry Baryshkov "gpio58"; 5142c88f9eccSDmitry Baryshkov function = "qup18"; 5143c88f9eccSDmitry Baryshkov }; 5144c88f9eccSDmitry Baryshkov 5145f7636174SKrzysztof Kozlowski qup_spi19_cs: qup-spi19-cs-state { 5146c88f9eccSDmitry Baryshkov pins = "gpio3"; 5147c88f9eccSDmitry Baryshkov function = "qup19"; 5148c88f9eccSDmitry Baryshkov }; 5149c88f9eccSDmitry Baryshkov 5150f7636174SKrzysztof Kozlowski qup_spi19_cs_gpio: qup-spi19-cs-gpio-state { 5151eb97ccbbSDmitry Baryshkov pins = "gpio3"; 5152eb97ccbbSDmitry Baryshkov function = "gpio"; 5153eb97ccbbSDmitry Baryshkov }; 5154eb97ccbbSDmitry Baryshkov 5155f7636174SKrzysztof Kozlowski qup_spi19_data_clk: qup-spi19-data-clk-state { 5156e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 5157c88f9eccSDmitry Baryshkov "gpio2"; 5158e5813b15SDmitry Baryshkov function = "qup19"; 5159e5813b15SDmitry Baryshkov }; 5160e5813b15SDmitry Baryshkov 5161f7636174SKrzysztof Kozlowski qup_uart2_default: qup-uart2-default-state { 516208a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 516308a9ae2dSDmitry Baryshkov function = "qup2"; 516408a9ae2dSDmitry Baryshkov }; 516508a9ae2dSDmitry Baryshkov 5166f7636174SKrzysztof Kozlowski qup_uart6_default: qup-uart6-default-state { 5167f7636174SKrzysztof Kozlowski pins = "gpio16", "gpio17", "gpio18", "gpio19"; 516808a9ae2dSDmitry Baryshkov function = "qup6"; 516908a9ae2dSDmitry Baryshkov }; 517008a9ae2dSDmitry Baryshkov 5171f7636174SKrzysztof Kozlowski qup_uart12_default: qup-uart12-default-state { 5172bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 5173bb1dfb4dSManivannan Sadhasivam function = "qup12"; 5174bb1dfb4dSManivannan Sadhasivam }; 517508a9ae2dSDmitry Baryshkov 5176f7636174SKrzysztof Kozlowski qup_uart17_default: qup-uart17-default-state { 5177f7636174SKrzysztof Kozlowski pins = "gpio52", "gpio53", "gpio54", "gpio55"; 517808a9ae2dSDmitry Baryshkov function = "qup17"; 517908a9ae2dSDmitry Baryshkov }; 518008a9ae2dSDmitry Baryshkov 5181f7636174SKrzysztof Kozlowski qup_uart18_default: qup-uart18-default-state { 518208a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 518308a9ae2dSDmitry Baryshkov function = "qup18"; 518408a9ae2dSDmitry Baryshkov }; 5185b657d372SSrinivas Kandagatla 5186f7636174SKrzysztof Kozlowski tert_mi2s_active: tert-mi2s-active-state { 5187f7636174SKrzysztof Kozlowski sck-pins { 5188b657d372SSrinivas Kandagatla pins = "gpio133"; 5189b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 5190b657d372SSrinivas Kandagatla drive-strength = <8>; 5191b657d372SSrinivas Kandagatla bias-disable; 5192b657d372SSrinivas Kandagatla }; 5193b657d372SSrinivas Kandagatla 5194f7636174SKrzysztof Kozlowski data0-pins { 5195b657d372SSrinivas Kandagatla pins = "gpio134"; 5196b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 5197b657d372SSrinivas Kandagatla drive-strength = <8>; 5198b657d372SSrinivas Kandagatla bias-disable; 5199b657d372SSrinivas Kandagatla output-high; 5200b657d372SSrinivas Kandagatla }; 5201b657d372SSrinivas Kandagatla 5202f7636174SKrzysztof Kozlowski ws-pins { 5203b657d372SSrinivas Kandagatla pins = "gpio135"; 5204b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 5205b657d372SSrinivas Kandagatla drive-strength = <8>; 5206b657d372SSrinivas Kandagatla output-high; 5207b657d372SSrinivas Kandagatla }; 5208b657d372SSrinivas Kandagatla }; 52098eaa6501SKonrad Dybcio 5210f7636174SKrzysztof Kozlowski sdc2_sleep_state: sdc2-sleep-state { 5211f7636174SKrzysztof Kozlowski clk-pins { 52128eaa6501SKonrad Dybcio pins = "sdc2_clk"; 52138eaa6501SKonrad Dybcio drive-strength = <2>; 52148eaa6501SKonrad Dybcio bias-disable; 52158eaa6501SKonrad Dybcio }; 52168eaa6501SKonrad Dybcio 5217f7636174SKrzysztof Kozlowski cmd-pins { 52188eaa6501SKonrad Dybcio pins = "sdc2_cmd"; 52198eaa6501SKonrad Dybcio drive-strength = <2>; 52208eaa6501SKonrad Dybcio bias-pull-up; 52218eaa6501SKonrad Dybcio }; 52228eaa6501SKonrad Dybcio 5223f7636174SKrzysztof Kozlowski data-pins { 52248eaa6501SKonrad Dybcio pins = "sdc2_data"; 52258eaa6501SKonrad Dybcio drive-strength = <2>; 52268eaa6501SKonrad Dybcio bias-pull-up; 52278eaa6501SKonrad Dybcio }; 52288eaa6501SKonrad Dybcio }; 522913e948a3SKonrad Dybcio 5230f7636174SKrzysztof Kozlowski pcie0_default_state: pcie0-default-state { 5231f7636174SKrzysztof Kozlowski perst-pins { 523213e948a3SKonrad Dybcio pins = "gpio79"; 523313e948a3SKonrad Dybcio function = "gpio"; 523413e948a3SKonrad Dybcio drive-strength = <2>; 523513e948a3SKonrad Dybcio bias-pull-down; 523613e948a3SKonrad Dybcio }; 523713e948a3SKonrad Dybcio 5238f7636174SKrzysztof Kozlowski clkreq-pins { 523913e948a3SKonrad Dybcio pins = "gpio80"; 524013e948a3SKonrad Dybcio function = "pci_e0"; 524113e948a3SKonrad Dybcio drive-strength = <2>; 524213e948a3SKonrad Dybcio bias-pull-up; 524313e948a3SKonrad Dybcio }; 524413e948a3SKonrad Dybcio 5245f7636174SKrzysztof Kozlowski wake-pins { 524613e948a3SKonrad Dybcio pins = "gpio81"; 524713e948a3SKonrad Dybcio function = "gpio"; 524813e948a3SKonrad Dybcio drive-strength = <2>; 524913e948a3SKonrad Dybcio bias-pull-up; 525013e948a3SKonrad Dybcio }; 525113e948a3SKonrad Dybcio }; 525213e948a3SKonrad Dybcio 5253f7636174SKrzysztof Kozlowski pcie1_default_state: pcie1-default-state { 5254f7636174SKrzysztof Kozlowski perst-pins { 525513e948a3SKonrad Dybcio pins = "gpio82"; 525613e948a3SKonrad Dybcio function = "gpio"; 525713e948a3SKonrad Dybcio drive-strength = <2>; 525813e948a3SKonrad Dybcio bias-pull-down; 525913e948a3SKonrad Dybcio }; 526013e948a3SKonrad Dybcio 5261f7636174SKrzysztof Kozlowski clkreq-pins { 526213e948a3SKonrad Dybcio pins = "gpio83"; 526313e948a3SKonrad Dybcio function = "pci_e1"; 526413e948a3SKonrad Dybcio drive-strength = <2>; 526513e948a3SKonrad Dybcio bias-pull-up; 526613e948a3SKonrad Dybcio }; 526713e948a3SKonrad Dybcio 5268f7636174SKrzysztof Kozlowski wake-pins { 526913e948a3SKonrad Dybcio pins = "gpio84"; 527013e948a3SKonrad Dybcio function = "gpio"; 527113e948a3SKonrad Dybcio drive-strength = <2>; 527213e948a3SKonrad Dybcio bias-pull-up; 527313e948a3SKonrad Dybcio }; 527413e948a3SKonrad Dybcio }; 527513e948a3SKonrad Dybcio 5276f7636174SKrzysztof Kozlowski pcie2_default_state: pcie2-default-state { 5277f7636174SKrzysztof Kozlowski perst-pins { 527813e948a3SKonrad Dybcio pins = "gpio85"; 527913e948a3SKonrad Dybcio function = "gpio"; 528013e948a3SKonrad Dybcio drive-strength = <2>; 528113e948a3SKonrad Dybcio bias-pull-down; 528213e948a3SKonrad Dybcio }; 528313e948a3SKonrad Dybcio 5284f7636174SKrzysztof Kozlowski clkreq-pins { 528513e948a3SKonrad Dybcio pins = "gpio86"; 528613e948a3SKonrad Dybcio function = "pci_e2"; 528713e948a3SKonrad Dybcio drive-strength = <2>; 528813e948a3SKonrad Dybcio bias-pull-up; 528913e948a3SKonrad Dybcio }; 529013e948a3SKonrad Dybcio 5291f7636174SKrzysztof Kozlowski wake-pins { 529213e948a3SKonrad Dybcio pins = "gpio87"; 529313e948a3SKonrad Dybcio function = "gpio"; 529413e948a3SKonrad Dybcio drive-strength = <2>; 529513e948a3SKonrad Dybcio bias-pull-up; 529613e948a3SKonrad Dybcio }; 529713e948a3SKonrad Dybcio }; 529816951b49SBjorn Andersson }; 529916951b49SBjorn Andersson 5300a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 53012438aba4SKrzysztof Kozlowski compatible = "qcom,sm8250-smmu-500", "qcom,smmu-500", "arm,mmu-500"; 5302a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 5303a89441fcSJonathan Marek #iommu-cells = <2>; 5304a89441fcSJonathan Marek #global-interrupts = <2>; 5305a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 5306a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 5307a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 5308a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 5309a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 5310a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 5311a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 5312a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 5313a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 5314a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 5315a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 5316a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 5317a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 5318a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 5319a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 5320a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 5321a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 5322a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 5323a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 5324a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 5325a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 5326a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 5327a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 5328a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 5329a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 5330a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 5331a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 5332a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 5333a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 5334a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 5335a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 5336a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 5337a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 5338a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 5339a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 5340a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 5341a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 5342a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 5343a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 5344a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 5345a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 5346a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 5347a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 5348a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 5349a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 5350a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 5351a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 5352a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 5353a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 5354a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 5355a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 5356a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 5357a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 5358a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 5359a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 5360a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 5361a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 5362a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 5363a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 5364a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 5365a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 5366a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 5367a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 5368a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 5369a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 5370a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 5371a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 5372a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 5373a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 5374a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 5375a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 5376a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 5377a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 5378a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 5379a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 5380a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 5381a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 5382a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 5383a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 5384a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 5385a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 5386a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 5387a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 5388a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 5389a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 5390a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 5391a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 5392a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 5393a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 5394a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 5395a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 5396a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 5397a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 5398a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 5399a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 5400a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 5401a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 5402a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 5403*4cb19bd7SKonrad Dybcio dma-coherent; 5404a89441fcSJonathan Marek }; 5405a89441fcSJonathan Marek 540623a89037SBjorn Andersson adsp: remoteproc@17300000 { 540723a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 540823a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 540923a89037SBjorn Andersson 541023a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 541123a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 541223a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 541323a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 541423a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 541523a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 541623a89037SBjorn Andersson "handover", "stop-ack"; 541723a89037SBjorn Andersson 541823a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 541923a89037SBjorn Andersson clock-names = "xo"; 542023a89037SBjorn Andersson 5421b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 542223a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 5423b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 542423a89037SBjorn Andersson 542523a89037SBjorn Andersson memory-region = <&adsp_mem>; 542623a89037SBjorn Andersson 5427b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 5428b74ee2d7SSibi Sankar 542923a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 543023a89037SBjorn Andersson qcom,smem-state-names = "stop"; 543123a89037SBjorn Andersson 543223a89037SBjorn Andersson status = "disabled"; 543323a89037SBjorn Andersson 543423a89037SBjorn Andersson glink-edge { 543523a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 543623a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 543723a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 543823a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 543923a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 544023a89037SBjorn Andersson 544123a89037SBjorn Andersson label = "lpass"; 544223a89037SBjorn Andersson qcom,remote-pid = <2>; 544325695808SJonathan Marek 544463e10791SSrinivas Kandagatla apr { 544563e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 544663e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 54472f114511SDavid Heidelberg qcom,domain = <APR_DOMAIN_ADSP>; 544863e10791SSrinivas Kandagatla #address-cells = <1>; 544963e10791SSrinivas Kandagatla #size-cells = <0>; 545063e10791SSrinivas Kandagatla 5451a22609bfSKrzysztof Kozlowski service@3 { 545263e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 545363e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 545463e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 545563e10791SSrinivas Kandagatla }; 545663e10791SSrinivas Kandagatla 5457a22609bfSKrzysztof Kozlowski q6afe: service@4 { 545863e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 545963e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 546063e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 546163e10791SSrinivas Kandagatla q6afedai: dais { 546263e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 546363e10791SSrinivas Kandagatla #address-cells = <1>; 546463e10791SSrinivas Kandagatla #size-cells = <0>; 546563e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 546663e10791SSrinivas Kandagatla }; 546763e10791SSrinivas Kandagatla 5468e0b6c1ffSKrzysztof Kozlowski q6afecc: clock-controller { 546963e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 547063e10791SSrinivas Kandagatla #clock-cells = <2>; 547163e10791SSrinivas Kandagatla }; 547263e10791SSrinivas Kandagatla }; 547363e10791SSrinivas Kandagatla 5474a22609bfSKrzysztof Kozlowski q6asm: service@7 { 547563e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 547663e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 547763e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 547863e10791SSrinivas Kandagatla q6asmdai: dais { 547963e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 548063e10791SSrinivas Kandagatla #address-cells = <1>; 548163e10791SSrinivas Kandagatla #size-cells = <0>; 548263e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 548363e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 548463e10791SSrinivas Kandagatla }; 548563e10791SSrinivas Kandagatla }; 548663e10791SSrinivas Kandagatla 5487a22609bfSKrzysztof Kozlowski q6adm: service@8 { 548863e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 548963e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 549063e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 549163e10791SSrinivas Kandagatla q6routing: routing { 549263e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 549363e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 549463e10791SSrinivas Kandagatla }; 549563e10791SSrinivas Kandagatla }; 549663e10791SSrinivas Kandagatla }; 549763e10791SSrinivas Kandagatla 549825695808SJonathan Marek fastrpc { 549925695808SJonathan Marek compatible = "qcom,fastrpc"; 550025695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 550125695808SJonathan Marek label = "adsp"; 55028c8ce95bSJeya R qcom,non-secure-domain; 550325695808SJonathan Marek #address-cells = <1>; 550425695808SJonathan Marek #size-cells = <0>; 550525695808SJonathan Marek 550625695808SJonathan Marek compute-cb@3 { 550725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 550825695808SJonathan Marek reg = <3>; 550925695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 551025695808SJonathan Marek }; 551125695808SJonathan Marek 551225695808SJonathan Marek compute-cb@4 { 551325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 551425695808SJonathan Marek reg = <4>; 551525695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 551625695808SJonathan Marek }; 551725695808SJonathan Marek 551825695808SJonathan Marek compute-cb@5 { 551925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 552025695808SJonathan Marek reg = <5>; 552125695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 552225695808SJonathan Marek }; 552325695808SJonathan Marek }; 552423a89037SBjorn Andersson }; 552523a89037SBjorn Andersson }; 552623a89037SBjorn Andersson 5527b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 5528b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 5529b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 5530b9ec8cbcSJonathan Marek interrupt-controller; 5531b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 5532b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 5533b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 5534b9ec8cbcSJonathan Marek }; 5535b9ec8cbcSJonathan Marek 5536e0d9acceSDmitry Baryshkov watchdog@17c10000 { 5537e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 5538e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 5539e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 554046a4359fSSai Prakash Ranjan interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 5541e0d9acceSDmitry Baryshkov }; 5542e0d9acceSDmitry Baryshkov 5543b9ec8cbcSJonathan Marek timer@17c20000 { 5544458ebdbbSDavid Heidelberg #address-cells = <1>; 5545458ebdbbSDavid Heidelberg #size-cells = <1>; 5546458ebdbbSDavid Heidelberg ranges = <0 0 0 0x20000000>; 5547b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 5548b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 5549b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 5550b9ec8cbcSJonathan Marek 5551b9ec8cbcSJonathan Marek frame@17c21000 { 5552b9ec8cbcSJonathan Marek frame-number = <0>; 5553b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 5554b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 5555458ebdbbSDavid Heidelberg reg = <0x17c21000 0x1000>, 5556458ebdbbSDavid Heidelberg <0x17c22000 0x1000>; 5557b9ec8cbcSJonathan Marek }; 5558b9ec8cbcSJonathan Marek 5559b9ec8cbcSJonathan Marek frame@17c23000 { 5560b9ec8cbcSJonathan Marek frame-number = <1>; 5561b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 5562458ebdbbSDavid Heidelberg reg = <0x17c23000 0x1000>; 5563b9ec8cbcSJonathan Marek status = "disabled"; 5564b9ec8cbcSJonathan Marek }; 5565b9ec8cbcSJonathan Marek 5566b9ec8cbcSJonathan Marek frame@17c25000 { 5567b9ec8cbcSJonathan Marek frame-number = <2>; 5568b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 5569458ebdbbSDavid Heidelberg reg = <0x17c25000 0x1000>; 5570b9ec8cbcSJonathan Marek status = "disabled"; 5571b9ec8cbcSJonathan Marek }; 5572b9ec8cbcSJonathan Marek 5573b9ec8cbcSJonathan Marek frame@17c27000 { 5574b9ec8cbcSJonathan Marek frame-number = <3>; 5575b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 5576458ebdbbSDavid Heidelberg reg = <0x17c27000 0x1000>; 5577b9ec8cbcSJonathan Marek status = "disabled"; 5578b9ec8cbcSJonathan Marek }; 5579b9ec8cbcSJonathan Marek 5580b9ec8cbcSJonathan Marek frame@17c29000 { 5581b9ec8cbcSJonathan Marek frame-number = <4>; 5582b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 5583458ebdbbSDavid Heidelberg reg = <0x17c29000 0x1000>; 5584b9ec8cbcSJonathan Marek status = "disabled"; 5585b9ec8cbcSJonathan Marek }; 5586b9ec8cbcSJonathan Marek 5587b9ec8cbcSJonathan Marek frame@17c2b000 { 5588b9ec8cbcSJonathan Marek frame-number = <5>; 5589b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 5590458ebdbbSDavid Heidelberg reg = <0x17c2b000 0x1000>; 5591b9ec8cbcSJonathan Marek status = "disabled"; 5592b9ec8cbcSJonathan Marek }; 5593b9ec8cbcSJonathan Marek 5594b9ec8cbcSJonathan Marek frame@17c2d000 { 5595b9ec8cbcSJonathan Marek frame-number = <6>; 5596b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 5597458ebdbbSDavid Heidelberg reg = <0x17c2d000 0x1000>; 5598b9ec8cbcSJonathan Marek status = "disabled"; 5599b9ec8cbcSJonathan Marek }; 5600b9ec8cbcSJonathan Marek }; 5601b9ec8cbcSJonathan Marek 560260378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 560360378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 560460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 560560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 560660378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 560760378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 560860378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 560960378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 561060378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 561160378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 561260378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 561360378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 561460378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 561560378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 56162ffa0ca4SMaulik Shah power-domains = <&CLUSTER_PD>; 561760378f1aSVenkata Narendra Kumar Gutta 561860378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 561960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 562060378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 562160378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 562260378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 562360378f1aSVenkata Narendra Kumar Gutta }; 5624b6f78e27SBjorn Andersson 5625b6f78e27SBjorn Andersson rpmhpd: power-controller { 5626b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 5627b6f78e27SBjorn Andersson #power-domain-cells = <1>; 5628b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 5629b6f78e27SBjorn Andersson 5630b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 5631b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 5632b6f78e27SBjorn Andersson 5633b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 5634b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 5635b6f78e27SBjorn Andersson }; 5636b6f78e27SBjorn Andersson 5637b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 5638b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 5639b6f78e27SBjorn Andersson }; 5640b6f78e27SBjorn Andersson 5641b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 5642b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 5643b6f78e27SBjorn Andersson }; 5644b6f78e27SBjorn Andersson 5645b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 5646b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 5647b6f78e27SBjorn Andersson }; 5648b6f78e27SBjorn Andersson 5649b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 5650b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 5651b6f78e27SBjorn Andersson }; 5652b6f78e27SBjorn Andersson 5653b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 5654b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 5655b6f78e27SBjorn Andersson }; 5656b6f78e27SBjorn Andersson 5657b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 5658b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 5659b6f78e27SBjorn Andersson }; 5660b6f78e27SBjorn Andersson 5661b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 5662b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 5663b6f78e27SBjorn Andersson }; 5664b6f78e27SBjorn Andersson 5665b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 5666b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 5667b6f78e27SBjorn Andersson }; 5668b6f78e27SBjorn Andersson 5669b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 5670b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 5671b6f78e27SBjorn Andersson }; 5672b6f78e27SBjorn Andersson }; 5673b6f78e27SBjorn Andersson }; 5674e7e41a20SJonathan Marek 5675fc0e7dd6SKrzysztof Kozlowski apps_bcm_voter: bcm-voter { 5676e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 5677e7e41a20SJonathan Marek }; 567860378f1aSVenkata Narendra Kumar Gutta }; 567979a595bbSSibi Sankar 568077b53d65SGeorgi Djakov epss_l3: interconnect@18590000 { 5681a0289a10SBjorn Andersson compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; 568279a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 568379a595bbSSibi Sankar 568479a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 568579a595bbSSibi Sankar clock-names = "xo", "alternate"; 568679a595bbSSibi Sankar 5687b5a12438SAbel Vesa #interconnect-cells = <2>; 568879a595bbSSibi Sankar }; 568902ae4a0eSBjorn Andersson 569002ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 569102ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 569202ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 569302ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 569402ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 569502ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 569602ae4a0eSBjorn Andersson "freq-domain2"; 569702ae4a0eSBjorn Andersson 569802ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 569902ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 5700ffd6cc92SVladimir Zapolskiy interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 5701ffd6cc92SVladimir Zapolskiy <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 5702ffd6cc92SVladimir Zapolskiy <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 5703ffd6cc92SVladimir Zapolskiy interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; 570402ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 5705d78cb07dSManivannan Sadhasivam #clock-cells = <1>; 570602ae4a0eSBjorn Andersson }; 570760378f1aSVenkata Narendra Kumar Gutta }; 570860378f1aSVenkata Narendra Kumar Gutta 5709e5b8c082SKrzysztof Kozlowski sound: sound { 5710e5b8c082SKrzysztof Kozlowski }; 5711e5b8c082SKrzysztof Kozlowski 571260378f1aSVenkata Narendra Kumar Gutta timer { 571360378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 571460378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 571560378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 571660378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 571760378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 571860378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 571960378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 572029a33495SSai Prakash Ranjan <GIC_PPI 10 572160378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 572260378f1aSVenkata Narendra Kumar Gutta }; 5723bac12f25SAmit Kucheria 5724bac12f25SAmit Kucheria thermal-zones { 5725bac12f25SAmit Kucheria cpu0-thermal { 5726bac12f25SAmit Kucheria polling-delay-passive = <250>; 5727bac12f25SAmit Kucheria polling-delay = <1000>; 5728bac12f25SAmit Kucheria 5729bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 5730bac12f25SAmit Kucheria 5731bac12f25SAmit Kucheria trips { 5732bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 5733bac12f25SAmit Kucheria temperature = <90000>; 5734bac12f25SAmit Kucheria hysteresis = <2000>; 5735bac12f25SAmit Kucheria type = "passive"; 5736bac12f25SAmit Kucheria }; 5737bac12f25SAmit Kucheria 5738bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 5739bac12f25SAmit Kucheria temperature = <95000>; 5740bac12f25SAmit Kucheria hysteresis = <2000>; 5741bac12f25SAmit Kucheria type = "passive"; 5742bac12f25SAmit Kucheria }; 5743bac12f25SAmit Kucheria 57441364acc3SKrzysztof Kozlowski cpu0_crit: cpu-crit { 5745bac12f25SAmit Kucheria temperature = <110000>; 5746bac12f25SAmit Kucheria hysteresis = <1000>; 5747bac12f25SAmit Kucheria type = "critical"; 5748bac12f25SAmit Kucheria }; 5749bac12f25SAmit Kucheria }; 5750bac12f25SAmit Kucheria 5751bac12f25SAmit Kucheria cooling-maps { 5752bac12f25SAmit Kucheria map0 { 5753bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 5754bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5755bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5756bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5757bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5758bac12f25SAmit Kucheria }; 5759bac12f25SAmit Kucheria map1 { 5760bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 5761bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5762bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5763bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5764bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5765bac12f25SAmit Kucheria }; 5766bac12f25SAmit Kucheria }; 5767bac12f25SAmit Kucheria }; 5768bac12f25SAmit Kucheria 5769bac12f25SAmit Kucheria cpu1-thermal { 5770bac12f25SAmit Kucheria polling-delay-passive = <250>; 5771bac12f25SAmit Kucheria polling-delay = <1000>; 5772bac12f25SAmit Kucheria 5773bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 5774bac12f25SAmit Kucheria 5775bac12f25SAmit Kucheria trips { 5776bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 5777bac12f25SAmit Kucheria temperature = <90000>; 5778bac12f25SAmit Kucheria hysteresis = <2000>; 5779bac12f25SAmit Kucheria type = "passive"; 5780bac12f25SAmit Kucheria }; 5781bac12f25SAmit Kucheria 5782bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 5783bac12f25SAmit Kucheria temperature = <95000>; 5784bac12f25SAmit Kucheria hysteresis = <2000>; 5785bac12f25SAmit Kucheria type = "passive"; 5786bac12f25SAmit Kucheria }; 5787bac12f25SAmit Kucheria 57881364acc3SKrzysztof Kozlowski cpu1_crit: cpu-crit { 5789bac12f25SAmit Kucheria temperature = <110000>; 5790bac12f25SAmit Kucheria hysteresis = <1000>; 5791bac12f25SAmit Kucheria type = "critical"; 5792bac12f25SAmit Kucheria }; 5793bac12f25SAmit Kucheria }; 5794bac12f25SAmit Kucheria 5795bac12f25SAmit Kucheria cooling-maps { 5796bac12f25SAmit Kucheria map0 { 5797bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 5798bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5799bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5800bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5801bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5802bac12f25SAmit Kucheria }; 5803bac12f25SAmit Kucheria map1 { 5804bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 5805bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5806bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5807bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5808bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5809bac12f25SAmit Kucheria }; 5810bac12f25SAmit Kucheria }; 5811bac12f25SAmit Kucheria }; 5812bac12f25SAmit Kucheria 5813bac12f25SAmit Kucheria cpu2-thermal { 5814bac12f25SAmit Kucheria polling-delay-passive = <250>; 5815bac12f25SAmit Kucheria polling-delay = <1000>; 5816bac12f25SAmit Kucheria 5817bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 5818bac12f25SAmit Kucheria 5819bac12f25SAmit Kucheria trips { 5820bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 5821bac12f25SAmit Kucheria temperature = <90000>; 5822bac12f25SAmit Kucheria hysteresis = <2000>; 5823bac12f25SAmit Kucheria type = "passive"; 5824bac12f25SAmit Kucheria }; 5825bac12f25SAmit Kucheria 5826bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 5827bac12f25SAmit Kucheria temperature = <95000>; 5828bac12f25SAmit Kucheria hysteresis = <2000>; 5829bac12f25SAmit Kucheria type = "passive"; 5830bac12f25SAmit Kucheria }; 5831bac12f25SAmit Kucheria 58321364acc3SKrzysztof Kozlowski cpu2_crit: cpu-crit { 5833bac12f25SAmit Kucheria temperature = <110000>; 5834bac12f25SAmit Kucheria hysteresis = <1000>; 5835bac12f25SAmit Kucheria type = "critical"; 5836bac12f25SAmit Kucheria }; 5837bac12f25SAmit Kucheria }; 5838bac12f25SAmit Kucheria 5839bac12f25SAmit Kucheria cooling-maps { 5840bac12f25SAmit Kucheria map0 { 5841bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 5842bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5843bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5844bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5845bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5846bac12f25SAmit Kucheria }; 5847bac12f25SAmit Kucheria map1 { 5848bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 5849bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5850bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5851bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5852bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5853bac12f25SAmit Kucheria }; 5854bac12f25SAmit Kucheria }; 5855bac12f25SAmit Kucheria }; 5856bac12f25SAmit Kucheria 5857bac12f25SAmit Kucheria cpu3-thermal { 5858bac12f25SAmit Kucheria polling-delay-passive = <250>; 5859bac12f25SAmit Kucheria polling-delay = <1000>; 5860bac12f25SAmit Kucheria 5861bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 5862bac12f25SAmit Kucheria 5863bac12f25SAmit Kucheria trips { 5864bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 5865bac12f25SAmit Kucheria temperature = <90000>; 5866bac12f25SAmit Kucheria hysteresis = <2000>; 5867bac12f25SAmit Kucheria type = "passive"; 5868bac12f25SAmit Kucheria }; 5869bac12f25SAmit Kucheria 5870bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 5871bac12f25SAmit Kucheria temperature = <95000>; 5872bac12f25SAmit Kucheria hysteresis = <2000>; 5873bac12f25SAmit Kucheria type = "passive"; 5874bac12f25SAmit Kucheria }; 5875bac12f25SAmit Kucheria 58761364acc3SKrzysztof Kozlowski cpu3_crit: cpu-crit { 5877bac12f25SAmit Kucheria temperature = <110000>; 5878bac12f25SAmit Kucheria hysteresis = <1000>; 5879bac12f25SAmit Kucheria type = "critical"; 5880bac12f25SAmit Kucheria }; 5881bac12f25SAmit Kucheria }; 5882bac12f25SAmit Kucheria 5883bac12f25SAmit Kucheria cooling-maps { 5884bac12f25SAmit Kucheria map0 { 5885bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 5886bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5887bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5888bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5889bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5890bac12f25SAmit Kucheria }; 5891bac12f25SAmit Kucheria map1 { 5892bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 5893bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5894bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5895bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5896bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5897bac12f25SAmit Kucheria }; 5898bac12f25SAmit Kucheria }; 5899bac12f25SAmit Kucheria }; 5900bac12f25SAmit Kucheria 5901bac12f25SAmit Kucheria cpu4-top-thermal { 5902bac12f25SAmit Kucheria polling-delay-passive = <250>; 5903bac12f25SAmit Kucheria polling-delay = <1000>; 5904bac12f25SAmit Kucheria 5905bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 5906bac12f25SAmit Kucheria 5907bac12f25SAmit Kucheria trips { 5908bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 5909bac12f25SAmit Kucheria temperature = <90000>; 5910bac12f25SAmit Kucheria hysteresis = <2000>; 5911bac12f25SAmit Kucheria type = "passive"; 5912bac12f25SAmit Kucheria }; 5913bac12f25SAmit Kucheria 5914bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 5915bac12f25SAmit Kucheria temperature = <95000>; 5916bac12f25SAmit Kucheria hysteresis = <2000>; 5917bac12f25SAmit Kucheria type = "passive"; 5918bac12f25SAmit Kucheria }; 5919bac12f25SAmit Kucheria 59201364acc3SKrzysztof Kozlowski cpu4_top_crit: cpu-crit { 5921bac12f25SAmit Kucheria temperature = <110000>; 5922bac12f25SAmit Kucheria hysteresis = <1000>; 5923bac12f25SAmit Kucheria type = "critical"; 5924bac12f25SAmit Kucheria }; 5925bac12f25SAmit Kucheria }; 5926bac12f25SAmit Kucheria 5927bac12f25SAmit Kucheria cooling-maps { 5928bac12f25SAmit Kucheria map0 { 5929bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 5930bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5931bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5932bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5933bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5934bac12f25SAmit Kucheria }; 5935bac12f25SAmit Kucheria map1 { 5936bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 5937bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5938bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5939bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5940bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5941bac12f25SAmit Kucheria }; 5942bac12f25SAmit Kucheria }; 5943bac12f25SAmit Kucheria }; 5944bac12f25SAmit Kucheria 5945bac12f25SAmit Kucheria cpu5-top-thermal { 5946bac12f25SAmit Kucheria polling-delay-passive = <250>; 5947bac12f25SAmit Kucheria polling-delay = <1000>; 5948bac12f25SAmit Kucheria 5949bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 5950bac12f25SAmit Kucheria 5951bac12f25SAmit Kucheria trips { 5952bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 5953bac12f25SAmit Kucheria temperature = <90000>; 5954bac12f25SAmit Kucheria hysteresis = <2000>; 5955bac12f25SAmit Kucheria type = "passive"; 5956bac12f25SAmit Kucheria }; 5957bac12f25SAmit Kucheria 5958bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 5959bac12f25SAmit Kucheria temperature = <95000>; 5960bac12f25SAmit Kucheria hysteresis = <2000>; 5961bac12f25SAmit Kucheria type = "passive"; 5962bac12f25SAmit Kucheria }; 5963bac12f25SAmit Kucheria 59641364acc3SKrzysztof Kozlowski cpu5_top_crit: cpu-crit { 5965bac12f25SAmit Kucheria temperature = <110000>; 5966bac12f25SAmit Kucheria hysteresis = <1000>; 5967bac12f25SAmit Kucheria type = "critical"; 5968bac12f25SAmit Kucheria }; 5969bac12f25SAmit Kucheria }; 5970bac12f25SAmit Kucheria 5971bac12f25SAmit Kucheria cooling-maps { 5972bac12f25SAmit Kucheria map0 { 5973bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 5974bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5975bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5976bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5977bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5978bac12f25SAmit Kucheria }; 5979bac12f25SAmit Kucheria map1 { 5980bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 5981bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5982bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5983bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5984bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5985bac12f25SAmit Kucheria }; 5986bac12f25SAmit Kucheria }; 5987bac12f25SAmit Kucheria }; 5988bac12f25SAmit Kucheria 5989bac12f25SAmit Kucheria cpu6-top-thermal { 5990bac12f25SAmit Kucheria polling-delay-passive = <250>; 5991bac12f25SAmit Kucheria polling-delay = <1000>; 5992bac12f25SAmit Kucheria 5993bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 5994bac12f25SAmit Kucheria 5995bac12f25SAmit Kucheria trips { 5996bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 5997bac12f25SAmit Kucheria temperature = <90000>; 5998bac12f25SAmit Kucheria hysteresis = <2000>; 5999bac12f25SAmit Kucheria type = "passive"; 6000bac12f25SAmit Kucheria }; 6001bac12f25SAmit Kucheria 6002bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 6003bac12f25SAmit Kucheria temperature = <95000>; 6004bac12f25SAmit Kucheria hysteresis = <2000>; 6005bac12f25SAmit Kucheria type = "passive"; 6006bac12f25SAmit Kucheria }; 6007bac12f25SAmit Kucheria 60081364acc3SKrzysztof Kozlowski cpu6_top_crit: cpu-crit { 6009bac12f25SAmit Kucheria temperature = <110000>; 6010bac12f25SAmit Kucheria hysteresis = <1000>; 6011bac12f25SAmit Kucheria type = "critical"; 6012bac12f25SAmit Kucheria }; 6013bac12f25SAmit Kucheria }; 6014bac12f25SAmit Kucheria 6015bac12f25SAmit Kucheria cooling-maps { 6016bac12f25SAmit Kucheria map0 { 6017bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 6018bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6019bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6020bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6021bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6022bac12f25SAmit Kucheria }; 6023bac12f25SAmit Kucheria map1 { 6024bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 6025bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6026bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6027bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6028bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6029bac12f25SAmit Kucheria }; 6030bac12f25SAmit Kucheria }; 6031bac12f25SAmit Kucheria }; 6032bac12f25SAmit Kucheria 6033bac12f25SAmit Kucheria cpu7-top-thermal { 6034bac12f25SAmit Kucheria polling-delay-passive = <250>; 6035bac12f25SAmit Kucheria polling-delay = <1000>; 6036bac12f25SAmit Kucheria 6037bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 6038bac12f25SAmit Kucheria 6039bac12f25SAmit Kucheria trips { 6040bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 6041bac12f25SAmit Kucheria temperature = <90000>; 6042bac12f25SAmit Kucheria hysteresis = <2000>; 6043bac12f25SAmit Kucheria type = "passive"; 6044bac12f25SAmit Kucheria }; 6045bac12f25SAmit Kucheria 6046bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 6047bac12f25SAmit Kucheria temperature = <95000>; 6048bac12f25SAmit Kucheria hysteresis = <2000>; 6049bac12f25SAmit Kucheria type = "passive"; 6050bac12f25SAmit Kucheria }; 6051bac12f25SAmit Kucheria 60521364acc3SKrzysztof Kozlowski cpu7_top_crit: cpu-crit { 6053bac12f25SAmit Kucheria temperature = <110000>; 6054bac12f25SAmit Kucheria hysteresis = <1000>; 6055bac12f25SAmit Kucheria type = "critical"; 6056bac12f25SAmit Kucheria }; 6057bac12f25SAmit Kucheria }; 6058bac12f25SAmit Kucheria 6059bac12f25SAmit Kucheria cooling-maps { 6060bac12f25SAmit Kucheria map0 { 6061bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 6062bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6063bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6064bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6065bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6066bac12f25SAmit Kucheria }; 6067bac12f25SAmit Kucheria map1 { 6068bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 6069bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6070bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6071bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6072bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6073bac12f25SAmit Kucheria }; 6074bac12f25SAmit Kucheria }; 6075bac12f25SAmit Kucheria }; 6076bac12f25SAmit Kucheria 6077bac12f25SAmit Kucheria cpu4-bottom-thermal { 6078bac12f25SAmit Kucheria polling-delay-passive = <250>; 6079bac12f25SAmit Kucheria polling-delay = <1000>; 6080bac12f25SAmit Kucheria 6081bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 6082bac12f25SAmit Kucheria 6083bac12f25SAmit Kucheria trips { 6084bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 6085bac12f25SAmit Kucheria temperature = <90000>; 6086bac12f25SAmit Kucheria hysteresis = <2000>; 6087bac12f25SAmit Kucheria type = "passive"; 6088bac12f25SAmit Kucheria }; 6089bac12f25SAmit Kucheria 6090bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 6091bac12f25SAmit Kucheria temperature = <95000>; 6092bac12f25SAmit Kucheria hysteresis = <2000>; 6093bac12f25SAmit Kucheria type = "passive"; 6094bac12f25SAmit Kucheria }; 6095bac12f25SAmit Kucheria 60961364acc3SKrzysztof Kozlowski cpu4_bottom_crit: cpu-crit { 6097bac12f25SAmit Kucheria temperature = <110000>; 6098bac12f25SAmit Kucheria hysteresis = <1000>; 6099bac12f25SAmit Kucheria type = "critical"; 6100bac12f25SAmit Kucheria }; 6101bac12f25SAmit Kucheria }; 6102bac12f25SAmit Kucheria 6103bac12f25SAmit Kucheria cooling-maps { 6104bac12f25SAmit Kucheria map0 { 6105bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 6106bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6107bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6108bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6109bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6110bac12f25SAmit Kucheria }; 6111bac12f25SAmit Kucheria map1 { 6112bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 6113bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6114bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6115bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6116bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6117bac12f25SAmit Kucheria }; 6118bac12f25SAmit Kucheria }; 6119bac12f25SAmit Kucheria }; 6120bac12f25SAmit Kucheria 6121bac12f25SAmit Kucheria cpu5-bottom-thermal { 6122bac12f25SAmit Kucheria polling-delay-passive = <250>; 6123bac12f25SAmit Kucheria polling-delay = <1000>; 6124bac12f25SAmit Kucheria 6125bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 6126bac12f25SAmit Kucheria 6127bac12f25SAmit Kucheria trips { 6128bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 6129bac12f25SAmit Kucheria temperature = <90000>; 6130bac12f25SAmit Kucheria hysteresis = <2000>; 6131bac12f25SAmit Kucheria type = "passive"; 6132bac12f25SAmit Kucheria }; 6133bac12f25SAmit Kucheria 6134bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 6135bac12f25SAmit Kucheria temperature = <95000>; 6136bac12f25SAmit Kucheria hysteresis = <2000>; 6137bac12f25SAmit Kucheria type = "passive"; 6138bac12f25SAmit Kucheria }; 6139bac12f25SAmit Kucheria 61401364acc3SKrzysztof Kozlowski cpu5_bottom_crit: cpu-crit { 6141bac12f25SAmit Kucheria temperature = <110000>; 6142bac12f25SAmit Kucheria hysteresis = <1000>; 6143bac12f25SAmit Kucheria type = "critical"; 6144bac12f25SAmit Kucheria }; 6145bac12f25SAmit Kucheria }; 6146bac12f25SAmit Kucheria 6147bac12f25SAmit Kucheria cooling-maps { 6148bac12f25SAmit Kucheria map0 { 6149bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 6150bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6151bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6152bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6153bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6154bac12f25SAmit Kucheria }; 6155bac12f25SAmit Kucheria map1 { 6156bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 6157bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6158bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6159bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6160bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6161bac12f25SAmit Kucheria }; 6162bac12f25SAmit Kucheria }; 6163bac12f25SAmit Kucheria }; 6164bac12f25SAmit Kucheria 6165bac12f25SAmit Kucheria cpu6-bottom-thermal { 6166bac12f25SAmit Kucheria polling-delay-passive = <250>; 6167bac12f25SAmit Kucheria polling-delay = <1000>; 6168bac12f25SAmit Kucheria 6169bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 6170bac12f25SAmit Kucheria 6171bac12f25SAmit Kucheria trips { 6172bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 6173bac12f25SAmit Kucheria temperature = <90000>; 6174bac12f25SAmit Kucheria hysteresis = <2000>; 6175bac12f25SAmit Kucheria type = "passive"; 6176bac12f25SAmit Kucheria }; 6177bac12f25SAmit Kucheria 6178bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 6179bac12f25SAmit Kucheria temperature = <95000>; 6180bac12f25SAmit Kucheria hysteresis = <2000>; 6181bac12f25SAmit Kucheria type = "passive"; 6182bac12f25SAmit Kucheria }; 6183bac12f25SAmit Kucheria 61841364acc3SKrzysztof Kozlowski cpu6_bottom_crit: cpu-crit { 6185bac12f25SAmit Kucheria temperature = <110000>; 6186bac12f25SAmit Kucheria hysteresis = <1000>; 6187bac12f25SAmit Kucheria type = "critical"; 6188bac12f25SAmit Kucheria }; 6189bac12f25SAmit Kucheria }; 6190bac12f25SAmit Kucheria 6191bac12f25SAmit Kucheria cooling-maps { 6192bac12f25SAmit Kucheria map0 { 6193bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 6194bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6195bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6196bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6197bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6198bac12f25SAmit Kucheria }; 6199bac12f25SAmit Kucheria map1 { 6200bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 6201bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6202bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6203bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6204bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6205bac12f25SAmit Kucheria }; 6206bac12f25SAmit Kucheria }; 6207bac12f25SAmit Kucheria }; 6208bac12f25SAmit Kucheria 6209bac12f25SAmit Kucheria cpu7-bottom-thermal { 6210bac12f25SAmit Kucheria polling-delay-passive = <250>; 6211bac12f25SAmit Kucheria polling-delay = <1000>; 6212bac12f25SAmit Kucheria 6213bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 6214bac12f25SAmit Kucheria 6215bac12f25SAmit Kucheria trips { 6216bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 6217bac12f25SAmit Kucheria temperature = <90000>; 6218bac12f25SAmit Kucheria hysteresis = <2000>; 6219bac12f25SAmit Kucheria type = "passive"; 6220bac12f25SAmit Kucheria }; 6221bac12f25SAmit Kucheria 6222bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 6223bac12f25SAmit Kucheria temperature = <95000>; 6224bac12f25SAmit Kucheria hysteresis = <2000>; 6225bac12f25SAmit Kucheria type = "passive"; 6226bac12f25SAmit Kucheria }; 6227bac12f25SAmit Kucheria 62281364acc3SKrzysztof Kozlowski cpu7_bottom_crit: cpu-crit { 6229bac12f25SAmit Kucheria temperature = <110000>; 6230bac12f25SAmit Kucheria hysteresis = <1000>; 6231bac12f25SAmit Kucheria type = "critical"; 6232bac12f25SAmit Kucheria }; 6233bac12f25SAmit Kucheria }; 6234bac12f25SAmit Kucheria 6235bac12f25SAmit Kucheria cooling-maps { 6236bac12f25SAmit Kucheria map0 { 6237bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 6238bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6239bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6240bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6241bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6242bac12f25SAmit Kucheria }; 6243bac12f25SAmit Kucheria map1 { 6244bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 6245bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6246bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6247bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 6248bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 6249bac12f25SAmit Kucheria }; 6250bac12f25SAmit Kucheria }; 6251bac12f25SAmit Kucheria }; 6252bac12f25SAmit Kucheria 6253bac12f25SAmit Kucheria aoss0-thermal { 6254bac12f25SAmit Kucheria polling-delay-passive = <250>; 6255bac12f25SAmit Kucheria polling-delay = <1000>; 6256bac12f25SAmit Kucheria 6257bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 6258bac12f25SAmit Kucheria 6259bac12f25SAmit Kucheria trips { 6260bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 6261bac12f25SAmit Kucheria temperature = <90000>; 6262bac12f25SAmit Kucheria hysteresis = <2000>; 6263bac12f25SAmit Kucheria type = "hot"; 6264bac12f25SAmit Kucheria }; 6265bac12f25SAmit Kucheria }; 6266bac12f25SAmit Kucheria }; 6267bac12f25SAmit Kucheria 6268bac12f25SAmit Kucheria cluster0-thermal { 6269bac12f25SAmit Kucheria polling-delay-passive = <250>; 6270bac12f25SAmit Kucheria polling-delay = <1000>; 6271bac12f25SAmit Kucheria 6272bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 6273bac12f25SAmit Kucheria 6274bac12f25SAmit Kucheria trips { 6275bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 6276bac12f25SAmit Kucheria temperature = <90000>; 6277bac12f25SAmit Kucheria hysteresis = <2000>; 6278bac12f25SAmit Kucheria type = "hot"; 6279bac12f25SAmit Kucheria }; 6280bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 6281bac12f25SAmit Kucheria temperature = <110000>; 6282bac12f25SAmit Kucheria hysteresis = <2000>; 6283bac12f25SAmit Kucheria type = "critical"; 6284bac12f25SAmit Kucheria }; 6285bac12f25SAmit Kucheria }; 6286bac12f25SAmit Kucheria }; 6287bac12f25SAmit Kucheria 6288bac12f25SAmit Kucheria cluster1-thermal { 6289bac12f25SAmit Kucheria polling-delay-passive = <250>; 6290bac12f25SAmit Kucheria polling-delay = <1000>; 6291bac12f25SAmit Kucheria 6292bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 6293bac12f25SAmit Kucheria 6294bac12f25SAmit Kucheria trips { 6295bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 6296bac12f25SAmit Kucheria temperature = <90000>; 6297bac12f25SAmit Kucheria hysteresis = <2000>; 6298bac12f25SAmit Kucheria type = "hot"; 6299bac12f25SAmit Kucheria }; 6300bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 6301bac12f25SAmit Kucheria temperature = <110000>; 6302bac12f25SAmit Kucheria hysteresis = <2000>; 6303bac12f25SAmit Kucheria type = "critical"; 6304bac12f25SAmit Kucheria }; 6305bac12f25SAmit Kucheria }; 6306bac12f25SAmit Kucheria }; 6307bac12f25SAmit Kucheria 63087be1c395SDavid Heidelberg gpu-top-thermal { 6309bac12f25SAmit Kucheria polling-delay-passive = <250>; 6310bac12f25SAmit Kucheria polling-delay = <1000>; 6311bac12f25SAmit Kucheria 6312bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 6313bac12f25SAmit Kucheria 6314bac12f25SAmit Kucheria trips { 6315bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 6316bac12f25SAmit Kucheria temperature = <90000>; 6317bac12f25SAmit Kucheria hysteresis = <2000>; 6318bac12f25SAmit Kucheria type = "hot"; 6319bac12f25SAmit Kucheria }; 6320bac12f25SAmit Kucheria }; 6321bac12f25SAmit Kucheria }; 6322bac12f25SAmit Kucheria 6323bac12f25SAmit Kucheria aoss1-thermal { 6324bac12f25SAmit Kucheria polling-delay-passive = <250>; 6325bac12f25SAmit Kucheria polling-delay = <1000>; 6326bac12f25SAmit Kucheria 6327bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 6328bac12f25SAmit Kucheria 6329bac12f25SAmit Kucheria trips { 6330bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 6331bac12f25SAmit Kucheria temperature = <90000>; 6332bac12f25SAmit Kucheria hysteresis = <2000>; 6333bac12f25SAmit Kucheria type = "hot"; 6334bac12f25SAmit Kucheria }; 6335bac12f25SAmit Kucheria }; 6336bac12f25SAmit Kucheria }; 6337bac12f25SAmit Kucheria 6338bac12f25SAmit Kucheria wlan-thermal { 6339bac12f25SAmit Kucheria polling-delay-passive = <250>; 6340bac12f25SAmit Kucheria polling-delay = <1000>; 6341bac12f25SAmit Kucheria 6342bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 6343bac12f25SAmit Kucheria 6344bac12f25SAmit Kucheria trips { 6345bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 6346bac12f25SAmit Kucheria temperature = <90000>; 6347bac12f25SAmit Kucheria hysteresis = <2000>; 6348bac12f25SAmit Kucheria type = "hot"; 6349bac12f25SAmit Kucheria }; 6350bac12f25SAmit Kucheria }; 6351bac12f25SAmit Kucheria }; 6352bac12f25SAmit Kucheria 6353bac12f25SAmit Kucheria video-thermal { 6354bac12f25SAmit Kucheria polling-delay-passive = <250>; 6355bac12f25SAmit Kucheria polling-delay = <1000>; 6356bac12f25SAmit Kucheria 6357bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 6358bac12f25SAmit Kucheria 6359bac12f25SAmit Kucheria trips { 6360bac12f25SAmit Kucheria video_alert0: trip-point0 { 6361bac12f25SAmit Kucheria temperature = <90000>; 6362bac12f25SAmit Kucheria hysteresis = <2000>; 6363bac12f25SAmit Kucheria type = "hot"; 6364bac12f25SAmit Kucheria }; 6365bac12f25SAmit Kucheria }; 6366bac12f25SAmit Kucheria }; 6367bac12f25SAmit Kucheria 6368bac12f25SAmit Kucheria mem-thermal { 6369bac12f25SAmit Kucheria polling-delay-passive = <250>; 6370bac12f25SAmit Kucheria polling-delay = <1000>; 6371bac12f25SAmit Kucheria 6372bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 6373bac12f25SAmit Kucheria 6374bac12f25SAmit Kucheria trips { 6375bac12f25SAmit Kucheria mem_alert0: trip-point0 { 6376bac12f25SAmit Kucheria temperature = <90000>; 6377bac12f25SAmit Kucheria hysteresis = <2000>; 6378bac12f25SAmit Kucheria type = "hot"; 6379bac12f25SAmit Kucheria }; 6380bac12f25SAmit Kucheria }; 6381bac12f25SAmit Kucheria }; 6382bac12f25SAmit Kucheria 6383bac12f25SAmit Kucheria q6-hvx-thermal { 6384bac12f25SAmit Kucheria polling-delay-passive = <250>; 6385bac12f25SAmit Kucheria polling-delay = <1000>; 6386bac12f25SAmit Kucheria 6387bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 6388bac12f25SAmit Kucheria 6389bac12f25SAmit Kucheria trips { 6390bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 6391bac12f25SAmit Kucheria temperature = <90000>; 6392bac12f25SAmit Kucheria hysteresis = <2000>; 6393bac12f25SAmit Kucheria type = "hot"; 6394bac12f25SAmit Kucheria }; 6395bac12f25SAmit Kucheria }; 6396bac12f25SAmit Kucheria }; 6397bac12f25SAmit Kucheria 6398bac12f25SAmit Kucheria camera-thermal { 6399bac12f25SAmit Kucheria polling-delay-passive = <250>; 6400bac12f25SAmit Kucheria polling-delay = <1000>; 6401bac12f25SAmit Kucheria 6402bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 6403bac12f25SAmit Kucheria 6404bac12f25SAmit Kucheria trips { 6405bac12f25SAmit Kucheria camera_alert0: trip-point0 { 6406bac12f25SAmit Kucheria temperature = <90000>; 6407bac12f25SAmit Kucheria hysteresis = <2000>; 6408bac12f25SAmit Kucheria type = "hot"; 6409bac12f25SAmit Kucheria }; 6410bac12f25SAmit Kucheria }; 6411bac12f25SAmit Kucheria }; 6412bac12f25SAmit Kucheria 6413bac12f25SAmit Kucheria compute-thermal { 6414bac12f25SAmit Kucheria polling-delay-passive = <250>; 6415bac12f25SAmit Kucheria polling-delay = <1000>; 6416bac12f25SAmit Kucheria 6417bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 6418bac12f25SAmit Kucheria 6419bac12f25SAmit Kucheria trips { 6420bac12f25SAmit Kucheria compute_alert0: trip-point0 { 6421bac12f25SAmit Kucheria temperature = <90000>; 6422bac12f25SAmit Kucheria hysteresis = <2000>; 6423bac12f25SAmit Kucheria type = "hot"; 6424bac12f25SAmit Kucheria }; 6425bac12f25SAmit Kucheria }; 6426bac12f25SAmit Kucheria }; 6427bac12f25SAmit Kucheria 6428bac12f25SAmit Kucheria npu-thermal { 6429bac12f25SAmit Kucheria polling-delay-passive = <250>; 6430bac12f25SAmit Kucheria polling-delay = <1000>; 6431bac12f25SAmit Kucheria 6432bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 6433bac12f25SAmit Kucheria 6434bac12f25SAmit Kucheria trips { 6435bac12f25SAmit Kucheria npu_alert0: trip-point0 { 6436bac12f25SAmit Kucheria temperature = <90000>; 6437bac12f25SAmit Kucheria hysteresis = <2000>; 6438bac12f25SAmit Kucheria type = "hot"; 6439bac12f25SAmit Kucheria }; 6440bac12f25SAmit Kucheria }; 6441bac12f25SAmit Kucheria }; 6442bac12f25SAmit Kucheria 64437be1c395SDavid Heidelberg gpu-bottom-thermal { 6444bac12f25SAmit Kucheria polling-delay-passive = <250>; 6445bac12f25SAmit Kucheria polling-delay = <1000>; 6446bac12f25SAmit Kucheria 6447bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 6448bac12f25SAmit Kucheria 6449bac12f25SAmit Kucheria trips { 6450bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 6451bac12f25SAmit Kucheria temperature = <90000>; 6452bac12f25SAmit Kucheria hysteresis = <2000>; 6453bac12f25SAmit Kucheria type = "hot"; 6454bac12f25SAmit Kucheria }; 6455bac12f25SAmit Kucheria }; 6456bac12f25SAmit Kucheria }; 6457bac12f25SAmit Kucheria }; 645860378f1aSVenkata Narendra Kumar Gutta}; 6459