160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 1179a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 127c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 13e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 14087d537aSBjorn Andersson#include <dt-bindings/power/qcom-aoss-qmp.h> 15b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1663e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 1760378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1863e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 19bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 2060378f1aSVenkata Narendra Kumar Gutta 2160378f1aSVenkata Narendra Kumar Gutta/ { 2260378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2360378f1aSVenkata Narendra Kumar Gutta 2460378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 2560378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 2660378f1aSVenkata Narendra Kumar Gutta 27e5813b15SDmitry Baryshkov aliases { 28e5813b15SDmitry Baryshkov i2c0 = &i2c0; 29e5813b15SDmitry Baryshkov i2c1 = &i2c1; 30e5813b15SDmitry Baryshkov i2c2 = &i2c2; 31e5813b15SDmitry Baryshkov i2c3 = &i2c3; 32e5813b15SDmitry Baryshkov i2c4 = &i2c4; 33e5813b15SDmitry Baryshkov i2c5 = &i2c5; 34e5813b15SDmitry Baryshkov i2c6 = &i2c6; 35e5813b15SDmitry Baryshkov i2c7 = &i2c7; 36e5813b15SDmitry Baryshkov i2c8 = &i2c8; 37e5813b15SDmitry Baryshkov i2c9 = &i2c9; 38e5813b15SDmitry Baryshkov i2c10 = &i2c10; 39e5813b15SDmitry Baryshkov i2c11 = &i2c11; 40e5813b15SDmitry Baryshkov i2c12 = &i2c12; 41e5813b15SDmitry Baryshkov i2c13 = &i2c13; 42e5813b15SDmitry Baryshkov i2c14 = &i2c14; 43e5813b15SDmitry Baryshkov i2c15 = &i2c15; 44e5813b15SDmitry Baryshkov i2c16 = &i2c16; 45e5813b15SDmitry Baryshkov i2c17 = &i2c17; 46e5813b15SDmitry Baryshkov i2c18 = &i2c18; 47e5813b15SDmitry Baryshkov i2c19 = &i2c19; 48e5813b15SDmitry Baryshkov spi0 = &spi0; 49e5813b15SDmitry Baryshkov spi1 = &spi1; 50e5813b15SDmitry Baryshkov spi2 = &spi2; 51e5813b15SDmitry Baryshkov spi3 = &spi3; 52e5813b15SDmitry Baryshkov spi4 = &spi4; 53e5813b15SDmitry Baryshkov spi5 = &spi5; 54e5813b15SDmitry Baryshkov spi6 = &spi6; 55e5813b15SDmitry Baryshkov spi7 = &spi7; 56e5813b15SDmitry Baryshkov spi8 = &spi8; 57e5813b15SDmitry Baryshkov spi9 = &spi9; 58e5813b15SDmitry Baryshkov spi10 = &spi10; 59e5813b15SDmitry Baryshkov spi11 = &spi11; 60e5813b15SDmitry Baryshkov spi12 = &spi12; 61e5813b15SDmitry Baryshkov spi13 = &spi13; 62e5813b15SDmitry Baryshkov spi14 = &spi14; 63e5813b15SDmitry Baryshkov spi15 = &spi15; 64e5813b15SDmitry Baryshkov spi16 = &spi16; 65e5813b15SDmitry Baryshkov spi17 = &spi17; 66e5813b15SDmitry Baryshkov spi18 = &spi18; 67e5813b15SDmitry Baryshkov spi19 = &spi19; 68e5813b15SDmitry Baryshkov }; 69e5813b15SDmitry Baryshkov 7060378f1aSVenkata Narendra Kumar Gutta chosen { }; 7160378f1aSVenkata Narendra Kumar Gutta 7260378f1aSVenkata Narendra Kumar Gutta clocks { 7360378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7460378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 7560378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 7660378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 7760378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 7860378f1aSVenkata Narendra Kumar Gutta }; 7960378f1aSVenkata Narendra Kumar Gutta 8060378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8160378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 829ff8b059SJonathan Marek clock-frequency = <32768>; 8360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8460378f1aSVenkata Narendra Kumar Gutta }; 8560378f1aSVenkata Narendra Kumar Gutta }; 8660378f1aSVenkata Narendra Kumar Gutta 8760378f1aSVenkata Narendra Kumar Gutta cpus { 8860378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 8960378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9060378f1aSVenkata Narendra Kumar Gutta 9160378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9260378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 9560378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 966aabed55SDanny Lin capacity-dmips-mhz = <448>; 976aabed55SDanny Lin dynamic-power-coefficient = <205>; 9860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 9902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 100bac12f25SAmit Kucheria #cooling-cells = <2>; 10160378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 10260378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 10460378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 10560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10660378f1aSVenkata Narendra Kumar Gutta }; 10760378f1aSVenkata Narendra Kumar Gutta }; 10860378f1aSVenkata Narendra Kumar Gutta }; 10960378f1aSVenkata Narendra Kumar Gutta 11060378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 11160378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 11260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 11360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 11460378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1156aabed55SDanny Lin capacity-dmips-mhz = <448>; 1166aabed55SDanny Lin dynamic-power-coefficient = <205>; 11760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 11802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 119bac12f25SAmit Kucheria #cooling-cells = <2>; 12060378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 12160378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 12260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 12360378f1aSVenkata Narendra Kumar Gutta }; 12460378f1aSVenkata Narendra Kumar Gutta }; 12560378f1aSVenkata Narendra Kumar Gutta 12660378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 12760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 12960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 13060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1316aabed55SDanny Lin capacity-dmips-mhz = <448>; 1326aabed55SDanny Lin dynamic-power-coefficient = <205>; 13360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 13402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 135bac12f25SAmit Kucheria #cooling-cells = <2>; 13660378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 13760378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 13860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 13960378f1aSVenkata Narendra Kumar Gutta }; 14060378f1aSVenkata Narendra Kumar Gutta }; 14160378f1aSVenkata Narendra Kumar Gutta 14260378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 14360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 14460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 14560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 14660378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1476aabed55SDanny Lin capacity-dmips-mhz = <448>; 1486aabed55SDanny Lin dynamic-power-coefficient = <205>; 14960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 15002ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 151bac12f25SAmit Kucheria #cooling-cells = <2>; 15260378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 15360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 15460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 15560378f1aSVenkata Narendra Kumar Gutta }; 15660378f1aSVenkata Narendra Kumar Gutta }; 15760378f1aSVenkata Narendra Kumar Gutta 15860378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 15960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 16060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 16160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 16260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1636aabed55SDanny Lin capacity-dmips-mhz = <1024>; 1646aabed55SDanny Lin dynamic-power-coefficient = <379>; 16560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 16602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 167bac12f25SAmit Kucheria #cooling-cells = <2>; 16860378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 16960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 17060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17160378f1aSVenkata Narendra Kumar Gutta }; 17260378f1aSVenkata Narendra Kumar Gutta }; 17360378f1aSVenkata Narendra Kumar Gutta 17460378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 17560378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 17660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 17760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 17860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1796aabed55SDanny Lin capacity-dmips-mhz = <1024>; 1806aabed55SDanny Lin dynamic-power-coefficient = <379>; 18160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 18202ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 183bac12f25SAmit Kucheria #cooling-cells = <2>; 18460378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 18560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 18660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 18760378f1aSVenkata Narendra Kumar Gutta }; 18860378f1aSVenkata Narendra Kumar Gutta 18960378f1aSVenkata Narendra Kumar Gutta }; 19060378f1aSVenkata Narendra Kumar Gutta 19160378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 19260378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 19360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 19460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 19560378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1966aabed55SDanny Lin capacity-dmips-mhz = <1024>; 1976aabed55SDanny Lin dynamic-power-coefficient = <379>; 19860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 19902ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 200bac12f25SAmit Kucheria #cooling-cells = <2>; 20160378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 20260378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 20360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20460378f1aSVenkata Narendra Kumar Gutta }; 20560378f1aSVenkata Narendra Kumar Gutta }; 20660378f1aSVenkata Narendra Kumar Gutta 20760378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 20860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 20960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 21060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 21160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2126aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2136aabed55SDanny Lin dynamic-power-coefficient = <444>; 21460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 21502ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 216bac12f25SAmit Kucheria #cooling-cells = <2>; 21760378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 21860378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 21960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 22060378f1aSVenkata Narendra Kumar Gutta }; 22160378f1aSVenkata Narendra Kumar Gutta }; 222b4791e69SDanny Lin 223b4791e69SDanny Lin cpu-map { 224b4791e69SDanny Lin cluster0 { 225b4791e69SDanny Lin core0 { 226b4791e69SDanny Lin cpu = <&CPU0>; 227b4791e69SDanny Lin }; 228b4791e69SDanny Lin 229b4791e69SDanny Lin core1 { 230b4791e69SDanny Lin cpu = <&CPU1>; 231b4791e69SDanny Lin }; 232b4791e69SDanny Lin 233b4791e69SDanny Lin core2 { 234b4791e69SDanny Lin cpu = <&CPU2>; 235b4791e69SDanny Lin }; 236b4791e69SDanny Lin 237b4791e69SDanny Lin core3 { 238b4791e69SDanny Lin cpu = <&CPU3>; 239b4791e69SDanny Lin }; 240b4791e69SDanny Lin 241b4791e69SDanny Lin core4 { 242b4791e69SDanny Lin cpu = <&CPU4>; 243b4791e69SDanny Lin }; 244b4791e69SDanny Lin 245b4791e69SDanny Lin core5 { 246b4791e69SDanny Lin cpu = <&CPU5>; 247b4791e69SDanny Lin }; 248b4791e69SDanny Lin 249b4791e69SDanny Lin core6 { 250b4791e69SDanny Lin cpu = <&CPU6>; 251b4791e69SDanny Lin }; 252b4791e69SDanny Lin 253b4791e69SDanny Lin core7 { 254b4791e69SDanny Lin cpu = <&CPU7>; 255b4791e69SDanny Lin }; 256b4791e69SDanny Lin }; 257b4791e69SDanny Lin }; 25860378f1aSVenkata Narendra Kumar Gutta }; 25960378f1aSVenkata Narendra Kumar Gutta 26060378f1aSVenkata Narendra Kumar Gutta firmware { 26160378f1aSVenkata Narendra Kumar Gutta scm: scm { 26260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,scm"; 26360378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 26460378f1aSVenkata Narendra Kumar Gutta }; 26560378f1aSVenkata Narendra Kumar Gutta }; 26660378f1aSVenkata Narendra Kumar Gutta 26760378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 26860378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 26960378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 27060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 27160378f1aSVenkata Narendra Kumar Gutta }; 27260378f1aSVenkata Narendra Kumar Gutta 2733f2094dfSDmitry Baryshkov mmcx_reg: mmcx-reg { 2743f2094dfSDmitry Baryshkov compatible = "regulator-fixed-domain"; 2753f2094dfSDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 2763f2094dfSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 2773f2094dfSDmitry Baryshkov regulator-name = "MMCX"; 2783f2094dfSDmitry Baryshkov }; 2793f2094dfSDmitry Baryshkov 28060378f1aSVenkata Narendra Kumar Gutta pmu { 28160378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 28260378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 28360378f1aSVenkata Narendra Kumar Gutta }; 28460378f1aSVenkata Narendra Kumar Gutta 28560378f1aSVenkata Narendra Kumar Gutta psci { 28660378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 28760378f1aSVenkata Narendra Kumar Gutta method = "smc"; 28860378f1aSVenkata Narendra Kumar Gutta }; 28960378f1aSVenkata Narendra Kumar Gutta 29060378f1aSVenkata Narendra Kumar Gutta reserved-memory { 29160378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 29260378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 29360378f1aSVenkata Narendra Kumar Gutta ranges; 29460378f1aSVenkata Narendra Kumar Gutta 29560378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 29660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 29760378f1aSVenkata Narendra Kumar Gutta no-map; 29860378f1aSVenkata Narendra Kumar Gutta }; 29960378f1aSVenkata Narendra Kumar Gutta 30060378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 30160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 30260378f1aSVenkata Narendra Kumar Gutta no-map; 30360378f1aSVenkata Narendra Kumar Gutta }; 30460378f1aSVenkata Narendra Kumar Gutta 30560378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 30660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 30760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 30860378f1aSVenkata Narendra Kumar Gutta no-map; 30960378f1aSVenkata Narendra Kumar Gutta }; 31060378f1aSVenkata Narendra Kumar Gutta 31160378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 31260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 31360378f1aSVenkata Narendra Kumar Gutta no-map; 31460378f1aSVenkata Narendra Kumar Gutta }; 31560378f1aSVenkata Narendra Kumar Gutta 31660378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 31760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 31860378f1aSVenkata Narendra Kumar Gutta no-map; 31960378f1aSVenkata Narendra Kumar Gutta }; 32060378f1aSVenkata Narendra Kumar Gutta 32160378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 32260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 32360378f1aSVenkata Narendra Kumar Gutta no-map; 32460378f1aSVenkata Narendra Kumar Gutta }; 32560378f1aSVenkata Narendra Kumar Gutta 32660378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 32760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 32860378f1aSVenkata Narendra Kumar Gutta no-map; 32960378f1aSVenkata Narendra Kumar Gutta }; 33060378f1aSVenkata Narendra Kumar Gutta 33160378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 33260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 33360378f1aSVenkata Narendra Kumar Gutta no-map; 33460378f1aSVenkata Narendra Kumar Gutta }; 33560378f1aSVenkata Narendra Kumar Gutta 33660378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 33760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 33860378f1aSVenkata Narendra Kumar Gutta no-map; 33960378f1aSVenkata Narendra Kumar Gutta }; 34060378f1aSVenkata Narendra Kumar Gutta 34160378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 34260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 34360378f1aSVenkata Narendra Kumar Gutta no-map; 34460378f1aSVenkata Narendra Kumar Gutta }; 34560378f1aSVenkata Narendra Kumar Gutta 34660378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 34760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 34860378f1aSVenkata Narendra Kumar Gutta no-map; 34960378f1aSVenkata Narendra Kumar Gutta }; 35060378f1aSVenkata Narendra Kumar Gutta 35160378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 35260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 35360378f1aSVenkata Narendra Kumar Gutta no-map; 35460378f1aSVenkata Narendra Kumar Gutta }; 35560378f1aSVenkata Narendra Kumar Gutta 35660378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 35760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 35860378f1aSVenkata Narendra Kumar Gutta no-map; 35960378f1aSVenkata Narendra Kumar Gutta }; 36060378f1aSVenkata Narendra Kumar Gutta 36160378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 36260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 36360378f1aSVenkata Narendra Kumar Gutta no-map; 36460378f1aSVenkata Narendra Kumar Gutta }; 36560378f1aSVenkata Narendra Kumar Gutta 36660378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 36760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 36860378f1aSVenkata Narendra Kumar Gutta no-map; 36960378f1aSVenkata Narendra Kumar Gutta }; 37060378f1aSVenkata Narendra Kumar Gutta 37160378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 37260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 37360378f1aSVenkata Narendra Kumar Gutta no-map; 37460378f1aSVenkata Narendra Kumar Gutta }; 37560378f1aSVenkata Narendra Kumar Gutta 37660378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 37760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 37860378f1aSVenkata Narendra Kumar Gutta no-map; 37960378f1aSVenkata Narendra Kumar Gutta }; 38060378f1aSVenkata Narendra Kumar Gutta 38160378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 38260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 38360378f1aSVenkata Narendra Kumar Gutta no-map; 38460378f1aSVenkata Narendra Kumar Gutta }; 38560378f1aSVenkata Narendra Kumar Gutta }; 38660378f1aSVenkata Narendra Kumar Gutta 38788b57bc3SDmitry Baryshkov smem { 38860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 38960378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 39060378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 39160378f1aSVenkata Narendra Kumar Gutta }; 39260378f1aSVenkata Narendra Kumar Gutta 3938770a2a8SBjorn Andersson smp2p-adsp { 3948770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3958770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 3968770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 3978770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3988770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3998770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 4008770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 4018770a2a8SBjorn Andersson 4028770a2a8SBjorn Andersson qcom,local-pid = <0>; 4038770a2a8SBjorn Andersson qcom,remote-pid = <2>; 4048770a2a8SBjorn Andersson 4058770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 4068770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 4078770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 4088770a2a8SBjorn Andersson }; 4098770a2a8SBjorn Andersson 4108770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 4118770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 4128770a2a8SBjorn Andersson interrupt-controller; 4138770a2a8SBjorn Andersson #interrupt-cells = <2>; 4148770a2a8SBjorn Andersson }; 4158770a2a8SBjorn Andersson }; 4168770a2a8SBjorn Andersson 4178770a2a8SBjorn Andersson smp2p-cdsp { 4188770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 4198770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 4208770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 4218770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 4228770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 4238770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 4248770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 4258770a2a8SBjorn Andersson 4268770a2a8SBjorn Andersson qcom,local-pid = <0>; 4278770a2a8SBjorn Andersson qcom,remote-pid = <5>; 4288770a2a8SBjorn Andersson 4298770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 4308770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 4318770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 4328770a2a8SBjorn Andersson }; 4338770a2a8SBjorn Andersson 4348770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 4358770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 4368770a2a8SBjorn Andersson interrupt-controller; 4378770a2a8SBjorn Andersson #interrupt-cells = <2>; 4388770a2a8SBjorn Andersson }; 4398770a2a8SBjorn Andersson }; 4408770a2a8SBjorn Andersson 4418770a2a8SBjorn Andersson smp2p-slpi { 4428770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 4438770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 4448770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 4458770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 4468770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 4478770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 4488770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 4498770a2a8SBjorn Andersson 4508770a2a8SBjorn Andersson qcom,local-pid = <0>; 4518770a2a8SBjorn Andersson qcom,remote-pid = <3>; 4528770a2a8SBjorn Andersson 4538770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 4548770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 4558770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 4568770a2a8SBjorn Andersson }; 4578770a2a8SBjorn Andersson 4588770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 4598770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 4608770a2a8SBjorn Andersson interrupt-controller; 4618770a2a8SBjorn Andersson #interrupt-cells = <2>; 4628770a2a8SBjorn Andersson }; 4638770a2a8SBjorn Andersson }; 4648770a2a8SBjorn Andersson 46560378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 46660378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 46760378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 46860378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 46960378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 47060378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 47160378f1aSVenkata Narendra Kumar Gutta 47260378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 47360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 47460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 47560378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 47660378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 47760378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 47876bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 47976bd127eSDmitry Baryshkov "bi_tcxo_ao", 48076bd127eSDmitry Baryshkov "sleep_clk"; 48176bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 48276bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 48376bd127eSDmitry Baryshkov <&sleep_clk>; 48460378f1aSVenkata Narendra Kumar Gutta }; 48560378f1aSVenkata Narendra Kumar Gutta 486e5361e75SBjorn Andersson ipcc: mailbox@408000 { 487e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 488e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 489e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 490e5361e75SBjorn Andersson interrupt-controller; 491e5361e75SBjorn Andersson #interrupt-cells = <3>; 492e5361e75SBjorn Andersson #mbox-cells = <2>; 493e5361e75SBjorn Andersson }; 494e5361e75SBjorn Andersson 49565389ce6SManivannan Sadhasivam rng: rng@793000 { 49665389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 49765389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 49865389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 49965389ce6SManivannan Sadhasivam clock-names = "core"; 50065389ce6SManivannan Sadhasivam }; 50165389ce6SManivannan Sadhasivam 50201e869ccSDmitry Baryshkov qup_opp_table: qup-opp-table { 50301e869ccSDmitry Baryshkov compatible = "operating-points-v2"; 50401e869ccSDmitry Baryshkov 50501e869ccSDmitry Baryshkov opp-50000000 { 50601e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <50000000>; 50701e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_min_svs>; 50801e869ccSDmitry Baryshkov }; 50901e869ccSDmitry Baryshkov 51001e869ccSDmitry Baryshkov opp-75000000 { 51101e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <75000000>; 51201e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 51301e869ccSDmitry Baryshkov }; 51401e869ccSDmitry Baryshkov 51501e869ccSDmitry Baryshkov opp-120000000 { 51601e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <120000000>; 51701e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 51801e869ccSDmitry Baryshkov }; 51901e869ccSDmitry Baryshkov }; 52001e869ccSDmitry Baryshkov 521e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 522e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 523e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 524e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 525e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 526e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 527e5813b15SDmitry Baryshkov #address-cells = <2>; 528e5813b15SDmitry Baryshkov #size-cells = <2>; 52985309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 530e5813b15SDmitry Baryshkov ranges; 531e5813b15SDmitry Baryshkov status = "disabled"; 532e5813b15SDmitry Baryshkov 533e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 534e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 535e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 536e5813b15SDmitry Baryshkov clock-names = "se"; 537e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 538e5813b15SDmitry Baryshkov pinctrl-names = "default"; 539e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 540e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 541e5813b15SDmitry Baryshkov #address-cells = <1>; 542e5813b15SDmitry Baryshkov #size-cells = <0>; 543e5813b15SDmitry Baryshkov status = "disabled"; 544e5813b15SDmitry Baryshkov }; 545e5813b15SDmitry Baryshkov 546e5813b15SDmitry Baryshkov spi14: spi@880000 { 547e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 548e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 549e5813b15SDmitry Baryshkov clock-names = "se"; 550e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 551e5813b15SDmitry Baryshkov pinctrl-names = "default"; 552e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi14_default>; 553e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 554e5813b15SDmitry Baryshkov #address-cells = <1>; 555e5813b15SDmitry Baryshkov #size-cells = <0>; 55601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 55701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 558e5813b15SDmitry Baryshkov status = "disabled"; 559e5813b15SDmitry Baryshkov }; 560e5813b15SDmitry Baryshkov 561e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 562e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 563e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 564e5813b15SDmitry Baryshkov clock-names = "se"; 565e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 566e5813b15SDmitry Baryshkov pinctrl-names = "default"; 567e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 568e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 569e5813b15SDmitry Baryshkov #address-cells = <1>; 570e5813b15SDmitry Baryshkov #size-cells = <0>; 571e5813b15SDmitry Baryshkov status = "disabled"; 572e5813b15SDmitry Baryshkov }; 573e5813b15SDmitry Baryshkov 574e5813b15SDmitry Baryshkov spi15: spi@884000 { 575e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 576e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 577e5813b15SDmitry Baryshkov clock-names = "se"; 578e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 579e5813b15SDmitry Baryshkov pinctrl-names = "default"; 580e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi15_default>; 581e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 582e5813b15SDmitry Baryshkov #address-cells = <1>; 583e5813b15SDmitry Baryshkov #size-cells = <0>; 58401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 58501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 586e5813b15SDmitry Baryshkov status = "disabled"; 587e5813b15SDmitry Baryshkov }; 588e5813b15SDmitry Baryshkov 589e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 590e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 591e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 592e5813b15SDmitry Baryshkov clock-names = "se"; 593e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 594e5813b15SDmitry Baryshkov pinctrl-names = "default"; 595e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 596e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 597e5813b15SDmitry Baryshkov #address-cells = <1>; 598e5813b15SDmitry Baryshkov #size-cells = <0>; 599e5813b15SDmitry Baryshkov status = "disabled"; 600e5813b15SDmitry Baryshkov }; 601e5813b15SDmitry Baryshkov 602e5813b15SDmitry Baryshkov spi16: spi@888000 { 603e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 604e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 605e5813b15SDmitry Baryshkov clock-names = "se"; 606e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 607e5813b15SDmitry Baryshkov pinctrl-names = "default"; 608e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi16_default>; 609e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 610e5813b15SDmitry Baryshkov #address-cells = <1>; 611e5813b15SDmitry Baryshkov #size-cells = <0>; 61201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 61301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 614e5813b15SDmitry Baryshkov status = "disabled"; 615e5813b15SDmitry Baryshkov }; 616e5813b15SDmitry Baryshkov 617e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 618e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 619e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 620e5813b15SDmitry Baryshkov clock-names = "se"; 621e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 622e5813b15SDmitry Baryshkov pinctrl-names = "default"; 623e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 624e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 625e5813b15SDmitry Baryshkov #address-cells = <1>; 626e5813b15SDmitry Baryshkov #size-cells = <0>; 627e5813b15SDmitry Baryshkov status = "disabled"; 628e5813b15SDmitry Baryshkov }; 629e5813b15SDmitry Baryshkov 630e5813b15SDmitry Baryshkov spi17: spi@88c000 { 631e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 632e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 633e5813b15SDmitry Baryshkov clock-names = "se"; 634e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 635e5813b15SDmitry Baryshkov pinctrl-names = "default"; 636e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi17_default>; 637e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 638e5813b15SDmitry Baryshkov #address-cells = <1>; 639e5813b15SDmitry Baryshkov #size-cells = <0>; 64001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 64101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 642e5813b15SDmitry Baryshkov status = "disabled"; 643e5813b15SDmitry Baryshkov }; 644e5813b15SDmitry Baryshkov 64508a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 64608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 64708a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 64808a9ae2dSDmitry Baryshkov clock-names = "se"; 64908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 65008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 65108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 65208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 65301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 65401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 65508a9ae2dSDmitry Baryshkov status = "disabled"; 65608a9ae2dSDmitry Baryshkov }; 65708a9ae2dSDmitry Baryshkov 658e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 659e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 660e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 661e5813b15SDmitry Baryshkov clock-names = "se"; 662e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 663e5813b15SDmitry Baryshkov pinctrl-names = "default"; 664e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 665e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 666e5813b15SDmitry Baryshkov #address-cells = <1>; 667e5813b15SDmitry Baryshkov #size-cells = <0>; 668e5813b15SDmitry Baryshkov status = "disabled"; 669e5813b15SDmitry Baryshkov }; 670e5813b15SDmitry Baryshkov 671e5813b15SDmitry Baryshkov spi18: spi@890000 { 672e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 673e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 674e5813b15SDmitry Baryshkov clock-names = "se"; 675e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 676e5813b15SDmitry Baryshkov pinctrl-names = "default"; 677e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi18_default>; 678e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 679e5813b15SDmitry Baryshkov #address-cells = <1>; 680e5813b15SDmitry Baryshkov #size-cells = <0>; 68101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 68201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 683e5813b15SDmitry Baryshkov status = "disabled"; 684e5813b15SDmitry Baryshkov }; 685e5813b15SDmitry Baryshkov 68608a9ae2dSDmitry Baryshkov uart18: serial@890000 { 68708a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 68808a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 68908a9ae2dSDmitry Baryshkov clock-names = "se"; 69008a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 69108a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 69208a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 69308a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 69401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 69501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 69608a9ae2dSDmitry Baryshkov status = "disabled"; 69708a9ae2dSDmitry Baryshkov }; 69808a9ae2dSDmitry Baryshkov 699e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 700e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 701e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 702e5813b15SDmitry Baryshkov clock-names = "se"; 703e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 704e5813b15SDmitry Baryshkov pinctrl-names = "default"; 705e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 706e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 707e5813b15SDmitry Baryshkov #address-cells = <1>; 708e5813b15SDmitry Baryshkov #size-cells = <0>; 709e5813b15SDmitry Baryshkov status = "disabled"; 710e5813b15SDmitry Baryshkov }; 711e5813b15SDmitry Baryshkov 712e5813b15SDmitry Baryshkov spi19: spi@894000 { 713e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 714e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 715e5813b15SDmitry Baryshkov clock-names = "se"; 716e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 717e5813b15SDmitry Baryshkov pinctrl-names = "default"; 718e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi19_default>; 719e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 720e5813b15SDmitry Baryshkov #address-cells = <1>; 721e5813b15SDmitry Baryshkov #size-cells = <0>; 72201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 72301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 724e5813b15SDmitry Baryshkov status = "disabled"; 725e5813b15SDmitry Baryshkov }; 726e5813b15SDmitry Baryshkov }; 727e5813b15SDmitry Baryshkov 728e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 729e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 730e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 731e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 732e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 733e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 734e5813b15SDmitry Baryshkov #address-cells = <2>; 735e5813b15SDmitry Baryshkov #size-cells = <2>; 73685309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 737e5813b15SDmitry Baryshkov ranges; 738e5813b15SDmitry Baryshkov status = "disabled"; 739e5813b15SDmitry Baryshkov 740e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 741e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 742e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 743e5813b15SDmitry Baryshkov clock-names = "se"; 744e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 745e5813b15SDmitry Baryshkov pinctrl-names = "default"; 746e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 747e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 748e5813b15SDmitry Baryshkov #address-cells = <1>; 749e5813b15SDmitry Baryshkov #size-cells = <0>; 750e5813b15SDmitry Baryshkov status = "disabled"; 751e5813b15SDmitry Baryshkov }; 752e5813b15SDmitry Baryshkov 753e5813b15SDmitry Baryshkov spi0: spi@980000 { 754e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 755e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 756e5813b15SDmitry Baryshkov clock-names = "se"; 757e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 758e5813b15SDmitry Baryshkov pinctrl-names = "default"; 759e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi0_default>; 760e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 761e5813b15SDmitry Baryshkov #address-cells = <1>; 762e5813b15SDmitry Baryshkov #size-cells = <0>; 76301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 76401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 765e5813b15SDmitry Baryshkov status = "disabled"; 766e5813b15SDmitry Baryshkov }; 767e5813b15SDmitry Baryshkov 768e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 769e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 770e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 771e5813b15SDmitry Baryshkov clock-names = "se"; 772e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 773e5813b15SDmitry Baryshkov pinctrl-names = "default"; 774e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 775e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 776e5813b15SDmitry Baryshkov #address-cells = <1>; 777e5813b15SDmitry Baryshkov #size-cells = <0>; 778e5813b15SDmitry Baryshkov status = "disabled"; 779e5813b15SDmitry Baryshkov }; 780e5813b15SDmitry Baryshkov 781e5813b15SDmitry Baryshkov spi1: spi@984000 { 782e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 783e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 784e5813b15SDmitry Baryshkov clock-names = "se"; 785e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 786e5813b15SDmitry Baryshkov pinctrl-names = "default"; 787e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi1_default>; 788e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 789e5813b15SDmitry Baryshkov #address-cells = <1>; 790e5813b15SDmitry Baryshkov #size-cells = <0>; 79101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 79201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 793e5813b15SDmitry Baryshkov status = "disabled"; 794e5813b15SDmitry Baryshkov }; 795e5813b15SDmitry Baryshkov 796e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 797e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 798e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 799e5813b15SDmitry Baryshkov clock-names = "se"; 800e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 801e5813b15SDmitry Baryshkov pinctrl-names = "default"; 802e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 803e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 804e5813b15SDmitry Baryshkov #address-cells = <1>; 805e5813b15SDmitry Baryshkov #size-cells = <0>; 806e5813b15SDmitry Baryshkov status = "disabled"; 807e5813b15SDmitry Baryshkov }; 808e5813b15SDmitry Baryshkov 809e5813b15SDmitry Baryshkov spi2: spi@988000 { 810e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 811e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 812e5813b15SDmitry Baryshkov clock-names = "se"; 813e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 814e5813b15SDmitry Baryshkov pinctrl-names = "default"; 815e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi2_default>; 816e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 817e5813b15SDmitry Baryshkov #address-cells = <1>; 818e5813b15SDmitry Baryshkov #size-cells = <0>; 81901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 82001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 821e5813b15SDmitry Baryshkov status = "disabled"; 822e5813b15SDmitry Baryshkov }; 823e5813b15SDmitry Baryshkov 82408a9ae2dSDmitry Baryshkov uart2: serial@988000 { 82508a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 82608a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 82708a9ae2dSDmitry Baryshkov clock-names = "se"; 82808a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 82908a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 83008a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 83108a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 83201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 83301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 83408a9ae2dSDmitry Baryshkov status = "disabled"; 83508a9ae2dSDmitry Baryshkov }; 83608a9ae2dSDmitry Baryshkov 837e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 838e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 839e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 840e5813b15SDmitry Baryshkov clock-names = "se"; 841e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 842e5813b15SDmitry Baryshkov pinctrl-names = "default"; 843e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 844e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 845e5813b15SDmitry Baryshkov #address-cells = <1>; 846e5813b15SDmitry Baryshkov #size-cells = <0>; 847e5813b15SDmitry Baryshkov status = "disabled"; 848e5813b15SDmitry Baryshkov }; 849e5813b15SDmitry Baryshkov 850e5813b15SDmitry Baryshkov spi3: spi@98c000 { 851e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 852e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 853e5813b15SDmitry Baryshkov clock-names = "se"; 854e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 855e5813b15SDmitry Baryshkov pinctrl-names = "default"; 856e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi3_default>; 857e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 858e5813b15SDmitry Baryshkov #address-cells = <1>; 859e5813b15SDmitry Baryshkov #size-cells = <0>; 86001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 86101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 862e5813b15SDmitry Baryshkov status = "disabled"; 863e5813b15SDmitry Baryshkov }; 864e5813b15SDmitry Baryshkov 865e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 866e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 867e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 868e5813b15SDmitry Baryshkov clock-names = "se"; 869e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 870e5813b15SDmitry Baryshkov pinctrl-names = "default"; 871e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 872e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 873e5813b15SDmitry Baryshkov #address-cells = <1>; 874e5813b15SDmitry Baryshkov #size-cells = <0>; 875e5813b15SDmitry Baryshkov status = "disabled"; 876e5813b15SDmitry Baryshkov }; 877e5813b15SDmitry Baryshkov 878e5813b15SDmitry Baryshkov spi4: spi@990000 { 879e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 880e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 881e5813b15SDmitry Baryshkov clock-names = "se"; 882e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 883e5813b15SDmitry Baryshkov pinctrl-names = "default"; 884e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi4_default>; 885e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 886e5813b15SDmitry Baryshkov #address-cells = <1>; 887e5813b15SDmitry Baryshkov #size-cells = <0>; 88801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 88901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 890e5813b15SDmitry Baryshkov status = "disabled"; 891e5813b15SDmitry Baryshkov }; 892e5813b15SDmitry Baryshkov 893e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 894e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 895e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 896e5813b15SDmitry Baryshkov clock-names = "se"; 897e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 898e5813b15SDmitry Baryshkov pinctrl-names = "default"; 899e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 900e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 901e5813b15SDmitry Baryshkov #address-cells = <1>; 902e5813b15SDmitry Baryshkov #size-cells = <0>; 903e5813b15SDmitry Baryshkov status = "disabled"; 904e5813b15SDmitry Baryshkov }; 905e5813b15SDmitry Baryshkov 906e5813b15SDmitry Baryshkov spi5: spi@994000 { 907e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 908e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 909e5813b15SDmitry Baryshkov clock-names = "se"; 910e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 911e5813b15SDmitry Baryshkov pinctrl-names = "default"; 912e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi5_default>; 913e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 914e5813b15SDmitry Baryshkov #address-cells = <1>; 915e5813b15SDmitry Baryshkov #size-cells = <0>; 91601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 91701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 918e5813b15SDmitry Baryshkov status = "disabled"; 919e5813b15SDmitry Baryshkov }; 920e5813b15SDmitry Baryshkov 921e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 922e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 923e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 924e5813b15SDmitry Baryshkov clock-names = "se"; 925e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 926e5813b15SDmitry Baryshkov pinctrl-names = "default"; 927e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 928e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 929e5813b15SDmitry Baryshkov #address-cells = <1>; 930e5813b15SDmitry Baryshkov #size-cells = <0>; 931e5813b15SDmitry Baryshkov status = "disabled"; 932e5813b15SDmitry Baryshkov }; 933e5813b15SDmitry Baryshkov 934e5813b15SDmitry Baryshkov spi6: spi@998000 { 935e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 936e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 937e5813b15SDmitry Baryshkov clock-names = "se"; 938e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 939e5813b15SDmitry Baryshkov pinctrl-names = "default"; 940e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi6_default>; 941e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 942e5813b15SDmitry Baryshkov #address-cells = <1>; 943e5813b15SDmitry Baryshkov #size-cells = <0>; 94401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 94501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 946e5813b15SDmitry Baryshkov status = "disabled"; 947e5813b15SDmitry Baryshkov }; 948e5813b15SDmitry Baryshkov 94908a9ae2dSDmitry Baryshkov uart6: serial@998000 { 95008a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 95108a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 95208a9ae2dSDmitry Baryshkov clock-names = "se"; 95308a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 95408a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 95508a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 95608a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 95701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 95801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 95908a9ae2dSDmitry Baryshkov status = "disabled"; 96008a9ae2dSDmitry Baryshkov }; 96108a9ae2dSDmitry Baryshkov 962e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 963e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 964e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 965e5813b15SDmitry Baryshkov clock-names = "se"; 966e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 967e5813b15SDmitry Baryshkov pinctrl-names = "default"; 968e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 969e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 970e5813b15SDmitry Baryshkov #address-cells = <1>; 971e5813b15SDmitry Baryshkov #size-cells = <0>; 972e5813b15SDmitry Baryshkov status = "disabled"; 973e5813b15SDmitry Baryshkov }; 974e5813b15SDmitry Baryshkov 975e5813b15SDmitry Baryshkov spi7: spi@99c000 { 976e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 977e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 978e5813b15SDmitry Baryshkov clock-names = "se"; 979e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 980e5813b15SDmitry Baryshkov pinctrl-names = "default"; 981e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi7_default>; 982e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 983e5813b15SDmitry Baryshkov #address-cells = <1>; 984e5813b15SDmitry Baryshkov #size-cells = <0>; 98501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 98601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 987e5813b15SDmitry Baryshkov status = "disabled"; 988e5813b15SDmitry Baryshkov }; 989e5813b15SDmitry Baryshkov }; 990e5813b15SDmitry Baryshkov 99160378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 99260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 99360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 99460378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 995fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 996fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 99760378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 99860378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 99985309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 100060378f1aSVenkata Narendra Kumar Gutta ranges; 100160378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 100260378f1aSVenkata Narendra Kumar Gutta 1003e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 1004e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1005e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1006e5813b15SDmitry Baryshkov clock-names = "se"; 1007e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1008e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1009e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 1010e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1011e5813b15SDmitry Baryshkov #address-cells = <1>; 1012e5813b15SDmitry Baryshkov #size-cells = <0>; 1013e5813b15SDmitry Baryshkov status = "disabled"; 1014e5813b15SDmitry Baryshkov }; 1015e5813b15SDmitry Baryshkov 1016e5813b15SDmitry Baryshkov spi8: spi@a80000 { 1017e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1018e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1019e5813b15SDmitry Baryshkov clock-names = "se"; 1020e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1021e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1022e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi8_default>; 1023e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1024e5813b15SDmitry Baryshkov #address-cells = <1>; 1025e5813b15SDmitry Baryshkov #size-cells = <0>; 102601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 102701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1028e5813b15SDmitry Baryshkov status = "disabled"; 1029e5813b15SDmitry Baryshkov }; 1030e5813b15SDmitry Baryshkov 1031e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 1032e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1033e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1034e5813b15SDmitry Baryshkov clock-names = "se"; 1035e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1036e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1037e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 1038e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1039e5813b15SDmitry Baryshkov #address-cells = <1>; 1040e5813b15SDmitry Baryshkov #size-cells = <0>; 1041e5813b15SDmitry Baryshkov status = "disabled"; 1042e5813b15SDmitry Baryshkov }; 1043e5813b15SDmitry Baryshkov 1044e5813b15SDmitry Baryshkov spi9: spi@a84000 { 1045e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1046e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1047e5813b15SDmitry Baryshkov clock-names = "se"; 1048e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1049e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1050e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi9_default>; 1051e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1052e5813b15SDmitry Baryshkov #address-cells = <1>; 1053e5813b15SDmitry Baryshkov #size-cells = <0>; 105401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 105501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1056e5813b15SDmitry Baryshkov status = "disabled"; 1057e5813b15SDmitry Baryshkov }; 1058e5813b15SDmitry Baryshkov 1059e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1060e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1061e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1062e5813b15SDmitry Baryshkov clock-names = "se"; 1063e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1064e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1065e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1066e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1067e5813b15SDmitry Baryshkov #address-cells = <1>; 1068e5813b15SDmitry Baryshkov #size-cells = <0>; 1069e5813b15SDmitry Baryshkov status = "disabled"; 1070e5813b15SDmitry Baryshkov }; 1071e5813b15SDmitry Baryshkov 1072e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1073e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1074e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1075e5813b15SDmitry Baryshkov clock-names = "se"; 1076e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1077e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1078e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi10_default>; 1079e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1080e5813b15SDmitry Baryshkov #address-cells = <1>; 1081e5813b15SDmitry Baryshkov #size-cells = <0>; 108201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 108301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1084e5813b15SDmitry Baryshkov status = "disabled"; 1085e5813b15SDmitry Baryshkov }; 1086e5813b15SDmitry Baryshkov 1087e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1088e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1089e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1090e5813b15SDmitry Baryshkov clock-names = "se"; 1091e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1092e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1093e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1094e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1095e5813b15SDmitry Baryshkov #address-cells = <1>; 1096e5813b15SDmitry Baryshkov #size-cells = <0>; 1097e5813b15SDmitry Baryshkov status = "disabled"; 1098e5813b15SDmitry Baryshkov }; 1099e5813b15SDmitry Baryshkov 1100e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1101e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1102e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1103e5813b15SDmitry Baryshkov clock-names = "se"; 1104e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1105e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1106e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi11_default>; 1107e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1108e5813b15SDmitry Baryshkov #address-cells = <1>; 1109e5813b15SDmitry Baryshkov #size-cells = <0>; 111001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 111101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1112e5813b15SDmitry Baryshkov status = "disabled"; 1113e5813b15SDmitry Baryshkov }; 1114e5813b15SDmitry Baryshkov 1115e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1116e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1117e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1118e5813b15SDmitry Baryshkov clock-names = "se"; 1119e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1120e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1121e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1122e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1123e5813b15SDmitry Baryshkov #address-cells = <1>; 1124e5813b15SDmitry Baryshkov #size-cells = <0>; 1125e5813b15SDmitry Baryshkov status = "disabled"; 1126e5813b15SDmitry Baryshkov }; 1127e5813b15SDmitry Baryshkov 1128e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1129e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1130e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1131e5813b15SDmitry Baryshkov clock-names = "se"; 1132e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1133e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1134e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi12_default>; 1135e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1136e5813b15SDmitry Baryshkov #address-cells = <1>; 1137e5813b15SDmitry Baryshkov #size-cells = <0>; 113801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 113901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1140e5813b15SDmitry Baryshkov status = "disabled"; 1141e5813b15SDmitry Baryshkov }; 1142e5813b15SDmitry Baryshkov 1143bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 114460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 114560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 114660378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1147fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1148bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1149bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 115060378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 115101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 115201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 115360378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 115460378f1aSVenkata Narendra Kumar Gutta }; 1155e5813b15SDmitry Baryshkov 1156e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1157e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1158e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1159e5813b15SDmitry Baryshkov clock-names = "se"; 1160e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1161e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1162e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1163e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1164e5813b15SDmitry Baryshkov #address-cells = <1>; 1165e5813b15SDmitry Baryshkov #size-cells = <0>; 1166e5813b15SDmitry Baryshkov status = "disabled"; 1167e5813b15SDmitry Baryshkov }; 1168e5813b15SDmitry Baryshkov 1169e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1170e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1171e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1172e5813b15SDmitry Baryshkov clock-names = "se"; 1173e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1174e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1175e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi13_default>; 1176e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1177e5813b15SDmitry Baryshkov #address-cells = <1>; 1178e5813b15SDmitry Baryshkov #size-cells = <0>; 117901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 118001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1181e5813b15SDmitry Baryshkov status = "disabled"; 1182e5813b15SDmitry Baryshkov }; 118360378f1aSVenkata Narendra Kumar Gutta }; 118460378f1aSVenkata Narendra Kumar Gutta 1185e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1186e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1187e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1188e7e41a20SJonathan Marek #interconnect-cells = <1>; 1189e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1190e7e41a20SJonathan Marek }; 1191e7e41a20SJonathan Marek 1192e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1193e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1194e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1195e7e41a20SJonathan Marek #interconnect-cells = <1>; 1196e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1197e7e41a20SJonathan Marek }; 1198e7e41a20SJonathan Marek 1199e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1200e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1201e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1202e7e41a20SJonathan Marek #interconnect-cells = <1>; 1203e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1204e7e41a20SJonathan Marek }; 1205e7e41a20SJonathan Marek 1206e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1207e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1208e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1209e7e41a20SJonathan Marek #interconnect-cells = <1>; 1210e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1211e7e41a20SJonathan Marek }; 1212e7e41a20SJonathan Marek 1213e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1214e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1215e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1216e7e41a20SJonathan Marek #interconnect-cells = <1>; 1217e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1218e7e41a20SJonathan Marek }; 1219e7e41a20SJonathan Marek 1220e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1221e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1222e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1223e7e41a20SJonathan Marek #interconnect-cells = <1>; 1224e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1225e7e41a20SJonathan Marek }; 1226e7e41a20SJonathan Marek 1227e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1228e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1229e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1230e7e41a20SJonathan Marek #interconnect-cells = <1>; 1231e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1232e7e41a20SJonathan Marek }; 1233e7e41a20SJonathan Marek 12346b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 1235b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 1236b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 1237b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 1238b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 1239b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 1240b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 1241b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 1242b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 1243b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 1244b7e2fba0SBryan O'Donoghue reset-names = "rst"; 1245b7e2fba0SBryan O'Donoghue 1246b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 1247b7e2fba0SBryan O'Donoghue 1248a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 1249a89441fcSJonathan Marek 1250b7e2fba0SBryan O'Donoghue clock-names = 1251b7e2fba0SBryan O'Donoghue "core_clk", 1252b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 1253b7e2fba0SBryan O'Donoghue "iface_clk", 1254b7e2fba0SBryan O'Donoghue "core_clk_unipro", 1255b7e2fba0SBryan O'Donoghue "ref_clk", 1256b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 1257b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 1258b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 1259b7e2fba0SBryan O'Donoghue clocks = 1260b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 1261b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 1262b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 1263b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 1264b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 1265b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 1266b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 1267b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 1268b7e2fba0SBryan O'Donoghue freq-table-hz = 1269b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1270b7e2fba0SBryan O'Donoghue <0 0>, 1271b7e2fba0SBryan O'Donoghue <0 0>, 1272b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1273b7e2fba0SBryan O'Donoghue <0 0>, 1274b7e2fba0SBryan O'Donoghue <0 0>, 1275b7e2fba0SBryan O'Donoghue <0 0>, 1276b7e2fba0SBryan O'Donoghue <0 0>; 1277b7e2fba0SBryan O'Donoghue 1278b7e2fba0SBryan O'Donoghue status = "disabled"; 1279b7e2fba0SBryan O'Donoghue }; 1280b7e2fba0SBryan O'Donoghue 1281b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 1282b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 1283b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 1284b7e2fba0SBryan O'Donoghue #address-cells = <2>; 1285b7e2fba0SBryan O'Donoghue #size-cells = <2>; 1286b7e2fba0SBryan O'Donoghue ranges; 1287b7e2fba0SBryan O'Donoghue clock-names = "ref", 1288b7e2fba0SBryan O'Donoghue "ref_aux"; 1289b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 1290b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 1291b7e2fba0SBryan O'Donoghue 1292b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 1293b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 1294b7e2fba0SBryan O'Donoghue status = "disabled"; 1295b7e2fba0SBryan O'Donoghue 1296b7e2fba0SBryan O'Donoghue ufs_mem_phy_lanes: lanes@1d87400 { 1297b7e2fba0SBryan O'Donoghue reg = <0 0x01d87400 0 0x108>, 1298b7e2fba0SBryan O'Donoghue <0 0x01d87600 0 0x1e0>, 1299b7e2fba0SBryan O'Donoghue <0 0x01d87c00 0 0x1dc>, 1300b7e2fba0SBryan O'Donoghue <0 0x01d87800 0 0x108>, 1301b7e2fba0SBryan O'Donoghue <0 0x01d87a00 0 0x1e0>; 1302b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 1303b7e2fba0SBryan O'Donoghue }; 1304b7e2fba0SBryan O'Donoghue }; 1305b7e2fba0SBryan O'Donoghue 1306e7e41a20SJonathan Marek ipa_virt: interconnect@1e00000 { 1307e7e41a20SJonathan Marek compatible = "qcom,sm8250-ipa-virt"; 1308e7e41a20SJonathan Marek reg = <0 0x01e00000 0 0x1000>; 1309e7e41a20SJonathan Marek #interconnect-cells = <1>; 1310e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1311e7e41a20SJonathan Marek }; 1312e7e41a20SJonathan Marek 1313dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 1314dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 1315b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 1316dff0f49cSBjorn Andersson #hwlock-cells = <1>; 131760378f1aSVenkata Narendra Kumar Gutta }; 131860378f1aSVenkata Narendra Kumar Gutta 1319768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 1320768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 1321768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 1322768270caSSrinivas Kandagatla clocks = <&audiocc 1>, 1323768270caSSrinivas Kandagatla <&audiocc 0>, 1324768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1325768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1326768270caSSrinivas Kandagatla <&aoncc 0>, 1327768270caSSrinivas Kandagatla <&vamacro>; 1328768270caSSrinivas Kandagatla 1329768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 1330768270caSSrinivas Kandagatla 1331768270caSSrinivas Kandagatla #clock-cells = <0>; 1332768270caSSrinivas Kandagatla clock-frequency = <9600000>; 1333768270caSSrinivas Kandagatla clock-output-names = "mclk"; 1334768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1335768270caSSrinivas Kandagatla 1336768270caSSrinivas Kandagatla pinctrl-names = "default"; 1337768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 1338768270caSSrinivas Kandagatla }; 1339768270caSSrinivas Kandagatla 1340768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 1341768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 1342768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 1343768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 1344768270caSSrinivas Kandagatla clocks = <&wsamacro>; 1345768270caSSrinivas Kandagatla clock-names = "iface"; 1346768270caSSrinivas Kandagatla 1347768270caSSrinivas Kandagatla qcom,din-ports = <2>; 1348768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 1349768270caSSrinivas Kandagatla 1350768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 1351768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 1352768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 1353768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 1354768270caSSrinivas Kandagatla 1355768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1356768270caSSrinivas Kandagatla #address-cells = <2>; 1357768270caSSrinivas Kandagatla #size-cells = <0>; 1358768270caSSrinivas Kandagatla }; 1359768270caSSrinivas Kandagatla 1360793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 1361793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 1362793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 1363793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 1364793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1365793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1366793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1367793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 1368793bbd2dSSrinivas Kandagatla }; 1369793bbd2dSSrinivas Kandagatla 1370768270caSSrinivas Kandagatla vamacro: codec@3370000 { 1371768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 1372768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 1373768270caSSrinivas Kandagatla clocks = <&aoncc 0>, 1374768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1375768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1376768270caSSrinivas Kandagatla 1377768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 1378768270caSSrinivas Kandagatla 1379768270caSSrinivas Kandagatla #clock-cells = <0>; 1380768270caSSrinivas Kandagatla clock-frequency = <9600000>; 1381768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 1382768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 1383768270caSSrinivas Kandagatla }; 1384768270caSSrinivas Kandagatla 1385793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 1386793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 1387793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 1388793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 1389793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1390793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 1391793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 1392793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 1393793bbd2dSSrinivas Kandagatla }; 1394793bbd2dSSrinivas Kandagatla 13953160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000{ 13963160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 13973160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 13983160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 13993160c1b8SSrinivas Kandagatla gpio-controller; 14003160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 14013160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 14023160c1b8SSrinivas Kandagatla 14033160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 14043160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 14053160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 14063160c1b8SSrinivas Kandagatla 14073160c1b8SSrinivas Kandagatla wsa_swr_active: wsa-swr-active-pins { 14083160c1b8SSrinivas Kandagatla clk { 14093160c1b8SSrinivas Kandagatla pins = "gpio10"; 14103160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 14113160c1b8SSrinivas Kandagatla drive-strength = <2>; 14123160c1b8SSrinivas Kandagatla slew-rate = <1>; 14133160c1b8SSrinivas Kandagatla bias-disable; 14143160c1b8SSrinivas Kandagatla }; 14153160c1b8SSrinivas Kandagatla 14163160c1b8SSrinivas Kandagatla data { 14173160c1b8SSrinivas Kandagatla pins = "gpio11"; 14183160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 14193160c1b8SSrinivas Kandagatla drive-strength = <2>; 14203160c1b8SSrinivas Kandagatla slew-rate = <1>; 14213160c1b8SSrinivas Kandagatla bias-bus-hold; 14223160c1b8SSrinivas Kandagatla 14233160c1b8SSrinivas Kandagatla }; 14243160c1b8SSrinivas Kandagatla }; 14253160c1b8SSrinivas Kandagatla 14263160c1b8SSrinivas Kandagatla wsa_swr_sleep: wsa-swr-sleep-pins { 14273160c1b8SSrinivas Kandagatla clk { 14283160c1b8SSrinivas Kandagatla pins = "gpio10"; 14293160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 14303160c1b8SSrinivas Kandagatla drive-strength = <2>; 14313160c1b8SSrinivas Kandagatla input-enable; 14323160c1b8SSrinivas Kandagatla bias-pull-down; 14333160c1b8SSrinivas Kandagatla }; 14343160c1b8SSrinivas Kandagatla 14353160c1b8SSrinivas Kandagatla data { 14363160c1b8SSrinivas Kandagatla pins = "gpio11"; 14373160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 14383160c1b8SSrinivas Kandagatla drive-strength = <2>; 14393160c1b8SSrinivas Kandagatla input-enable; 14403160c1b8SSrinivas Kandagatla bias-pull-down; 14413160c1b8SSrinivas Kandagatla 14423160c1b8SSrinivas Kandagatla }; 14433160c1b8SSrinivas Kandagatla }; 14443160c1b8SSrinivas Kandagatla 14453160c1b8SSrinivas Kandagatla dmic01_active: dmic01-active-pins { 14463160c1b8SSrinivas Kandagatla clk { 14473160c1b8SSrinivas Kandagatla pins = "gpio6"; 14483160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 14493160c1b8SSrinivas Kandagatla drive-strength = <8>; 14503160c1b8SSrinivas Kandagatla output-high; 14513160c1b8SSrinivas Kandagatla }; 14523160c1b8SSrinivas Kandagatla data { 14533160c1b8SSrinivas Kandagatla pins = "gpio7"; 14543160c1b8SSrinivas Kandagatla function = "dmic1_data"; 14553160c1b8SSrinivas Kandagatla drive-strength = <8>; 14563160c1b8SSrinivas Kandagatla input-enable; 14573160c1b8SSrinivas Kandagatla }; 14583160c1b8SSrinivas Kandagatla }; 14593160c1b8SSrinivas Kandagatla 14603160c1b8SSrinivas Kandagatla dmic01_sleep: dmic01-sleep-pins { 14613160c1b8SSrinivas Kandagatla clk { 14623160c1b8SSrinivas Kandagatla pins = "gpio6"; 14633160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 14643160c1b8SSrinivas Kandagatla drive-strength = <2>; 14653160c1b8SSrinivas Kandagatla bias-disable; 14663160c1b8SSrinivas Kandagatla output-low; 14673160c1b8SSrinivas Kandagatla }; 14683160c1b8SSrinivas Kandagatla 14693160c1b8SSrinivas Kandagatla data { 14703160c1b8SSrinivas Kandagatla pins = "gpio7"; 14713160c1b8SSrinivas Kandagatla function = "dmic1_data"; 14723160c1b8SSrinivas Kandagatla drive-strength = <2>; 14733160c1b8SSrinivas Kandagatla pull-down; 14743160c1b8SSrinivas Kandagatla input-enable; 14753160c1b8SSrinivas Kandagatla }; 14763160c1b8SSrinivas Kandagatla }; 14773160c1b8SSrinivas Kandagatla }; 14783160c1b8SSrinivas Kandagatla 147904a3605bSJonathan Marek gpu: gpu@3d00000 { 148004a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 14817c1dffd4SDmitry Baryshkov "qcom,adreno"; 148204a3605bSJonathan Marek #stream-id-cells = <16>; 148304a3605bSJonathan Marek 148404a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 148504a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 148604a3605bSJonathan Marek 148704a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 148804a3605bSJonathan Marek 148904a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 149004a3605bSJonathan Marek 149104a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 149204a3605bSJonathan Marek 149304a3605bSJonathan Marek qcom,gmu = <&gmu>; 149404a3605bSJonathan Marek 149504a3605bSJonathan Marek zap-shader { 149604a3605bSJonathan Marek memory-region = <&gpu_mem>; 149704a3605bSJonathan Marek }; 149804a3605bSJonathan Marek 149904a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 150004a3605bSJonathan Marek gpu_opp_table: opp-table { 150104a3605bSJonathan Marek compatible = "operating-points-v2"; 150204a3605bSJonathan Marek 150304a3605bSJonathan Marek opp-670000000 { 150404a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 150504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 150604a3605bSJonathan Marek }; 150704a3605bSJonathan Marek 150804a3605bSJonathan Marek opp-587000000 { 150904a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 151004a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 151104a3605bSJonathan Marek }; 151204a3605bSJonathan Marek 151304a3605bSJonathan Marek opp-525000000 { 151404a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 151504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 151604a3605bSJonathan Marek }; 151704a3605bSJonathan Marek 151804a3605bSJonathan Marek opp-490000000 { 151904a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 152004a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 152104a3605bSJonathan Marek }; 152204a3605bSJonathan Marek 152304a3605bSJonathan Marek opp-441600000 { 152404a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 152504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 152604a3605bSJonathan Marek }; 152704a3605bSJonathan Marek 152804a3605bSJonathan Marek opp-400000000 { 152904a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 153004a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 153104a3605bSJonathan Marek }; 153204a3605bSJonathan Marek 153304a3605bSJonathan Marek opp-305000000 { 153404a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 153504a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 153604a3605bSJonathan Marek }; 153704a3605bSJonathan Marek }; 153804a3605bSJonathan Marek }; 153904a3605bSJonathan Marek 154004a3605bSJonathan Marek gmu: gmu@3d6a000 { 154104a3605bSJonathan Marek compatible="qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 154204a3605bSJonathan Marek 154304a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 154404a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 154504a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 154604a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 154704a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 154804a3605bSJonathan Marek 154904a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 155004a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 155104a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 155204a3605bSJonathan Marek 15530e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 15540e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 15550e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 155604a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 155704a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 155804a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 155904a3605bSJonathan Marek 15600e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 15610e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 156204a3605bSJonathan Marek power-domain-names = "cx", "gx"; 156304a3605bSJonathan Marek 156404a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 156504a3605bSJonathan Marek 156604a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 156704a3605bSJonathan Marek 156804a3605bSJonathan Marek gmu_opp_table: opp-table { 156904a3605bSJonathan Marek compatible = "operating-points-v2"; 157004a3605bSJonathan Marek 157104a3605bSJonathan Marek opp-200000000 { 157204a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 157304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 157404a3605bSJonathan Marek }; 157504a3605bSJonathan Marek }; 157604a3605bSJonathan Marek }; 157704a3605bSJonathan Marek 157804a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 157904a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 158004a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 158104a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 158204a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 158304a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 158404a3605bSJonathan Marek clock-names = "bi_tcxo", 158504a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 158604a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 158704a3605bSJonathan Marek #clock-cells = <1>; 158804a3605bSJonathan Marek #reset-cells = <1>; 158904a3605bSJonathan Marek #power-domain-cells = <1>; 159004a3605bSJonathan Marek }; 159104a3605bSJonathan Marek 159204a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 159304a3605bSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 159404a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 159504a3605bSJonathan Marek #iommu-cells = <2>; 159604a3605bSJonathan Marek #global-interrupts = <2>; 159704a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 159804a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 159904a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 160004a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 160104a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 160204a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 160304a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 160404a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 160504a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 160604a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 16070e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 160804a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 160904a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 161004a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 161104a3605bSJonathan Marek 16120e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 161304a3605bSJonathan Marek }; 161404a3605bSJonathan Marek 161523a89037SBjorn Andersson slpi: remoteproc@5c00000 { 161623a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 161723a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 161823a89037SBjorn Andersson 161923a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 162023a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 162123a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 162223a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 162323a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 162423a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 162523a89037SBjorn Andersson "handover", "stop-ack"; 162623a89037SBjorn Andersson 162723a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 162823a89037SBjorn Andersson clock-names = "xo"; 162923a89037SBjorn Andersson 163023a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 163123a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 163223a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 163323a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 163423a89037SBjorn Andersson 163523a89037SBjorn Andersson memory-region = <&slpi_mem>; 163623a89037SBjorn Andersson 163723a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 163823a89037SBjorn Andersson qcom,smem-state-names = "stop"; 163923a89037SBjorn Andersson 164023a89037SBjorn Andersson status = "disabled"; 164123a89037SBjorn Andersson 164223a89037SBjorn Andersson glink-edge { 164323a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 164423a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 164523a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 164623a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 164723a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 164823a89037SBjorn Andersson 164925695808SJonathan Marek label = "slpi"; 165023a89037SBjorn Andersson qcom,remote-pid = <3>; 165125695808SJonathan Marek 165225695808SJonathan Marek fastrpc { 165325695808SJonathan Marek compatible = "qcom,fastrpc"; 165425695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 165525695808SJonathan Marek label = "sdsp"; 165625695808SJonathan Marek #address-cells = <1>; 165725695808SJonathan Marek #size-cells = <0>; 165825695808SJonathan Marek 165925695808SJonathan Marek compute-cb@1 { 166025695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 166125695808SJonathan Marek reg = <1>; 166225695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 166325695808SJonathan Marek }; 166425695808SJonathan Marek 166525695808SJonathan Marek compute-cb@2 { 166625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 166725695808SJonathan Marek reg = <2>; 166825695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 166925695808SJonathan Marek }; 167025695808SJonathan Marek 167125695808SJonathan Marek compute-cb@3 { 167225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 167325695808SJonathan Marek reg = <3>; 167425695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 167525695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 167625695808SJonathan Marek }; 167725695808SJonathan Marek }; 167823a89037SBjorn Andersson }; 167923a89037SBjorn Andersson }; 168023a89037SBjorn Andersson 168123a89037SBjorn Andersson cdsp: remoteproc@8300000 { 168223a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 168323a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 168423a89037SBjorn Andersson 168523a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 168623a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 168723a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 168823a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 168923a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 169023a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 169123a89037SBjorn Andersson "handover", "stop-ack"; 169223a89037SBjorn Andersson 169323a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 169423a89037SBjorn Andersson clock-names = "xo"; 169523a89037SBjorn Andersson 169623a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 169723a89037SBjorn Andersson <&rpmhpd SM8250_CX>; 169823a89037SBjorn Andersson power-domain-names = "load_state", "cx"; 169923a89037SBjorn Andersson 170023a89037SBjorn Andersson memory-region = <&cdsp_mem>; 170123a89037SBjorn Andersson 170223a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 170323a89037SBjorn Andersson qcom,smem-state-names = "stop"; 170423a89037SBjorn Andersson 170523a89037SBjorn Andersson status = "disabled"; 170623a89037SBjorn Andersson 170723a89037SBjorn Andersson glink-edge { 170823a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 170923a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 171023a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 171123a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 171223a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 171323a89037SBjorn Andersson 171425695808SJonathan Marek label = "cdsp"; 171523a89037SBjorn Andersson qcom,remote-pid = <5>; 171625695808SJonathan Marek 171725695808SJonathan Marek fastrpc { 171825695808SJonathan Marek compatible = "qcom,fastrpc"; 171925695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 172025695808SJonathan Marek label = "cdsp"; 172125695808SJonathan Marek #address-cells = <1>; 172225695808SJonathan Marek #size-cells = <0>; 172325695808SJonathan Marek 172425695808SJonathan Marek compute-cb@1 { 172525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 172625695808SJonathan Marek reg = <1>; 172725695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 172825695808SJonathan Marek }; 172925695808SJonathan Marek 173025695808SJonathan Marek compute-cb@2 { 173125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 173225695808SJonathan Marek reg = <2>; 173325695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 173425695808SJonathan Marek }; 173525695808SJonathan Marek 173625695808SJonathan Marek compute-cb@3 { 173725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 173825695808SJonathan Marek reg = <3>; 173925695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 174025695808SJonathan Marek }; 174125695808SJonathan Marek 174225695808SJonathan Marek compute-cb@4 { 174325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 174425695808SJonathan Marek reg = <4>; 174525695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 174625695808SJonathan Marek }; 174725695808SJonathan Marek 174825695808SJonathan Marek compute-cb@5 { 174925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 175025695808SJonathan Marek reg = <5>; 175125695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 175225695808SJonathan Marek }; 175325695808SJonathan Marek 175425695808SJonathan Marek compute-cb@6 { 175525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 175625695808SJonathan Marek reg = <6>; 175725695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 175825695808SJonathan Marek }; 175925695808SJonathan Marek 176025695808SJonathan Marek compute-cb@7 { 176125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 176225695808SJonathan Marek reg = <7>; 176325695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 176425695808SJonathan Marek }; 176525695808SJonathan Marek 176625695808SJonathan Marek compute-cb@8 { 176725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 176825695808SJonathan Marek reg = <8>; 176925695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 177025695808SJonathan Marek }; 177125695808SJonathan Marek 177225695808SJonathan Marek /* note: secure cb9 in downstream */ 177325695808SJonathan Marek }; 177423a89037SBjorn Andersson }; 177523a89037SBjorn Andersson }; 177623a89037SBjorn Andersson 1777590a135eSSrinivas Kandagatla sound: sound { 1778590a135eSSrinivas Kandagatla }; 1779590a135eSSrinivas Kandagatla 178046a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 178146a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 178246a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 178346a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 178446a6f297SJonathan Marek status = "disabled"; 178546a6f297SJonathan Marek #phy-cells = <0>; 178646a6f297SJonathan Marek 178746a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 178846a6f297SJonathan Marek clock-names = "ref"; 178946a6f297SJonathan Marek 179046a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 179146a6f297SJonathan Marek }; 179246a6f297SJonathan Marek 179346a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 179446a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 179546a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 179646a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 179746a6f297SJonathan Marek status = "disabled"; 179846a6f297SJonathan Marek #phy-cells = <0>; 179946a6f297SJonathan Marek 180046a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 180146a6f297SJonathan Marek clock-names = "ref"; 180246a6f297SJonathan Marek 180346a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 180446a6f297SJonathan Marek }; 180546a6f297SJonathan Marek 180646a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 180746a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-phy"; 180846a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 180946a6f297SJonathan Marek <0 0x088e8000 0 0x20>; 181046a6f297SJonathan Marek reg-names = "reg-base", "dp_com"; 181146a6f297SJonathan Marek status = "disabled"; 181246a6f297SJonathan Marek #clock-cells = <1>; 181346a6f297SJonathan Marek #address-cells = <2>; 181446a6f297SJonathan Marek #size-cells = <2>; 181546a6f297SJonathan Marek ranges; 181646a6f297SJonathan Marek 181746a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 181846a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 181946a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 182046a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 182146a6f297SJonathan Marek 182246a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 182346a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 182446a6f297SJonathan Marek reset-names = "phy", "common"; 182546a6f297SJonathan Marek 182646a6f297SJonathan Marek usb_1_ssphy: lanes@88e9200 { 182746a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 182846a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 182946a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 183046a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 183146a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 183246a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 183346a6f297SJonathan Marek #phy-cells = <0>; 183446a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 183546a6f297SJonathan Marek clock-names = "pipe0"; 183646a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 183746a6f297SJonathan Marek }; 183846a6f297SJonathan Marek }; 183946a6f297SJonathan Marek 184046a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 184146a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 184246a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 184346a6f297SJonathan Marek status = "disabled"; 184446a6f297SJonathan Marek #clock-cells = <1>; 184546a6f297SJonathan Marek #address-cells = <2>; 184646a6f297SJonathan Marek #size-cells = <2>; 184746a6f297SJonathan Marek ranges; 184846a6f297SJonathan Marek 184946a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 185046a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 185146a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 185246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 185346a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 185446a6f297SJonathan Marek 185546a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 185646a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 185746a6f297SJonathan Marek reset-names = "phy", "common"; 185846a6f297SJonathan Marek 185946a6f297SJonathan Marek usb_2_ssphy: lane@88eb200 { 186046a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 186146a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 186246a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 186346a6f297SJonathan Marek #phy-cells = <0>; 186446a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 186546a6f297SJonathan Marek clock-names = "pipe0"; 186646a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 186746a6f297SJonathan Marek }; 186846a6f297SJonathan Marek }; 186946a6f297SJonathan Marek 1870c4cf0300SManivannan Sadhasivam sdhc_2: sdhci@8804000 { 1871c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 1872c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 1873c4cf0300SManivannan Sadhasivam 1874c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1875c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 1876c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 1877c4cf0300SManivannan Sadhasivam 1878c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 1879c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 188074097d80SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 1881c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 1882c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 1883c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 1884c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 1885c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 1886c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 1887c4cf0300SManivannan Sadhasivam 1888c4cf0300SManivannan Sadhasivam status = "disabled"; 1889c4cf0300SManivannan Sadhasivam 1890c4cf0300SManivannan Sadhasivam sdhc2_opp_table: sdhc2-opp-table { 1891c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 1892c4cf0300SManivannan Sadhasivam 1893c4cf0300SManivannan Sadhasivam opp-19200000 { 1894c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 1895c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 1896c4cf0300SManivannan Sadhasivam }; 1897c4cf0300SManivannan Sadhasivam 1898c4cf0300SManivannan Sadhasivam opp-50000000 { 1899c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 1900c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 1901c4cf0300SManivannan Sadhasivam }; 1902c4cf0300SManivannan Sadhasivam 1903c4cf0300SManivannan Sadhasivam opp-100000000 { 1904c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 1905c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 1906c4cf0300SManivannan Sadhasivam }; 1907c4cf0300SManivannan Sadhasivam 1908c4cf0300SManivannan Sadhasivam opp-202000000 { 1909c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 1910c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 1911c4cf0300SManivannan Sadhasivam }; 1912c4cf0300SManivannan Sadhasivam }; 1913c4cf0300SManivannan Sadhasivam }; 1914c4cf0300SManivannan Sadhasivam 1915e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 1916e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 1917e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 1918e7e41a20SJonathan Marek #interconnect-cells = <1>; 1919e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1920e7e41a20SJonathan Marek }; 1921e7e41a20SJonathan Marek 1922e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 1923e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 1924e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 1925e7e41a20SJonathan Marek #interconnect-cells = <1>; 1926e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1927e7e41a20SJonathan Marek }; 1928e7e41a20SJonathan Marek 1929e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 1930e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 1931e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 1932e7e41a20SJonathan Marek #interconnect-cells = <1>; 1933e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1934e7e41a20SJonathan Marek }; 1935e7e41a20SJonathan Marek 193646a6f297SJonathan Marek usb_1: usb@a6f8800 { 193746a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 193846a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 193946a6f297SJonathan Marek status = "disabled"; 194046a6f297SJonathan Marek #address-cells = <2>; 194146a6f297SJonathan Marek #size-cells = <2>; 194246a6f297SJonathan Marek ranges; 194346a6f297SJonathan Marek dma-ranges; 194446a6f297SJonathan Marek 194546a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 194646a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 194746a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 194846a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 194946a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 195046a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 195146a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 195246a6f297SJonathan Marek "sleep", "xo"; 195346a6f297SJonathan Marek 195446a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 195546a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 195646a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 195746a6f297SJonathan Marek 195846a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 195946a6f297SJonathan Marek <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 196046a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 196146a6f297SJonathan Marek <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 196246a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 196346a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 196446a6f297SJonathan Marek 196546a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 196646a6f297SJonathan Marek 196746a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 196846a6f297SJonathan Marek 196946a6f297SJonathan Marek usb_1_dwc3: dwc3@a600000 { 197046a6f297SJonathan Marek compatible = "snps,dwc3"; 197146a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 197246a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 197346a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 197446a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 197546a6f297SJonathan Marek snps,dis_enblslpm_quirk; 197646a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 197746a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 197846a6f297SJonathan Marek }; 197946a6f297SJonathan Marek }; 198046a6f297SJonathan Marek 19810085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 19820085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 19830085a33aSManivannan Sadhasivam reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 19840085a33aSManivannan Sadhasivam reg-names = "llcc_base", "llcc_broadcast_base"; 19850085a33aSManivannan Sadhasivam }; 19860085a33aSManivannan Sadhasivam 198746a6f297SJonathan Marek usb_2: usb@a8f8800 { 198846a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 198946a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 199046a6f297SJonathan Marek status = "disabled"; 199146a6f297SJonathan Marek #address-cells = <2>; 199246a6f297SJonathan Marek #size-cells = <2>; 199346a6f297SJonathan Marek ranges; 199446a6f297SJonathan Marek dma-ranges; 199546a6f297SJonathan Marek 199646a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 199746a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 199846a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 199946a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 200046a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 200146a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 200246a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 200346a6f297SJonathan Marek "sleep", "xo"; 200446a6f297SJonathan Marek 200546a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 200646a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 200746a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 200846a6f297SJonathan Marek 200946a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 201046a6f297SJonathan Marek <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 201146a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 201246a6f297SJonathan Marek <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 201346a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 201446a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 201546a6f297SJonathan Marek 201646a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 201746a6f297SJonathan Marek 201846a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 201946a6f297SJonathan Marek 202046a6f297SJonathan Marek usb_2_dwc3: dwc3@a800000 { 202146a6f297SJonathan Marek compatible = "snps,dwc3"; 202246a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 202346a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 202446a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 202546a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 202646a6f297SJonathan Marek snps,dis_enblslpm_quirk; 202746a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 202846a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 202946a6f297SJonathan Marek }; 203046a6f297SJonathan Marek }; 203146a6f297SJonathan Marek 20327c1dffd4SDmitry Baryshkov mdss: mdss@ae00000 { 20337c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-mdss"; 20347c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 20357c1dffd4SDmitry Baryshkov reg-names = "mdss"; 20367c1dffd4SDmitry Baryshkov 20377c1dffd4SDmitry Baryshkov interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>, 20387c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, 20397c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; 20407c1dffd4SDmitry Baryshkov interconnect-names = "notused", "mdp0-mem", "mdp1-mem"; 20417c1dffd4SDmitry Baryshkov 20427c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 20437c1dffd4SDmitry Baryshkov 20447c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 20457c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 20467c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 20477c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 20487c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "nrt_bus", "core"; 20497c1dffd4SDmitry Baryshkov 20507c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; 20517c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>; 20527c1dffd4SDmitry Baryshkov 20537c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 20547c1dffd4SDmitry Baryshkov interrupt-controller; 20557c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 20567c1dffd4SDmitry Baryshkov 20577c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 20587c1dffd4SDmitry Baryshkov 20597c1dffd4SDmitry Baryshkov status = "disabled"; 20607c1dffd4SDmitry Baryshkov 20617c1dffd4SDmitry Baryshkov #address-cells = <2>; 20627c1dffd4SDmitry Baryshkov #size-cells = <2>; 20637c1dffd4SDmitry Baryshkov ranges; 20647c1dffd4SDmitry Baryshkov 20657c1dffd4SDmitry Baryshkov mdss_mdp: mdp@ae01000 { 20667c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-dpu"; 20677c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 20687c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 20697c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 20707c1dffd4SDmitry Baryshkov 20717c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 20727c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 20737c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 20747c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 20757c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 20767c1dffd4SDmitry Baryshkov 20777c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, 20787c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 20797c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>, 20807c1dffd4SDmitry Baryshkov <19200000>; 20817c1dffd4SDmitry Baryshkov 20827c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 20837c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 20847c1dffd4SDmitry Baryshkov 20857c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 20867c1dffd4SDmitry Baryshkov interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 20877c1dffd4SDmitry Baryshkov 20887c1dffd4SDmitry Baryshkov status = "disabled"; 20897c1dffd4SDmitry Baryshkov 20907c1dffd4SDmitry Baryshkov ports { 20917c1dffd4SDmitry Baryshkov #address-cells = <1>; 20927c1dffd4SDmitry Baryshkov #size-cells = <0>; 20937c1dffd4SDmitry Baryshkov 20947c1dffd4SDmitry Baryshkov port@0 { 20957c1dffd4SDmitry Baryshkov reg = <0>; 20967c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 20977c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 20987c1dffd4SDmitry Baryshkov }; 20997c1dffd4SDmitry Baryshkov }; 21007c1dffd4SDmitry Baryshkov 21017c1dffd4SDmitry Baryshkov port@1 { 21027c1dffd4SDmitry Baryshkov reg = <1>; 21037c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 21047c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 21057c1dffd4SDmitry Baryshkov }; 21067c1dffd4SDmitry Baryshkov }; 21077c1dffd4SDmitry Baryshkov }; 21087c1dffd4SDmitry Baryshkov 21097c1dffd4SDmitry Baryshkov mdp_opp_table: mdp-opp-table { 21107c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 21117c1dffd4SDmitry Baryshkov 21127c1dffd4SDmitry Baryshkov opp-200000000 { 21137c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 21147c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 21157c1dffd4SDmitry Baryshkov }; 21167c1dffd4SDmitry Baryshkov 21177c1dffd4SDmitry Baryshkov opp-300000000 { 21187c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 21197c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 21207c1dffd4SDmitry Baryshkov }; 21217c1dffd4SDmitry Baryshkov 21227c1dffd4SDmitry Baryshkov opp-345000000 { 21237c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 21247c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 21257c1dffd4SDmitry Baryshkov }; 21267c1dffd4SDmitry Baryshkov 21277c1dffd4SDmitry Baryshkov opp-460000000 { 21287c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 21297c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 21307c1dffd4SDmitry Baryshkov }; 21317c1dffd4SDmitry Baryshkov }; 21327c1dffd4SDmitry Baryshkov }; 21337c1dffd4SDmitry Baryshkov 21347c1dffd4SDmitry Baryshkov dsi0: dsi@ae94000 { 21357c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 21367c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 21377c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 21387c1dffd4SDmitry Baryshkov 21397c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 21407c1dffd4SDmitry Baryshkov interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 21417c1dffd4SDmitry Baryshkov 21427c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 21437c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 21447c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 21457c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 21467c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 21477c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 21487c1dffd4SDmitry Baryshkov clock-names = "byte", 21497c1dffd4SDmitry Baryshkov "byte_intf", 21507c1dffd4SDmitry Baryshkov "pixel", 21517c1dffd4SDmitry Baryshkov "core", 21527c1dffd4SDmitry Baryshkov "iface", 21537c1dffd4SDmitry Baryshkov "bus"; 21547c1dffd4SDmitry Baryshkov 21557c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 21567c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 21577c1dffd4SDmitry Baryshkov 21587c1dffd4SDmitry Baryshkov phys = <&dsi0_phy>; 21597c1dffd4SDmitry Baryshkov phy-names = "dsi"; 21607c1dffd4SDmitry Baryshkov 21617c1dffd4SDmitry Baryshkov status = "disabled"; 21627c1dffd4SDmitry Baryshkov 21637c1dffd4SDmitry Baryshkov ports { 21647c1dffd4SDmitry Baryshkov #address-cells = <1>; 21657c1dffd4SDmitry Baryshkov #size-cells = <0>; 21667c1dffd4SDmitry Baryshkov 21677c1dffd4SDmitry Baryshkov port@0 { 21687c1dffd4SDmitry Baryshkov reg = <0>; 21697c1dffd4SDmitry Baryshkov dsi0_in: endpoint { 21707c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 21717c1dffd4SDmitry Baryshkov }; 21727c1dffd4SDmitry Baryshkov }; 21737c1dffd4SDmitry Baryshkov 21747c1dffd4SDmitry Baryshkov port@1 { 21757c1dffd4SDmitry Baryshkov reg = <1>; 21767c1dffd4SDmitry Baryshkov dsi0_out: endpoint { 21777c1dffd4SDmitry Baryshkov }; 21787c1dffd4SDmitry Baryshkov }; 21797c1dffd4SDmitry Baryshkov }; 21807c1dffd4SDmitry Baryshkov }; 21817c1dffd4SDmitry Baryshkov 21827c1dffd4SDmitry Baryshkov dsi0_phy: dsi-phy@ae94400 { 21837c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 21847c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 21857c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 21867c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 21877c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 21887c1dffd4SDmitry Baryshkov "dsi_phy_lane", 21897c1dffd4SDmitry Baryshkov "dsi_pll"; 21907c1dffd4SDmitry Baryshkov 21917c1dffd4SDmitry Baryshkov #clock-cells = <1>; 21927c1dffd4SDmitry Baryshkov #phy-cells = <0>; 21937c1dffd4SDmitry Baryshkov 21947c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 21957c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 21967c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 21977c1dffd4SDmitry Baryshkov 21987c1dffd4SDmitry Baryshkov status = "disabled"; 21997c1dffd4SDmitry Baryshkov }; 22007c1dffd4SDmitry Baryshkov 22017c1dffd4SDmitry Baryshkov dsi1: dsi@ae96000 { 22027c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 22037c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 22047c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 22057c1dffd4SDmitry Baryshkov 22067c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 22077c1dffd4SDmitry Baryshkov interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 22087c1dffd4SDmitry Baryshkov 22097c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 22107c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 22117c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 22127c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 22137c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 22147c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 22157c1dffd4SDmitry Baryshkov clock-names = "byte", 22167c1dffd4SDmitry Baryshkov "byte_intf", 22177c1dffd4SDmitry Baryshkov "pixel", 22187c1dffd4SDmitry Baryshkov "core", 22197c1dffd4SDmitry Baryshkov "iface", 22207c1dffd4SDmitry Baryshkov "bus"; 22217c1dffd4SDmitry Baryshkov 22227c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 22237c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 22247c1dffd4SDmitry Baryshkov 22257c1dffd4SDmitry Baryshkov phys = <&dsi1_phy>; 22267c1dffd4SDmitry Baryshkov phy-names = "dsi"; 22277c1dffd4SDmitry Baryshkov 22287c1dffd4SDmitry Baryshkov status = "disabled"; 22297c1dffd4SDmitry Baryshkov 22307c1dffd4SDmitry Baryshkov ports { 22317c1dffd4SDmitry Baryshkov #address-cells = <1>; 22327c1dffd4SDmitry Baryshkov #size-cells = <0>; 22337c1dffd4SDmitry Baryshkov 22347c1dffd4SDmitry Baryshkov port@0 { 22357c1dffd4SDmitry Baryshkov reg = <0>; 22367c1dffd4SDmitry Baryshkov dsi1_in: endpoint { 22377c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 22387c1dffd4SDmitry Baryshkov }; 22397c1dffd4SDmitry Baryshkov }; 22407c1dffd4SDmitry Baryshkov 22417c1dffd4SDmitry Baryshkov port@1 { 22427c1dffd4SDmitry Baryshkov reg = <1>; 22437c1dffd4SDmitry Baryshkov dsi1_out: endpoint { 22447c1dffd4SDmitry Baryshkov }; 22457c1dffd4SDmitry Baryshkov }; 22467c1dffd4SDmitry Baryshkov }; 22477c1dffd4SDmitry Baryshkov }; 22487c1dffd4SDmitry Baryshkov 22497c1dffd4SDmitry Baryshkov dsi1_phy: dsi-phy@ae96400 { 22507c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 22517c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 22527c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 22537c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 22547c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 22557c1dffd4SDmitry Baryshkov "dsi_phy_lane", 22567c1dffd4SDmitry Baryshkov "dsi_pll"; 22577c1dffd4SDmitry Baryshkov 22587c1dffd4SDmitry Baryshkov #clock-cells = <1>; 22597c1dffd4SDmitry Baryshkov #phy-cells = <0>; 22607c1dffd4SDmitry Baryshkov 22617c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 22627c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 22637c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 22647c1dffd4SDmitry Baryshkov 22657c1dffd4SDmitry Baryshkov status = "disabled"; 22667c1dffd4SDmitry Baryshkov 22677c1dffd4SDmitry Baryshkov dsi_opp_table: dsi-opp-table { 22687c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 22697c1dffd4SDmitry Baryshkov 22707c1dffd4SDmitry Baryshkov opp-187500000 { 22717c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 22727c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 22737c1dffd4SDmitry Baryshkov }; 22747c1dffd4SDmitry Baryshkov 22757c1dffd4SDmitry Baryshkov opp-300000000 { 22767c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 22777c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 22787c1dffd4SDmitry Baryshkov }; 22797c1dffd4SDmitry Baryshkov 22807c1dffd4SDmitry Baryshkov opp-358000000 { 22817c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 22827c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 22837c1dffd4SDmitry Baryshkov }; 22847c1dffd4SDmitry Baryshkov }; 22857c1dffd4SDmitry Baryshkov }; 22867c1dffd4SDmitry Baryshkov }; 22877c1dffd4SDmitry Baryshkov 22887c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 22897c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 22907c1dffd4SDmitry Baryshkov reg = <0 0x0af00000 0 0x20000>; 22913f2094dfSDmitry Baryshkov mmcx-supply = <&mmcx_reg>; 22927c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 22937c1dffd4SDmitry Baryshkov <&dsi0_phy 0>, 22947c1dffd4SDmitry Baryshkov <&dsi0_phy 1>, 22957c1dffd4SDmitry Baryshkov <&dsi1_phy 0>, 22967c1dffd4SDmitry Baryshkov <&dsi1_phy 1>, 22977c1dffd4SDmitry Baryshkov <0>, 22987c1dffd4SDmitry Baryshkov <0>, 22997c1dffd4SDmitry Baryshkov <0>, 23007c1dffd4SDmitry Baryshkov <0>, 23017c1dffd4SDmitry Baryshkov <0>, 23027c1dffd4SDmitry Baryshkov <0>, 23037c1dffd4SDmitry Baryshkov <0>, 23047c1dffd4SDmitry Baryshkov <0>, 23057c1dffd4SDmitry Baryshkov <&sleep_clk>; 23067c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 23077c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 23087c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 23097c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 23107c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 23117c1dffd4SDmitry Baryshkov "dp_link_clk_divsel_ten", 23127c1dffd4SDmitry Baryshkov "dp_vco_divided_clk_src_mux", 23137c1dffd4SDmitry Baryshkov "dptx1_phy_pll_link_clk", 23147c1dffd4SDmitry Baryshkov "dptx1_phy_pll_vco_div_clk", 23157c1dffd4SDmitry Baryshkov "dptx2_phy_pll_link_clk", 23167c1dffd4SDmitry Baryshkov "dptx2_phy_pll_vco_div_clk", 23177c1dffd4SDmitry Baryshkov "edp_phy_pll_link_clk", 23187c1dffd4SDmitry Baryshkov "edp_phy_pll_vco_div_clk", 23197c1dffd4SDmitry Baryshkov "sleep_clk"; 23207c1dffd4SDmitry Baryshkov #clock-cells = <1>; 23217c1dffd4SDmitry Baryshkov #reset-cells = <1>; 23227c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 23237c1dffd4SDmitry Baryshkov }; 23247c1dffd4SDmitry Baryshkov 232560378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 232624003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 232724003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 232860378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 232960378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 233060378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 233160378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 233260378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 233360378f1aSVenkata Narendra Kumar Gutta }; 233460378f1aSVenkata Narendra Kumar Gutta 2335bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 2336bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2337bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 2338bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 2339bac12f25SAmit Kucheria #qcom,sensors = <16>; 2340bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 2341bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 2342bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2343bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2344bac12f25SAmit Kucheria }; 2345bac12f25SAmit Kucheria 2346bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 2347bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2348bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 2349bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 2350bac12f25SAmit Kucheria #qcom,sensors = <9>; 2351bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 2352bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 2353bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2354bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2355bac12f25SAmit Kucheria }; 2356bac12f25SAmit Kucheria 2357087d537aSBjorn Andersson aoss_qmp: qmp@c300000 { 2358087d537aSBjorn Andersson compatible = "qcom,sm8250-aoss-qmp"; 2359087d537aSBjorn Andersson reg = <0 0x0c300000 0 0x100000>; 2360087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 2361087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 2362087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 2363087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 2364087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 2365087d537aSBjorn Andersson 2366087d537aSBjorn Andersson #clock-cells = <0>; 2367087d537aSBjorn Andersson #power-domain-cells = <1>; 2368087d537aSBjorn Andersson }; 2369087d537aSBjorn Andersson 2370bccc7dd2SJonathan Marek spmi_bus: spmi@c440000 { 237160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 237260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 237360378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 237460378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e600000 0x0 0x0100000>, 237560378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e700000 0x0 0x00a0000>, 237660378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c40a000 0x0 0x0026000>; 237760378f1aSVenkata Narendra Kumar Gutta reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 237860378f1aSVenkata Narendra Kumar Gutta interrupt-names = "periph_irq"; 237960378f1aSVenkata Narendra Kumar Gutta interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 238060378f1aSVenkata Narendra Kumar Gutta qcom,ee = <0>; 238160378f1aSVenkata Narendra Kumar Gutta qcom,channel = <0>; 238260378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 238360378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 238460378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 238560378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <4>; 238660378f1aSVenkata Narendra Kumar Gutta }; 238760378f1aSVenkata Narendra Kumar Gutta 238816951b49SBjorn Andersson tlmm: pinctrl@f100000 { 238916951b49SBjorn Andersson compatible = "qcom,sm8250-pinctrl"; 239016951b49SBjorn Andersson reg = <0 0x0f100000 0 0x300000>, 239116951b49SBjorn Andersson <0 0x0f500000 0 0x300000>, 239216951b49SBjorn Andersson <0 0x0f900000 0 0x300000>; 239316951b49SBjorn Andersson reg-names = "west", "south", "north"; 239416951b49SBjorn Andersson interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 239516951b49SBjorn Andersson gpio-controller; 239616951b49SBjorn Andersson #gpio-cells = <2>; 239716951b49SBjorn Andersson interrupt-controller; 239816951b49SBjorn Andersson #interrupt-cells = <2>; 239916951b49SBjorn Andersson gpio-ranges = <&tlmm 0 0 180>; 240016951b49SBjorn Andersson wakeup-parent = <&pdc>; 2401e5813b15SDmitry Baryshkov 2402b657d372SSrinivas Kandagatla pri_mi2s_active: pri-mi2s-active { 2403b657d372SSrinivas Kandagatla sclk { 2404b657d372SSrinivas Kandagatla pins = "gpio138"; 2405b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 2406b657d372SSrinivas Kandagatla drive-strength = <8>; 2407b657d372SSrinivas Kandagatla bias-disable; 2408b657d372SSrinivas Kandagatla }; 2409b657d372SSrinivas Kandagatla 2410b657d372SSrinivas Kandagatla ws { 2411b657d372SSrinivas Kandagatla pins = "gpio141"; 2412b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 2413b657d372SSrinivas Kandagatla drive-strength = <8>; 2414b657d372SSrinivas Kandagatla output-high; 2415b657d372SSrinivas Kandagatla }; 2416b657d372SSrinivas Kandagatla 2417b657d372SSrinivas Kandagatla data0 { 2418b657d372SSrinivas Kandagatla pins = "gpio139"; 2419b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 2420b657d372SSrinivas Kandagatla drive-strength = <8>; 2421b657d372SSrinivas Kandagatla bias-disable; 2422b657d372SSrinivas Kandagatla output-high; 2423b657d372SSrinivas Kandagatla }; 2424b657d372SSrinivas Kandagatla 2425b657d372SSrinivas Kandagatla data1 { 2426b657d372SSrinivas Kandagatla pins = "gpio140"; 2427b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 2428b657d372SSrinivas Kandagatla drive-strength = <8>; 2429b657d372SSrinivas Kandagatla output-high; 2430b657d372SSrinivas Kandagatla }; 2431b657d372SSrinivas Kandagatla }; 2432b657d372SSrinivas Kandagatla 2433e5813b15SDmitry Baryshkov qup_i2c0_default: qup-i2c0-default { 2434e5813b15SDmitry Baryshkov mux { 2435e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2436e5813b15SDmitry Baryshkov function = "qup0"; 2437e5813b15SDmitry Baryshkov }; 2438e5813b15SDmitry Baryshkov 2439e5813b15SDmitry Baryshkov config { 2440e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2441e5813b15SDmitry Baryshkov drive-strength = <2>; 2442e5813b15SDmitry Baryshkov bias-disable; 2443e5813b15SDmitry Baryshkov }; 2444e5813b15SDmitry Baryshkov }; 2445e5813b15SDmitry Baryshkov 2446e5813b15SDmitry Baryshkov qup_i2c1_default: qup-i2c1-default { 2447e5813b15SDmitry Baryshkov pinmux { 2448e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2449e5813b15SDmitry Baryshkov function = "qup1"; 2450e5813b15SDmitry Baryshkov }; 2451e5813b15SDmitry Baryshkov 2452e5813b15SDmitry Baryshkov config { 2453e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2454e5813b15SDmitry Baryshkov drive-strength = <2>; 2455e5813b15SDmitry Baryshkov bias-disable; 2456e5813b15SDmitry Baryshkov }; 2457e5813b15SDmitry Baryshkov }; 2458e5813b15SDmitry Baryshkov 2459e5813b15SDmitry Baryshkov qup_i2c2_default: qup-i2c2-default { 2460e5813b15SDmitry Baryshkov mux { 2461e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2462e5813b15SDmitry Baryshkov function = "qup2"; 2463e5813b15SDmitry Baryshkov }; 2464e5813b15SDmitry Baryshkov 2465e5813b15SDmitry Baryshkov config { 2466e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2467e5813b15SDmitry Baryshkov drive-strength = <2>; 2468e5813b15SDmitry Baryshkov bias-disable; 2469e5813b15SDmitry Baryshkov }; 2470e5813b15SDmitry Baryshkov }; 2471e5813b15SDmitry Baryshkov 2472e5813b15SDmitry Baryshkov qup_i2c3_default: qup-i2c3-default { 2473e5813b15SDmitry Baryshkov mux { 2474e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2475e5813b15SDmitry Baryshkov function = "qup3"; 2476e5813b15SDmitry Baryshkov }; 2477e5813b15SDmitry Baryshkov 2478e5813b15SDmitry Baryshkov config { 2479e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2480e5813b15SDmitry Baryshkov drive-strength = <2>; 2481e5813b15SDmitry Baryshkov bias-disable; 2482e5813b15SDmitry Baryshkov }; 2483e5813b15SDmitry Baryshkov }; 2484e5813b15SDmitry Baryshkov 2485e5813b15SDmitry Baryshkov qup_i2c4_default: qup-i2c4-default { 2486e5813b15SDmitry Baryshkov mux { 2487e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2488e5813b15SDmitry Baryshkov function = "qup4"; 2489e5813b15SDmitry Baryshkov }; 2490e5813b15SDmitry Baryshkov 2491e5813b15SDmitry Baryshkov config { 2492e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2493e5813b15SDmitry Baryshkov drive-strength = <2>; 2494e5813b15SDmitry Baryshkov bias-disable; 2495e5813b15SDmitry Baryshkov }; 2496e5813b15SDmitry Baryshkov }; 2497e5813b15SDmitry Baryshkov 2498e5813b15SDmitry Baryshkov qup_i2c5_default: qup-i2c5-default { 2499e5813b15SDmitry Baryshkov mux { 2500e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2501e5813b15SDmitry Baryshkov function = "qup5"; 2502e5813b15SDmitry Baryshkov }; 2503e5813b15SDmitry Baryshkov 2504e5813b15SDmitry Baryshkov config { 2505e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2506e5813b15SDmitry Baryshkov drive-strength = <2>; 2507e5813b15SDmitry Baryshkov bias-disable; 2508e5813b15SDmitry Baryshkov }; 2509e5813b15SDmitry Baryshkov }; 2510e5813b15SDmitry Baryshkov 2511e5813b15SDmitry Baryshkov qup_i2c6_default: qup-i2c6-default { 2512e5813b15SDmitry Baryshkov mux { 2513e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2514e5813b15SDmitry Baryshkov function = "qup6"; 2515e5813b15SDmitry Baryshkov }; 2516e5813b15SDmitry Baryshkov 2517e5813b15SDmitry Baryshkov config { 2518e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2519e5813b15SDmitry Baryshkov drive-strength = <2>; 2520e5813b15SDmitry Baryshkov bias-disable; 2521e5813b15SDmitry Baryshkov }; 2522e5813b15SDmitry Baryshkov }; 2523e5813b15SDmitry Baryshkov 2524e5813b15SDmitry Baryshkov qup_i2c7_default: qup-i2c7-default { 2525e5813b15SDmitry Baryshkov mux { 2526e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2527e5813b15SDmitry Baryshkov function = "qup7"; 2528e5813b15SDmitry Baryshkov }; 2529e5813b15SDmitry Baryshkov 2530e5813b15SDmitry Baryshkov config { 2531e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2532e5813b15SDmitry Baryshkov drive-strength = <2>; 2533e5813b15SDmitry Baryshkov bias-disable; 2534e5813b15SDmitry Baryshkov }; 2535e5813b15SDmitry Baryshkov }; 2536e5813b15SDmitry Baryshkov 2537e5813b15SDmitry Baryshkov qup_i2c8_default: qup-i2c8-default { 2538e5813b15SDmitry Baryshkov mux { 2539e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2540e5813b15SDmitry Baryshkov function = "qup8"; 2541e5813b15SDmitry Baryshkov }; 2542e5813b15SDmitry Baryshkov 2543e5813b15SDmitry Baryshkov config { 2544e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2545e5813b15SDmitry Baryshkov drive-strength = <2>; 2546e5813b15SDmitry Baryshkov bias-disable; 2547e5813b15SDmitry Baryshkov }; 2548e5813b15SDmitry Baryshkov }; 2549e5813b15SDmitry Baryshkov 2550e5813b15SDmitry Baryshkov qup_i2c9_default: qup-i2c9-default { 2551e5813b15SDmitry Baryshkov mux { 2552e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2553e5813b15SDmitry Baryshkov function = "qup9"; 2554e5813b15SDmitry Baryshkov }; 2555e5813b15SDmitry Baryshkov 2556e5813b15SDmitry Baryshkov config { 2557e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2558e5813b15SDmitry Baryshkov drive-strength = <2>; 2559e5813b15SDmitry Baryshkov bias-disable; 2560e5813b15SDmitry Baryshkov }; 2561e5813b15SDmitry Baryshkov }; 2562e5813b15SDmitry Baryshkov 2563e5813b15SDmitry Baryshkov qup_i2c10_default: qup-i2c10-default { 2564e5813b15SDmitry Baryshkov mux { 2565e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2566e5813b15SDmitry Baryshkov function = "qup10"; 2567e5813b15SDmitry Baryshkov }; 2568e5813b15SDmitry Baryshkov 2569e5813b15SDmitry Baryshkov config { 2570e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2571e5813b15SDmitry Baryshkov drive-strength = <2>; 2572e5813b15SDmitry Baryshkov bias-disable; 2573e5813b15SDmitry Baryshkov }; 2574e5813b15SDmitry Baryshkov }; 2575e5813b15SDmitry Baryshkov 2576e5813b15SDmitry Baryshkov qup_i2c11_default: qup-i2c11-default { 2577e5813b15SDmitry Baryshkov mux { 2578e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2579e5813b15SDmitry Baryshkov function = "qup11"; 2580e5813b15SDmitry Baryshkov }; 2581e5813b15SDmitry Baryshkov 2582e5813b15SDmitry Baryshkov config { 2583e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2584e5813b15SDmitry Baryshkov drive-strength = <2>; 2585e5813b15SDmitry Baryshkov bias-disable; 2586e5813b15SDmitry Baryshkov }; 2587e5813b15SDmitry Baryshkov }; 2588e5813b15SDmitry Baryshkov 2589e5813b15SDmitry Baryshkov qup_i2c12_default: qup-i2c12-default { 2590e5813b15SDmitry Baryshkov mux { 2591e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2592e5813b15SDmitry Baryshkov function = "qup12"; 2593e5813b15SDmitry Baryshkov }; 2594e5813b15SDmitry Baryshkov 2595e5813b15SDmitry Baryshkov config { 2596e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2597e5813b15SDmitry Baryshkov drive-strength = <2>; 2598e5813b15SDmitry Baryshkov bias-disable; 2599e5813b15SDmitry Baryshkov }; 2600e5813b15SDmitry Baryshkov }; 2601e5813b15SDmitry Baryshkov 2602e5813b15SDmitry Baryshkov qup_i2c13_default: qup-i2c13-default { 2603e5813b15SDmitry Baryshkov mux { 2604e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2605e5813b15SDmitry Baryshkov function = "qup13"; 2606e5813b15SDmitry Baryshkov }; 2607e5813b15SDmitry Baryshkov 2608e5813b15SDmitry Baryshkov config { 2609e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2610e5813b15SDmitry Baryshkov drive-strength = <2>; 2611e5813b15SDmitry Baryshkov bias-disable; 2612e5813b15SDmitry Baryshkov }; 2613e5813b15SDmitry Baryshkov }; 2614e5813b15SDmitry Baryshkov 2615e5813b15SDmitry Baryshkov qup_i2c14_default: qup-i2c14-default { 2616e5813b15SDmitry Baryshkov mux { 2617e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2618e5813b15SDmitry Baryshkov function = "qup14"; 2619e5813b15SDmitry Baryshkov }; 2620e5813b15SDmitry Baryshkov 2621e5813b15SDmitry Baryshkov config { 2622e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2623e5813b15SDmitry Baryshkov drive-strength = <2>; 2624e5813b15SDmitry Baryshkov bias-disable; 2625e5813b15SDmitry Baryshkov }; 2626e5813b15SDmitry Baryshkov }; 2627e5813b15SDmitry Baryshkov 2628e5813b15SDmitry Baryshkov qup_i2c15_default: qup-i2c15-default { 2629e5813b15SDmitry Baryshkov mux { 2630e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2631e5813b15SDmitry Baryshkov function = "qup15"; 2632e5813b15SDmitry Baryshkov }; 2633e5813b15SDmitry Baryshkov 2634e5813b15SDmitry Baryshkov config { 2635e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2636e5813b15SDmitry Baryshkov drive-strength = <2>; 2637e5813b15SDmitry Baryshkov bias-disable; 2638e5813b15SDmitry Baryshkov }; 2639e5813b15SDmitry Baryshkov }; 2640e5813b15SDmitry Baryshkov 2641e5813b15SDmitry Baryshkov qup_i2c16_default: qup-i2c16-default { 2642e5813b15SDmitry Baryshkov mux { 2643e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2644e5813b15SDmitry Baryshkov function = "qup16"; 2645e5813b15SDmitry Baryshkov }; 2646e5813b15SDmitry Baryshkov 2647e5813b15SDmitry Baryshkov config { 2648e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2649e5813b15SDmitry Baryshkov drive-strength = <2>; 2650e5813b15SDmitry Baryshkov bias-disable; 2651e5813b15SDmitry Baryshkov }; 2652e5813b15SDmitry Baryshkov }; 2653e5813b15SDmitry Baryshkov 2654e5813b15SDmitry Baryshkov qup_i2c17_default: qup-i2c17-default { 2655e5813b15SDmitry Baryshkov mux { 2656e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2657e5813b15SDmitry Baryshkov function = "qup17"; 2658e5813b15SDmitry Baryshkov }; 2659e5813b15SDmitry Baryshkov 2660e5813b15SDmitry Baryshkov config { 2661e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2662e5813b15SDmitry Baryshkov drive-strength = <2>; 2663e5813b15SDmitry Baryshkov bias-disable; 2664e5813b15SDmitry Baryshkov }; 2665e5813b15SDmitry Baryshkov }; 2666e5813b15SDmitry Baryshkov 2667e5813b15SDmitry Baryshkov qup_i2c18_default: qup-i2c18-default { 2668e5813b15SDmitry Baryshkov mux { 2669e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2670e5813b15SDmitry Baryshkov function = "qup18"; 2671e5813b15SDmitry Baryshkov }; 2672e5813b15SDmitry Baryshkov 2673e5813b15SDmitry Baryshkov config { 2674e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2675e5813b15SDmitry Baryshkov drive-strength = <2>; 2676e5813b15SDmitry Baryshkov bias-disable; 2677e5813b15SDmitry Baryshkov }; 2678e5813b15SDmitry Baryshkov }; 2679e5813b15SDmitry Baryshkov 2680e5813b15SDmitry Baryshkov qup_i2c19_default: qup-i2c19-default { 2681e5813b15SDmitry Baryshkov mux { 2682e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2683e5813b15SDmitry Baryshkov function = "qup19"; 2684e5813b15SDmitry Baryshkov }; 2685e5813b15SDmitry Baryshkov 2686e5813b15SDmitry Baryshkov config { 2687e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2688e5813b15SDmitry Baryshkov drive-strength = <2>; 2689e5813b15SDmitry Baryshkov bias-disable; 2690e5813b15SDmitry Baryshkov }; 2691e5813b15SDmitry Baryshkov }; 2692e5813b15SDmitry Baryshkov 2693e5813b15SDmitry Baryshkov qup_spi0_default: qup-spi0-default { 2694e5813b15SDmitry Baryshkov mux { 2695e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2696e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2697e5813b15SDmitry Baryshkov function = "qup0"; 2698e5813b15SDmitry Baryshkov }; 2699e5813b15SDmitry Baryshkov 2700e5813b15SDmitry Baryshkov config { 2701e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2702e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2703e5813b15SDmitry Baryshkov drive-strength = <6>; 2704e5813b15SDmitry Baryshkov bias-disable; 2705e5813b15SDmitry Baryshkov }; 2706e5813b15SDmitry Baryshkov }; 2707e5813b15SDmitry Baryshkov 2708e5813b15SDmitry Baryshkov qup_spi1_default: qup-spi1-default { 2709e5813b15SDmitry Baryshkov mux { 2710e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2711e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2712e5813b15SDmitry Baryshkov function = "qup1"; 2713e5813b15SDmitry Baryshkov }; 2714e5813b15SDmitry Baryshkov 2715e5813b15SDmitry Baryshkov config { 2716e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2717e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2718e5813b15SDmitry Baryshkov drive-strength = <6>; 2719e5813b15SDmitry Baryshkov bias-disable; 2720e5813b15SDmitry Baryshkov }; 2721e5813b15SDmitry Baryshkov }; 2722e5813b15SDmitry Baryshkov 2723e5813b15SDmitry Baryshkov qup_spi2_default: qup-spi2-default { 2724e5813b15SDmitry Baryshkov mux { 2725e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2726e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2727e5813b15SDmitry Baryshkov function = "qup2"; 2728e5813b15SDmitry Baryshkov }; 2729e5813b15SDmitry Baryshkov 2730e5813b15SDmitry Baryshkov config { 2731e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2732e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2733e5813b15SDmitry Baryshkov drive-strength = <6>; 2734e5813b15SDmitry Baryshkov bias-disable; 2735e5813b15SDmitry Baryshkov }; 2736e5813b15SDmitry Baryshkov }; 2737e5813b15SDmitry Baryshkov 2738e5813b15SDmitry Baryshkov qup_spi3_default: qup-spi3-default { 2739e5813b15SDmitry Baryshkov mux { 2740e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2741e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2742e5813b15SDmitry Baryshkov function = "qup3"; 2743e5813b15SDmitry Baryshkov }; 2744e5813b15SDmitry Baryshkov 2745e5813b15SDmitry Baryshkov config { 2746e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2747e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2748e5813b15SDmitry Baryshkov drive-strength = <6>; 2749e5813b15SDmitry Baryshkov bias-disable; 2750e5813b15SDmitry Baryshkov }; 2751e5813b15SDmitry Baryshkov }; 2752e5813b15SDmitry Baryshkov 2753e5813b15SDmitry Baryshkov qup_spi4_default: qup-spi4-default { 2754e5813b15SDmitry Baryshkov mux { 2755e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2756e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2757e5813b15SDmitry Baryshkov function = "qup4"; 2758e5813b15SDmitry Baryshkov }; 2759e5813b15SDmitry Baryshkov 2760e5813b15SDmitry Baryshkov config { 2761e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2762e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2763e5813b15SDmitry Baryshkov drive-strength = <6>; 2764e5813b15SDmitry Baryshkov bias-disable; 2765e5813b15SDmitry Baryshkov }; 2766e5813b15SDmitry Baryshkov }; 2767e5813b15SDmitry Baryshkov 2768e5813b15SDmitry Baryshkov qup_spi5_default: qup-spi5-default { 2769e5813b15SDmitry Baryshkov mux { 2770e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2771e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2772e5813b15SDmitry Baryshkov function = "qup5"; 2773e5813b15SDmitry Baryshkov }; 2774e5813b15SDmitry Baryshkov 2775e5813b15SDmitry Baryshkov config { 2776e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2777e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2778e5813b15SDmitry Baryshkov drive-strength = <6>; 2779e5813b15SDmitry Baryshkov bias-disable; 2780e5813b15SDmitry Baryshkov }; 2781e5813b15SDmitry Baryshkov }; 2782e5813b15SDmitry Baryshkov 2783e5813b15SDmitry Baryshkov qup_spi6_default: qup-spi6-default { 2784e5813b15SDmitry Baryshkov mux { 2785e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2786e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2787e5813b15SDmitry Baryshkov function = "qup6"; 2788e5813b15SDmitry Baryshkov }; 2789e5813b15SDmitry Baryshkov 2790e5813b15SDmitry Baryshkov config { 2791e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2792e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2793e5813b15SDmitry Baryshkov drive-strength = <6>; 2794e5813b15SDmitry Baryshkov bias-disable; 2795e5813b15SDmitry Baryshkov }; 2796e5813b15SDmitry Baryshkov }; 2797e5813b15SDmitry Baryshkov 2798e5813b15SDmitry Baryshkov qup_spi7_default: qup-spi7-default { 2799e5813b15SDmitry Baryshkov mux { 2800e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2801e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2802e5813b15SDmitry Baryshkov function = "qup7"; 2803e5813b15SDmitry Baryshkov }; 2804e5813b15SDmitry Baryshkov 2805e5813b15SDmitry Baryshkov config { 2806e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2807e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2808e5813b15SDmitry Baryshkov drive-strength = <6>; 2809e5813b15SDmitry Baryshkov bias-disable; 2810e5813b15SDmitry Baryshkov }; 2811e5813b15SDmitry Baryshkov }; 2812e5813b15SDmitry Baryshkov 2813e5813b15SDmitry Baryshkov qup_spi8_default: qup-spi8-default { 2814e5813b15SDmitry Baryshkov mux { 2815e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2816e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2817e5813b15SDmitry Baryshkov function = "qup8"; 2818e5813b15SDmitry Baryshkov }; 2819e5813b15SDmitry Baryshkov 2820e5813b15SDmitry Baryshkov config { 2821e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2822e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2823e5813b15SDmitry Baryshkov drive-strength = <6>; 2824e5813b15SDmitry Baryshkov bias-disable; 2825e5813b15SDmitry Baryshkov }; 2826e5813b15SDmitry Baryshkov }; 2827e5813b15SDmitry Baryshkov 2828e5813b15SDmitry Baryshkov qup_spi9_default: qup-spi9-default { 2829e5813b15SDmitry Baryshkov mux { 2830e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2831e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2832e5813b15SDmitry Baryshkov function = "qup9"; 2833e5813b15SDmitry Baryshkov }; 2834e5813b15SDmitry Baryshkov 2835e5813b15SDmitry Baryshkov config { 2836e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2837e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2838e5813b15SDmitry Baryshkov drive-strength = <6>; 2839e5813b15SDmitry Baryshkov bias-disable; 2840e5813b15SDmitry Baryshkov }; 2841e5813b15SDmitry Baryshkov }; 2842e5813b15SDmitry Baryshkov 2843e5813b15SDmitry Baryshkov qup_spi10_default: qup-spi10-default { 2844e5813b15SDmitry Baryshkov mux { 2845e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2846e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2847e5813b15SDmitry Baryshkov function = "qup10"; 2848e5813b15SDmitry Baryshkov }; 2849e5813b15SDmitry Baryshkov 2850e5813b15SDmitry Baryshkov config { 2851e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2852e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2853e5813b15SDmitry Baryshkov drive-strength = <6>; 2854e5813b15SDmitry Baryshkov bias-disable; 2855e5813b15SDmitry Baryshkov }; 2856e5813b15SDmitry Baryshkov }; 2857e5813b15SDmitry Baryshkov 2858e5813b15SDmitry Baryshkov qup_spi11_default: qup-spi11-default { 2859e5813b15SDmitry Baryshkov mux { 2860e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2861e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2862e5813b15SDmitry Baryshkov function = "qup11"; 2863e5813b15SDmitry Baryshkov }; 2864e5813b15SDmitry Baryshkov 2865e5813b15SDmitry Baryshkov config { 2866e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2867e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2868e5813b15SDmitry Baryshkov drive-strength = <6>; 2869e5813b15SDmitry Baryshkov bias-disable; 2870e5813b15SDmitry Baryshkov }; 2871e5813b15SDmitry Baryshkov }; 2872e5813b15SDmitry Baryshkov 2873e5813b15SDmitry Baryshkov qup_spi12_default: qup-spi12-default { 2874e5813b15SDmitry Baryshkov mux { 2875e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2876e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2877e5813b15SDmitry Baryshkov function = "qup12"; 2878e5813b15SDmitry Baryshkov }; 2879e5813b15SDmitry Baryshkov 2880e5813b15SDmitry Baryshkov config { 2881e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2882e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2883e5813b15SDmitry Baryshkov drive-strength = <6>; 2884e5813b15SDmitry Baryshkov bias-disable; 2885e5813b15SDmitry Baryshkov }; 2886e5813b15SDmitry Baryshkov }; 2887e5813b15SDmitry Baryshkov 2888e5813b15SDmitry Baryshkov qup_spi13_default: qup-spi13-default { 2889e5813b15SDmitry Baryshkov mux { 2890e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2891e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2892e5813b15SDmitry Baryshkov function = "qup13"; 2893e5813b15SDmitry Baryshkov }; 2894e5813b15SDmitry Baryshkov 2895e5813b15SDmitry Baryshkov config { 2896e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2897e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2898e5813b15SDmitry Baryshkov drive-strength = <6>; 2899e5813b15SDmitry Baryshkov bias-disable; 2900e5813b15SDmitry Baryshkov }; 2901e5813b15SDmitry Baryshkov }; 2902e5813b15SDmitry Baryshkov 2903e5813b15SDmitry Baryshkov qup_spi14_default: qup-spi14-default { 2904e5813b15SDmitry Baryshkov mux { 2905e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2906e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2907e5813b15SDmitry Baryshkov function = "qup14"; 2908e5813b15SDmitry Baryshkov }; 2909e5813b15SDmitry Baryshkov 2910e5813b15SDmitry Baryshkov config { 2911e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2912e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2913e5813b15SDmitry Baryshkov drive-strength = <6>; 2914e5813b15SDmitry Baryshkov bias-disable; 2915e5813b15SDmitry Baryshkov }; 2916e5813b15SDmitry Baryshkov }; 2917e5813b15SDmitry Baryshkov 2918e5813b15SDmitry Baryshkov qup_spi15_default: qup-spi15-default { 2919e5813b15SDmitry Baryshkov mux { 2920e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2921e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2922e5813b15SDmitry Baryshkov function = "qup15"; 2923e5813b15SDmitry Baryshkov }; 2924e5813b15SDmitry Baryshkov 2925e5813b15SDmitry Baryshkov config { 2926e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2927e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2928e5813b15SDmitry Baryshkov drive-strength = <6>; 2929e5813b15SDmitry Baryshkov bias-disable; 2930e5813b15SDmitry Baryshkov }; 2931e5813b15SDmitry Baryshkov }; 2932e5813b15SDmitry Baryshkov 2933e5813b15SDmitry Baryshkov qup_spi16_default: qup-spi16-default { 2934e5813b15SDmitry Baryshkov mux { 2935e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2936e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2937e5813b15SDmitry Baryshkov function = "qup16"; 2938e5813b15SDmitry Baryshkov }; 2939e5813b15SDmitry Baryshkov 2940e5813b15SDmitry Baryshkov config { 2941e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2942e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2943e5813b15SDmitry Baryshkov drive-strength = <6>; 2944e5813b15SDmitry Baryshkov bias-disable; 2945e5813b15SDmitry Baryshkov }; 2946e5813b15SDmitry Baryshkov }; 2947e5813b15SDmitry Baryshkov 2948e5813b15SDmitry Baryshkov qup_spi17_default: qup-spi17-default { 2949e5813b15SDmitry Baryshkov mux { 2950e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2951e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2952e5813b15SDmitry Baryshkov function = "qup17"; 2953e5813b15SDmitry Baryshkov }; 2954e5813b15SDmitry Baryshkov 2955e5813b15SDmitry Baryshkov config { 2956e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2957e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2958e5813b15SDmitry Baryshkov drive-strength = <6>; 2959e5813b15SDmitry Baryshkov bias-disable; 2960e5813b15SDmitry Baryshkov }; 2961e5813b15SDmitry Baryshkov }; 2962e5813b15SDmitry Baryshkov 2963e5813b15SDmitry Baryshkov qup_spi18_default: qup-spi18-default { 2964e5813b15SDmitry Baryshkov mux { 2965e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2966e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2967e5813b15SDmitry Baryshkov function = "qup18"; 2968e5813b15SDmitry Baryshkov }; 2969e5813b15SDmitry Baryshkov 2970e5813b15SDmitry Baryshkov config { 2971e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2972e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2973e5813b15SDmitry Baryshkov drive-strength = <6>; 2974e5813b15SDmitry Baryshkov bias-disable; 2975e5813b15SDmitry Baryshkov }; 2976e5813b15SDmitry Baryshkov }; 2977e5813b15SDmitry Baryshkov 2978e5813b15SDmitry Baryshkov qup_spi19_default: qup-spi19-default { 2979e5813b15SDmitry Baryshkov mux { 2980e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2981e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2982e5813b15SDmitry Baryshkov function = "qup19"; 2983e5813b15SDmitry Baryshkov }; 2984e5813b15SDmitry Baryshkov 2985e5813b15SDmitry Baryshkov config { 2986e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2987e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2988e5813b15SDmitry Baryshkov drive-strength = <6>; 2989e5813b15SDmitry Baryshkov bias-disable; 2990e5813b15SDmitry Baryshkov }; 2991e5813b15SDmitry Baryshkov }; 2992bb1dfb4dSManivannan Sadhasivam 299308a9ae2dSDmitry Baryshkov qup_uart2_default: qup-uart2-default { 299408a9ae2dSDmitry Baryshkov mux { 299508a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 299608a9ae2dSDmitry Baryshkov function = "qup2"; 299708a9ae2dSDmitry Baryshkov }; 299808a9ae2dSDmitry Baryshkov }; 299908a9ae2dSDmitry Baryshkov 300008a9ae2dSDmitry Baryshkov qup_uart6_default: qup-uart6-default { 300108a9ae2dSDmitry Baryshkov mux { 300208a9ae2dSDmitry Baryshkov pins = "gpio16", "gpio17", 300308a9ae2dSDmitry Baryshkov "gpio18", "gpio19"; 300408a9ae2dSDmitry Baryshkov function = "qup6"; 300508a9ae2dSDmitry Baryshkov }; 300608a9ae2dSDmitry Baryshkov }; 300708a9ae2dSDmitry Baryshkov 3008bb1dfb4dSManivannan Sadhasivam qup_uart12_default: qup-uart12-default { 3009bb1dfb4dSManivannan Sadhasivam mux { 3010bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 3011bb1dfb4dSManivannan Sadhasivam function = "qup12"; 3012bb1dfb4dSManivannan Sadhasivam }; 3013bb1dfb4dSManivannan Sadhasivam }; 301408a9ae2dSDmitry Baryshkov 301508a9ae2dSDmitry Baryshkov qup_uart17_default: qup-uart17-default { 301608a9ae2dSDmitry Baryshkov mux { 301708a9ae2dSDmitry Baryshkov pins = "gpio52", "gpio53", 301808a9ae2dSDmitry Baryshkov "gpio54", "gpio55"; 301908a9ae2dSDmitry Baryshkov function = "qup17"; 302008a9ae2dSDmitry Baryshkov }; 302108a9ae2dSDmitry Baryshkov }; 302208a9ae2dSDmitry Baryshkov 302308a9ae2dSDmitry Baryshkov qup_uart18_default: qup-uart18-default { 302408a9ae2dSDmitry Baryshkov mux { 302508a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 302608a9ae2dSDmitry Baryshkov function = "qup18"; 302708a9ae2dSDmitry Baryshkov }; 302808a9ae2dSDmitry Baryshkov }; 3029b657d372SSrinivas Kandagatla 3030b657d372SSrinivas Kandagatla tert_mi2s_active: tert-mi2s-active { 3031b657d372SSrinivas Kandagatla sck { 3032b657d372SSrinivas Kandagatla pins = "gpio133"; 3033b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 3034b657d372SSrinivas Kandagatla drive-strength = <8>; 3035b657d372SSrinivas Kandagatla bias-disable; 3036b657d372SSrinivas Kandagatla }; 3037b657d372SSrinivas Kandagatla 3038b657d372SSrinivas Kandagatla data0 { 3039b657d372SSrinivas Kandagatla pins = "gpio134"; 3040b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 3041b657d372SSrinivas Kandagatla drive-strength = <8>; 3042b657d372SSrinivas Kandagatla bias-disable; 3043b657d372SSrinivas Kandagatla output-high; 3044b657d372SSrinivas Kandagatla }; 3045b657d372SSrinivas Kandagatla 3046b657d372SSrinivas Kandagatla ws { 3047b657d372SSrinivas Kandagatla pins = "gpio135"; 3048b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 3049b657d372SSrinivas Kandagatla drive-strength = <8>; 3050b657d372SSrinivas Kandagatla output-high; 3051b657d372SSrinivas Kandagatla }; 3052b657d372SSrinivas Kandagatla }; 305316951b49SBjorn Andersson }; 305416951b49SBjorn Andersson 3055a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 3056a89441fcSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 3057a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 3058a89441fcSJonathan Marek #iommu-cells = <2>; 3059a89441fcSJonathan Marek #global-interrupts = <2>; 3060a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 3061a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 3062a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 3063a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 3064a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 3065a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 3066a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 3067a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 3068a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 3069a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 3070a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 3071a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 3072a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 3073a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 3074a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 3075a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 3076a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 3077a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 3078a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 3079a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 3080a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 3081a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 3082a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 3083a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 3084a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 3085a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 3086a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 3087a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 3088a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 3089a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 3090a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 3091a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 3092a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 3093a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 3094a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 3095a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 3096a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 3097a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 3098a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 3099a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 3100a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 3101a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 3102a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 3103a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 3104a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 3105a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 3106a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 3107a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 3108a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 3109a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 3110a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 3111a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 3112a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 3113a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 3114a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 3115a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 3116a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 3117a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 3118a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 3119a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 3120a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 3121a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 3122a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 3123a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 3124a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 3125a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 3126a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 3127a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 3128a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 3129a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 3130a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 3131a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 3132a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 3133a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 3134a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 3135a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 3136a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 3137a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 3138a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 3139a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 3140a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 3141a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 3142a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 3143a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 3144a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 3145a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 3146a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 3147a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 3148a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 3149a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 3150a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 3151a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 3152a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 3153a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 3154a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 3155a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 3156a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 3157a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 3158a89441fcSJonathan Marek }; 3159a89441fcSJonathan Marek 316023a89037SBjorn Andersson adsp: remoteproc@17300000 { 316123a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 316223a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 316323a89037SBjorn Andersson 316423a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 316523a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 316623a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 316723a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 316823a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 316923a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 317023a89037SBjorn Andersson "handover", "stop-ack"; 317123a89037SBjorn Andersson 317223a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 317323a89037SBjorn Andersson clock-names = "xo"; 317423a89037SBjorn Andersson 317523a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 317623a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 317723a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 317823a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 317923a89037SBjorn Andersson 318023a89037SBjorn Andersson memory-region = <&adsp_mem>; 318123a89037SBjorn Andersson 318223a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 318323a89037SBjorn Andersson qcom,smem-state-names = "stop"; 318423a89037SBjorn Andersson 318523a89037SBjorn Andersson status = "disabled"; 318623a89037SBjorn Andersson 318723a89037SBjorn Andersson glink-edge { 318823a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 318923a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 319023a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 319123a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 319223a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 319323a89037SBjorn Andersson 319423a89037SBjorn Andersson label = "lpass"; 319523a89037SBjorn Andersson qcom,remote-pid = <2>; 319625695808SJonathan Marek 319763e10791SSrinivas Kandagatla apr { 319863e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 319963e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 320063e10791SSrinivas Kandagatla qcom,apr-domain = <APR_DOMAIN_ADSP>; 320163e10791SSrinivas Kandagatla #address-cells = <1>; 320263e10791SSrinivas Kandagatla #size-cells = <0>; 320363e10791SSrinivas Kandagatla 320463e10791SSrinivas Kandagatla apr-service@3 { 320563e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 320663e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 320763e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 320863e10791SSrinivas Kandagatla }; 320963e10791SSrinivas Kandagatla 321063e10791SSrinivas Kandagatla q6afe: apr-service@4 { 321163e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 321263e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 321363e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 321463e10791SSrinivas Kandagatla q6afedai: dais { 321563e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 321663e10791SSrinivas Kandagatla #address-cells = <1>; 321763e10791SSrinivas Kandagatla #size-cells = <0>; 321863e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 321963e10791SSrinivas Kandagatla }; 322063e10791SSrinivas Kandagatla 322163e10791SSrinivas Kandagatla q6afecc: cc { 322263e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 322363e10791SSrinivas Kandagatla #clock-cells = <2>; 322463e10791SSrinivas Kandagatla }; 322563e10791SSrinivas Kandagatla }; 322663e10791SSrinivas Kandagatla 322763e10791SSrinivas Kandagatla q6asm: apr-service@7 { 322863e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 322963e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 323063e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 323163e10791SSrinivas Kandagatla q6asmdai: dais { 323263e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 323363e10791SSrinivas Kandagatla #address-cells = <1>; 323463e10791SSrinivas Kandagatla #size-cells = <0>; 323563e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 323663e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 323763e10791SSrinivas Kandagatla }; 323863e10791SSrinivas Kandagatla }; 323963e10791SSrinivas Kandagatla 324063e10791SSrinivas Kandagatla q6adm: apr-service@8 { 324163e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 324263e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 324363e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 324463e10791SSrinivas Kandagatla q6routing: routing { 324563e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 324663e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 324763e10791SSrinivas Kandagatla }; 324863e10791SSrinivas Kandagatla }; 324963e10791SSrinivas Kandagatla }; 325063e10791SSrinivas Kandagatla 325125695808SJonathan Marek fastrpc { 325225695808SJonathan Marek compatible = "qcom,fastrpc"; 325325695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 325425695808SJonathan Marek label = "adsp"; 325525695808SJonathan Marek #address-cells = <1>; 325625695808SJonathan Marek #size-cells = <0>; 325725695808SJonathan Marek 325825695808SJonathan Marek compute-cb@3 { 325925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 326025695808SJonathan Marek reg = <3>; 326125695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 326225695808SJonathan Marek }; 326325695808SJonathan Marek 326425695808SJonathan Marek compute-cb@4 { 326525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 326625695808SJonathan Marek reg = <4>; 326725695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 326825695808SJonathan Marek }; 326925695808SJonathan Marek 327025695808SJonathan Marek compute-cb@5 { 327125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 327225695808SJonathan Marek reg = <5>; 327325695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 327425695808SJonathan Marek }; 327525695808SJonathan Marek }; 327623a89037SBjorn Andersson }; 327723a89037SBjorn Andersson }; 327823a89037SBjorn Andersson 3279b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 3280b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 3281b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 3282b9ec8cbcSJonathan Marek interrupt-controller; 3283b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 3284b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 3285b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 3286b9ec8cbcSJonathan Marek }; 3287b9ec8cbcSJonathan Marek 3288e0d9acceSDmitry Baryshkov watchdog@17c10000 { 3289e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 3290e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 3291e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 3292*46a4359fSSai Prakash Ranjan interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 3293e0d9acceSDmitry Baryshkov }; 3294e0d9acceSDmitry Baryshkov 3295b9ec8cbcSJonathan Marek timer@17c20000 { 3296b9ec8cbcSJonathan Marek #address-cells = <2>; 3297b9ec8cbcSJonathan Marek #size-cells = <2>; 3298b9ec8cbcSJonathan Marek ranges; 3299b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 3300b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 3301b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 3302b9ec8cbcSJonathan Marek 3303b9ec8cbcSJonathan Marek frame@17c21000 { 3304b9ec8cbcSJonathan Marek frame-number = <0>; 3305b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 3306b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 3307b9ec8cbcSJonathan Marek reg = <0x0 0x17c21000 0x0 0x1000>, 3308b9ec8cbcSJonathan Marek <0x0 0x17c22000 0x0 0x1000>; 3309b9ec8cbcSJonathan Marek }; 3310b9ec8cbcSJonathan Marek 3311b9ec8cbcSJonathan Marek frame@17c23000 { 3312b9ec8cbcSJonathan Marek frame-number = <1>; 3313b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 3314b9ec8cbcSJonathan Marek reg = <0x0 0x17c23000 0x0 0x1000>; 3315b9ec8cbcSJonathan Marek status = "disabled"; 3316b9ec8cbcSJonathan Marek }; 3317b9ec8cbcSJonathan Marek 3318b9ec8cbcSJonathan Marek frame@17c25000 { 3319b9ec8cbcSJonathan Marek frame-number = <2>; 3320b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 3321b9ec8cbcSJonathan Marek reg = <0x0 0x17c25000 0x0 0x1000>; 3322b9ec8cbcSJonathan Marek status = "disabled"; 3323b9ec8cbcSJonathan Marek }; 3324b9ec8cbcSJonathan Marek 3325b9ec8cbcSJonathan Marek frame@17c27000 { 3326b9ec8cbcSJonathan Marek frame-number = <3>; 3327b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 3328b9ec8cbcSJonathan Marek reg = <0x0 0x17c27000 0x0 0x1000>; 3329b9ec8cbcSJonathan Marek status = "disabled"; 3330b9ec8cbcSJonathan Marek }; 3331b9ec8cbcSJonathan Marek 3332b9ec8cbcSJonathan Marek frame@17c29000 { 3333b9ec8cbcSJonathan Marek frame-number = <4>; 3334b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 3335b9ec8cbcSJonathan Marek reg = <0x0 0x17c29000 0x0 0x1000>; 3336b9ec8cbcSJonathan Marek status = "disabled"; 3337b9ec8cbcSJonathan Marek }; 3338b9ec8cbcSJonathan Marek 3339b9ec8cbcSJonathan Marek frame@17c2b000 { 3340b9ec8cbcSJonathan Marek frame-number = <5>; 3341b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 3342b9ec8cbcSJonathan Marek reg = <0x0 0x17c2b000 0x0 0x1000>; 3343b9ec8cbcSJonathan Marek status = "disabled"; 3344b9ec8cbcSJonathan Marek }; 3345b9ec8cbcSJonathan Marek 3346b9ec8cbcSJonathan Marek frame@17c2d000 { 3347b9ec8cbcSJonathan Marek frame-number = <6>; 3348b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 3349b9ec8cbcSJonathan Marek reg = <0x0 0x17c2d000 0x0 0x1000>; 3350b9ec8cbcSJonathan Marek status = "disabled"; 3351b9ec8cbcSJonathan Marek }; 3352b9ec8cbcSJonathan Marek }; 3353b9ec8cbcSJonathan Marek 335460378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 335560378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 335660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 335760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 335860378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 335960378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 336060378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 336160378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 336260378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 336360378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 336460378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 336560378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 336660378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 336760378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 336860378f1aSVenkata Narendra Kumar Gutta 336960378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 337060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 337160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 337260378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 337360378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 337460378f1aSVenkata Narendra Kumar Gutta }; 3375b6f78e27SBjorn Andersson 3376b6f78e27SBjorn Andersson rpmhpd: power-controller { 3377b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 3378b6f78e27SBjorn Andersson #power-domain-cells = <1>; 3379b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 3380b6f78e27SBjorn Andersson 3381b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 3382b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 3383b6f78e27SBjorn Andersson 3384b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 3385b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 3386b6f78e27SBjorn Andersson }; 3387b6f78e27SBjorn Andersson 3388b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 3389b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 3390b6f78e27SBjorn Andersson }; 3391b6f78e27SBjorn Andersson 3392b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 3393b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 3394b6f78e27SBjorn Andersson }; 3395b6f78e27SBjorn Andersson 3396b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 3397b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 3398b6f78e27SBjorn Andersson }; 3399b6f78e27SBjorn Andersson 3400b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 3401b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 3402b6f78e27SBjorn Andersson }; 3403b6f78e27SBjorn Andersson 3404b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 3405b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 3406b6f78e27SBjorn Andersson }; 3407b6f78e27SBjorn Andersson 3408b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 3409b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 3410b6f78e27SBjorn Andersson }; 3411b6f78e27SBjorn Andersson 3412b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 3413b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 3414b6f78e27SBjorn Andersson }; 3415b6f78e27SBjorn Andersson 3416b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 3417b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 3418b6f78e27SBjorn Andersson }; 3419b6f78e27SBjorn Andersson 3420b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 3421b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 3422b6f78e27SBjorn Andersson }; 3423b6f78e27SBjorn Andersson }; 3424b6f78e27SBjorn Andersson }; 3425e7e41a20SJonathan Marek 3426e7e41a20SJonathan Marek apps_bcm_voter: bcm_voter { 3427e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 3428e7e41a20SJonathan Marek }; 342960378f1aSVenkata Narendra Kumar Gutta }; 343079a595bbSSibi Sankar 343179a595bbSSibi Sankar epss_l3: interconnect@18591000 { 343279a595bbSSibi Sankar compatible = "qcom,sm8250-epss-l3"; 343379a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 343479a595bbSSibi Sankar 343579a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 343679a595bbSSibi Sankar clock-names = "xo", "alternate"; 343779a595bbSSibi Sankar 343879a595bbSSibi Sankar #interconnect-cells = <1>; 343979a595bbSSibi Sankar }; 344002ae4a0eSBjorn Andersson 344102ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 344202ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 344302ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 344402ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 344502ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 344602ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 344702ae4a0eSBjorn Andersson "freq-domain2"; 344802ae4a0eSBjorn Andersson 344902ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 345002ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 345102ae4a0eSBjorn Andersson 345202ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 345302ae4a0eSBjorn Andersson }; 345460378f1aSVenkata Narendra Kumar Gutta }; 345560378f1aSVenkata Narendra Kumar Gutta 345660378f1aSVenkata Narendra Kumar Gutta timer { 345760378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 345860378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 345960378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 346060378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 346160378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 346260378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 346360378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 346460378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 12 346560378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 346660378f1aSVenkata Narendra Kumar Gutta }; 3467bac12f25SAmit Kucheria 3468bac12f25SAmit Kucheria thermal-zones { 3469bac12f25SAmit Kucheria cpu0-thermal { 3470bac12f25SAmit Kucheria polling-delay-passive = <250>; 3471bac12f25SAmit Kucheria polling-delay = <1000>; 3472bac12f25SAmit Kucheria 3473bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 3474bac12f25SAmit Kucheria 3475bac12f25SAmit Kucheria trips { 3476bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 3477bac12f25SAmit Kucheria temperature = <90000>; 3478bac12f25SAmit Kucheria hysteresis = <2000>; 3479bac12f25SAmit Kucheria type = "passive"; 3480bac12f25SAmit Kucheria }; 3481bac12f25SAmit Kucheria 3482bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 3483bac12f25SAmit Kucheria temperature = <95000>; 3484bac12f25SAmit Kucheria hysteresis = <2000>; 3485bac12f25SAmit Kucheria type = "passive"; 3486bac12f25SAmit Kucheria }; 3487bac12f25SAmit Kucheria 3488bac12f25SAmit Kucheria cpu0_crit: cpu_crit { 3489bac12f25SAmit Kucheria temperature = <110000>; 3490bac12f25SAmit Kucheria hysteresis = <1000>; 3491bac12f25SAmit Kucheria type = "critical"; 3492bac12f25SAmit Kucheria }; 3493bac12f25SAmit Kucheria }; 3494bac12f25SAmit Kucheria 3495bac12f25SAmit Kucheria cooling-maps { 3496bac12f25SAmit Kucheria map0 { 3497bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 3498bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3499bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3500bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3501bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3502bac12f25SAmit Kucheria }; 3503bac12f25SAmit Kucheria map1 { 3504bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 3505bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3506bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3507bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3508bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3509bac12f25SAmit Kucheria }; 3510bac12f25SAmit Kucheria }; 3511bac12f25SAmit Kucheria }; 3512bac12f25SAmit Kucheria 3513bac12f25SAmit Kucheria cpu1-thermal { 3514bac12f25SAmit Kucheria polling-delay-passive = <250>; 3515bac12f25SAmit Kucheria polling-delay = <1000>; 3516bac12f25SAmit Kucheria 3517bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 3518bac12f25SAmit Kucheria 3519bac12f25SAmit Kucheria trips { 3520bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 3521bac12f25SAmit Kucheria temperature = <90000>; 3522bac12f25SAmit Kucheria hysteresis = <2000>; 3523bac12f25SAmit Kucheria type = "passive"; 3524bac12f25SAmit Kucheria }; 3525bac12f25SAmit Kucheria 3526bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 3527bac12f25SAmit Kucheria temperature = <95000>; 3528bac12f25SAmit Kucheria hysteresis = <2000>; 3529bac12f25SAmit Kucheria type = "passive"; 3530bac12f25SAmit Kucheria }; 3531bac12f25SAmit Kucheria 3532bac12f25SAmit Kucheria cpu1_crit: cpu_crit { 3533bac12f25SAmit Kucheria temperature = <110000>; 3534bac12f25SAmit Kucheria hysteresis = <1000>; 3535bac12f25SAmit Kucheria type = "critical"; 3536bac12f25SAmit Kucheria }; 3537bac12f25SAmit Kucheria }; 3538bac12f25SAmit Kucheria 3539bac12f25SAmit Kucheria cooling-maps { 3540bac12f25SAmit Kucheria map0 { 3541bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 3542bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3543bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3544bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3545bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3546bac12f25SAmit Kucheria }; 3547bac12f25SAmit Kucheria map1 { 3548bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 3549bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3550bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3551bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3552bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3553bac12f25SAmit Kucheria }; 3554bac12f25SAmit Kucheria }; 3555bac12f25SAmit Kucheria }; 3556bac12f25SAmit Kucheria 3557bac12f25SAmit Kucheria cpu2-thermal { 3558bac12f25SAmit Kucheria polling-delay-passive = <250>; 3559bac12f25SAmit Kucheria polling-delay = <1000>; 3560bac12f25SAmit Kucheria 3561bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 3562bac12f25SAmit Kucheria 3563bac12f25SAmit Kucheria trips { 3564bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 3565bac12f25SAmit Kucheria temperature = <90000>; 3566bac12f25SAmit Kucheria hysteresis = <2000>; 3567bac12f25SAmit Kucheria type = "passive"; 3568bac12f25SAmit Kucheria }; 3569bac12f25SAmit Kucheria 3570bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 3571bac12f25SAmit Kucheria temperature = <95000>; 3572bac12f25SAmit Kucheria hysteresis = <2000>; 3573bac12f25SAmit Kucheria type = "passive"; 3574bac12f25SAmit Kucheria }; 3575bac12f25SAmit Kucheria 3576bac12f25SAmit Kucheria cpu2_crit: cpu_crit { 3577bac12f25SAmit Kucheria temperature = <110000>; 3578bac12f25SAmit Kucheria hysteresis = <1000>; 3579bac12f25SAmit Kucheria type = "critical"; 3580bac12f25SAmit Kucheria }; 3581bac12f25SAmit Kucheria }; 3582bac12f25SAmit Kucheria 3583bac12f25SAmit Kucheria cooling-maps { 3584bac12f25SAmit Kucheria map0 { 3585bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 3586bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3587bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3588bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3589bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3590bac12f25SAmit Kucheria }; 3591bac12f25SAmit Kucheria map1 { 3592bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 3593bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3594bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3595bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3596bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3597bac12f25SAmit Kucheria }; 3598bac12f25SAmit Kucheria }; 3599bac12f25SAmit Kucheria }; 3600bac12f25SAmit Kucheria 3601bac12f25SAmit Kucheria cpu3-thermal { 3602bac12f25SAmit Kucheria polling-delay-passive = <250>; 3603bac12f25SAmit Kucheria polling-delay = <1000>; 3604bac12f25SAmit Kucheria 3605bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 3606bac12f25SAmit Kucheria 3607bac12f25SAmit Kucheria trips { 3608bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 3609bac12f25SAmit Kucheria temperature = <90000>; 3610bac12f25SAmit Kucheria hysteresis = <2000>; 3611bac12f25SAmit Kucheria type = "passive"; 3612bac12f25SAmit Kucheria }; 3613bac12f25SAmit Kucheria 3614bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 3615bac12f25SAmit Kucheria temperature = <95000>; 3616bac12f25SAmit Kucheria hysteresis = <2000>; 3617bac12f25SAmit Kucheria type = "passive"; 3618bac12f25SAmit Kucheria }; 3619bac12f25SAmit Kucheria 3620bac12f25SAmit Kucheria cpu3_crit: cpu_crit { 3621bac12f25SAmit Kucheria temperature = <110000>; 3622bac12f25SAmit Kucheria hysteresis = <1000>; 3623bac12f25SAmit Kucheria type = "critical"; 3624bac12f25SAmit Kucheria }; 3625bac12f25SAmit Kucheria }; 3626bac12f25SAmit Kucheria 3627bac12f25SAmit Kucheria cooling-maps { 3628bac12f25SAmit Kucheria map0 { 3629bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 3630bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3631bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3632bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3633bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3634bac12f25SAmit Kucheria }; 3635bac12f25SAmit Kucheria map1 { 3636bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 3637bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3638bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3639bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3640bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3641bac12f25SAmit Kucheria }; 3642bac12f25SAmit Kucheria }; 3643bac12f25SAmit Kucheria }; 3644bac12f25SAmit Kucheria 3645bac12f25SAmit Kucheria cpu4-top-thermal { 3646bac12f25SAmit Kucheria polling-delay-passive = <250>; 3647bac12f25SAmit Kucheria polling-delay = <1000>; 3648bac12f25SAmit Kucheria 3649bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 3650bac12f25SAmit Kucheria 3651bac12f25SAmit Kucheria trips { 3652bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 3653bac12f25SAmit Kucheria temperature = <90000>; 3654bac12f25SAmit Kucheria hysteresis = <2000>; 3655bac12f25SAmit Kucheria type = "passive"; 3656bac12f25SAmit Kucheria }; 3657bac12f25SAmit Kucheria 3658bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 3659bac12f25SAmit Kucheria temperature = <95000>; 3660bac12f25SAmit Kucheria hysteresis = <2000>; 3661bac12f25SAmit Kucheria type = "passive"; 3662bac12f25SAmit Kucheria }; 3663bac12f25SAmit Kucheria 3664bac12f25SAmit Kucheria cpu4_top_crit: cpu_crit { 3665bac12f25SAmit Kucheria temperature = <110000>; 3666bac12f25SAmit Kucheria hysteresis = <1000>; 3667bac12f25SAmit Kucheria type = "critical"; 3668bac12f25SAmit Kucheria }; 3669bac12f25SAmit Kucheria }; 3670bac12f25SAmit Kucheria 3671bac12f25SAmit Kucheria cooling-maps { 3672bac12f25SAmit Kucheria map0 { 3673bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 3674bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3675bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3676bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3677bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3678bac12f25SAmit Kucheria }; 3679bac12f25SAmit Kucheria map1 { 3680bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 3681bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3682bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3683bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3684bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3685bac12f25SAmit Kucheria }; 3686bac12f25SAmit Kucheria }; 3687bac12f25SAmit Kucheria }; 3688bac12f25SAmit Kucheria 3689bac12f25SAmit Kucheria cpu5-top-thermal { 3690bac12f25SAmit Kucheria polling-delay-passive = <250>; 3691bac12f25SAmit Kucheria polling-delay = <1000>; 3692bac12f25SAmit Kucheria 3693bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 3694bac12f25SAmit Kucheria 3695bac12f25SAmit Kucheria trips { 3696bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 3697bac12f25SAmit Kucheria temperature = <90000>; 3698bac12f25SAmit Kucheria hysteresis = <2000>; 3699bac12f25SAmit Kucheria type = "passive"; 3700bac12f25SAmit Kucheria }; 3701bac12f25SAmit Kucheria 3702bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 3703bac12f25SAmit Kucheria temperature = <95000>; 3704bac12f25SAmit Kucheria hysteresis = <2000>; 3705bac12f25SAmit Kucheria type = "passive"; 3706bac12f25SAmit Kucheria }; 3707bac12f25SAmit Kucheria 3708bac12f25SAmit Kucheria cpu5_top_crit: cpu_crit { 3709bac12f25SAmit Kucheria temperature = <110000>; 3710bac12f25SAmit Kucheria hysteresis = <1000>; 3711bac12f25SAmit Kucheria type = "critical"; 3712bac12f25SAmit Kucheria }; 3713bac12f25SAmit Kucheria }; 3714bac12f25SAmit Kucheria 3715bac12f25SAmit Kucheria cooling-maps { 3716bac12f25SAmit Kucheria map0 { 3717bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 3718bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3719bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3720bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3721bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3722bac12f25SAmit Kucheria }; 3723bac12f25SAmit Kucheria map1 { 3724bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 3725bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3726bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3727bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3728bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3729bac12f25SAmit Kucheria }; 3730bac12f25SAmit Kucheria }; 3731bac12f25SAmit Kucheria }; 3732bac12f25SAmit Kucheria 3733bac12f25SAmit Kucheria cpu6-top-thermal { 3734bac12f25SAmit Kucheria polling-delay-passive = <250>; 3735bac12f25SAmit Kucheria polling-delay = <1000>; 3736bac12f25SAmit Kucheria 3737bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 3738bac12f25SAmit Kucheria 3739bac12f25SAmit Kucheria trips { 3740bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 3741bac12f25SAmit Kucheria temperature = <90000>; 3742bac12f25SAmit Kucheria hysteresis = <2000>; 3743bac12f25SAmit Kucheria type = "passive"; 3744bac12f25SAmit Kucheria }; 3745bac12f25SAmit Kucheria 3746bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 3747bac12f25SAmit Kucheria temperature = <95000>; 3748bac12f25SAmit Kucheria hysteresis = <2000>; 3749bac12f25SAmit Kucheria type = "passive"; 3750bac12f25SAmit Kucheria }; 3751bac12f25SAmit Kucheria 3752bac12f25SAmit Kucheria cpu6_top_crit: cpu_crit { 3753bac12f25SAmit Kucheria temperature = <110000>; 3754bac12f25SAmit Kucheria hysteresis = <1000>; 3755bac12f25SAmit Kucheria type = "critical"; 3756bac12f25SAmit Kucheria }; 3757bac12f25SAmit Kucheria }; 3758bac12f25SAmit Kucheria 3759bac12f25SAmit Kucheria cooling-maps { 3760bac12f25SAmit Kucheria map0 { 3761bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 3762bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3763bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3764bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3765bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3766bac12f25SAmit Kucheria }; 3767bac12f25SAmit Kucheria map1 { 3768bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 3769bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3770bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3771bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3772bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3773bac12f25SAmit Kucheria }; 3774bac12f25SAmit Kucheria }; 3775bac12f25SAmit Kucheria }; 3776bac12f25SAmit Kucheria 3777bac12f25SAmit Kucheria cpu7-top-thermal { 3778bac12f25SAmit Kucheria polling-delay-passive = <250>; 3779bac12f25SAmit Kucheria polling-delay = <1000>; 3780bac12f25SAmit Kucheria 3781bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 3782bac12f25SAmit Kucheria 3783bac12f25SAmit Kucheria trips { 3784bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 3785bac12f25SAmit Kucheria temperature = <90000>; 3786bac12f25SAmit Kucheria hysteresis = <2000>; 3787bac12f25SAmit Kucheria type = "passive"; 3788bac12f25SAmit Kucheria }; 3789bac12f25SAmit Kucheria 3790bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 3791bac12f25SAmit Kucheria temperature = <95000>; 3792bac12f25SAmit Kucheria hysteresis = <2000>; 3793bac12f25SAmit Kucheria type = "passive"; 3794bac12f25SAmit Kucheria }; 3795bac12f25SAmit Kucheria 3796bac12f25SAmit Kucheria cpu7_top_crit: cpu_crit { 3797bac12f25SAmit Kucheria temperature = <110000>; 3798bac12f25SAmit Kucheria hysteresis = <1000>; 3799bac12f25SAmit Kucheria type = "critical"; 3800bac12f25SAmit Kucheria }; 3801bac12f25SAmit Kucheria }; 3802bac12f25SAmit Kucheria 3803bac12f25SAmit Kucheria cooling-maps { 3804bac12f25SAmit Kucheria map0 { 3805bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 3806bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3807bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3808bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3809bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3810bac12f25SAmit Kucheria }; 3811bac12f25SAmit Kucheria map1 { 3812bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 3813bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3814bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3815bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3816bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3817bac12f25SAmit Kucheria }; 3818bac12f25SAmit Kucheria }; 3819bac12f25SAmit Kucheria }; 3820bac12f25SAmit Kucheria 3821bac12f25SAmit Kucheria cpu4-bottom-thermal { 3822bac12f25SAmit Kucheria polling-delay-passive = <250>; 3823bac12f25SAmit Kucheria polling-delay = <1000>; 3824bac12f25SAmit Kucheria 3825bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 3826bac12f25SAmit Kucheria 3827bac12f25SAmit Kucheria trips { 3828bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 3829bac12f25SAmit Kucheria temperature = <90000>; 3830bac12f25SAmit Kucheria hysteresis = <2000>; 3831bac12f25SAmit Kucheria type = "passive"; 3832bac12f25SAmit Kucheria }; 3833bac12f25SAmit Kucheria 3834bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 3835bac12f25SAmit Kucheria temperature = <95000>; 3836bac12f25SAmit Kucheria hysteresis = <2000>; 3837bac12f25SAmit Kucheria type = "passive"; 3838bac12f25SAmit Kucheria }; 3839bac12f25SAmit Kucheria 3840bac12f25SAmit Kucheria cpu4_bottom_crit: cpu_crit { 3841bac12f25SAmit Kucheria temperature = <110000>; 3842bac12f25SAmit Kucheria hysteresis = <1000>; 3843bac12f25SAmit Kucheria type = "critical"; 3844bac12f25SAmit Kucheria }; 3845bac12f25SAmit Kucheria }; 3846bac12f25SAmit Kucheria 3847bac12f25SAmit Kucheria cooling-maps { 3848bac12f25SAmit Kucheria map0 { 3849bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 3850bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3851bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3852bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3853bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3854bac12f25SAmit Kucheria }; 3855bac12f25SAmit Kucheria map1 { 3856bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 3857bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3858bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3859bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3860bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3861bac12f25SAmit Kucheria }; 3862bac12f25SAmit Kucheria }; 3863bac12f25SAmit Kucheria }; 3864bac12f25SAmit Kucheria 3865bac12f25SAmit Kucheria cpu5-bottom-thermal { 3866bac12f25SAmit Kucheria polling-delay-passive = <250>; 3867bac12f25SAmit Kucheria polling-delay = <1000>; 3868bac12f25SAmit Kucheria 3869bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 3870bac12f25SAmit Kucheria 3871bac12f25SAmit Kucheria trips { 3872bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 3873bac12f25SAmit Kucheria temperature = <90000>; 3874bac12f25SAmit Kucheria hysteresis = <2000>; 3875bac12f25SAmit Kucheria type = "passive"; 3876bac12f25SAmit Kucheria }; 3877bac12f25SAmit Kucheria 3878bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 3879bac12f25SAmit Kucheria temperature = <95000>; 3880bac12f25SAmit Kucheria hysteresis = <2000>; 3881bac12f25SAmit Kucheria type = "passive"; 3882bac12f25SAmit Kucheria }; 3883bac12f25SAmit Kucheria 3884bac12f25SAmit Kucheria cpu5_bottom_crit: cpu_crit { 3885bac12f25SAmit Kucheria temperature = <110000>; 3886bac12f25SAmit Kucheria hysteresis = <1000>; 3887bac12f25SAmit Kucheria type = "critical"; 3888bac12f25SAmit Kucheria }; 3889bac12f25SAmit Kucheria }; 3890bac12f25SAmit Kucheria 3891bac12f25SAmit Kucheria cooling-maps { 3892bac12f25SAmit Kucheria map0 { 3893bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 3894bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3895bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3896bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3897bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3898bac12f25SAmit Kucheria }; 3899bac12f25SAmit Kucheria map1 { 3900bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 3901bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3902bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3903bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3904bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3905bac12f25SAmit Kucheria }; 3906bac12f25SAmit Kucheria }; 3907bac12f25SAmit Kucheria }; 3908bac12f25SAmit Kucheria 3909bac12f25SAmit Kucheria cpu6-bottom-thermal { 3910bac12f25SAmit Kucheria polling-delay-passive = <250>; 3911bac12f25SAmit Kucheria polling-delay = <1000>; 3912bac12f25SAmit Kucheria 3913bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 3914bac12f25SAmit Kucheria 3915bac12f25SAmit Kucheria trips { 3916bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 3917bac12f25SAmit Kucheria temperature = <90000>; 3918bac12f25SAmit Kucheria hysteresis = <2000>; 3919bac12f25SAmit Kucheria type = "passive"; 3920bac12f25SAmit Kucheria }; 3921bac12f25SAmit Kucheria 3922bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 3923bac12f25SAmit Kucheria temperature = <95000>; 3924bac12f25SAmit Kucheria hysteresis = <2000>; 3925bac12f25SAmit Kucheria type = "passive"; 3926bac12f25SAmit Kucheria }; 3927bac12f25SAmit Kucheria 3928bac12f25SAmit Kucheria cpu6_bottom_crit: cpu_crit { 3929bac12f25SAmit Kucheria temperature = <110000>; 3930bac12f25SAmit Kucheria hysteresis = <1000>; 3931bac12f25SAmit Kucheria type = "critical"; 3932bac12f25SAmit Kucheria }; 3933bac12f25SAmit Kucheria }; 3934bac12f25SAmit Kucheria 3935bac12f25SAmit Kucheria cooling-maps { 3936bac12f25SAmit Kucheria map0 { 3937bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 3938bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3939bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3940bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3941bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3942bac12f25SAmit Kucheria }; 3943bac12f25SAmit Kucheria map1 { 3944bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 3945bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3946bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3947bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3948bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3949bac12f25SAmit Kucheria }; 3950bac12f25SAmit Kucheria }; 3951bac12f25SAmit Kucheria }; 3952bac12f25SAmit Kucheria 3953bac12f25SAmit Kucheria cpu7-bottom-thermal { 3954bac12f25SAmit Kucheria polling-delay-passive = <250>; 3955bac12f25SAmit Kucheria polling-delay = <1000>; 3956bac12f25SAmit Kucheria 3957bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 3958bac12f25SAmit Kucheria 3959bac12f25SAmit Kucheria trips { 3960bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 3961bac12f25SAmit Kucheria temperature = <90000>; 3962bac12f25SAmit Kucheria hysteresis = <2000>; 3963bac12f25SAmit Kucheria type = "passive"; 3964bac12f25SAmit Kucheria }; 3965bac12f25SAmit Kucheria 3966bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 3967bac12f25SAmit Kucheria temperature = <95000>; 3968bac12f25SAmit Kucheria hysteresis = <2000>; 3969bac12f25SAmit Kucheria type = "passive"; 3970bac12f25SAmit Kucheria }; 3971bac12f25SAmit Kucheria 3972bac12f25SAmit Kucheria cpu7_bottom_crit: cpu_crit { 3973bac12f25SAmit Kucheria temperature = <110000>; 3974bac12f25SAmit Kucheria hysteresis = <1000>; 3975bac12f25SAmit Kucheria type = "critical"; 3976bac12f25SAmit Kucheria }; 3977bac12f25SAmit Kucheria }; 3978bac12f25SAmit Kucheria 3979bac12f25SAmit Kucheria cooling-maps { 3980bac12f25SAmit Kucheria map0 { 3981bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 3982bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3983bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3984bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3985bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3986bac12f25SAmit Kucheria }; 3987bac12f25SAmit Kucheria map1 { 3988bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 3989bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3990bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3991bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3992bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3993bac12f25SAmit Kucheria }; 3994bac12f25SAmit Kucheria }; 3995bac12f25SAmit Kucheria }; 3996bac12f25SAmit Kucheria 3997bac12f25SAmit Kucheria aoss0-thermal { 3998bac12f25SAmit Kucheria polling-delay-passive = <250>; 3999bac12f25SAmit Kucheria polling-delay = <1000>; 4000bac12f25SAmit Kucheria 4001bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 4002bac12f25SAmit Kucheria 4003bac12f25SAmit Kucheria trips { 4004bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 4005bac12f25SAmit Kucheria temperature = <90000>; 4006bac12f25SAmit Kucheria hysteresis = <2000>; 4007bac12f25SAmit Kucheria type = "hot"; 4008bac12f25SAmit Kucheria }; 4009bac12f25SAmit Kucheria }; 4010bac12f25SAmit Kucheria }; 4011bac12f25SAmit Kucheria 4012bac12f25SAmit Kucheria cluster0-thermal { 4013bac12f25SAmit Kucheria polling-delay-passive = <250>; 4014bac12f25SAmit Kucheria polling-delay = <1000>; 4015bac12f25SAmit Kucheria 4016bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 4017bac12f25SAmit Kucheria 4018bac12f25SAmit Kucheria trips { 4019bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 4020bac12f25SAmit Kucheria temperature = <90000>; 4021bac12f25SAmit Kucheria hysteresis = <2000>; 4022bac12f25SAmit Kucheria type = "hot"; 4023bac12f25SAmit Kucheria }; 4024bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 4025bac12f25SAmit Kucheria temperature = <110000>; 4026bac12f25SAmit Kucheria hysteresis = <2000>; 4027bac12f25SAmit Kucheria type = "critical"; 4028bac12f25SAmit Kucheria }; 4029bac12f25SAmit Kucheria }; 4030bac12f25SAmit Kucheria }; 4031bac12f25SAmit Kucheria 4032bac12f25SAmit Kucheria cluster1-thermal { 4033bac12f25SAmit Kucheria polling-delay-passive = <250>; 4034bac12f25SAmit Kucheria polling-delay = <1000>; 4035bac12f25SAmit Kucheria 4036bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 4037bac12f25SAmit Kucheria 4038bac12f25SAmit Kucheria trips { 4039bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 4040bac12f25SAmit Kucheria temperature = <90000>; 4041bac12f25SAmit Kucheria hysteresis = <2000>; 4042bac12f25SAmit Kucheria type = "hot"; 4043bac12f25SAmit Kucheria }; 4044bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 4045bac12f25SAmit Kucheria temperature = <110000>; 4046bac12f25SAmit Kucheria hysteresis = <2000>; 4047bac12f25SAmit Kucheria type = "critical"; 4048bac12f25SAmit Kucheria }; 4049bac12f25SAmit Kucheria }; 4050bac12f25SAmit Kucheria }; 4051bac12f25SAmit Kucheria 4052bac12f25SAmit Kucheria gpu-thermal-top { 4053bac12f25SAmit Kucheria polling-delay-passive = <250>; 4054bac12f25SAmit Kucheria polling-delay = <1000>; 4055bac12f25SAmit Kucheria 4056bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 4057bac12f25SAmit Kucheria 4058bac12f25SAmit Kucheria trips { 4059bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 4060bac12f25SAmit Kucheria temperature = <90000>; 4061bac12f25SAmit Kucheria hysteresis = <2000>; 4062bac12f25SAmit Kucheria type = "hot"; 4063bac12f25SAmit Kucheria }; 4064bac12f25SAmit Kucheria }; 4065bac12f25SAmit Kucheria }; 4066bac12f25SAmit Kucheria 4067bac12f25SAmit Kucheria aoss1-thermal { 4068bac12f25SAmit Kucheria polling-delay-passive = <250>; 4069bac12f25SAmit Kucheria polling-delay = <1000>; 4070bac12f25SAmit Kucheria 4071bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 4072bac12f25SAmit Kucheria 4073bac12f25SAmit Kucheria trips { 4074bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 4075bac12f25SAmit Kucheria temperature = <90000>; 4076bac12f25SAmit Kucheria hysteresis = <2000>; 4077bac12f25SAmit Kucheria type = "hot"; 4078bac12f25SAmit Kucheria }; 4079bac12f25SAmit Kucheria }; 4080bac12f25SAmit Kucheria }; 4081bac12f25SAmit Kucheria 4082bac12f25SAmit Kucheria wlan-thermal { 4083bac12f25SAmit Kucheria polling-delay-passive = <250>; 4084bac12f25SAmit Kucheria polling-delay = <1000>; 4085bac12f25SAmit Kucheria 4086bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 4087bac12f25SAmit Kucheria 4088bac12f25SAmit Kucheria trips { 4089bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 4090bac12f25SAmit Kucheria temperature = <90000>; 4091bac12f25SAmit Kucheria hysteresis = <2000>; 4092bac12f25SAmit Kucheria type = "hot"; 4093bac12f25SAmit Kucheria }; 4094bac12f25SAmit Kucheria }; 4095bac12f25SAmit Kucheria }; 4096bac12f25SAmit Kucheria 4097bac12f25SAmit Kucheria video-thermal { 4098bac12f25SAmit Kucheria polling-delay-passive = <250>; 4099bac12f25SAmit Kucheria polling-delay = <1000>; 4100bac12f25SAmit Kucheria 4101bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 4102bac12f25SAmit Kucheria 4103bac12f25SAmit Kucheria trips { 4104bac12f25SAmit Kucheria video_alert0: trip-point0 { 4105bac12f25SAmit Kucheria temperature = <90000>; 4106bac12f25SAmit Kucheria hysteresis = <2000>; 4107bac12f25SAmit Kucheria type = "hot"; 4108bac12f25SAmit Kucheria }; 4109bac12f25SAmit Kucheria }; 4110bac12f25SAmit Kucheria }; 4111bac12f25SAmit Kucheria 4112bac12f25SAmit Kucheria mem-thermal { 4113bac12f25SAmit Kucheria polling-delay-passive = <250>; 4114bac12f25SAmit Kucheria polling-delay = <1000>; 4115bac12f25SAmit Kucheria 4116bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 4117bac12f25SAmit Kucheria 4118bac12f25SAmit Kucheria trips { 4119bac12f25SAmit Kucheria mem_alert0: trip-point0 { 4120bac12f25SAmit Kucheria temperature = <90000>; 4121bac12f25SAmit Kucheria hysteresis = <2000>; 4122bac12f25SAmit Kucheria type = "hot"; 4123bac12f25SAmit Kucheria }; 4124bac12f25SAmit Kucheria }; 4125bac12f25SAmit Kucheria }; 4126bac12f25SAmit Kucheria 4127bac12f25SAmit Kucheria q6-hvx-thermal { 4128bac12f25SAmit Kucheria polling-delay-passive = <250>; 4129bac12f25SAmit Kucheria polling-delay = <1000>; 4130bac12f25SAmit Kucheria 4131bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 4132bac12f25SAmit Kucheria 4133bac12f25SAmit Kucheria trips { 4134bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 4135bac12f25SAmit Kucheria temperature = <90000>; 4136bac12f25SAmit Kucheria hysteresis = <2000>; 4137bac12f25SAmit Kucheria type = "hot"; 4138bac12f25SAmit Kucheria }; 4139bac12f25SAmit Kucheria }; 4140bac12f25SAmit Kucheria }; 4141bac12f25SAmit Kucheria 4142bac12f25SAmit Kucheria camera-thermal { 4143bac12f25SAmit Kucheria polling-delay-passive = <250>; 4144bac12f25SAmit Kucheria polling-delay = <1000>; 4145bac12f25SAmit Kucheria 4146bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 4147bac12f25SAmit Kucheria 4148bac12f25SAmit Kucheria trips { 4149bac12f25SAmit Kucheria camera_alert0: trip-point0 { 4150bac12f25SAmit Kucheria temperature = <90000>; 4151bac12f25SAmit Kucheria hysteresis = <2000>; 4152bac12f25SAmit Kucheria type = "hot"; 4153bac12f25SAmit Kucheria }; 4154bac12f25SAmit Kucheria }; 4155bac12f25SAmit Kucheria }; 4156bac12f25SAmit Kucheria 4157bac12f25SAmit Kucheria compute-thermal { 4158bac12f25SAmit Kucheria polling-delay-passive = <250>; 4159bac12f25SAmit Kucheria polling-delay = <1000>; 4160bac12f25SAmit Kucheria 4161bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 4162bac12f25SAmit Kucheria 4163bac12f25SAmit Kucheria trips { 4164bac12f25SAmit Kucheria compute_alert0: trip-point0 { 4165bac12f25SAmit Kucheria temperature = <90000>; 4166bac12f25SAmit Kucheria hysteresis = <2000>; 4167bac12f25SAmit Kucheria type = "hot"; 4168bac12f25SAmit Kucheria }; 4169bac12f25SAmit Kucheria }; 4170bac12f25SAmit Kucheria }; 4171bac12f25SAmit Kucheria 4172bac12f25SAmit Kucheria npu-thermal { 4173bac12f25SAmit Kucheria polling-delay-passive = <250>; 4174bac12f25SAmit Kucheria polling-delay = <1000>; 4175bac12f25SAmit Kucheria 4176bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 4177bac12f25SAmit Kucheria 4178bac12f25SAmit Kucheria trips { 4179bac12f25SAmit Kucheria npu_alert0: trip-point0 { 4180bac12f25SAmit Kucheria temperature = <90000>; 4181bac12f25SAmit Kucheria hysteresis = <2000>; 4182bac12f25SAmit Kucheria type = "hot"; 4183bac12f25SAmit Kucheria }; 4184bac12f25SAmit Kucheria }; 4185bac12f25SAmit Kucheria }; 4186bac12f25SAmit Kucheria 4187bac12f25SAmit Kucheria gpu-thermal-bottom { 4188bac12f25SAmit Kucheria polling-delay-passive = <250>; 4189bac12f25SAmit Kucheria polling-delay = <1000>; 4190bac12f25SAmit Kucheria 4191bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 4192bac12f25SAmit Kucheria 4193bac12f25SAmit Kucheria trips { 4194bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 4195bac12f25SAmit Kucheria temperature = <90000>; 4196bac12f25SAmit Kucheria hysteresis = <2000>; 4197bac12f25SAmit Kucheria type = "hot"; 4198bac12f25SAmit Kucheria }; 4199bac12f25SAmit Kucheria }; 4200bac12f25SAmit Kucheria }; 4201bac12f25SAmit Kucheria }; 420260378f1aSVenkata Narendra Kumar Gutta}; 4203