160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 1179a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 127c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 13e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 14087d537aSBjorn Andersson#include <dt-bindings/power/qcom-aoss-qmp.h> 15b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 17bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 1860378f1aSVenkata Narendra Kumar Gutta 1960378f1aSVenkata Narendra Kumar Gutta/ { 2060378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2160378f1aSVenkata Narendra Kumar Gutta 2260378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 2360378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 2460378f1aSVenkata Narendra Kumar Gutta 25e5813b15SDmitry Baryshkov aliases { 26e5813b15SDmitry Baryshkov i2c0 = &i2c0; 27e5813b15SDmitry Baryshkov i2c1 = &i2c1; 28e5813b15SDmitry Baryshkov i2c2 = &i2c2; 29e5813b15SDmitry Baryshkov i2c3 = &i2c3; 30e5813b15SDmitry Baryshkov i2c4 = &i2c4; 31e5813b15SDmitry Baryshkov i2c5 = &i2c5; 32e5813b15SDmitry Baryshkov i2c6 = &i2c6; 33e5813b15SDmitry Baryshkov i2c7 = &i2c7; 34e5813b15SDmitry Baryshkov i2c8 = &i2c8; 35e5813b15SDmitry Baryshkov i2c9 = &i2c9; 36e5813b15SDmitry Baryshkov i2c10 = &i2c10; 37e5813b15SDmitry Baryshkov i2c11 = &i2c11; 38e5813b15SDmitry Baryshkov i2c12 = &i2c12; 39e5813b15SDmitry Baryshkov i2c13 = &i2c13; 40e5813b15SDmitry Baryshkov i2c14 = &i2c14; 41e5813b15SDmitry Baryshkov i2c15 = &i2c15; 42e5813b15SDmitry Baryshkov i2c16 = &i2c16; 43e5813b15SDmitry Baryshkov i2c17 = &i2c17; 44e5813b15SDmitry Baryshkov i2c18 = &i2c18; 45e5813b15SDmitry Baryshkov i2c19 = &i2c19; 46e5813b15SDmitry Baryshkov spi0 = &spi0; 47e5813b15SDmitry Baryshkov spi1 = &spi1; 48e5813b15SDmitry Baryshkov spi2 = &spi2; 49e5813b15SDmitry Baryshkov spi3 = &spi3; 50e5813b15SDmitry Baryshkov spi4 = &spi4; 51e5813b15SDmitry Baryshkov spi5 = &spi5; 52e5813b15SDmitry Baryshkov spi6 = &spi6; 53e5813b15SDmitry Baryshkov spi7 = &spi7; 54e5813b15SDmitry Baryshkov spi8 = &spi8; 55e5813b15SDmitry Baryshkov spi9 = &spi9; 56e5813b15SDmitry Baryshkov spi10 = &spi10; 57e5813b15SDmitry Baryshkov spi11 = &spi11; 58e5813b15SDmitry Baryshkov spi12 = &spi12; 59e5813b15SDmitry Baryshkov spi13 = &spi13; 60e5813b15SDmitry Baryshkov spi14 = &spi14; 61e5813b15SDmitry Baryshkov spi15 = &spi15; 62e5813b15SDmitry Baryshkov spi16 = &spi16; 63e5813b15SDmitry Baryshkov spi17 = &spi17; 64e5813b15SDmitry Baryshkov spi18 = &spi18; 65e5813b15SDmitry Baryshkov spi19 = &spi19; 66e5813b15SDmitry Baryshkov }; 67e5813b15SDmitry Baryshkov 6860378f1aSVenkata Narendra Kumar Gutta chosen { }; 6960378f1aSVenkata Narendra Kumar Gutta 7060378f1aSVenkata Narendra Kumar Gutta clocks { 7160378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7260378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 7360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 7460378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 7560378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 7660378f1aSVenkata Narendra Kumar Gutta }; 7760378f1aSVenkata Narendra Kumar Gutta 7860378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 7960378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 809ff8b059SJonathan Marek clock-frequency = <32768>; 8160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8260378f1aSVenkata Narendra Kumar Gutta }; 8360378f1aSVenkata Narendra Kumar Gutta }; 8460378f1aSVenkata Narendra Kumar Gutta 8560378f1aSVenkata Narendra Kumar Gutta cpus { 8660378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 8760378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 8860378f1aSVenkata Narendra Kumar Gutta 8960378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9060378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9160378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 9360378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 9460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 9502ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 96bac12f25SAmit Kucheria #cooling-cells = <2>; 9760378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 9860378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 9960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 10060378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 10160378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 10260378f1aSVenkata Narendra Kumar Gutta }; 10360378f1aSVenkata Narendra Kumar Gutta }; 10460378f1aSVenkata Narendra Kumar Gutta }; 10560378f1aSVenkata Narendra Kumar Gutta 10660378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 10760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 10860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 10960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 11060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 11160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 11202ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 113bac12f25SAmit Kucheria #cooling-cells = <2>; 11460378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 11560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 11660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11760378f1aSVenkata Narendra Kumar Gutta }; 11860378f1aSVenkata Narendra Kumar Gutta }; 11960378f1aSVenkata Narendra Kumar Gutta 12060378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 12160378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 12360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 12460378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 12560378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 12602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 127bac12f25SAmit Kucheria #cooling-cells = <2>; 12860378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 12960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 13060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 13160378f1aSVenkata Narendra Kumar Gutta }; 13260378f1aSVenkata Narendra Kumar Gutta }; 13360378f1aSVenkata Narendra Kumar Gutta 13460378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 13560378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 13660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 13760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 13860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 13960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 14002ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 141bac12f25SAmit Kucheria #cooling-cells = <2>; 14260378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 14360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 14460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 14560378f1aSVenkata Narendra Kumar Gutta }; 14660378f1aSVenkata Narendra Kumar Gutta }; 14760378f1aSVenkata Narendra Kumar Gutta 14860378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 14960378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 15060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 15160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 15260378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 15360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 15402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 155bac12f25SAmit Kucheria #cooling-cells = <2>; 15660378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 15760378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 15860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 15960378f1aSVenkata Narendra Kumar Gutta }; 16060378f1aSVenkata Narendra Kumar Gutta }; 16160378f1aSVenkata Narendra Kumar Gutta 16260378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 16360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 16460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 16560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 16660378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 16760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 16802ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 169bac12f25SAmit Kucheria #cooling-cells = <2>; 17060378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 17160378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 17260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 17360378f1aSVenkata Narendra Kumar Gutta }; 17460378f1aSVenkata Narendra Kumar Gutta 17560378f1aSVenkata Narendra Kumar Gutta }; 17660378f1aSVenkata Narendra Kumar Gutta 17760378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 17860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 17960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 18160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 18260378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 18302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 184bac12f25SAmit Kucheria #cooling-cells = <2>; 18560378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 18660378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 18760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 18860378f1aSVenkata Narendra Kumar Gutta }; 18960378f1aSVenkata Narendra Kumar Gutta }; 19060378f1aSVenkata Narendra Kumar Gutta 19160378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 19260378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 19360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 19460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 19560378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 19660378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 19702ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 198bac12f25SAmit Kucheria #cooling-cells = <2>; 19960378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 20060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 20160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20260378f1aSVenkata Narendra Kumar Gutta }; 20360378f1aSVenkata Narendra Kumar Gutta }; 20460378f1aSVenkata Narendra Kumar Gutta }; 20560378f1aSVenkata Narendra Kumar Gutta 20660378f1aSVenkata Narendra Kumar Gutta firmware { 20760378f1aSVenkata Narendra Kumar Gutta scm: scm { 20860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,scm"; 20960378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 21060378f1aSVenkata Narendra Kumar Gutta }; 21160378f1aSVenkata Narendra Kumar Gutta }; 21260378f1aSVenkata Narendra Kumar Gutta 21360378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 21460378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 21560378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 21660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 21760378f1aSVenkata Narendra Kumar Gutta }; 21860378f1aSVenkata Narendra Kumar Gutta 219*3f2094dfSDmitry Baryshkov mmcx_reg: mmcx-reg { 220*3f2094dfSDmitry Baryshkov compatible = "regulator-fixed-domain"; 221*3f2094dfSDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 222*3f2094dfSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 223*3f2094dfSDmitry Baryshkov regulator-name = "MMCX"; 224*3f2094dfSDmitry Baryshkov }; 225*3f2094dfSDmitry Baryshkov 22660378f1aSVenkata Narendra Kumar Gutta pmu { 22760378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 22860378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 22960378f1aSVenkata Narendra Kumar Gutta }; 23060378f1aSVenkata Narendra Kumar Gutta 23160378f1aSVenkata Narendra Kumar Gutta psci { 23260378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 23360378f1aSVenkata Narendra Kumar Gutta method = "smc"; 23460378f1aSVenkata Narendra Kumar Gutta }; 23560378f1aSVenkata Narendra Kumar Gutta 23660378f1aSVenkata Narendra Kumar Gutta reserved-memory { 23760378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 23860378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 23960378f1aSVenkata Narendra Kumar Gutta ranges; 24060378f1aSVenkata Narendra Kumar Gutta 24160378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 24260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 24360378f1aSVenkata Narendra Kumar Gutta no-map; 24460378f1aSVenkata Narendra Kumar Gutta }; 24560378f1aSVenkata Narendra Kumar Gutta 24660378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 24760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 24860378f1aSVenkata Narendra Kumar Gutta no-map; 24960378f1aSVenkata Narendra Kumar Gutta }; 25060378f1aSVenkata Narendra Kumar Gutta 25160378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 25260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 25360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 25460378f1aSVenkata Narendra Kumar Gutta no-map; 25560378f1aSVenkata Narendra Kumar Gutta }; 25660378f1aSVenkata Narendra Kumar Gutta 25760378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 25860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 25960378f1aSVenkata Narendra Kumar Gutta no-map; 26060378f1aSVenkata Narendra Kumar Gutta }; 26160378f1aSVenkata Narendra Kumar Gutta 26260378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 26360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 26460378f1aSVenkata Narendra Kumar Gutta no-map; 26560378f1aSVenkata Narendra Kumar Gutta }; 26660378f1aSVenkata Narendra Kumar Gutta 26760378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 26860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 26960378f1aSVenkata Narendra Kumar Gutta no-map; 27060378f1aSVenkata Narendra Kumar Gutta }; 27160378f1aSVenkata Narendra Kumar Gutta 27260378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 27360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 27460378f1aSVenkata Narendra Kumar Gutta no-map; 27560378f1aSVenkata Narendra Kumar Gutta }; 27660378f1aSVenkata Narendra Kumar Gutta 27760378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 27860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 27960378f1aSVenkata Narendra Kumar Gutta no-map; 28060378f1aSVenkata Narendra Kumar Gutta }; 28160378f1aSVenkata Narendra Kumar Gutta 28260378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 28360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 28460378f1aSVenkata Narendra Kumar Gutta no-map; 28560378f1aSVenkata Narendra Kumar Gutta }; 28660378f1aSVenkata Narendra Kumar Gutta 28760378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 28860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 28960378f1aSVenkata Narendra Kumar Gutta no-map; 29060378f1aSVenkata Narendra Kumar Gutta }; 29160378f1aSVenkata Narendra Kumar Gutta 29260378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 29360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 29460378f1aSVenkata Narendra Kumar Gutta no-map; 29560378f1aSVenkata Narendra Kumar Gutta }; 29660378f1aSVenkata Narendra Kumar Gutta 29760378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 29860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 29960378f1aSVenkata Narendra Kumar Gutta no-map; 30060378f1aSVenkata Narendra Kumar Gutta }; 30160378f1aSVenkata Narendra Kumar Gutta 30260378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 30360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 30460378f1aSVenkata Narendra Kumar Gutta no-map; 30560378f1aSVenkata Narendra Kumar Gutta }; 30660378f1aSVenkata Narendra Kumar Gutta 30760378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 30860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 30960378f1aSVenkata Narendra Kumar Gutta no-map; 31060378f1aSVenkata Narendra Kumar Gutta }; 31160378f1aSVenkata Narendra Kumar Gutta 31260378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 31360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 31460378f1aSVenkata Narendra Kumar Gutta no-map; 31560378f1aSVenkata Narendra Kumar Gutta }; 31660378f1aSVenkata Narendra Kumar Gutta 31760378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 31860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 31960378f1aSVenkata Narendra Kumar Gutta no-map; 32060378f1aSVenkata Narendra Kumar Gutta }; 32160378f1aSVenkata Narendra Kumar Gutta 32260378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 32360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 32460378f1aSVenkata Narendra Kumar Gutta no-map; 32560378f1aSVenkata Narendra Kumar Gutta }; 32660378f1aSVenkata Narendra Kumar Gutta 32760378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 32860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 32960378f1aSVenkata Narendra Kumar Gutta no-map; 33060378f1aSVenkata Narendra Kumar Gutta }; 33160378f1aSVenkata Narendra Kumar Gutta }; 33260378f1aSVenkata Narendra Kumar Gutta 33360378f1aSVenkata Narendra Kumar Gutta smem: qcom,smem { 33460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 33560378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 33660378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 33760378f1aSVenkata Narendra Kumar Gutta }; 33860378f1aSVenkata Narendra Kumar Gutta 3398770a2a8SBjorn Andersson smp2p-adsp { 3408770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3418770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 3428770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 3438770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3448770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3458770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 3468770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3478770a2a8SBjorn Andersson 3488770a2a8SBjorn Andersson qcom,local-pid = <0>; 3498770a2a8SBjorn Andersson qcom,remote-pid = <2>; 3508770a2a8SBjorn Andersson 3518770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 3528770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3538770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3548770a2a8SBjorn Andersson }; 3558770a2a8SBjorn Andersson 3568770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 3578770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3588770a2a8SBjorn Andersson interrupt-controller; 3598770a2a8SBjorn Andersson #interrupt-cells = <2>; 3608770a2a8SBjorn Andersson }; 3618770a2a8SBjorn Andersson }; 3628770a2a8SBjorn Andersson 3638770a2a8SBjorn Andersson smp2p-cdsp { 3648770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3658770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 3668770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 3678770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3688770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3698770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 3708770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3718770a2a8SBjorn Andersson 3728770a2a8SBjorn Andersson qcom,local-pid = <0>; 3738770a2a8SBjorn Andersson qcom,remote-pid = <5>; 3748770a2a8SBjorn Andersson 3758770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 3768770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 3778770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 3788770a2a8SBjorn Andersson }; 3798770a2a8SBjorn Andersson 3808770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 3818770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 3828770a2a8SBjorn Andersson interrupt-controller; 3838770a2a8SBjorn Andersson #interrupt-cells = <2>; 3848770a2a8SBjorn Andersson }; 3858770a2a8SBjorn Andersson }; 3868770a2a8SBjorn Andersson 3878770a2a8SBjorn Andersson smp2p-slpi { 3888770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 3898770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 3908770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 3918770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 3928770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3938770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 3948770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 3958770a2a8SBjorn Andersson 3968770a2a8SBjorn Andersson qcom,local-pid = <0>; 3978770a2a8SBjorn Andersson qcom,remote-pid = <3>; 3988770a2a8SBjorn Andersson 3998770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 4008770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 4018770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 4028770a2a8SBjorn Andersson }; 4038770a2a8SBjorn Andersson 4048770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 4058770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 4068770a2a8SBjorn Andersson interrupt-controller; 4078770a2a8SBjorn Andersson #interrupt-cells = <2>; 4088770a2a8SBjorn Andersson }; 4098770a2a8SBjorn Andersson }; 4108770a2a8SBjorn Andersson 41160378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 41260378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 41360378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 41460378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 41560378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 41660378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 41760378f1aSVenkata Narendra Kumar Gutta 41860378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 41960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 42060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 42160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 42260378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 42360378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 42476bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 42576bd127eSDmitry Baryshkov "bi_tcxo_ao", 42676bd127eSDmitry Baryshkov "sleep_clk"; 42776bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 42876bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 42976bd127eSDmitry Baryshkov <&sleep_clk>; 43060378f1aSVenkata Narendra Kumar Gutta }; 43160378f1aSVenkata Narendra Kumar Gutta 432e5361e75SBjorn Andersson ipcc: mailbox@408000 { 433e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 434e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 435e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 436e5361e75SBjorn Andersson interrupt-controller; 437e5361e75SBjorn Andersson #interrupt-cells = <3>; 438e5361e75SBjorn Andersson #mbox-cells = <2>; 439e5361e75SBjorn Andersson }; 440e5361e75SBjorn Andersson 44165389ce6SManivannan Sadhasivam rng: rng@793000 { 44265389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 44365389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 44465389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 44565389ce6SManivannan Sadhasivam clock-names = "core"; 44665389ce6SManivannan Sadhasivam }; 44765389ce6SManivannan Sadhasivam 44801e869ccSDmitry Baryshkov qup_opp_table: qup-opp-table { 44901e869ccSDmitry Baryshkov compatible = "operating-points-v2"; 45001e869ccSDmitry Baryshkov 45101e869ccSDmitry Baryshkov opp-50000000 { 45201e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <50000000>; 45301e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_min_svs>; 45401e869ccSDmitry Baryshkov }; 45501e869ccSDmitry Baryshkov 45601e869ccSDmitry Baryshkov opp-75000000 { 45701e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <75000000>; 45801e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 45901e869ccSDmitry Baryshkov }; 46001e869ccSDmitry Baryshkov 46101e869ccSDmitry Baryshkov opp-120000000 { 46201e869ccSDmitry Baryshkov opp-hz = /bits/ 64 <120000000>; 46301e869ccSDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 46401e869ccSDmitry Baryshkov }; 46501e869ccSDmitry Baryshkov }; 46601e869ccSDmitry Baryshkov 467e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 468e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 469e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 470e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 471e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 472e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 473e5813b15SDmitry Baryshkov #address-cells = <2>; 474e5813b15SDmitry Baryshkov #size-cells = <2>; 47585309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 476e5813b15SDmitry Baryshkov ranges; 477e5813b15SDmitry Baryshkov status = "disabled"; 478e5813b15SDmitry Baryshkov 479e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 480e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 481e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 482e5813b15SDmitry Baryshkov clock-names = "se"; 483e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 484e5813b15SDmitry Baryshkov pinctrl-names = "default"; 485e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 486e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 487e5813b15SDmitry Baryshkov #address-cells = <1>; 488e5813b15SDmitry Baryshkov #size-cells = <0>; 489e5813b15SDmitry Baryshkov status = "disabled"; 490e5813b15SDmitry Baryshkov }; 491e5813b15SDmitry Baryshkov 492e5813b15SDmitry Baryshkov spi14: spi@880000 { 493e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 494e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 495e5813b15SDmitry Baryshkov clock-names = "se"; 496e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 497e5813b15SDmitry Baryshkov pinctrl-names = "default"; 498e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi14_default>; 499e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 500e5813b15SDmitry Baryshkov #address-cells = <1>; 501e5813b15SDmitry Baryshkov #size-cells = <0>; 50201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 50301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 504e5813b15SDmitry Baryshkov status = "disabled"; 505e5813b15SDmitry Baryshkov }; 506e5813b15SDmitry Baryshkov 507e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 508e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 509e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 510e5813b15SDmitry Baryshkov clock-names = "se"; 511e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 512e5813b15SDmitry Baryshkov pinctrl-names = "default"; 513e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 514e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 515e5813b15SDmitry Baryshkov #address-cells = <1>; 516e5813b15SDmitry Baryshkov #size-cells = <0>; 517e5813b15SDmitry Baryshkov status = "disabled"; 518e5813b15SDmitry Baryshkov }; 519e5813b15SDmitry Baryshkov 520e5813b15SDmitry Baryshkov spi15: spi@884000 { 521e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 522e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 523e5813b15SDmitry Baryshkov clock-names = "se"; 524e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 525e5813b15SDmitry Baryshkov pinctrl-names = "default"; 526e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi15_default>; 527e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 528e5813b15SDmitry Baryshkov #address-cells = <1>; 529e5813b15SDmitry Baryshkov #size-cells = <0>; 53001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 53101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 532e5813b15SDmitry Baryshkov status = "disabled"; 533e5813b15SDmitry Baryshkov }; 534e5813b15SDmitry Baryshkov 535e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 536e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 537e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 538e5813b15SDmitry Baryshkov clock-names = "se"; 539e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 540e5813b15SDmitry Baryshkov pinctrl-names = "default"; 541e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 542e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 543e5813b15SDmitry Baryshkov #address-cells = <1>; 544e5813b15SDmitry Baryshkov #size-cells = <0>; 545e5813b15SDmitry Baryshkov status = "disabled"; 546e5813b15SDmitry Baryshkov }; 547e5813b15SDmitry Baryshkov 548e5813b15SDmitry Baryshkov spi16: spi@888000 { 549e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 550e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 551e5813b15SDmitry Baryshkov clock-names = "se"; 552e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 553e5813b15SDmitry Baryshkov pinctrl-names = "default"; 554e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi16_default>; 555e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 556e5813b15SDmitry Baryshkov #address-cells = <1>; 557e5813b15SDmitry Baryshkov #size-cells = <0>; 55801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 55901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 560e5813b15SDmitry Baryshkov status = "disabled"; 561e5813b15SDmitry Baryshkov }; 562e5813b15SDmitry Baryshkov 563e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 564e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 565e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 566e5813b15SDmitry Baryshkov clock-names = "se"; 567e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 568e5813b15SDmitry Baryshkov pinctrl-names = "default"; 569e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 570e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 571e5813b15SDmitry Baryshkov #address-cells = <1>; 572e5813b15SDmitry Baryshkov #size-cells = <0>; 573e5813b15SDmitry Baryshkov status = "disabled"; 574e5813b15SDmitry Baryshkov }; 575e5813b15SDmitry Baryshkov 576e5813b15SDmitry Baryshkov spi17: spi@88c000 { 577e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 578e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 579e5813b15SDmitry Baryshkov clock-names = "se"; 580e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 581e5813b15SDmitry Baryshkov pinctrl-names = "default"; 582e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi17_default>; 583e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 584e5813b15SDmitry Baryshkov #address-cells = <1>; 585e5813b15SDmitry Baryshkov #size-cells = <0>; 58601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 58701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 588e5813b15SDmitry Baryshkov status = "disabled"; 589e5813b15SDmitry Baryshkov }; 590e5813b15SDmitry Baryshkov 59108a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 59208a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 59308a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 59408a9ae2dSDmitry Baryshkov clock-names = "se"; 59508a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 59608a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 59708a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 59808a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 59901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 60001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 60108a9ae2dSDmitry Baryshkov status = "disabled"; 60208a9ae2dSDmitry Baryshkov }; 60308a9ae2dSDmitry Baryshkov 604e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 605e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 606e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 607e5813b15SDmitry Baryshkov clock-names = "se"; 608e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 609e5813b15SDmitry Baryshkov pinctrl-names = "default"; 610e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 611e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 612e5813b15SDmitry Baryshkov #address-cells = <1>; 613e5813b15SDmitry Baryshkov #size-cells = <0>; 614e5813b15SDmitry Baryshkov status = "disabled"; 615e5813b15SDmitry Baryshkov }; 616e5813b15SDmitry Baryshkov 617e5813b15SDmitry Baryshkov spi18: spi@890000 { 618e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 619e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 620e5813b15SDmitry Baryshkov clock-names = "se"; 621e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 622e5813b15SDmitry Baryshkov pinctrl-names = "default"; 623e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi18_default>; 624e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 625e5813b15SDmitry Baryshkov #address-cells = <1>; 626e5813b15SDmitry Baryshkov #size-cells = <0>; 62701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 62801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 629e5813b15SDmitry Baryshkov status = "disabled"; 630e5813b15SDmitry Baryshkov }; 631e5813b15SDmitry Baryshkov 63208a9ae2dSDmitry Baryshkov uart18: serial@890000 { 63308a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 63408a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 63508a9ae2dSDmitry Baryshkov clock-names = "se"; 63608a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 63708a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 63808a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 63908a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 64001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 64101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 64208a9ae2dSDmitry Baryshkov status = "disabled"; 64308a9ae2dSDmitry Baryshkov }; 64408a9ae2dSDmitry Baryshkov 645e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 646e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 647e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 648e5813b15SDmitry Baryshkov clock-names = "se"; 649e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 650e5813b15SDmitry Baryshkov pinctrl-names = "default"; 651e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 652e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 653e5813b15SDmitry Baryshkov #address-cells = <1>; 654e5813b15SDmitry Baryshkov #size-cells = <0>; 655e5813b15SDmitry Baryshkov status = "disabled"; 656e5813b15SDmitry Baryshkov }; 657e5813b15SDmitry Baryshkov 658e5813b15SDmitry Baryshkov spi19: spi@894000 { 659e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 660e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 661e5813b15SDmitry Baryshkov clock-names = "se"; 662e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 663e5813b15SDmitry Baryshkov pinctrl-names = "default"; 664e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi19_default>; 665e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 666e5813b15SDmitry Baryshkov #address-cells = <1>; 667e5813b15SDmitry Baryshkov #size-cells = <0>; 66801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 66901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 670e5813b15SDmitry Baryshkov status = "disabled"; 671e5813b15SDmitry Baryshkov }; 672e5813b15SDmitry Baryshkov }; 673e5813b15SDmitry Baryshkov 674e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 675e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 676e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 677e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 678e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 679e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 680e5813b15SDmitry Baryshkov #address-cells = <2>; 681e5813b15SDmitry Baryshkov #size-cells = <2>; 68285309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 683e5813b15SDmitry Baryshkov ranges; 684e5813b15SDmitry Baryshkov status = "disabled"; 685e5813b15SDmitry Baryshkov 686e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 687e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 688e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 689e5813b15SDmitry Baryshkov clock-names = "se"; 690e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 691e5813b15SDmitry Baryshkov pinctrl-names = "default"; 692e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 693e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 694e5813b15SDmitry Baryshkov #address-cells = <1>; 695e5813b15SDmitry Baryshkov #size-cells = <0>; 696e5813b15SDmitry Baryshkov status = "disabled"; 697e5813b15SDmitry Baryshkov }; 698e5813b15SDmitry Baryshkov 699e5813b15SDmitry Baryshkov spi0: spi@980000 { 700e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 701e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 702e5813b15SDmitry Baryshkov clock-names = "se"; 703e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 704e5813b15SDmitry Baryshkov pinctrl-names = "default"; 705e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi0_default>; 706e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 707e5813b15SDmitry Baryshkov #address-cells = <1>; 708e5813b15SDmitry Baryshkov #size-cells = <0>; 70901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 71001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 711e5813b15SDmitry Baryshkov status = "disabled"; 712e5813b15SDmitry Baryshkov }; 713e5813b15SDmitry Baryshkov 714e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 715e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 716e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 717e5813b15SDmitry Baryshkov clock-names = "se"; 718e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 719e5813b15SDmitry Baryshkov pinctrl-names = "default"; 720e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 721e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 722e5813b15SDmitry Baryshkov #address-cells = <1>; 723e5813b15SDmitry Baryshkov #size-cells = <0>; 724e5813b15SDmitry Baryshkov status = "disabled"; 725e5813b15SDmitry Baryshkov }; 726e5813b15SDmitry Baryshkov 727e5813b15SDmitry Baryshkov spi1: spi@984000 { 728e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 729e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 730e5813b15SDmitry Baryshkov clock-names = "se"; 731e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 732e5813b15SDmitry Baryshkov pinctrl-names = "default"; 733e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi1_default>; 734e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 735e5813b15SDmitry Baryshkov #address-cells = <1>; 736e5813b15SDmitry Baryshkov #size-cells = <0>; 73701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 73801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 739e5813b15SDmitry Baryshkov status = "disabled"; 740e5813b15SDmitry Baryshkov }; 741e5813b15SDmitry Baryshkov 742e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 743e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 744e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 745e5813b15SDmitry Baryshkov clock-names = "se"; 746e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 747e5813b15SDmitry Baryshkov pinctrl-names = "default"; 748e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 749e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 750e5813b15SDmitry Baryshkov #address-cells = <1>; 751e5813b15SDmitry Baryshkov #size-cells = <0>; 752e5813b15SDmitry Baryshkov status = "disabled"; 753e5813b15SDmitry Baryshkov }; 754e5813b15SDmitry Baryshkov 755e5813b15SDmitry Baryshkov spi2: spi@988000 { 756e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 757e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 758e5813b15SDmitry Baryshkov clock-names = "se"; 759e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 760e5813b15SDmitry Baryshkov pinctrl-names = "default"; 761e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi2_default>; 762e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 763e5813b15SDmitry Baryshkov #address-cells = <1>; 764e5813b15SDmitry Baryshkov #size-cells = <0>; 76501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 76601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 767e5813b15SDmitry Baryshkov status = "disabled"; 768e5813b15SDmitry Baryshkov }; 769e5813b15SDmitry Baryshkov 77008a9ae2dSDmitry Baryshkov uart2: serial@988000 { 77108a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 77208a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 77308a9ae2dSDmitry Baryshkov clock-names = "se"; 77408a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 77508a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 77608a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 77708a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 77801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 77901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 78008a9ae2dSDmitry Baryshkov status = "disabled"; 78108a9ae2dSDmitry Baryshkov }; 78208a9ae2dSDmitry Baryshkov 783e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 784e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 785e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 786e5813b15SDmitry Baryshkov clock-names = "se"; 787e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 788e5813b15SDmitry Baryshkov pinctrl-names = "default"; 789e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 790e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 791e5813b15SDmitry Baryshkov #address-cells = <1>; 792e5813b15SDmitry Baryshkov #size-cells = <0>; 793e5813b15SDmitry Baryshkov status = "disabled"; 794e5813b15SDmitry Baryshkov }; 795e5813b15SDmitry Baryshkov 796e5813b15SDmitry Baryshkov spi3: spi@98c000 { 797e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 798e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 799e5813b15SDmitry Baryshkov clock-names = "se"; 800e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 801e5813b15SDmitry Baryshkov pinctrl-names = "default"; 802e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi3_default>; 803e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 804e5813b15SDmitry Baryshkov #address-cells = <1>; 805e5813b15SDmitry Baryshkov #size-cells = <0>; 80601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 80701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 808e5813b15SDmitry Baryshkov status = "disabled"; 809e5813b15SDmitry Baryshkov }; 810e5813b15SDmitry Baryshkov 811e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 812e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 813e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 814e5813b15SDmitry Baryshkov clock-names = "se"; 815e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 816e5813b15SDmitry Baryshkov pinctrl-names = "default"; 817e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 818e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 819e5813b15SDmitry Baryshkov #address-cells = <1>; 820e5813b15SDmitry Baryshkov #size-cells = <0>; 821e5813b15SDmitry Baryshkov status = "disabled"; 822e5813b15SDmitry Baryshkov }; 823e5813b15SDmitry Baryshkov 824e5813b15SDmitry Baryshkov spi4: spi@990000 { 825e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 826e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 827e5813b15SDmitry Baryshkov clock-names = "se"; 828e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 829e5813b15SDmitry Baryshkov pinctrl-names = "default"; 830e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi4_default>; 831e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 832e5813b15SDmitry Baryshkov #address-cells = <1>; 833e5813b15SDmitry Baryshkov #size-cells = <0>; 83401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 83501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 836e5813b15SDmitry Baryshkov status = "disabled"; 837e5813b15SDmitry Baryshkov }; 838e5813b15SDmitry Baryshkov 839e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 840e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 841e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 842e5813b15SDmitry Baryshkov clock-names = "se"; 843e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 844e5813b15SDmitry Baryshkov pinctrl-names = "default"; 845e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 846e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 847e5813b15SDmitry Baryshkov #address-cells = <1>; 848e5813b15SDmitry Baryshkov #size-cells = <0>; 849e5813b15SDmitry Baryshkov status = "disabled"; 850e5813b15SDmitry Baryshkov }; 851e5813b15SDmitry Baryshkov 852e5813b15SDmitry Baryshkov spi5: spi@994000 { 853e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 854e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 855e5813b15SDmitry Baryshkov clock-names = "se"; 856e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 857e5813b15SDmitry Baryshkov pinctrl-names = "default"; 858e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi5_default>; 859e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 860e5813b15SDmitry Baryshkov #address-cells = <1>; 861e5813b15SDmitry Baryshkov #size-cells = <0>; 86201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 86301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 864e5813b15SDmitry Baryshkov status = "disabled"; 865e5813b15SDmitry Baryshkov }; 866e5813b15SDmitry Baryshkov 867e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 868e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 869e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 870e5813b15SDmitry Baryshkov clock-names = "se"; 871e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 872e5813b15SDmitry Baryshkov pinctrl-names = "default"; 873e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 874e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 875e5813b15SDmitry Baryshkov #address-cells = <1>; 876e5813b15SDmitry Baryshkov #size-cells = <0>; 877e5813b15SDmitry Baryshkov status = "disabled"; 878e5813b15SDmitry Baryshkov }; 879e5813b15SDmitry Baryshkov 880e5813b15SDmitry Baryshkov spi6: spi@998000 { 881e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 882e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 883e5813b15SDmitry Baryshkov clock-names = "se"; 884e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 885e5813b15SDmitry Baryshkov pinctrl-names = "default"; 886e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi6_default>; 887e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 888e5813b15SDmitry Baryshkov #address-cells = <1>; 889e5813b15SDmitry Baryshkov #size-cells = <0>; 89001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 89101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 892e5813b15SDmitry Baryshkov status = "disabled"; 893e5813b15SDmitry Baryshkov }; 894e5813b15SDmitry Baryshkov 89508a9ae2dSDmitry Baryshkov uart6: serial@998000 { 89608a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 89708a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 89808a9ae2dSDmitry Baryshkov clock-names = "se"; 89908a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 90008a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 90108a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 90208a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 90301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 90401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 90508a9ae2dSDmitry Baryshkov status = "disabled"; 90608a9ae2dSDmitry Baryshkov }; 90708a9ae2dSDmitry Baryshkov 908e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 909e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 910e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 911e5813b15SDmitry Baryshkov clock-names = "se"; 912e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 913e5813b15SDmitry Baryshkov pinctrl-names = "default"; 914e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 915e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 916e5813b15SDmitry Baryshkov #address-cells = <1>; 917e5813b15SDmitry Baryshkov #size-cells = <0>; 918e5813b15SDmitry Baryshkov status = "disabled"; 919e5813b15SDmitry Baryshkov }; 920e5813b15SDmitry Baryshkov 921e5813b15SDmitry Baryshkov spi7: spi@99c000 { 922e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 923e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 924e5813b15SDmitry Baryshkov clock-names = "se"; 925e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 926e5813b15SDmitry Baryshkov pinctrl-names = "default"; 927e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi7_default>; 928e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 929e5813b15SDmitry Baryshkov #address-cells = <1>; 930e5813b15SDmitry Baryshkov #size-cells = <0>; 93101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 93201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 933e5813b15SDmitry Baryshkov status = "disabled"; 934e5813b15SDmitry Baryshkov }; 935e5813b15SDmitry Baryshkov }; 936e5813b15SDmitry Baryshkov 93760378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 93860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 93960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 94060378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 941fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 942fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 94360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 94460378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 94585309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 94660378f1aSVenkata Narendra Kumar Gutta ranges; 94760378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 94860378f1aSVenkata Narendra Kumar Gutta 949e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 950e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 951e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 952e5813b15SDmitry Baryshkov clock-names = "se"; 953e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 954e5813b15SDmitry Baryshkov pinctrl-names = "default"; 955e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 956e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 957e5813b15SDmitry Baryshkov #address-cells = <1>; 958e5813b15SDmitry Baryshkov #size-cells = <0>; 959e5813b15SDmitry Baryshkov status = "disabled"; 960e5813b15SDmitry Baryshkov }; 961e5813b15SDmitry Baryshkov 962e5813b15SDmitry Baryshkov spi8: spi@a80000 { 963e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 964e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 965e5813b15SDmitry Baryshkov clock-names = "se"; 966e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 967e5813b15SDmitry Baryshkov pinctrl-names = "default"; 968e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi8_default>; 969e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 970e5813b15SDmitry Baryshkov #address-cells = <1>; 971e5813b15SDmitry Baryshkov #size-cells = <0>; 97201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 97301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 974e5813b15SDmitry Baryshkov status = "disabled"; 975e5813b15SDmitry Baryshkov }; 976e5813b15SDmitry Baryshkov 977e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 978e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 979e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 980e5813b15SDmitry Baryshkov clock-names = "se"; 981e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 982e5813b15SDmitry Baryshkov pinctrl-names = "default"; 983e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 984e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 985e5813b15SDmitry Baryshkov #address-cells = <1>; 986e5813b15SDmitry Baryshkov #size-cells = <0>; 987e5813b15SDmitry Baryshkov status = "disabled"; 988e5813b15SDmitry Baryshkov }; 989e5813b15SDmitry Baryshkov 990e5813b15SDmitry Baryshkov spi9: spi@a84000 { 991e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 992e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 993e5813b15SDmitry Baryshkov clock-names = "se"; 994e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 995e5813b15SDmitry Baryshkov pinctrl-names = "default"; 996e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi9_default>; 997e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 998e5813b15SDmitry Baryshkov #address-cells = <1>; 999e5813b15SDmitry Baryshkov #size-cells = <0>; 100001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 100101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1002e5813b15SDmitry Baryshkov status = "disabled"; 1003e5813b15SDmitry Baryshkov }; 1004e5813b15SDmitry Baryshkov 1005e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1006e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1007e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1008e5813b15SDmitry Baryshkov clock-names = "se"; 1009e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1010e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1011e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1012e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1013e5813b15SDmitry Baryshkov #address-cells = <1>; 1014e5813b15SDmitry Baryshkov #size-cells = <0>; 1015e5813b15SDmitry Baryshkov status = "disabled"; 1016e5813b15SDmitry Baryshkov }; 1017e5813b15SDmitry Baryshkov 1018e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1019e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1020e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1021e5813b15SDmitry Baryshkov clock-names = "se"; 1022e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1023e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1024e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi10_default>; 1025e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1026e5813b15SDmitry Baryshkov #address-cells = <1>; 1027e5813b15SDmitry Baryshkov #size-cells = <0>; 102801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 102901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1030e5813b15SDmitry Baryshkov status = "disabled"; 1031e5813b15SDmitry Baryshkov }; 1032e5813b15SDmitry Baryshkov 1033e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1034e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1035e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1036e5813b15SDmitry Baryshkov clock-names = "se"; 1037e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1038e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1039e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1040e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1041e5813b15SDmitry Baryshkov #address-cells = <1>; 1042e5813b15SDmitry Baryshkov #size-cells = <0>; 1043e5813b15SDmitry Baryshkov status = "disabled"; 1044e5813b15SDmitry Baryshkov }; 1045e5813b15SDmitry Baryshkov 1046e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1047e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1048e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1049e5813b15SDmitry Baryshkov clock-names = "se"; 1050e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1051e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1052e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi11_default>; 1053e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1054e5813b15SDmitry Baryshkov #address-cells = <1>; 1055e5813b15SDmitry Baryshkov #size-cells = <0>; 105601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 105701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1058e5813b15SDmitry Baryshkov status = "disabled"; 1059e5813b15SDmitry Baryshkov }; 1060e5813b15SDmitry Baryshkov 1061e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1062e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1063e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1064e5813b15SDmitry Baryshkov clock-names = "se"; 1065e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1066e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1067e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1068e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1069e5813b15SDmitry Baryshkov #address-cells = <1>; 1070e5813b15SDmitry Baryshkov #size-cells = <0>; 1071e5813b15SDmitry Baryshkov status = "disabled"; 1072e5813b15SDmitry Baryshkov }; 1073e5813b15SDmitry Baryshkov 1074e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1075e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1076e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1077e5813b15SDmitry Baryshkov clock-names = "se"; 1078e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1079e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1080e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi12_default>; 1081e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1082e5813b15SDmitry Baryshkov #address-cells = <1>; 1083e5813b15SDmitry Baryshkov #size-cells = <0>; 108401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 108501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1086e5813b15SDmitry Baryshkov status = "disabled"; 1087e5813b15SDmitry Baryshkov }; 1088e5813b15SDmitry Baryshkov 1089bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 109060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 109160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 109260378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1093fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1094bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1095bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 109660378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 109701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 109801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 109960378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 110060378f1aSVenkata Narendra Kumar Gutta }; 1101e5813b15SDmitry Baryshkov 1102e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1103e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1104e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1105e5813b15SDmitry Baryshkov clock-names = "se"; 1106e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1107e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1108e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1109e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1110e5813b15SDmitry Baryshkov #address-cells = <1>; 1111e5813b15SDmitry Baryshkov #size-cells = <0>; 1112e5813b15SDmitry Baryshkov status = "disabled"; 1113e5813b15SDmitry Baryshkov }; 1114e5813b15SDmitry Baryshkov 1115e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1116e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1117e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1118e5813b15SDmitry Baryshkov clock-names = "se"; 1119e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1120e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1121e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_spi13_default>; 1122e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1123e5813b15SDmitry Baryshkov #address-cells = <1>; 1124e5813b15SDmitry Baryshkov #size-cells = <0>; 112501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 112601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 1127e5813b15SDmitry Baryshkov status = "disabled"; 1128e5813b15SDmitry Baryshkov }; 112960378f1aSVenkata Narendra Kumar Gutta }; 113060378f1aSVenkata Narendra Kumar Gutta 1131e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1132e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1133e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1134e7e41a20SJonathan Marek #interconnect-cells = <1>; 1135e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1136e7e41a20SJonathan Marek }; 1137e7e41a20SJonathan Marek 1138e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1139e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1140e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1141e7e41a20SJonathan Marek #interconnect-cells = <1>; 1142e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1143e7e41a20SJonathan Marek }; 1144e7e41a20SJonathan Marek 1145e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1146e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1147e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1148e7e41a20SJonathan Marek #interconnect-cells = <1>; 1149e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1150e7e41a20SJonathan Marek }; 1151e7e41a20SJonathan Marek 1152e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1153e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1154e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1155e7e41a20SJonathan Marek #interconnect-cells = <1>; 1156e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1157e7e41a20SJonathan Marek }; 1158e7e41a20SJonathan Marek 1159e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1160e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1161e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1162e7e41a20SJonathan Marek #interconnect-cells = <1>; 1163e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1164e7e41a20SJonathan Marek }; 1165e7e41a20SJonathan Marek 1166e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1167e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1168e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1169e7e41a20SJonathan Marek #interconnect-cells = <1>; 1170e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1171e7e41a20SJonathan Marek }; 1172e7e41a20SJonathan Marek 1173e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1174e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1175e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1176e7e41a20SJonathan Marek #interconnect-cells = <1>; 1177e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1178e7e41a20SJonathan Marek }; 1179e7e41a20SJonathan Marek 11806b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 1181b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 1182b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 1183b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 1184b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 1185b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 1186b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 1187b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 1188b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 1189b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 1190b7e2fba0SBryan O'Donoghue reset-names = "rst"; 1191b7e2fba0SBryan O'Donoghue 1192b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 1193b7e2fba0SBryan O'Donoghue 1194a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 1195a89441fcSJonathan Marek 1196b7e2fba0SBryan O'Donoghue clock-names = 1197b7e2fba0SBryan O'Donoghue "core_clk", 1198b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 1199b7e2fba0SBryan O'Donoghue "iface_clk", 1200b7e2fba0SBryan O'Donoghue "core_clk_unipro", 1201b7e2fba0SBryan O'Donoghue "ref_clk", 1202b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 1203b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 1204b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 1205b7e2fba0SBryan O'Donoghue clocks = 1206b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 1207b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 1208b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 1209b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 1210b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 1211b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 1212b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 1213b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 1214b7e2fba0SBryan O'Donoghue freq-table-hz = 1215b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1216b7e2fba0SBryan O'Donoghue <0 0>, 1217b7e2fba0SBryan O'Donoghue <0 0>, 1218b7e2fba0SBryan O'Donoghue <37500000 300000000>, 1219b7e2fba0SBryan O'Donoghue <0 0>, 1220b7e2fba0SBryan O'Donoghue <0 0>, 1221b7e2fba0SBryan O'Donoghue <0 0>, 1222b7e2fba0SBryan O'Donoghue <0 0>; 1223b7e2fba0SBryan O'Donoghue 1224b7e2fba0SBryan O'Donoghue status = "disabled"; 1225b7e2fba0SBryan O'Donoghue }; 1226b7e2fba0SBryan O'Donoghue 1227b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 1228b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 1229b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 1230b7e2fba0SBryan O'Donoghue #address-cells = <2>; 1231b7e2fba0SBryan O'Donoghue #size-cells = <2>; 1232b7e2fba0SBryan O'Donoghue ranges; 1233b7e2fba0SBryan O'Donoghue clock-names = "ref", 1234b7e2fba0SBryan O'Donoghue "ref_aux"; 1235b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 1236b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 1237b7e2fba0SBryan O'Donoghue 1238b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 1239b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 1240b7e2fba0SBryan O'Donoghue status = "disabled"; 1241b7e2fba0SBryan O'Donoghue 1242b7e2fba0SBryan O'Donoghue ufs_mem_phy_lanes: lanes@1d87400 { 1243b7e2fba0SBryan O'Donoghue reg = <0 0x01d87400 0 0x108>, 1244b7e2fba0SBryan O'Donoghue <0 0x01d87600 0 0x1e0>, 1245b7e2fba0SBryan O'Donoghue <0 0x01d87c00 0 0x1dc>, 1246b7e2fba0SBryan O'Donoghue <0 0x01d87800 0 0x108>, 1247b7e2fba0SBryan O'Donoghue <0 0x01d87a00 0 0x1e0>; 1248b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 1249b7e2fba0SBryan O'Donoghue }; 1250b7e2fba0SBryan O'Donoghue }; 1251b7e2fba0SBryan O'Donoghue 1252e7e41a20SJonathan Marek ipa_virt: interconnect@1e00000 { 1253e7e41a20SJonathan Marek compatible = "qcom,sm8250-ipa-virt"; 1254e7e41a20SJonathan Marek reg = <0 0x01e00000 0 0x1000>; 1255e7e41a20SJonathan Marek #interconnect-cells = <1>; 1256e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1257e7e41a20SJonathan Marek }; 1258e7e41a20SJonathan Marek 1259dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 1260dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 1261b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 1262dff0f49cSBjorn Andersson #hwlock-cells = <1>; 126360378f1aSVenkata Narendra Kumar Gutta }; 126460378f1aSVenkata Narendra Kumar Gutta 126504a3605bSJonathan Marek gpu: gpu@3d00000 { 126604a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 12677c1dffd4SDmitry Baryshkov "qcom,adreno"; 126804a3605bSJonathan Marek #stream-id-cells = <16>; 126904a3605bSJonathan Marek 127004a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 127104a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 127204a3605bSJonathan Marek 127304a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 127404a3605bSJonathan Marek 127504a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 127604a3605bSJonathan Marek 127704a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 127804a3605bSJonathan Marek 127904a3605bSJonathan Marek qcom,gmu = <&gmu>; 128004a3605bSJonathan Marek 128104a3605bSJonathan Marek zap-shader { 128204a3605bSJonathan Marek memory-region = <&gpu_mem>; 128304a3605bSJonathan Marek }; 128404a3605bSJonathan Marek 128504a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 128604a3605bSJonathan Marek gpu_opp_table: opp-table { 128704a3605bSJonathan Marek compatible = "operating-points-v2"; 128804a3605bSJonathan Marek 128904a3605bSJonathan Marek opp-670000000 { 129004a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 129104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 129204a3605bSJonathan Marek }; 129304a3605bSJonathan Marek 129404a3605bSJonathan Marek opp-587000000 { 129504a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 129604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 129704a3605bSJonathan Marek }; 129804a3605bSJonathan Marek 129904a3605bSJonathan Marek opp-525000000 { 130004a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 130104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 130204a3605bSJonathan Marek }; 130304a3605bSJonathan Marek 130404a3605bSJonathan Marek opp-490000000 { 130504a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 130604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 130704a3605bSJonathan Marek }; 130804a3605bSJonathan Marek 130904a3605bSJonathan Marek opp-441600000 { 131004a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 131104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 131204a3605bSJonathan Marek }; 131304a3605bSJonathan Marek 131404a3605bSJonathan Marek opp-400000000 { 131504a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 131604a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 131704a3605bSJonathan Marek }; 131804a3605bSJonathan Marek 131904a3605bSJonathan Marek opp-305000000 { 132004a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 132104a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 132204a3605bSJonathan Marek }; 132304a3605bSJonathan Marek }; 132404a3605bSJonathan Marek }; 132504a3605bSJonathan Marek 132604a3605bSJonathan Marek gmu: gmu@3d6a000 { 132704a3605bSJonathan Marek compatible="qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 132804a3605bSJonathan Marek 132904a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 133004a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 133104a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 133204a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 133304a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 133404a3605bSJonathan Marek 133504a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 133604a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 133704a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 133804a3605bSJonathan Marek 13390e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 13400e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 13410e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 134204a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 134304a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 134404a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 134504a3605bSJonathan Marek 13460e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 13470e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 134804a3605bSJonathan Marek power-domain-names = "cx", "gx"; 134904a3605bSJonathan Marek 135004a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 135104a3605bSJonathan Marek 135204a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 135304a3605bSJonathan Marek 135404a3605bSJonathan Marek gmu_opp_table: opp-table { 135504a3605bSJonathan Marek compatible = "operating-points-v2"; 135604a3605bSJonathan Marek 135704a3605bSJonathan Marek opp-200000000 { 135804a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 135904a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 136004a3605bSJonathan Marek }; 136104a3605bSJonathan Marek }; 136204a3605bSJonathan Marek }; 136304a3605bSJonathan Marek 136404a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 136504a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 136604a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 136704a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 136804a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 136904a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 137004a3605bSJonathan Marek clock-names = "bi_tcxo", 137104a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 137204a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 137304a3605bSJonathan Marek #clock-cells = <1>; 137404a3605bSJonathan Marek #reset-cells = <1>; 137504a3605bSJonathan Marek #power-domain-cells = <1>; 137604a3605bSJonathan Marek }; 137704a3605bSJonathan Marek 137804a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 137904a3605bSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 138004a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 138104a3605bSJonathan Marek #iommu-cells = <2>; 138204a3605bSJonathan Marek #global-interrupts = <2>; 138304a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 138404a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 138504a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 138604a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 138704a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 138804a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 138904a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 139004a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 139104a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 139204a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 13930e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 139404a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 139504a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 139604a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 139704a3605bSJonathan Marek 13980e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 139904a3605bSJonathan Marek }; 140004a3605bSJonathan Marek 140123a89037SBjorn Andersson slpi: remoteproc@5c00000 { 140223a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 140323a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 140423a89037SBjorn Andersson 140523a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 140623a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 140723a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 140823a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 140923a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 141023a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 141123a89037SBjorn Andersson "handover", "stop-ack"; 141223a89037SBjorn Andersson 141323a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 141423a89037SBjorn Andersson clock-names = "xo"; 141523a89037SBjorn Andersson 141623a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 141723a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 141823a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 141923a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 142023a89037SBjorn Andersson 142123a89037SBjorn Andersson memory-region = <&slpi_mem>; 142223a89037SBjorn Andersson 142323a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 142423a89037SBjorn Andersson qcom,smem-state-names = "stop"; 142523a89037SBjorn Andersson 142623a89037SBjorn Andersson status = "disabled"; 142723a89037SBjorn Andersson 142823a89037SBjorn Andersson glink-edge { 142923a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 143023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 143123a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 143223a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 143323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 143423a89037SBjorn Andersson 143525695808SJonathan Marek label = "slpi"; 143623a89037SBjorn Andersson qcom,remote-pid = <3>; 143725695808SJonathan Marek 143825695808SJonathan Marek fastrpc { 143925695808SJonathan Marek compatible = "qcom,fastrpc"; 144025695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 144125695808SJonathan Marek label = "sdsp"; 144225695808SJonathan Marek #address-cells = <1>; 144325695808SJonathan Marek #size-cells = <0>; 144425695808SJonathan Marek 144525695808SJonathan Marek compute-cb@1 { 144625695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 144725695808SJonathan Marek reg = <1>; 144825695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 144925695808SJonathan Marek }; 145025695808SJonathan Marek 145125695808SJonathan Marek compute-cb@2 { 145225695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 145325695808SJonathan Marek reg = <2>; 145425695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 145525695808SJonathan Marek }; 145625695808SJonathan Marek 145725695808SJonathan Marek compute-cb@3 { 145825695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 145925695808SJonathan Marek reg = <3>; 146025695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 146125695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 146225695808SJonathan Marek }; 146325695808SJonathan Marek }; 146423a89037SBjorn Andersson }; 146523a89037SBjorn Andersson }; 146623a89037SBjorn Andersson 146723a89037SBjorn Andersson cdsp: remoteproc@8300000 { 146823a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 146923a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 147023a89037SBjorn Andersson 147123a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 147223a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 147323a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 147423a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 147523a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 147623a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 147723a89037SBjorn Andersson "handover", "stop-ack"; 147823a89037SBjorn Andersson 147923a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 148023a89037SBjorn Andersson clock-names = "xo"; 148123a89037SBjorn Andersson 148223a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 148323a89037SBjorn Andersson <&rpmhpd SM8250_CX>; 148423a89037SBjorn Andersson power-domain-names = "load_state", "cx"; 148523a89037SBjorn Andersson 148623a89037SBjorn Andersson memory-region = <&cdsp_mem>; 148723a89037SBjorn Andersson 148823a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 148923a89037SBjorn Andersson qcom,smem-state-names = "stop"; 149023a89037SBjorn Andersson 149123a89037SBjorn Andersson status = "disabled"; 149223a89037SBjorn Andersson 149323a89037SBjorn Andersson glink-edge { 149423a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 149523a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 149623a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 149723a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 149823a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 149923a89037SBjorn Andersson 150025695808SJonathan Marek label = "cdsp"; 150123a89037SBjorn Andersson qcom,remote-pid = <5>; 150225695808SJonathan Marek 150325695808SJonathan Marek fastrpc { 150425695808SJonathan Marek compatible = "qcom,fastrpc"; 150525695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 150625695808SJonathan Marek label = "cdsp"; 150725695808SJonathan Marek #address-cells = <1>; 150825695808SJonathan Marek #size-cells = <0>; 150925695808SJonathan Marek 151025695808SJonathan Marek compute-cb@1 { 151125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 151225695808SJonathan Marek reg = <1>; 151325695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 151425695808SJonathan Marek }; 151525695808SJonathan Marek 151625695808SJonathan Marek compute-cb@2 { 151725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 151825695808SJonathan Marek reg = <2>; 151925695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 152025695808SJonathan Marek }; 152125695808SJonathan Marek 152225695808SJonathan Marek compute-cb@3 { 152325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 152425695808SJonathan Marek reg = <3>; 152525695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 152625695808SJonathan Marek }; 152725695808SJonathan Marek 152825695808SJonathan Marek compute-cb@4 { 152925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 153025695808SJonathan Marek reg = <4>; 153125695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 153225695808SJonathan Marek }; 153325695808SJonathan Marek 153425695808SJonathan Marek compute-cb@5 { 153525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 153625695808SJonathan Marek reg = <5>; 153725695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 153825695808SJonathan Marek }; 153925695808SJonathan Marek 154025695808SJonathan Marek compute-cb@6 { 154125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 154225695808SJonathan Marek reg = <6>; 154325695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 154425695808SJonathan Marek }; 154525695808SJonathan Marek 154625695808SJonathan Marek compute-cb@7 { 154725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 154825695808SJonathan Marek reg = <7>; 154925695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 155025695808SJonathan Marek }; 155125695808SJonathan Marek 155225695808SJonathan Marek compute-cb@8 { 155325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 155425695808SJonathan Marek reg = <8>; 155525695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 155625695808SJonathan Marek }; 155725695808SJonathan Marek 155825695808SJonathan Marek /* note: secure cb9 in downstream */ 155925695808SJonathan Marek }; 156023a89037SBjorn Andersson }; 156123a89037SBjorn Andersson }; 156223a89037SBjorn Andersson 156346a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 156446a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 156546a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 156646a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 156746a6f297SJonathan Marek status = "disabled"; 156846a6f297SJonathan Marek #phy-cells = <0>; 156946a6f297SJonathan Marek 157046a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 157146a6f297SJonathan Marek clock-names = "ref"; 157246a6f297SJonathan Marek 157346a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 157446a6f297SJonathan Marek }; 157546a6f297SJonathan Marek 157646a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 157746a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 157846a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 157946a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 158046a6f297SJonathan Marek status = "disabled"; 158146a6f297SJonathan Marek #phy-cells = <0>; 158246a6f297SJonathan Marek 158346a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 158446a6f297SJonathan Marek clock-names = "ref"; 158546a6f297SJonathan Marek 158646a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 158746a6f297SJonathan Marek }; 158846a6f297SJonathan Marek 158946a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 159046a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-phy"; 159146a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 159246a6f297SJonathan Marek <0 0x088e8000 0 0x20>; 159346a6f297SJonathan Marek reg-names = "reg-base", "dp_com"; 159446a6f297SJonathan Marek status = "disabled"; 159546a6f297SJonathan Marek #clock-cells = <1>; 159646a6f297SJonathan Marek #address-cells = <2>; 159746a6f297SJonathan Marek #size-cells = <2>; 159846a6f297SJonathan Marek ranges; 159946a6f297SJonathan Marek 160046a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 160146a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 160246a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 160346a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 160446a6f297SJonathan Marek 160546a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 160646a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 160746a6f297SJonathan Marek reset-names = "phy", "common"; 160846a6f297SJonathan Marek 160946a6f297SJonathan Marek usb_1_ssphy: lanes@88e9200 { 161046a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 161146a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 161246a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 161346a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 161446a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 161546a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 161646a6f297SJonathan Marek #phy-cells = <0>; 161746a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 161846a6f297SJonathan Marek clock-names = "pipe0"; 161946a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 162046a6f297SJonathan Marek }; 162146a6f297SJonathan Marek }; 162246a6f297SJonathan Marek 162346a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 162446a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 162546a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 162646a6f297SJonathan Marek status = "disabled"; 162746a6f297SJonathan Marek #clock-cells = <1>; 162846a6f297SJonathan Marek #address-cells = <2>; 162946a6f297SJonathan Marek #size-cells = <2>; 163046a6f297SJonathan Marek ranges; 163146a6f297SJonathan Marek 163246a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 163346a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 163446a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 163546a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 163646a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 163746a6f297SJonathan Marek 163846a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 163946a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 164046a6f297SJonathan Marek reset-names = "phy", "common"; 164146a6f297SJonathan Marek 164246a6f297SJonathan Marek usb_2_ssphy: lane@88eb200 { 164346a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 164446a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 164546a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 164646a6f297SJonathan Marek #phy-cells = <0>; 164746a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 164846a6f297SJonathan Marek clock-names = "pipe0"; 164946a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 165046a6f297SJonathan Marek }; 165146a6f297SJonathan Marek }; 165246a6f297SJonathan Marek 1653c4cf0300SManivannan Sadhasivam sdhc_2: sdhci@8804000 { 1654c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 1655c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 1656c4cf0300SManivannan Sadhasivam 1657c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1658c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 1659c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 1660c4cf0300SManivannan Sadhasivam 1661c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 1662c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 1663c4cf0300SManivannan Sadhasivam <&xo_board>; 1664c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 1665c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 1666c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 1667c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 1668c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 1669c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 1670c4cf0300SManivannan Sadhasivam 1671c4cf0300SManivannan Sadhasivam status = "disabled"; 1672c4cf0300SManivannan Sadhasivam 1673c4cf0300SManivannan Sadhasivam sdhc2_opp_table: sdhc2-opp-table { 1674c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 1675c4cf0300SManivannan Sadhasivam 1676c4cf0300SManivannan Sadhasivam opp-19200000 { 1677c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 1678c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 1679c4cf0300SManivannan Sadhasivam }; 1680c4cf0300SManivannan Sadhasivam 1681c4cf0300SManivannan Sadhasivam opp-50000000 { 1682c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 1683c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 1684c4cf0300SManivannan Sadhasivam }; 1685c4cf0300SManivannan Sadhasivam 1686c4cf0300SManivannan Sadhasivam opp-100000000 { 1687c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 1688c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 1689c4cf0300SManivannan Sadhasivam }; 1690c4cf0300SManivannan Sadhasivam 1691c4cf0300SManivannan Sadhasivam opp-202000000 { 1692c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 1693c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 1694c4cf0300SManivannan Sadhasivam }; 1695c4cf0300SManivannan Sadhasivam }; 1696c4cf0300SManivannan Sadhasivam }; 1697c4cf0300SManivannan Sadhasivam 1698e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 1699e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 1700e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 1701e7e41a20SJonathan Marek #interconnect-cells = <1>; 1702e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1703e7e41a20SJonathan Marek }; 1704e7e41a20SJonathan Marek 1705e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 1706e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 1707e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 1708e7e41a20SJonathan Marek #interconnect-cells = <1>; 1709e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1710e7e41a20SJonathan Marek }; 1711e7e41a20SJonathan Marek 1712e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 1713e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 1714e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 1715e7e41a20SJonathan Marek #interconnect-cells = <1>; 1716e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1717e7e41a20SJonathan Marek }; 1718e7e41a20SJonathan Marek 171946a6f297SJonathan Marek usb_1: usb@a6f8800 { 172046a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 172146a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 172246a6f297SJonathan Marek status = "disabled"; 172346a6f297SJonathan Marek #address-cells = <2>; 172446a6f297SJonathan Marek #size-cells = <2>; 172546a6f297SJonathan Marek ranges; 172646a6f297SJonathan Marek dma-ranges; 172746a6f297SJonathan Marek 172846a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 172946a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 173046a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 173146a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 173246a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 173346a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 173446a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 173546a6f297SJonathan Marek "sleep", "xo"; 173646a6f297SJonathan Marek 173746a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 173846a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 173946a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 174046a6f297SJonathan Marek 174146a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 174246a6f297SJonathan Marek <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 174346a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 174446a6f297SJonathan Marek <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 174546a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 174646a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 174746a6f297SJonathan Marek 174846a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 174946a6f297SJonathan Marek 175046a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 175146a6f297SJonathan Marek 175246a6f297SJonathan Marek usb_1_dwc3: dwc3@a600000 { 175346a6f297SJonathan Marek compatible = "snps,dwc3"; 175446a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 175546a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 175646a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 175746a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 175846a6f297SJonathan Marek snps,dis_enblslpm_quirk; 175946a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 176046a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 176146a6f297SJonathan Marek }; 176246a6f297SJonathan Marek }; 176346a6f297SJonathan Marek 17640085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 17650085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 17660085a33aSManivannan Sadhasivam reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 17670085a33aSManivannan Sadhasivam reg-names = "llcc_base", "llcc_broadcast_base"; 17680085a33aSManivannan Sadhasivam }; 17690085a33aSManivannan Sadhasivam 177046a6f297SJonathan Marek usb_2: usb@a8f8800 { 177146a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 177246a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 177346a6f297SJonathan Marek status = "disabled"; 177446a6f297SJonathan Marek #address-cells = <2>; 177546a6f297SJonathan Marek #size-cells = <2>; 177646a6f297SJonathan Marek ranges; 177746a6f297SJonathan Marek dma-ranges; 177846a6f297SJonathan Marek 177946a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 178046a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 178146a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 178246a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 178346a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 178446a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 178546a6f297SJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 178646a6f297SJonathan Marek "sleep", "xo"; 178746a6f297SJonathan Marek 178846a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 178946a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 179046a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 179146a6f297SJonathan Marek 179246a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 179346a6f297SJonathan Marek <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 179446a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 179546a6f297SJonathan Marek <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 179646a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 179746a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 179846a6f297SJonathan Marek 179946a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 180046a6f297SJonathan Marek 180146a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 180246a6f297SJonathan Marek 180346a6f297SJonathan Marek usb_2_dwc3: dwc3@a800000 { 180446a6f297SJonathan Marek compatible = "snps,dwc3"; 180546a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 180646a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 180746a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 180846a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 180946a6f297SJonathan Marek snps,dis_enblslpm_quirk; 181046a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 181146a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 181246a6f297SJonathan Marek }; 181346a6f297SJonathan Marek }; 181446a6f297SJonathan Marek 18157c1dffd4SDmitry Baryshkov mdss: mdss@ae00000 { 18167c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-mdss"; 18177c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 18187c1dffd4SDmitry Baryshkov reg-names = "mdss"; 18197c1dffd4SDmitry Baryshkov 18207c1dffd4SDmitry Baryshkov interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>, 18217c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, 18227c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; 18237c1dffd4SDmitry Baryshkov interconnect-names = "notused", "mdp0-mem", "mdp1-mem"; 18247c1dffd4SDmitry Baryshkov 18257c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 18267c1dffd4SDmitry Baryshkov 18277c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 18287c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 18297c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 18307c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 18317c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "nrt_bus", "core"; 18327c1dffd4SDmitry Baryshkov 18337c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; 18347c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>; 18357c1dffd4SDmitry Baryshkov 18367c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 18377c1dffd4SDmitry Baryshkov interrupt-controller; 18387c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 18397c1dffd4SDmitry Baryshkov 18407c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 18417c1dffd4SDmitry Baryshkov 18427c1dffd4SDmitry Baryshkov status = "disabled"; 18437c1dffd4SDmitry Baryshkov 18447c1dffd4SDmitry Baryshkov #address-cells = <2>; 18457c1dffd4SDmitry Baryshkov #size-cells = <2>; 18467c1dffd4SDmitry Baryshkov ranges; 18477c1dffd4SDmitry Baryshkov 18487c1dffd4SDmitry Baryshkov mdss_mdp: mdp@ae01000 { 18497c1dffd4SDmitry Baryshkov compatible = "qcom,sdm845-dpu"; 18507c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 18517c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 18527c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 18537c1dffd4SDmitry Baryshkov 18547c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 18557c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 18567c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 18577c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 18587c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 18597c1dffd4SDmitry Baryshkov 18607c1dffd4SDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, 18617c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 18627c1dffd4SDmitry Baryshkov assigned-clock-rates = <460000000>, 18637c1dffd4SDmitry Baryshkov <19200000>; 18647c1dffd4SDmitry Baryshkov 18657c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 18667c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 18677c1dffd4SDmitry Baryshkov 18687c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 18697c1dffd4SDmitry Baryshkov interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 18707c1dffd4SDmitry Baryshkov 18717c1dffd4SDmitry Baryshkov status = "disabled"; 18727c1dffd4SDmitry Baryshkov 18737c1dffd4SDmitry Baryshkov ports { 18747c1dffd4SDmitry Baryshkov #address-cells = <1>; 18757c1dffd4SDmitry Baryshkov #size-cells = <0>; 18767c1dffd4SDmitry Baryshkov 18777c1dffd4SDmitry Baryshkov port@0 { 18787c1dffd4SDmitry Baryshkov reg = <0>; 18797c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 18807c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 18817c1dffd4SDmitry Baryshkov }; 18827c1dffd4SDmitry Baryshkov }; 18837c1dffd4SDmitry Baryshkov 18847c1dffd4SDmitry Baryshkov port@1 { 18857c1dffd4SDmitry Baryshkov reg = <1>; 18867c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 18877c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 18887c1dffd4SDmitry Baryshkov }; 18897c1dffd4SDmitry Baryshkov }; 18907c1dffd4SDmitry Baryshkov }; 18917c1dffd4SDmitry Baryshkov 18927c1dffd4SDmitry Baryshkov mdp_opp_table: mdp-opp-table { 18937c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 18947c1dffd4SDmitry Baryshkov 18957c1dffd4SDmitry Baryshkov opp-200000000 { 18967c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 18977c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 18987c1dffd4SDmitry Baryshkov }; 18997c1dffd4SDmitry Baryshkov 19007c1dffd4SDmitry Baryshkov opp-300000000 { 19017c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 19027c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 19037c1dffd4SDmitry Baryshkov }; 19047c1dffd4SDmitry Baryshkov 19057c1dffd4SDmitry Baryshkov opp-345000000 { 19067c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 19077c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 19087c1dffd4SDmitry Baryshkov }; 19097c1dffd4SDmitry Baryshkov 19107c1dffd4SDmitry Baryshkov opp-460000000 { 19117c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 19127c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 19137c1dffd4SDmitry Baryshkov }; 19147c1dffd4SDmitry Baryshkov }; 19157c1dffd4SDmitry Baryshkov }; 19167c1dffd4SDmitry Baryshkov 19177c1dffd4SDmitry Baryshkov dsi0: dsi@ae94000 { 19187c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 19197c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 19207c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 19217c1dffd4SDmitry Baryshkov 19227c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 19237c1dffd4SDmitry Baryshkov interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 19247c1dffd4SDmitry Baryshkov 19257c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 19267c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 19277c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 19287c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 19297c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 19307c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 19317c1dffd4SDmitry Baryshkov clock-names = "byte", 19327c1dffd4SDmitry Baryshkov "byte_intf", 19337c1dffd4SDmitry Baryshkov "pixel", 19347c1dffd4SDmitry Baryshkov "core", 19357c1dffd4SDmitry Baryshkov "iface", 19367c1dffd4SDmitry Baryshkov "bus"; 19377c1dffd4SDmitry Baryshkov 19387c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 19397c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 19407c1dffd4SDmitry Baryshkov 19417c1dffd4SDmitry Baryshkov phys = <&dsi0_phy>; 19427c1dffd4SDmitry Baryshkov phy-names = "dsi"; 19437c1dffd4SDmitry Baryshkov 19447c1dffd4SDmitry Baryshkov status = "disabled"; 19457c1dffd4SDmitry Baryshkov 19467c1dffd4SDmitry Baryshkov ports { 19477c1dffd4SDmitry Baryshkov #address-cells = <1>; 19487c1dffd4SDmitry Baryshkov #size-cells = <0>; 19497c1dffd4SDmitry Baryshkov 19507c1dffd4SDmitry Baryshkov port@0 { 19517c1dffd4SDmitry Baryshkov reg = <0>; 19527c1dffd4SDmitry Baryshkov dsi0_in: endpoint { 19537c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 19547c1dffd4SDmitry Baryshkov }; 19557c1dffd4SDmitry Baryshkov }; 19567c1dffd4SDmitry Baryshkov 19577c1dffd4SDmitry Baryshkov port@1 { 19587c1dffd4SDmitry Baryshkov reg = <1>; 19597c1dffd4SDmitry Baryshkov dsi0_out: endpoint { 19607c1dffd4SDmitry Baryshkov }; 19617c1dffd4SDmitry Baryshkov }; 19627c1dffd4SDmitry Baryshkov }; 19637c1dffd4SDmitry Baryshkov }; 19647c1dffd4SDmitry Baryshkov 19657c1dffd4SDmitry Baryshkov dsi0_phy: dsi-phy@ae94400 { 19667c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 19677c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 19687c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 19697c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 19707c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 19717c1dffd4SDmitry Baryshkov "dsi_phy_lane", 19727c1dffd4SDmitry Baryshkov "dsi_pll"; 19737c1dffd4SDmitry Baryshkov 19747c1dffd4SDmitry Baryshkov #clock-cells = <1>; 19757c1dffd4SDmitry Baryshkov #phy-cells = <0>; 19767c1dffd4SDmitry Baryshkov 19777c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 19787c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 19797c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 19807c1dffd4SDmitry Baryshkov 19817c1dffd4SDmitry Baryshkov status = "disabled"; 19827c1dffd4SDmitry Baryshkov }; 19837c1dffd4SDmitry Baryshkov 19847c1dffd4SDmitry Baryshkov dsi1: dsi@ae96000 { 19857c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 19867c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 19877c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 19887c1dffd4SDmitry Baryshkov 19897c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 19907c1dffd4SDmitry Baryshkov interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 19917c1dffd4SDmitry Baryshkov 19927c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 19937c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 19947c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 19957c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 19967c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 19977c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 19987c1dffd4SDmitry Baryshkov clock-names = "byte", 19997c1dffd4SDmitry Baryshkov "byte_intf", 20007c1dffd4SDmitry Baryshkov "pixel", 20017c1dffd4SDmitry Baryshkov "core", 20027c1dffd4SDmitry Baryshkov "iface", 20037c1dffd4SDmitry Baryshkov "bus"; 20047c1dffd4SDmitry Baryshkov 20057c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 20067c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 20077c1dffd4SDmitry Baryshkov 20087c1dffd4SDmitry Baryshkov phys = <&dsi1_phy>; 20097c1dffd4SDmitry Baryshkov phy-names = "dsi"; 20107c1dffd4SDmitry Baryshkov 20117c1dffd4SDmitry Baryshkov status = "disabled"; 20127c1dffd4SDmitry Baryshkov 20137c1dffd4SDmitry Baryshkov ports { 20147c1dffd4SDmitry Baryshkov #address-cells = <1>; 20157c1dffd4SDmitry Baryshkov #size-cells = <0>; 20167c1dffd4SDmitry Baryshkov 20177c1dffd4SDmitry Baryshkov port@0 { 20187c1dffd4SDmitry Baryshkov reg = <0>; 20197c1dffd4SDmitry Baryshkov dsi1_in: endpoint { 20207c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 20217c1dffd4SDmitry Baryshkov }; 20227c1dffd4SDmitry Baryshkov }; 20237c1dffd4SDmitry Baryshkov 20247c1dffd4SDmitry Baryshkov port@1 { 20257c1dffd4SDmitry Baryshkov reg = <1>; 20267c1dffd4SDmitry Baryshkov dsi1_out: endpoint { 20277c1dffd4SDmitry Baryshkov }; 20287c1dffd4SDmitry Baryshkov }; 20297c1dffd4SDmitry Baryshkov }; 20307c1dffd4SDmitry Baryshkov }; 20317c1dffd4SDmitry Baryshkov 20327c1dffd4SDmitry Baryshkov dsi1_phy: dsi-phy@ae96400 { 20337c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 20347c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 20357c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 20367c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 20377c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 20387c1dffd4SDmitry Baryshkov "dsi_phy_lane", 20397c1dffd4SDmitry Baryshkov "dsi_pll"; 20407c1dffd4SDmitry Baryshkov 20417c1dffd4SDmitry Baryshkov #clock-cells = <1>; 20427c1dffd4SDmitry Baryshkov #phy-cells = <0>; 20437c1dffd4SDmitry Baryshkov 20447c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 20457c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 20467c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 20477c1dffd4SDmitry Baryshkov 20487c1dffd4SDmitry Baryshkov status = "disabled"; 20497c1dffd4SDmitry Baryshkov 20507c1dffd4SDmitry Baryshkov dsi_opp_table: dsi-opp-table { 20517c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 20527c1dffd4SDmitry Baryshkov 20537c1dffd4SDmitry Baryshkov opp-187500000 { 20547c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 20557c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 20567c1dffd4SDmitry Baryshkov }; 20577c1dffd4SDmitry Baryshkov 20587c1dffd4SDmitry Baryshkov opp-300000000 { 20597c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 20607c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 20617c1dffd4SDmitry Baryshkov }; 20627c1dffd4SDmitry Baryshkov 20637c1dffd4SDmitry Baryshkov opp-358000000 { 20647c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 20657c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 20667c1dffd4SDmitry Baryshkov }; 20677c1dffd4SDmitry Baryshkov }; 20687c1dffd4SDmitry Baryshkov }; 20697c1dffd4SDmitry Baryshkov }; 20707c1dffd4SDmitry Baryshkov 20717c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 20727c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 20737c1dffd4SDmitry Baryshkov reg = <0 0x0af00000 0 0x20000>; 2074*3f2094dfSDmitry Baryshkov mmcx-supply = <&mmcx_reg>; 20757c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 20767c1dffd4SDmitry Baryshkov <&dsi0_phy 0>, 20777c1dffd4SDmitry Baryshkov <&dsi0_phy 1>, 20787c1dffd4SDmitry Baryshkov <&dsi1_phy 0>, 20797c1dffd4SDmitry Baryshkov <&dsi1_phy 1>, 20807c1dffd4SDmitry Baryshkov <0>, 20817c1dffd4SDmitry Baryshkov <0>, 20827c1dffd4SDmitry Baryshkov <0>, 20837c1dffd4SDmitry Baryshkov <0>, 20847c1dffd4SDmitry Baryshkov <0>, 20857c1dffd4SDmitry Baryshkov <0>, 20867c1dffd4SDmitry Baryshkov <0>, 20877c1dffd4SDmitry Baryshkov <0>, 20887c1dffd4SDmitry Baryshkov <&sleep_clk>; 20897c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 20907c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 20917c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 20927c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 20937c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 20947c1dffd4SDmitry Baryshkov "dp_link_clk_divsel_ten", 20957c1dffd4SDmitry Baryshkov "dp_vco_divided_clk_src_mux", 20967c1dffd4SDmitry Baryshkov "dptx1_phy_pll_link_clk", 20977c1dffd4SDmitry Baryshkov "dptx1_phy_pll_vco_div_clk", 20987c1dffd4SDmitry Baryshkov "dptx2_phy_pll_link_clk", 20997c1dffd4SDmitry Baryshkov "dptx2_phy_pll_vco_div_clk", 21007c1dffd4SDmitry Baryshkov "edp_phy_pll_link_clk", 21017c1dffd4SDmitry Baryshkov "edp_phy_pll_vco_div_clk", 21027c1dffd4SDmitry Baryshkov "sleep_clk"; 21037c1dffd4SDmitry Baryshkov #clock-cells = <1>; 21047c1dffd4SDmitry Baryshkov #reset-cells = <1>; 21057c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 21067c1dffd4SDmitry Baryshkov }; 21077c1dffd4SDmitry Baryshkov 210860378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 210924003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 211024003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 211160378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 211260378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 211360378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 211460378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 211560378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 211660378f1aSVenkata Narendra Kumar Gutta }; 211760378f1aSVenkata Narendra Kumar Gutta 2118bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 2119bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2120bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 2121bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 2122bac12f25SAmit Kucheria #qcom,sensors = <16>; 2123bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 2124bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 2125bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2126bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2127bac12f25SAmit Kucheria }; 2128bac12f25SAmit Kucheria 2129bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 2130bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 2131bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 2132bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 2133bac12f25SAmit Kucheria #qcom,sensors = <9>; 2134bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 2135bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 2136bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 2137bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 2138bac12f25SAmit Kucheria }; 2139bac12f25SAmit Kucheria 2140087d537aSBjorn Andersson aoss_qmp: qmp@c300000 { 2141087d537aSBjorn Andersson compatible = "qcom,sm8250-aoss-qmp"; 2142087d537aSBjorn Andersson reg = <0 0x0c300000 0 0x100000>; 2143087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 2144087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 2145087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 2146087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 2147087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 2148087d537aSBjorn Andersson 2149087d537aSBjorn Andersson #clock-cells = <0>; 2150087d537aSBjorn Andersson #power-domain-cells = <1>; 2151087d537aSBjorn Andersson }; 2152087d537aSBjorn Andersson 2153bccc7dd2SJonathan Marek spmi_bus: spmi@c440000 { 215460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 215560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 215660378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 215760378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e600000 0x0 0x0100000>, 215860378f1aSVenkata Narendra Kumar Gutta <0x0 0x0e700000 0x0 0x00a0000>, 215960378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c40a000 0x0 0x0026000>; 216060378f1aSVenkata Narendra Kumar Gutta reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 216160378f1aSVenkata Narendra Kumar Gutta interrupt-names = "periph_irq"; 216260378f1aSVenkata Narendra Kumar Gutta interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 216360378f1aSVenkata Narendra Kumar Gutta qcom,ee = <0>; 216460378f1aSVenkata Narendra Kumar Gutta qcom,channel = <0>; 216560378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 216660378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 216760378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 216860378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <4>; 216960378f1aSVenkata Narendra Kumar Gutta }; 217060378f1aSVenkata Narendra Kumar Gutta 217116951b49SBjorn Andersson tlmm: pinctrl@f100000 { 217216951b49SBjorn Andersson compatible = "qcom,sm8250-pinctrl"; 217316951b49SBjorn Andersson reg = <0 0x0f100000 0 0x300000>, 217416951b49SBjorn Andersson <0 0x0f500000 0 0x300000>, 217516951b49SBjorn Andersson <0 0x0f900000 0 0x300000>; 217616951b49SBjorn Andersson reg-names = "west", "south", "north"; 217716951b49SBjorn Andersson interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 217816951b49SBjorn Andersson gpio-controller; 217916951b49SBjorn Andersson #gpio-cells = <2>; 218016951b49SBjorn Andersson interrupt-controller; 218116951b49SBjorn Andersson #interrupt-cells = <2>; 218216951b49SBjorn Andersson gpio-ranges = <&tlmm 0 0 180>; 218316951b49SBjorn Andersson wakeup-parent = <&pdc>; 2184e5813b15SDmitry Baryshkov 2185e5813b15SDmitry Baryshkov qup_i2c0_default: qup-i2c0-default { 2186e5813b15SDmitry Baryshkov mux { 2187e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2188e5813b15SDmitry Baryshkov function = "qup0"; 2189e5813b15SDmitry Baryshkov }; 2190e5813b15SDmitry Baryshkov 2191e5813b15SDmitry Baryshkov config { 2192e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 2193e5813b15SDmitry Baryshkov drive-strength = <2>; 2194e5813b15SDmitry Baryshkov bias-disable; 2195e5813b15SDmitry Baryshkov }; 2196e5813b15SDmitry Baryshkov }; 2197e5813b15SDmitry Baryshkov 2198e5813b15SDmitry Baryshkov qup_i2c1_default: qup-i2c1-default { 2199e5813b15SDmitry Baryshkov pinmux { 2200e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2201e5813b15SDmitry Baryshkov function = "qup1"; 2202e5813b15SDmitry Baryshkov }; 2203e5813b15SDmitry Baryshkov 2204e5813b15SDmitry Baryshkov config { 2205e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 2206e5813b15SDmitry Baryshkov drive-strength = <2>; 2207e5813b15SDmitry Baryshkov bias-disable; 2208e5813b15SDmitry Baryshkov }; 2209e5813b15SDmitry Baryshkov }; 2210e5813b15SDmitry Baryshkov 2211e5813b15SDmitry Baryshkov qup_i2c2_default: qup-i2c2-default { 2212e5813b15SDmitry Baryshkov mux { 2213e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2214e5813b15SDmitry Baryshkov function = "qup2"; 2215e5813b15SDmitry Baryshkov }; 2216e5813b15SDmitry Baryshkov 2217e5813b15SDmitry Baryshkov config { 2218e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 2219e5813b15SDmitry Baryshkov drive-strength = <2>; 2220e5813b15SDmitry Baryshkov bias-disable; 2221e5813b15SDmitry Baryshkov }; 2222e5813b15SDmitry Baryshkov }; 2223e5813b15SDmitry Baryshkov 2224e5813b15SDmitry Baryshkov qup_i2c3_default: qup-i2c3-default { 2225e5813b15SDmitry Baryshkov mux { 2226e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2227e5813b15SDmitry Baryshkov function = "qup3"; 2228e5813b15SDmitry Baryshkov }; 2229e5813b15SDmitry Baryshkov 2230e5813b15SDmitry Baryshkov config { 2231e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 2232e5813b15SDmitry Baryshkov drive-strength = <2>; 2233e5813b15SDmitry Baryshkov bias-disable; 2234e5813b15SDmitry Baryshkov }; 2235e5813b15SDmitry Baryshkov }; 2236e5813b15SDmitry Baryshkov 2237e5813b15SDmitry Baryshkov qup_i2c4_default: qup-i2c4-default { 2238e5813b15SDmitry Baryshkov mux { 2239e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2240e5813b15SDmitry Baryshkov function = "qup4"; 2241e5813b15SDmitry Baryshkov }; 2242e5813b15SDmitry Baryshkov 2243e5813b15SDmitry Baryshkov config { 2244e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 2245e5813b15SDmitry Baryshkov drive-strength = <2>; 2246e5813b15SDmitry Baryshkov bias-disable; 2247e5813b15SDmitry Baryshkov }; 2248e5813b15SDmitry Baryshkov }; 2249e5813b15SDmitry Baryshkov 2250e5813b15SDmitry Baryshkov qup_i2c5_default: qup-i2c5-default { 2251e5813b15SDmitry Baryshkov mux { 2252e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2253e5813b15SDmitry Baryshkov function = "qup5"; 2254e5813b15SDmitry Baryshkov }; 2255e5813b15SDmitry Baryshkov 2256e5813b15SDmitry Baryshkov config { 2257e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 2258e5813b15SDmitry Baryshkov drive-strength = <2>; 2259e5813b15SDmitry Baryshkov bias-disable; 2260e5813b15SDmitry Baryshkov }; 2261e5813b15SDmitry Baryshkov }; 2262e5813b15SDmitry Baryshkov 2263e5813b15SDmitry Baryshkov qup_i2c6_default: qup-i2c6-default { 2264e5813b15SDmitry Baryshkov mux { 2265e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2266e5813b15SDmitry Baryshkov function = "qup6"; 2267e5813b15SDmitry Baryshkov }; 2268e5813b15SDmitry Baryshkov 2269e5813b15SDmitry Baryshkov config { 2270e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 2271e5813b15SDmitry Baryshkov drive-strength = <2>; 2272e5813b15SDmitry Baryshkov bias-disable; 2273e5813b15SDmitry Baryshkov }; 2274e5813b15SDmitry Baryshkov }; 2275e5813b15SDmitry Baryshkov 2276e5813b15SDmitry Baryshkov qup_i2c7_default: qup-i2c7-default { 2277e5813b15SDmitry Baryshkov mux { 2278e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2279e5813b15SDmitry Baryshkov function = "qup7"; 2280e5813b15SDmitry Baryshkov }; 2281e5813b15SDmitry Baryshkov 2282e5813b15SDmitry Baryshkov config { 2283e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 2284e5813b15SDmitry Baryshkov drive-strength = <2>; 2285e5813b15SDmitry Baryshkov bias-disable; 2286e5813b15SDmitry Baryshkov }; 2287e5813b15SDmitry Baryshkov }; 2288e5813b15SDmitry Baryshkov 2289e5813b15SDmitry Baryshkov qup_i2c8_default: qup-i2c8-default { 2290e5813b15SDmitry Baryshkov mux { 2291e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2292e5813b15SDmitry Baryshkov function = "qup8"; 2293e5813b15SDmitry Baryshkov }; 2294e5813b15SDmitry Baryshkov 2295e5813b15SDmitry Baryshkov config { 2296e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 2297e5813b15SDmitry Baryshkov drive-strength = <2>; 2298e5813b15SDmitry Baryshkov bias-disable; 2299e5813b15SDmitry Baryshkov }; 2300e5813b15SDmitry Baryshkov }; 2301e5813b15SDmitry Baryshkov 2302e5813b15SDmitry Baryshkov qup_i2c9_default: qup-i2c9-default { 2303e5813b15SDmitry Baryshkov mux { 2304e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2305e5813b15SDmitry Baryshkov function = "qup9"; 2306e5813b15SDmitry Baryshkov }; 2307e5813b15SDmitry Baryshkov 2308e5813b15SDmitry Baryshkov config { 2309e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 2310e5813b15SDmitry Baryshkov drive-strength = <2>; 2311e5813b15SDmitry Baryshkov bias-disable; 2312e5813b15SDmitry Baryshkov }; 2313e5813b15SDmitry Baryshkov }; 2314e5813b15SDmitry Baryshkov 2315e5813b15SDmitry Baryshkov qup_i2c10_default: qup-i2c10-default { 2316e5813b15SDmitry Baryshkov mux { 2317e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2318e5813b15SDmitry Baryshkov function = "qup10"; 2319e5813b15SDmitry Baryshkov }; 2320e5813b15SDmitry Baryshkov 2321e5813b15SDmitry Baryshkov config { 2322e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 2323e5813b15SDmitry Baryshkov drive-strength = <2>; 2324e5813b15SDmitry Baryshkov bias-disable; 2325e5813b15SDmitry Baryshkov }; 2326e5813b15SDmitry Baryshkov }; 2327e5813b15SDmitry Baryshkov 2328e5813b15SDmitry Baryshkov qup_i2c11_default: qup-i2c11-default { 2329e5813b15SDmitry Baryshkov mux { 2330e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2331e5813b15SDmitry Baryshkov function = "qup11"; 2332e5813b15SDmitry Baryshkov }; 2333e5813b15SDmitry Baryshkov 2334e5813b15SDmitry Baryshkov config { 2335e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 2336e5813b15SDmitry Baryshkov drive-strength = <2>; 2337e5813b15SDmitry Baryshkov bias-disable; 2338e5813b15SDmitry Baryshkov }; 2339e5813b15SDmitry Baryshkov }; 2340e5813b15SDmitry Baryshkov 2341e5813b15SDmitry Baryshkov qup_i2c12_default: qup-i2c12-default { 2342e5813b15SDmitry Baryshkov mux { 2343e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2344e5813b15SDmitry Baryshkov function = "qup12"; 2345e5813b15SDmitry Baryshkov }; 2346e5813b15SDmitry Baryshkov 2347e5813b15SDmitry Baryshkov config { 2348e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 2349e5813b15SDmitry Baryshkov drive-strength = <2>; 2350e5813b15SDmitry Baryshkov bias-disable; 2351e5813b15SDmitry Baryshkov }; 2352e5813b15SDmitry Baryshkov }; 2353e5813b15SDmitry Baryshkov 2354e5813b15SDmitry Baryshkov qup_i2c13_default: qup-i2c13-default { 2355e5813b15SDmitry Baryshkov mux { 2356e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2357e5813b15SDmitry Baryshkov function = "qup13"; 2358e5813b15SDmitry Baryshkov }; 2359e5813b15SDmitry Baryshkov 2360e5813b15SDmitry Baryshkov config { 2361e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 2362e5813b15SDmitry Baryshkov drive-strength = <2>; 2363e5813b15SDmitry Baryshkov bias-disable; 2364e5813b15SDmitry Baryshkov }; 2365e5813b15SDmitry Baryshkov }; 2366e5813b15SDmitry Baryshkov 2367e5813b15SDmitry Baryshkov qup_i2c14_default: qup-i2c14-default { 2368e5813b15SDmitry Baryshkov mux { 2369e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2370e5813b15SDmitry Baryshkov function = "qup14"; 2371e5813b15SDmitry Baryshkov }; 2372e5813b15SDmitry Baryshkov 2373e5813b15SDmitry Baryshkov config { 2374e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 2375e5813b15SDmitry Baryshkov drive-strength = <2>; 2376e5813b15SDmitry Baryshkov bias-disable; 2377e5813b15SDmitry Baryshkov }; 2378e5813b15SDmitry Baryshkov }; 2379e5813b15SDmitry Baryshkov 2380e5813b15SDmitry Baryshkov qup_i2c15_default: qup-i2c15-default { 2381e5813b15SDmitry Baryshkov mux { 2382e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2383e5813b15SDmitry Baryshkov function = "qup15"; 2384e5813b15SDmitry Baryshkov }; 2385e5813b15SDmitry Baryshkov 2386e5813b15SDmitry Baryshkov config { 2387e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 2388e5813b15SDmitry Baryshkov drive-strength = <2>; 2389e5813b15SDmitry Baryshkov bias-disable; 2390e5813b15SDmitry Baryshkov }; 2391e5813b15SDmitry Baryshkov }; 2392e5813b15SDmitry Baryshkov 2393e5813b15SDmitry Baryshkov qup_i2c16_default: qup-i2c16-default { 2394e5813b15SDmitry Baryshkov mux { 2395e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2396e5813b15SDmitry Baryshkov function = "qup16"; 2397e5813b15SDmitry Baryshkov }; 2398e5813b15SDmitry Baryshkov 2399e5813b15SDmitry Baryshkov config { 2400e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 2401e5813b15SDmitry Baryshkov drive-strength = <2>; 2402e5813b15SDmitry Baryshkov bias-disable; 2403e5813b15SDmitry Baryshkov }; 2404e5813b15SDmitry Baryshkov }; 2405e5813b15SDmitry Baryshkov 2406e5813b15SDmitry Baryshkov qup_i2c17_default: qup-i2c17-default { 2407e5813b15SDmitry Baryshkov mux { 2408e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2409e5813b15SDmitry Baryshkov function = "qup17"; 2410e5813b15SDmitry Baryshkov }; 2411e5813b15SDmitry Baryshkov 2412e5813b15SDmitry Baryshkov config { 2413e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 2414e5813b15SDmitry Baryshkov drive-strength = <2>; 2415e5813b15SDmitry Baryshkov bias-disable; 2416e5813b15SDmitry Baryshkov }; 2417e5813b15SDmitry Baryshkov }; 2418e5813b15SDmitry Baryshkov 2419e5813b15SDmitry Baryshkov qup_i2c18_default: qup-i2c18-default { 2420e5813b15SDmitry Baryshkov mux { 2421e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2422e5813b15SDmitry Baryshkov function = "qup18"; 2423e5813b15SDmitry Baryshkov }; 2424e5813b15SDmitry Baryshkov 2425e5813b15SDmitry Baryshkov config { 2426e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 2427e5813b15SDmitry Baryshkov drive-strength = <2>; 2428e5813b15SDmitry Baryshkov bias-disable; 2429e5813b15SDmitry Baryshkov }; 2430e5813b15SDmitry Baryshkov }; 2431e5813b15SDmitry Baryshkov 2432e5813b15SDmitry Baryshkov qup_i2c19_default: qup-i2c19-default { 2433e5813b15SDmitry Baryshkov mux { 2434e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2435e5813b15SDmitry Baryshkov function = "qup19"; 2436e5813b15SDmitry Baryshkov }; 2437e5813b15SDmitry Baryshkov 2438e5813b15SDmitry Baryshkov config { 2439e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 2440e5813b15SDmitry Baryshkov drive-strength = <2>; 2441e5813b15SDmitry Baryshkov bias-disable; 2442e5813b15SDmitry Baryshkov }; 2443e5813b15SDmitry Baryshkov }; 2444e5813b15SDmitry Baryshkov 2445e5813b15SDmitry Baryshkov qup_spi0_default: qup-spi0-default { 2446e5813b15SDmitry Baryshkov mux { 2447e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2448e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2449e5813b15SDmitry Baryshkov function = "qup0"; 2450e5813b15SDmitry Baryshkov }; 2451e5813b15SDmitry Baryshkov 2452e5813b15SDmitry Baryshkov config { 2453e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29", 2454e5813b15SDmitry Baryshkov "gpio30", "gpio31"; 2455e5813b15SDmitry Baryshkov drive-strength = <6>; 2456e5813b15SDmitry Baryshkov bias-disable; 2457e5813b15SDmitry Baryshkov }; 2458e5813b15SDmitry Baryshkov }; 2459e5813b15SDmitry Baryshkov 2460e5813b15SDmitry Baryshkov qup_spi1_default: qup-spi1-default { 2461e5813b15SDmitry Baryshkov mux { 2462e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2463e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2464e5813b15SDmitry Baryshkov function = "qup1"; 2465e5813b15SDmitry Baryshkov }; 2466e5813b15SDmitry Baryshkov 2467e5813b15SDmitry Baryshkov config { 2468e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5", 2469e5813b15SDmitry Baryshkov "gpio6", "gpio7"; 2470e5813b15SDmitry Baryshkov drive-strength = <6>; 2471e5813b15SDmitry Baryshkov bias-disable; 2472e5813b15SDmitry Baryshkov }; 2473e5813b15SDmitry Baryshkov }; 2474e5813b15SDmitry Baryshkov 2475e5813b15SDmitry Baryshkov qup_spi2_default: qup-spi2-default { 2476e5813b15SDmitry Baryshkov mux { 2477e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2478e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2479e5813b15SDmitry Baryshkov function = "qup2"; 2480e5813b15SDmitry Baryshkov }; 2481e5813b15SDmitry Baryshkov 2482e5813b15SDmitry Baryshkov config { 2483e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116", 2484e5813b15SDmitry Baryshkov "gpio117", "gpio118"; 2485e5813b15SDmitry Baryshkov drive-strength = <6>; 2486e5813b15SDmitry Baryshkov bias-disable; 2487e5813b15SDmitry Baryshkov }; 2488e5813b15SDmitry Baryshkov }; 2489e5813b15SDmitry Baryshkov 2490e5813b15SDmitry Baryshkov qup_spi3_default: qup-spi3-default { 2491e5813b15SDmitry Baryshkov mux { 2492e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2493e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2494e5813b15SDmitry Baryshkov function = "qup3"; 2495e5813b15SDmitry Baryshkov }; 2496e5813b15SDmitry Baryshkov 2497e5813b15SDmitry Baryshkov config { 2498e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120", 2499e5813b15SDmitry Baryshkov "gpio121", "gpio122"; 2500e5813b15SDmitry Baryshkov drive-strength = <6>; 2501e5813b15SDmitry Baryshkov bias-disable; 2502e5813b15SDmitry Baryshkov }; 2503e5813b15SDmitry Baryshkov }; 2504e5813b15SDmitry Baryshkov 2505e5813b15SDmitry Baryshkov qup_spi4_default: qup-spi4-default { 2506e5813b15SDmitry Baryshkov mux { 2507e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2508e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2509e5813b15SDmitry Baryshkov function = "qup4"; 2510e5813b15SDmitry Baryshkov }; 2511e5813b15SDmitry Baryshkov 2512e5813b15SDmitry Baryshkov config { 2513e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9", 2514e5813b15SDmitry Baryshkov "gpio10", "gpio11"; 2515e5813b15SDmitry Baryshkov drive-strength = <6>; 2516e5813b15SDmitry Baryshkov bias-disable; 2517e5813b15SDmitry Baryshkov }; 2518e5813b15SDmitry Baryshkov }; 2519e5813b15SDmitry Baryshkov 2520e5813b15SDmitry Baryshkov qup_spi5_default: qup-spi5-default { 2521e5813b15SDmitry Baryshkov mux { 2522e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2523e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2524e5813b15SDmitry Baryshkov function = "qup5"; 2525e5813b15SDmitry Baryshkov }; 2526e5813b15SDmitry Baryshkov 2527e5813b15SDmitry Baryshkov config { 2528e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13", 2529e5813b15SDmitry Baryshkov "gpio14", "gpio15"; 2530e5813b15SDmitry Baryshkov drive-strength = <6>; 2531e5813b15SDmitry Baryshkov bias-disable; 2532e5813b15SDmitry Baryshkov }; 2533e5813b15SDmitry Baryshkov }; 2534e5813b15SDmitry Baryshkov 2535e5813b15SDmitry Baryshkov qup_spi6_default: qup-spi6-default { 2536e5813b15SDmitry Baryshkov mux { 2537e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2538e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2539e5813b15SDmitry Baryshkov function = "qup6"; 2540e5813b15SDmitry Baryshkov }; 2541e5813b15SDmitry Baryshkov 2542e5813b15SDmitry Baryshkov config { 2543e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17", 2544e5813b15SDmitry Baryshkov "gpio18", "gpio19"; 2545e5813b15SDmitry Baryshkov drive-strength = <6>; 2546e5813b15SDmitry Baryshkov bias-disable; 2547e5813b15SDmitry Baryshkov }; 2548e5813b15SDmitry Baryshkov }; 2549e5813b15SDmitry Baryshkov 2550e5813b15SDmitry Baryshkov qup_spi7_default: qup-spi7-default { 2551e5813b15SDmitry Baryshkov mux { 2552e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2553e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2554e5813b15SDmitry Baryshkov function = "qup7"; 2555e5813b15SDmitry Baryshkov }; 2556e5813b15SDmitry Baryshkov 2557e5813b15SDmitry Baryshkov config { 2558e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21", 2559e5813b15SDmitry Baryshkov "gpio22", "gpio23"; 2560e5813b15SDmitry Baryshkov drive-strength = <6>; 2561e5813b15SDmitry Baryshkov bias-disable; 2562e5813b15SDmitry Baryshkov }; 2563e5813b15SDmitry Baryshkov }; 2564e5813b15SDmitry Baryshkov 2565e5813b15SDmitry Baryshkov qup_spi8_default: qup-spi8-default { 2566e5813b15SDmitry Baryshkov mux { 2567e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2568e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2569e5813b15SDmitry Baryshkov function = "qup8"; 2570e5813b15SDmitry Baryshkov }; 2571e5813b15SDmitry Baryshkov 2572e5813b15SDmitry Baryshkov config { 2573e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25", 2574e5813b15SDmitry Baryshkov "gpio26", "gpio27"; 2575e5813b15SDmitry Baryshkov drive-strength = <6>; 2576e5813b15SDmitry Baryshkov bias-disable; 2577e5813b15SDmitry Baryshkov }; 2578e5813b15SDmitry Baryshkov }; 2579e5813b15SDmitry Baryshkov 2580e5813b15SDmitry Baryshkov qup_spi9_default: qup-spi9-default { 2581e5813b15SDmitry Baryshkov mux { 2582e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2583e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2584e5813b15SDmitry Baryshkov function = "qup9"; 2585e5813b15SDmitry Baryshkov }; 2586e5813b15SDmitry Baryshkov 2587e5813b15SDmitry Baryshkov config { 2588e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126", 2589e5813b15SDmitry Baryshkov "gpio127", "gpio128"; 2590e5813b15SDmitry Baryshkov drive-strength = <6>; 2591e5813b15SDmitry Baryshkov bias-disable; 2592e5813b15SDmitry Baryshkov }; 2593e5813b15SDmitry Baryshkov }; 2594e5813b15SDmitry Baryshkov 2595e5813b15SDmitry Baryshkov qup_spi10_default: qup-spi10-default { 2596e5813b15SDmitry Baryshkov mux { 2597e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2598e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2599e5813b15SDmitry Baryshkov function = "qup10"; 2600e5813b15SDmitry Baryshkov }; 2601e5813b15SDmitry Baryshkov 2602e5813b15SDmitry Baryshkov config { 2603e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130", 2604e5813b15SDmitry Baryshkov "gpio131", "gpio132"; 2605e5813b15SDmitry Baryshkov drive-strength = <6>; 2606e5813b15SDmitry Baryshkov bias-disable; 2607e5813b15SDmitry Baryshkov }; 2608e5813b15SDmitry Baryshkov }; 2609e5813b15SDmitry Baryshkov 2610e5813b15SDmitry Baryshkov qup_spi11_default: qup-spi11-default { 2611e5813b15SDmitry Baryshkov mux { 2612e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2613e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2614e5813b15SDmitry Baryshkov function = "qup11"; 2615e5813b15SDmitry Baryshkov }; 2616e5813b15SDmitry Baryshkov 2617e5813b15SDmitry Baryshkov config { 2618e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61", 2619e5813b15SDmitry Baryshkov "gpio62", "gpio63"; 2620e5813b15SDmitry Baryshkov drive-strength = <6>; 2621e5813b15SDmitry Baryshkov bias-disable; 2622e5813b15SDmitry Baryshkov }; 2623e5813b15SDmitry Baryshkov }; 2624e5813b15SDmitry Baryshkov 2625e5813b15SDmitry Baryshkov qup_spi12_default: qup-spi12-default { 2626e5813b15SDmitry Baryshkov mux { 2627e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2628e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2629e5813b15SDmitry Baryshkov function = "qup12"; 2630e5813b15SDmitry Baryshkov }; 2631e5813b15SDmitry Baryshkov 2632e5813b15SDmitry Baryshkov config { 2633e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33", 2634e5813b15SDmitry Baryshkov "gpio34", "gpio35"; 2635e5813b15SDmitry Baryshkov drive-strength = <6>; 2636e5813b15SDmitry Baryshkov bias-disable; 2637e5813b15SDmitry Baryshkov }; 2638e5813b15SDmitry Baryshkov }; 2639e5813b15SDmitry Baryshkov 2640e5813b15SDmitry Baryshkov qup_spi13_default: qup-spi13-default { 2641e5813b15SDmitry Baryshkov mux { 2642e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2643e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2644e5813b15SDmitry Baryshkov function = "qup13"; 2645e5813b15SDmitry Baryshkov }; 2646e5813b15SDmitry Baryshkov 2647e5813b15SDmitry Baryshkov config { 2648e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37", 2649e5813b15SDmitry Baryshkov "gpio38", "gpio39"; 2650e5813b15SDmitry Baryshkov drive-strength = <6>; 2651e5813b15SDmitry Baryshkov bias-disable; 2652e5813b15SDmitry Baryshkov }; 2653e5813b15SDmitry Baryshkov }; 2654e5813b15SDmitry Baryshkov 2655e5813b15SDmitry Baryshkov qup_spi14_default: qup-spi14-default { 2656e5813b15SDmitry Baryshkov mux { 2657e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2658e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2659e5813b15SDmitry Baryshkov function = "qup14"; 2660e5813b15SDmitry Baryshkov }; 2661e5813b15SDmitry Baryshkov 2662e5813b15SDmitry Baryshkov config { 2663e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41", 2664e5813b15SDmitry Baryshkov "gpio42", "gpio43"; 2665e5813b15SDmitry Baryshkov drive-strength = <6>; 2666e5813b15SDmitry Baryshkov bias-disable; 2667e5813b15SDmitry Baryshkov }; 2668e5813b15SDmitry Baryshkov }; 2669e5813b15SDmitry Baryshkov 2670e5813b15SDmitry Baryshkov qup_spi15_default: qup-spi15-default { 2671e5813b15SDmitry Baryshkov mux { 2672e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2673e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2674e5813b15SDmitry Baryshkov function = "qup15"; 2675e5813b15SDmitry Baryshkov }; 2676e5813b15SDmitry Baryshkov 2677e5813b15SDmitry Baryshkov config { 2678e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45", 2679e5813b15SDmitry Baryshkov "gpio46", "gpio47"; 2680e5813b15SDmitry Baryshkov drive-strength = <6>; 2681e5813b15SDmitry Baryshkov bias-disable; 2682e5813b15SDmitry Baryshkov }; 2683e5813b15SDmitry Baryshkov }; 2684e5813b15SDmitry Baryshkov 2685e5813b15SDmitry Baryshkov qup_spi16_default: qup-spi16-default { 2686e5813b15SDmitry Baryshkov mux { 2687e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2688e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2689e5813b15SDmitry Baryshkov function = "qup16"; 2690e5813b15SDmitry Baryshkov }; 2691e5813b15SDmitry Baryshkov 2692e5813b15SDmitry Baryshkov config { 2693e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49", 2694e5813b15SDmitry Baryshkov "gpio50", "gpio51"; 2695e5813b15SDmitry Baryshkov drive-strength = <6>; 2696e5813b15SDmitry Baryshkov bias-disable; 2697e5813b15SDmitry Baryshkov }; 2698e5813b15SDmitry Baryshkov }; 2699e5813b15SDmitry Baryshkov 2700e5813b15SDmitry Baryshkov qup_spi17_default: qup-spi17-default { 2701e5813b15SDmitry Baryshkov mux { 2702e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2703e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2704e5813b15SDmitry Baryshkov function = "qup17"; 2705e5813b15SDmitry Baryshkov }; 2706e5813b15SDmitry Baryshkov 2707e5813b15SDmitry Baryshkov config { 2708e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53", 2709e5813b15SDmitry Baryshkov "gpio54", "gpio55"; 2710e5813b15SDmitry Baryshkov drive-strength = <6>; 2711e5813b15SDmitry Baryshkov bias-disable; 2712e5813b15SDmitry Baryshkov }; 2713e5813b15SDmitry Baryshkov }; 2714e5813b15SDmitry Baryshkov 2715e5813b15SDmitry Baryshkov qup_spi18_default: qup-spi18-default { 2716e5813b15SDmitry Baryshkov mux { 2717e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2718e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2719e5813b15SDmitry Baryshkov function = "qup18"; 2720e5813b15SDmitry Baryshkov }; 2721e5813b15SDmitry Baryshkov 2722e5813b15SDmitry Baryshkov config { 2723e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57", 2724e5813b15SDmitry Baryshkov "gpio58", "gpio59"; 2725e5813b15SDmitry Baryshkov drive-strength = <6>; 2726e5813b15SDmitry Baryshkov bias-disable; 2727e5813b15SDmitry Baryshkov }; 2728e5813b15SDmitry Baryshkov }; 2729e5813b15SDmitry Baryshkov 2730e5813b15SDmitry Baryshkov qup_spi19_default: qup-spi19-default { 2731e5813b15SDmitry Baryshkov mux { 2732e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2733e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2734e5813b15SDmitry Baryshkov function = "qup19"; 2735e5813b15SDmitry Baryshkov }; 2736e5813b15SDmitry Baryshkov 2737e5813b15SDmitry Baryshkov config { 2738e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 2739e5813b15SDmitry Baryshkov "gpio2", "gpio3"; 2740e5813b15SDmitry Baryshkov drive-strength = <6>; 2741e5813b15SDmitry Baryshkov bias-disable; 2742e5813b15SDmitry Baryshkov }; 2743e5813b15SDmitry Baryshkov }; 2744bb1dfb4dSManivannan Sadhasivam 274508a9ae2dSDmitry Baryshkov qup_uart2_default: qup-uart2-default { 274608a9ae2dSDmitry Baryshkov mux { 274708a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 274808a9ae2dSDmitry Baryshkov function = "qup2"; 274908a9ae2dSDmitry Baryshkov }; 275008a9ae2dSDmitry Baryshkov }; 275108a9ae2dSDmitry Baryshkov 275208a9ae2dSDmitry Baryshkov qup_uart6_default: qup-uart6-default { 275308a9ae2dSDmitry Baryshkov mux { 275408a9ae2dSDmitry Baryshkov pins = "gpio16", "gpio17", 275508a9ae2dSDmitry Baryshkov "gpio18", "gpio19"; 275608a9ae2dSDmitry Baryshkov function = "qup6"; 275708a9ae2dSDmitry Baryshkov }; 275808a9ae2dSDmitry Baryshkov }; 275908a9ae2dSDmitry Baryshkov 2760bb1dfb4dSManivannan Sadhasivam qup_uart12_default: qup-uart12-default { 2761bb1dfb4dSManivannan Sadhasivam mux { 2762bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 2763bb1dfb4dSManivannan Sadhasivam function = "qup12"; 2764bb1dfb4dSManivannan Sadhasivam }; 2765bb1dfb4dSManivannan Sadhasivam }; 276608a9ae2dSDmitry Baryshkov 276708a9ae2dSDmitry Baryshkov qup_uart17_default: qup-uart17-default { 276808a9ae2dSDmitry Baryshkov mux { 276908a9ae2dSDmitry Baryshkov pins = "gpio52", "gpio53", 277008a9ae2dSDmitry Baryshkov "gpio54", "gpio55"; 277108a9ae2dSDmitry Baryshkov function = "qup17"; 277208a9ae2dSDmitry Baryshkov }; 277308a9ae2dSDmitry Baryshkov }; 277408a9ae2dSDmitry Baryshkov 277508a9ae2dSDmitry Baryshkov qup_uart18_default: qup-uart18-default { 277608a9ae2dSDmitry Baryshkov mux { 277708a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 277808a9ae2dSDmitry Baryshkov function = "qup18"; 277908a9ae2dSDmitry Baryshkov }; 278008a9ae2dSDmitry Baryshkov }; 278116951b49SBjorn Andersson }; 278216951b49SBjorn Andersson 2783a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 2784a89441fcSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 2785a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 2786a89441fcSJonathan Marek #iommu-cells = <2>; 2787a89441fcSJonathan Marek #global-interrupts = <2>; 2788a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 2789a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 2790a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 2791a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 2792a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 2793a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 2794a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 2795a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 2796a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 2797a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 2798a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 2799a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 2800a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 2801a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 2802a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 2803a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 2804a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 2805a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 2806a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 2807a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 2808a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 2809a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2810a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2811a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 2812a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 2813a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 2814a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 2815a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 2816a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 2817a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 2818a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 2819a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 2820a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 2821a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 2822a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 2823a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 2824a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 2825a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 2826a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 2827a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 2828a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 2829a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2830a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2831a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2832a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2833a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2834a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2835a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2836a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2837a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2838a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2839a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2840a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2841a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2842a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2843a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2844a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 2845a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2846a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2847a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2848a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2849a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2850a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2851a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2852a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2853a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2854a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2855a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 2856a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 2857a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 2858a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 2859a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 2860a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 2861a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 2862a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 2863a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 2864a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 2865a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 2866a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 2867a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 2868a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 2869a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 2870a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 2871a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 2872a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 2873a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 2874a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 2875a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 2876a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 2877a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 2878a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 2879a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 2880a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 2881a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 2882a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 2883a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 2884a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 2885a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 2886a89441fcSJonathan Marek }; 2887a89441fcSJonathan Marek 288823a89037SBjorn Andersson adsp: remoteproc@17300000 { 288923a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 289023a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 289123a89037SBjorn Andersson 289223a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 289323a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 289423a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 289523a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 289623a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 289723a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 289823a89037SBjorn Andersson "handover", "stop-ack"; 289923a89037SBjorn Andersson 290023a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 290123a89037SBjorn Andersson clock-names = "xo"; 290223a89037SBjorn Andersson 290323a89037SBjorn Andersson power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 290423a89037SBjorn Andersson <&rpmhpd SM8250_LCX>, 290523a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 290623a89037SBjorn Andersson power-domain-names = "load_state", "lcx", "lmx"; 290723a89037SBjorn Andersson 290823a89037SBjorn Andersson memory-region = <&adsp_mem>; 290923a89037SBjorn Andersson 291023a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 291123a89037SBjorn Andersson qcom,smem-state-names = "stop"; 291223a89037SBjorn Andersson 291323a89037SBjorn Andersson status = "disabled"; 291423a89037SBjorn Andersson 291523a89037SBjorn Andersson glink-edge { 291623a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 291723a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 291823a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 291923a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 292023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 292123a89037SBjorn Andersson 292223a89037SBjorn Andersson label = "lpass"; 292323a89037SBjorn Andersson qcom,remote-pid = <2>; 292425695808SJonathan Marek 292525695808SJonathan Marek fastrpc { 292625695808SJonathan Marek compatible = "qcom,fastrpc"; 292725695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 292825695808SJonathan Marek label = "adsp"; 292925695808SJonathan Marek #address-cells = <1>; 293025695808SJonathan Marek #size-cells = <0>; 293125695808SJonathan Marek 293225695808SJonathan Marek compute-cb@3 { 293325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 293425695808SJonathan Marek reg = <3>; 293525695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 293625695808SJonathan Marek }; 293725695808SJonathan Marek 293825695808SJonathan Marek compute-cb@4 { 293925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 294025695808SJonathan Marek reg = <4>; 294125695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 294225695808SJonathan Marek }; 294325695808SJonathan Marek 294425695808SJonathan Marek compute-cb@5 { 294525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 294625695808SJonathan Marek reg = <5>; 294725695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 294825695808SJonathan Marek }; 294925695808SJonathan Marek }; 295023a89037SBjorn Andersson }; 295123a89037SBjorn Andersson }; 295223a89037SBjorn Andersson 2953b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 2954b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 2955b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 2956b9ec8cbcSJonathan Marek interrupt-controller; 2957b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 2958b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 2959b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2960b9ec8cbcSJonathan Marek }; 2961b9ec8cbcSJonathan Marek 2962e0d9acceSDmitry Baryshkov watchdog@17c10000 { 2963e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 2964e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 2965e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 2966e0d9acceSDmitry Baryshkov }; 2967e0d9acceSDmitry Baryshkov 2968b9ec8cbcSJonathan Marek timer@17c20000 { 2969b9ec8cbcSJonathan Marek #address-cells = <2>; 2970b9ec8cbcSJonathan Marek #size-cells = <2>; 2971b9ec8cbcSJonathan Marek ranges; 2972b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 2973b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 2974b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 2975b9ec8cbcSJonathan Marek 2976b9ec8cbcSJonathan Marek frame@17c21000 { 2977b9ec8cbcSJonathan Marek frame-number = <0>; 2978b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 2979b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 2980b9ec8cbcSJonathan Marek reg = <0x0 0x17c21000 0x0 0x1000>, 2981b9ec8cbcSJonathan Marek <0x0 0x17c22000 0x0 0x1000>; 2982b9ec8cbcSJonathan Marek }; 2983b9ec8cbcSJonathan Marek 2984b9ec8cbcSJonathan Marek frame@17c23000 { 2985b9ec8cbcSJonathan Marek frame-number = <1>; 2986b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 2987b9ec8cbcSJonathan Marek reg = <0x0 0x17c23000 0x0 0x1000>; 2988b9ec8cbcSJonathan Marek status = "disabled"; 2989b9ec8cbcSJonathan Marek }; 2990b9ec8cbcSJonathan Marek 2991b9ec8cbcSJonathan Marek frame@17c25000 { 2992b9ec8cbcSJonathan Marek frame-number = <2>; 2993b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 2994b9ec8cbcSJonathan Marek reg = <0x0 0x17c25000 0x0 0x1000>; 2995b9ec8cbcSJonathan Marek status = "disabled"; 2996b9ec8cbcSJonathan Marek }; 2997b9ec8cbcSJonathan Marek 2998b9ec8cbcSJonathan Marek frame@17c27000 { 2999b9ec8cbcSJonathan Marek frame-number = <3>; 3000b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 3001b9ec8cbcSJonathan Marek reg = <0x0 0x17c27000 0x0 0x1000>; 3002b9ec8cbcSJonathan Marek status = "disabled"; 3003b9ec8cbcSJonathan Marek }; 3004b9ec8cbcSJonathan Marek 3005b9ec8cbcSJonathan Marek frame@17c29000 { 3006b9ec8cbcSJonathan Marek frame-number = <4>; 3007b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 3008b9ec8cbcSJonathan Marek reg = <0x0 0x17c29000 0x0 0x1000>; 3009b9ec8cbcSJonathan Marek status = "disabled"; 3010b9ec8cbcSJonathan Marek }; 3011b9ec8cbcSJonathan Marek 3012b9ec8cbcSJonathan Marek frame@17c2b000 { 3013b9ec8cbcSJonathan Marek frame-number = <5>; 3014b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 3015b9ec8cbcSJonathan Marek reg = <0x0 0x17c2b000 0x0 0x1000>; 3016b9ec8cbcSJonathan Marek status = "disabled"; 3017b9ec8cbcSJonathan Marek }; 3018b9ec8cbcSJonathan Marek 3019b9ec8cbcSJonathan Marek frame@17c2d000 { 3020b9ec8cbcSJonathan Marek frame-number = <6>; 3021b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 3022b9ec8cbcSJonathan Marek reg = <0x0 0x17c2d000 0x0 0x1000>; 3023b9ec8cbcSJonathan Marek status = "disabled"; 3024b9ec8cbcSJonathan Marek }; 3025b9ec8cbcSJonathan Marek }; 3026b9ec8cbcSJonathan Marek 302760378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 302860378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 302960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 303060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 303160378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 303260378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 303360378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 303460378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 303560378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 303660378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 303760378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 303860378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 303960378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 304060378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 304160378f1aSVenkata Narendra Kumar Gutta 304260378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 304360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 304460378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 304560378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 304660378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 304760378f1aSVenkata Narendra Kumar Gutta }; 3048b6f78e27SBjorn Andersson 3049b6f78e27SBjorn Andersson rpmhpd: power-controller { 3050b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 3051b6f78e27SBjorn Andersson #power-domain-cells = <1>; 3052b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 3053b6f78e27SBjorn Andersson 3054b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 3055b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 3056b6f78e27SBjorn Andersson 3057b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 3058b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 3059b6f78e27SBjorn Andersson }; 3060b6f78e27SBjorn Andersson 3061b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 3062b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 3063b6f78e27SBjorn Andersson }; 3064b6f78e27SBjorn Andersson 3065b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 3066b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 3067b6f78e27SBjorn Andersson }; 3068b6f78e27SBjorn Andersson 3069b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 3070b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 3071b6f78e27SBjorn Andersson }; 3072b6f78e27SBjorn Andersson 3073b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 3074b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 3075b6f78e27SBjorn Andersson }; 3076b6f78e27SBjorn Andersson 3077b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 3078b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 3079b6f78e27SBjorn Andersson }; 3080b6f78e27SBjorn Andersson 3081b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 3082b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 3083b6f78e27SBjorn Andersson }; 3084b6f78e27SBjorn Andersson 3085b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 3086b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 3087b6f78e27SBjorn Andersson }; 3088b6f78e27SBjorn Andersson 3089b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 3090b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 3091b6f78e27SBjorn Andersson }; 3092b6f78e27SBjorn Andersson 3093b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 3094b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 3095b6f78e27SBjorn Andersson }; 3096b6f78e27SBjorn Andersson }; 3097b6f78e27SBjorn Andersson }; 3098e7e41a20SJonathan Marek 3099e7e41a20SJonathan Marek apps_bcm_voter: bcm_voter { 3100e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 3101e7e41a20SJonathan Marek }; 310260378f1aSVenkata Narendra Kumar Gutta }; 310379a595bbSSibi Sankar 310479a595bbSSibi Sankar epss_l3: interconnect@18591000 { 310579a595bbSSibi Sankar compatible = "qcom,sm8250-epss-l3"; 310679a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 310779a595bbSSibi Sankar 310879a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 310979a595bbSSibi Sankar clock-names = "xo", "alternate"; 311079a595bbSSibi Sankar 311179a595bbSSibi Sankar #interconnect-cells = <1>; 311279a595bbSSibi Sankar }; 311302ae4a0eSBjorn Andersson 311402ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 311502ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 311602ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 311702ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 311802ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 311902ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 312002ae4a0eSBjorn Andersson "freq-domain2"; 312102ae4a0eSBjorn Andersson 312202ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 312302ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 312402ae4a0eSBjorn Andersson 312502ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 312602ae4a0eSBjorn Andersson }; 312760378f1aSVenkata Narendra Kumar Gutta }; 312860378f1aSVenkata Narendra Kumar Gutta 312960378f1aSVenkata Narendra Kumar Gutta timer { 313060378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 313160378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 313260378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 313360378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 313460378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 313560378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 313660378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 313760378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 12 313860378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 313960378f1aSVenkata Narendra Kumar Gutta }; 3140bac12f25SAmit Kucheria 3141bac12f25SAmit Kucheria thermal-zones { 3142bac12f25SAmit Kucheria cpu0-thermal { 3143bac12f25SAmit Kucheria polling-delay-passive = <250>; 3144bac12f25SAmit Kucheria polling-delay = <1000>; 3145bac12f25SAmit Kucheria 3146bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 3147bac12f25SAmit Kucheria 3148bac12f25SAmit Kucheria trips { 3149bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 3150bac12f25SAmit Kucheria temperature = <90000>; 3151bac12f25SAmit Kucheria hysteresis = <2000>; 3152bac12f25SAmit Kucheria type = "passive"; 3153bac12f25SAmit Kucheria }; 3154bac12f25SAmit Kucheria 3155bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 3156bac12f25SAmit Kucheria temperature = <95000>; 3157bac12f25SAmit Kucheria hysteresis = <2000>; 3158bac12f25SAmit Kucheria type = "passive"; 3159bac12f25SAmit Kucheria }; 3160bac12f25SAmit Kucheria 3161bac12f25SAmit Kucheria cpu0_crit: cpu_crit { 3162bac12f25SAmit Kucheria temperature = <110000>; 3163bac12f25SAmit Kucheria hysteresis = <1000>; 3164bac12f25SAmit Kucheria type = "critical"; 3165bac12f25SAmit Kucheria }; 3166bac12f25SAmit Kucheria }; 3167bac12f25SAmit Kucheria 3168bac12f25SAmit Kucheria cooling-maps { 3169bac12f25SAmit Kucheria map0 { 3170bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 3171bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3172bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3173bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3174bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3175bac12f25SAmit Kucheria }; 3176bac12f25SAmit Kucheria map1 { 3177bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 3178bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3179bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3180bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3181bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3182bac12f25SAmit Kucheria }; 3183bac12f25SAmit Kucheria }; 3184bac12f25SAmit Kucheria }; 3185bac12f25SAmit Kucheria 3186bac12f25SAmit Kucheria cpu1-thermal { 3187bac12f25SAmit Kucheria polling-delay-passive = <250>; 3188bac12f25SAmit Kucheria polling-delay = <1000>; 3189bac12f25SAmit Kucheria 3190bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 3191bac12f25SAmit Kucheria 3192bac12f25SAmit Kucheria trips { 3193bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 3194bac12f25SAmit Kucheria temperature = <90000>; 3195bac12f25SAmit Kucheria hysteresis = <2000>; 3196bac12f25SAmit Kucheria type = "passive"; 3197bac12f25SAmit Kucheria }; 3198bac12f25SAmit Kucheria 3199bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 3200bac12f25SAmit Kucheria temperature = <95000>; 3201bac12f25SAmit Kucheria hysteresis = <2000>; 3202bac12f25SAmit Kucheria type = "passive"; 3203bac12f25SAmit Kucheria }; 3204bac12f25SAmit Kucheria 3205bac12f25SAmit Kucheria cpu1_crit: cpu_crit { 3206bac12f25SAmit Kucheria temperature = <110000>; 3207bac12f25SAmit Kucheria hysteresis = <1000>; 3208bac12f25SAmit Kucheria type = "critical"; 3209bac12f25SAmit Kucheria }; 3210bac12f25SAmit Kucheria }; 3211bac12f25SAmit Kucheria 3212bac12f25SAmit Kucheria cooling-maps { 3213bac12f25SAmit Kucheria map0 { 3214bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 3215bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3216bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3217bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3218bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3219bac12f25SAmit Kucheria }; 3220bac12f25SAmit Kucheria map1 { 3221bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 3222bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3223bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3224bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3225bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3226bac12f25SAmit Kucheria }; 3227bac12f25SAmit Kucheria }; 3228bac12f25SAmit Kucheria }; 3229bac12f25SAmit Kucheria 3230bac12f25SAmit Kucheria cpu2-thermal { 3231bac12f25SAmit Kucheria polling-delay-passive = <250>; 3232bac12f25SAmit Kucheria polling-delay = <1000>; 3233bac12f25SAmit Kucheria 3234bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 3235bac12f25SAmit Kucheria 3236bac12f25SAmit Kucheria trips { 3237bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 3238bac12f25SAmit Kucheria temperature = <90000>; 3239bac12f25SAmit Kucheria hysteresis = <2000>; 3240bac12f25SAmit Kucheria type = "passive"; 3241bac12f25SAmit Kucheria }; 3242bac12f25SAmit Kucheria 3243bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 3244bac12f25SAmit Kucheria temperature = <95000>; 3245bac12f25SAmit Kucheria hysteresis = <2000>; 3246bac12f25SAmit Kucheria type = "passive"; 3247bac12f25SAmit Kucheria }; 3248bac12f25SAmit Kucheria 3249bac12f25SAmit Kucheria cpu2_crit: cpu_crit { 3250bac12f25SAmit Kucheria temperature = <110000>; 3251bac12f25SAmit Kucheria hysteresis = <1000>; 3252bac12f25SAmit Kucheria type = "critical"; 3253bac12f25SAmit Kucheria }; 3254bac12f25SAmit Kucheria }; 3255bac12f25SAmit Kucheria 3256bac12f25SAmit Kucheria cooling-maps { 3257bac12f25SAmit Kucheria map0 { 3258bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 3259bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3260bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3261bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3262bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3263bac12f25SAmit Kucheria }; 3264bac12f25SAmit Kucheria map1 { 3265bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 3266bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3267bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3268bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3269bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3270bac12f25SAmit Kucheria }; 3271bac12f25SAmit Kucheria }; 3272bac12f25SAmit Kucheria }; 3273bac12f25SAmit Kucheria 3274bac12f25SAmit Kucheria cpu3-thermal { 3275bac12f25SAmit Kucheria polling-delay-passive = <250>; 3276bac12f25SAmit Kucheria polling-delay = <1000>; 3277bac12f25SAmit Kucheria 3278bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 3279bac12f25SAmit Kucheria 3280bac12f25SAmit Kucheria trips { 3281bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 3282bac12f25SAmit Kucheria temperature = <90000>; 3283bac12f25SAmit Kucheria hysteresis = <2000>; 3284bac12f25SAmit Kucheria type = "passive"; 3285bac12f25SAmit Kucheria }; 3286bac12f25SAmit Kucheria 3287bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 3288bac12f25SAmit Kucheria temperature = <95000>; 3289bac12f25SAmit Kucheria hysteresis = <2000>; 3290bac12f25SAmit Kucheria type = "passive"; 3291bac12f25SAmit Kucheria }; 3292bac12f25SAmit Kucheria 3293bac12f25SAmit Kucheria cpu3_crit: cpu_crit { 3294bac12f25SAmit Kucheria temperature = <110000>; 3295bac12f25SAmit Kucheria hysteresis = <1000>; 3296bac12f25SAmit Kucheria type = "critical"; 3297bac12f25SAmit Kucheria }; 3298bac12f25SAmit Kucheria }; 3299bac12f25SAmit Kucheria 3300bac12f25SAmit Kucheria cooling-maps { 3301bac12f25SAmit Kucheria map0 { 3302bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 3303bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3304bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3305bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3306bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3307bac12f25SAmit Kucheria }; 3308bac12f25SAmit Kucheria map1 { 3309bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 3310bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3311bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3312bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3313bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3314bac12f25SAmit Kucheria }; 3315bac12f25SAmit Kucheria }; 3316bac12f25SAmit Kucheria }; 3317bac12f25SAmit Kucheria 3318bac12f25SAmit Kucheria cpu4-top-thermal { 3319bac12f25SAmit Kucheria polling-delay-passive = <250>; 3320bac12f25SAmit Kucheria polling-delay = <1000>; 3321bac12f25SAmit Kucheria 3322bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 3323bac12f25SAmit Kucheria 3324bac12f25SAmit Kucheria trips { 3325bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 3326bac12f25SAmit Kucheria temperature = <90000>; 3327bac12f25SAmit Kucheria hysteresis = <2000>; 3328bac12f25SAmit Kucheria type = "passive"; 3329bac12f25SAmit Kucheria }; 3330bac12f25SAmit Kucheria 3331bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 3332bac12f25SAmit Kucheria temperature = <95000>; 3333bac12f25SAmit Kucheria hysteresis = <2000>; 3334bac12f25SAmit Kucheria type = "passive"; 3335bac12f25SAmit Kucheria }; 3336bac12f25SAmit Kucheria 3337bac12f25SAmit Kucheria cpu4_top_crit: cpu_crit { 3338bac12f25SAmit Kucheria temperature = <110000>; 3339bac12f25SAmit Kucheria hysteresis = <1000>; 3340bac12f25SAmit Kucheria type = "critical"; 3341bac12f25SAmit Kucheria }; 3342bac12f25SAmit Kucheria }; 3343bac12f25SAmit Kucheria 3344bac12f25SAmit Kucheria cooling-maps { 3345bac12f25SAmit Kucheria map0 { 3346bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 3347bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3348bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3349bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3350bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3351bac12f25SAmit Kucheria }; 3352bac12f25SAmit Kucheria map1 { 3353bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 3354bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3355bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3356bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3357bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3358bac12f25SAmit Kucheria }; 3359bac12f25SAmit Kucheria }; 3360bac12f25SAmit Kucheria }; 3361bac12f25SAmit Kucheria 3362bac12f25SAmit Kucheria cpu5-top-thermal { 3363bac12f25SAmit Kucheria polling-delay-passive = <250>; 3364bac12f25SAmit Kucheria polling-delay = <1000>; 3365bac12f25SAmit Kucheria 3366bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 3367bac12f25SAmit Kucheria 3368bac12f25SAmit Kucheria trips { 3369bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 3370bac12f25SAmit Kucheria temperature = <90000>; 3371bac12f25SAmit Kucheria hysteresis = <2000>; 3372bac12f25SAmit Kucheria type = "passive"; 3373bac12f25SAmit Kucheria }; 3374bac12f25SAmit Kucheria 3375bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 3376bac12f25SAmit Kucheria temperature = <95000>; 3377bac12f25SAmit Kucheria hysteresis = <2000>; 3378bac12f25SAmit Kucheria type = "passive"; 3379bac12f25SAmit Kucheria }; 3380bac12f25SAmit Kucheria 3381bac12f25SAmit Kucheria cpu5_top_crit: cpu_crit { 3382bac12f25SAmit Kucheria temperature = <110000>; 3383bac12f25SAmit Kucheria hysteresis = <1000>; 3384bac12f25SAmit Kucheria type = "critical"; 3385bac12f25SAmit Kucheria }; 3386bac12f25SAmit Kucheria }; 3387bac12f25SAmit Kucheria 3388bac12f25SAmit Kucheria cooling-maps { 3389bac12f25SAmit Kucheria map0 { 3390bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 3391bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3392bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3393bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3394bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3395bac12f25SAmit Kucheria }; 3396bac12f25SAmit Kucheria map1 { 3397bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 3398bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3399bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3400bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3401bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3402bac12f25SAmit Kucheria }; 3403bac12f25SAmit Kucheria }; 3404bac12f25SAmit Kucheria }; 3405bac12f25SAmit Kucheria 3406bac12f25SAmit Kucheria cpu6-top-thermal { 3407bac12f25SAmit Kucheria polling-delay-passive = <250>; 3408bac12f25SAmit Kucheria polling-delay = <1000>; 3409bac12f25SAmit Kucheria 3410bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 3411bac12f25SAmit Kucheria 3412bac12f25SAmit Kucheria trips { 3413bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 3414bac12f25SAmit Kucheria temperature = <90000>; 3415bac12f25SAmit Kucheria hysteresis = <2000>; 3416bac12f25SAmit Kucheria type = "passive"; 3417bac12f25SAmit Kucheria }; 3418bac12f25SAmit Kucheria 3419bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 3420bac12f25SAmit Kucheria temperature = <95000>; 3421bac12f25SAmit Kucheria hysteresis = <2000>; 3422bac12f25SAmit Kucheria type = "passive"; 3423bac12f25SAmit Kucheria }; 3424bac12f25SAmit Kucheria 3425bac12f25SAmit Kucheria cpu6_top_crit: cpu_crit { 3426bac12f25SAmit Kucheria temperature = <110000>; 3427bac12f25SAmit Kucheria hysteresis = <1000>; 3428bac12f25SAmit Kucheria type = "critical"; 3429bac12f25SAmit Kucheria }; 3430bac12f25SAmit Kucheria }; 3431bac12f25SAmit Kucheria 3432bac12f25SAmit Kucheria cooling-maps { 3433bac12f25SAmit Kucheria map0 { 3434bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 3435bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3436bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3437bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3438bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3439bac12f25SAmit Kucheria }; 3440bac12f25SAmit Kucheria map1 { 3441bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 3442bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3443bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3444bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3445bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3446bac12f25SAmit Kucheria }; 3447bac12f25SAmit Kucheria }; 3448bac12f25SAmit Kucheria }; 3449bac12f25SAmit Kucheria 3450bac12f25SAmit Kucheria cpu7-top-thermal { 3451bac12f25SAmit Kucheria polling-delay-passive = <250>; 3452bac12f25SAmit Kucheria polling-delay = <1000>; 3453bac12f25SAmit Kucheria 3454bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 3455bac12f25SAmit Kucheria 3456bac12f25SAmit Kucheria trips { 3457bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 3458bac12f25SAmit Kucheria temperature = <90000>; 3459bac12f25SAmit Kucheria hysteresis = <2000>; 3460bac12f25SAmit Kucheria type = "passive"; 3461bac12f25SAmit Kucheria }; 3462bac12f25SAmit Kucheria 3463bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 3464bac12f25SAmit Kucheria temperature = <95000>; 3465bac12f25SAmit Kucheria hysteresis = <2000>; 3466bac12f25SAmit Kucheria type = "passive"; 3467bac12f25SAmit Kucheria }; 3468bac12f25SAmit Kucheria 3469bac12f25SAmit Kucheria cpu7_top_crit: cpu_crit { 3470bac12f25SAmit Kucheria temperature = <110000>; 3471bac12f25SAmit Kucheria hysteresis = <1000>; 3472bac12f25SAmit Kucheria type = "critical"; 3473bac12f25SAmit Kucheria }; 3474bac12f25SAmit Kucheria }; 3475bac12f25SAmit Kucheria 3476bac12f25SAmit Kucheria cooling-maps { 3477bac12f25SAmit Kucheria map0 { 3478bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 3479bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3480bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3481bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3482bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3483bac12f25SAmit Kucheria }; 3484bac12f25SAmit Kucheria map1 { 3485bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 3486bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3487bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3488bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3489bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3490bac12f25SAmit Kucheria }; 3491bac12f25SAmit Kucheria }; 3492bac12f25SAmit Kucheria }; 3493bac12f25SAmit Kucheria 3494bac12f25SAmit Kucheria cpu4-bottom-thermal { 3495bac12f25SAmit Kucheria polling-delay-passive = <250>; 3496bac12f25SAmit Kucheria polling-delay = <1000>; 3497bac12f25SAmit Kucheria 3498bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 3499bac12f25SAmit Kucheria 3500bac12f25SAmit Kucheria trips { 3501bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 3502bac12f25SAmit Kucheria temperature = <90000>; 3503bac12f25SAmit Kucheria hysteresis = <2000>; 3504bac12f25SAmit Kucheria type = "passive"; 3505bac12f25SAmit Kucheria }; 3506bac12f25SAmit Kucheria 3507bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 3508bac12f25SAmit Kucheria temperature = <95000>; 3509bac12f25SAmit Kucheria hysteresis = <2000>; 3510bac12f25SAmit Kucheria type = "passive"; 3511bac12f25SAmit Kucheria }; 3512bac12f25SAmit Kucheria 3513bac12f25SAmit Kucheria cpu4_bottom_crit: cpu_crit { 3514bac12f25SAmit Kucheria temperature = <110000>; 3515bac12f25SAmit Kucheria hysteresis = <1000>; 3516bac12f25SAmit Kucheria type = "critical"; 3517bac12f25SAmit Kucheria }; 3518bac12f25SAmit Kucheria }; 3519bac12f25SAmit Kucheria 3520bac12f25SAmit Kucheria cooling-maps { 3521bac12f25SAmit Kucheria map0 { 3522bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 3523bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3524bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3525bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3526bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3527bac12f25SAmit Kucheria }; 3528bac12f25SAmit Kucheria map1 { 3529bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 3530bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3531bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3532bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3533bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3534bac12f25SAmit Kucheria }; 3535bac12f25SAmit Kucheria }; 3536bac12f25SAmit Kucheria }; 3537bac12f25SAmit Kucheria 3538bac12f25SAmit Kucheria cpu5-bottom-thermal { 3539bac12f25SAmit Kucheria polling-delay-passive = <250>; 3540bac12f25SAmit Kucheria polling-delay = <1000>; 3541bac12f25SAmit Kucheria 3542bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 3543bac12f25SAmit Kucheria 3544bac12f25SAmit Kucheria trips { 3545bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 3546bac12f25SAmit Kucheria temperature = <90000>; 3547bac12f25SAmit Kucheria hysteresis = <2000>; 3548bac12f25SAmit Kucheria type = "passive"; 3549bac12f25SAmit Kucheria }; 3550bac12f25SAmit Kucheria 3551bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 3552bac12f25SAmit Kucheria temperature = <95000>; 3553bac12f25SAmit Kucheria hysteresis = <2000>; 3554bac12f25SAmit Kucheria type = "passive"; 3555bac12f25SAmit Kucheria }; 3556bac12f25SAmit Kucheria 3557bac12f25SAmit Kucheria cpu5_bottom_crit: cpu_crit { 3558bac12f25SAmit Kucheria temperature = <110000>; 3559bac12f25SAmit Kucheria hysteresis = <1000>; 3560bac12f25SAmit Kucheria type = "critical"; 3561bac12f25SAmit Kucheria }; 3562bac12f25SAmit Kucheria }; 3563bac12f25SAmit Kucheria 3564bac12f25SAmit Kucheria cooling-maps { 3565bac12f25SAmit Kucheria map0 { 3566bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 3567bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3568bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3569bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3570bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3571bac12f25SAmit Kucheria }; 3572bac12f25SAmit Kucheria map1 { 3573bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 3574bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3575bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3576bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3577bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3578bac12f25SAmit Kucheria }; 3579bac12f25SAmit Kucheria }; 3580bac12f25SAmit Kucheria }; 3581bac12f25SAmit Kucheria 3582bac12f25SAmit Kucheria cpu6-bottom-thermal { 3583bac12f25SAmit Kucheria polling-delay-passive = <250>; 3584bac12f25SAmit Kucheria polling-delay = <1000>; 3585bac12f25SAmit Kucheria 3586bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 3587bac12f25SAmit Kucheria 3588bac12f25SAmit Kucheria trips { 3589bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 3590bac12f25SAmit Kucheria temperature = <90000>; 3591bac12f25SAmit Kucheria hysteresis = <2000>; 3592bac12f25SAmit Kucheria type = "passive"; 3593bac12f25SAmit Kucheria }; 3594bac12f25SAmit Kucheria 3595bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 3596bac12f25SAmit Kucheria temperature = <95000>; 3597bac12f25SAmit Kucheria hysteresis = <2000>; 3598bac12f25SAmit Kucheria type = "passive"; 3599bac12f25SAmit Kucheria }; 3600bac12f25SAmit Kucheria 3601bac12f25SAmit Kucheria cpu6_bottom_crit: cpu_crit { 3602bac12f25SAmit Kucheria temperature = <110000>; 3603bac12f25SAmit Kucheria hysteresis = <1000>; 3604bac12f25SAmit Kucheria type = "critical"; 3605bac12f25SAmit Kucheria }; 3606bac12f25SAmit Kucheria }; 3607bac12f25SAmit Kucheria 3608bac12f25SAmit Kucheria cooling-maps { 3609bac12f25SAmit Kucheria map0 { 3610bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 3611bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3612bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3613bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3614bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3615bac12f25SAmit Kucheria }; 3616bac12f25SAmit Kucheria map1 { 3617bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 3618bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3619bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3620bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3621bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3622bac12f25SAmit Kucheria }; 3623bac12f25SAmit Kucheria }; 3624bac12f25SAmit Kucheria }; 3625bac12f25SAmit Kucheria 3626bac12f25SAmit Kucheria cpu7-bottom-thermal { 3627bac12f25SAmit Kucheria polling-delay-passive = <250>; 3628bac12f25SAmit Kucheria polling-delay = <1000>; 3629bac12f25SAmit Kucheria 3630bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 3631bac12f25SAmit Kucheria 3632bac12f25SAmit Kucheria trips { 3633bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 3634bac12f25SAmit Kucheria temperature = <90000>; 3635bac12f25SAmit Kucheria hysteresis = <2000>; 3636bac12f25SAmit Kucheria type = "passive"; 3637bac12f25SAmit Kucheria }; 3638bac12f25SAmit Kucheria 3639bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 3640bac12f25SAmit Kucheria temperature = <95000>; 3641bac12f25SAmit Kucheria hysteresis = <2000>; 3642bac12f25SAmit Kucheria type = "passive"; 3643bac12f25SAmit Kucheria }; 3644bac12f25SAmit Kucheria 3645bac12f25SAmit Kucheria cpu7_bottom_crit: cpu_crit { 3646bac12f25SAmit Kucheria temperature = <110000>; 3647bac12f25SAmit Kucheria hysteresis = <1000>; 3648bac12f25SAmit Kucheria type = "critical"; 3649bac12f25SAmit Kucheria }; 3650bac12f25SAmit Kucheria }; 3651bac12f25SAmit Kucheria 3652bac12f25SAmit Kucheria cooling-maps { 3653bac12f25SAmit Kucheria map0 { 3654bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 3655bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3656bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3657bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3658bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3659bac12f25SAmit Kucheria }; 3660bac12f25SAmit Kucheria map1 { 3661bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 3662bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3663bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3664bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 3665bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 3666bac12f25SAmit Kucheria }; 3667bac12f25SAmit Kucheria }; 3668bac12f25SAmit Kucheria }; 3669bac12f25SAmit Kucheria 3670bac12f25SAmit Kucheria aoss0-thermal { 3671bac12f25SAmit Kucheria polling-delay-passive = <250>; 3672bac12f25SAmit Kucheria polling-delay = <1000>; 3673bac12f25SAmit Kucheria 3674bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 3675bac12f25SAmit Kucheria 3676bac12f25SAmit Kucheria trips { 3677bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 3678bac12f25SAmit Kucheria temperature = <90000>; 3679bac12f25SAmit Kucheria hysteresis = <2000>; 3680bac12f25SAmit Kucheria type = "hot"; 3681bac12f25SAmit Kucheria }; 3682bac12f25SAmit Kucheria }; 3683bac12f25SAmit Kucheria }; 3684bac12f25SAmit Kucheria 3685bac12f25SAmit Kucheria cluster0-thermal { 3686bac12f25SAmit Kucheria polling-delay-passive = <250>; 3687bac12f25SAmit Kucheria polling-delay = <1000>; 3688bac12f25SAmit Kucheria 3689bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 3690bac12f25SAmit Kucheria 3691bac12f25SAmit Kucheria trips { 3692bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 3693bac12f25SAmit Kucheria temperature = <90000>; 3694bac12f25SAmit Kucheria hysteresis = <2000>; 3695bac12f25SAmit Kucheria type = "hot"; 3696bac12f25SAmit Kucheria }; 3697bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 3698bac12f25SAmit Kucheria temperature = <110000>; 3699bac12f25SAmit Kucheria hysteresis = <2000>; 3700bac12f25SAmit Kucheria type = "critical"; 3701bac12f25SAmit Kucheria }; 3702bac12f25SAmit Kucheria }; 3703bac12f25SAmit Kucheria }; 3704bac12f25SAmit Kucheria 3705bac12f25SAmit Kucheria cluster1-thermal { 3706bac12f25SAmit Kucheria polling-delay-passive = <250>; 3707bac12f25SAmit Kucheria polling-delay = <1000>; 3708bac12f25SAmit Kucheria 3709bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 3710bac12f25SAmit Kucheria 3711bac12f25SAmit Kucheria trips { 3712bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 3713bac12f25SAmit Kucheria temperature = <90000>; 3714bac12f25SAmit Kucheria hysteresis = <2000>; 3715bac12f25SAmit Kucheria type = "hot"; 3716bac12f25SAmit Kucheria }; 3717bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 3718bac12f25SAmit Kucheria temperature = <110000>; 3719bac12f25SAmit Kucheria hysteresis = <2000>; 3720bac12f25SAmit Kucheria type = "critical"; 3721bac12f25SAmit Kucheria }; 3722bac12f25SAmit Kucheria }; 3723bac12f25SAmit Kucheria }; 3724bac12f25SAmit Kucheria 3725bac12f25SAmit Kucheria gpu-thermal-top { 3726bac12f25SAmit Kucheria polling-delay-passive = <250>; 3727bac12f25SAmit Kucheria polling-delay = <1000>; 3728bac12f25SAmit Kucheria 3729bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 3730bac12f25SAmit Kucheria 3731bac12f25SAmit Kucheria trips { 3732bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 3733bac12f25SAmit Kucheria temperature = <90000>; 3734bac12f25SAmit Kucheria hysteresis = <2000>; 3735bac12f25SAmit Kucheria type = "hot"; 3736bac12f25SAmit Kucheria }; 3737bac12f25SAmit Kucheria }; 3738bac12f25SAmit Kucheria }; 3739bac12f25SAmit Kucheria 3740bac12f25SAmit Kucheria aoss1-thermal { 3741bac12f25SAmit Kucheria polling-delay-passive = <250>; 3742bac12f25SAmit Kucheria polling-delay = <1000>; 3743bac12f25SAmit Kucheria 3744bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 3745bac12f25SAmit Kucheria 3746bac12f25SAmit Kucheria trips { 3747bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 3748bac12f25SAmit Kucheria temperature = <90000>; 3749bac12f25SAmit Kucheria hysteresis = <2000>; 3750bac12f25SAmit Kucheria type = "hot"; 3751bac12f25SAmit Kucheria }; 3752bac12f25SAmit Kucheria }; 3753bac12f25SAmit Kucheria }; 3754bac12f25SAmit Kucheria 3755bac12f25SAmit Kucheria wlan-thermal { 3756bac12f25SAmit Kucheria polling-delay-passive = <250>; 3757bac12f25SAmit Kucheria polling-delay = <1000>; 3758bac12f25SAmit Kucheria 3759bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 3760bac12f25SAmit Kucheria 3761bac12f25SAmit Kucheria trips { 3762bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 3763bac12f25SAmit Kucheria temperature = <90000>; 3764bac12f25SAmit Kucheria hysteresis = <2000>; 3765bac12f25SAmit Kucheria type = "hot"; 3766bac12f25SAmit Kucheria }; 3767bac12f25SAmit Kucheria }; 3768bac12f25SAmit Kucheria }; 3769bac12f25SAmit Kucheria 3770bac12f25SAmit Kucheria video-thermal { 3771bac12f25SAmit Kucheria polling-delay-passive = <250>; 3772bac12f25SAmit Kucheria polling-delay = <1000>; 3773bac12f25SAmit Kucheria 3774bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 3775bac12f25SAmit Kucheria 3776bac12f25SAmit Kucheria trips { 3777bac12f25SAmit Kucheria video_alert0: trip-point0 { 3778bac12f25SAmit Kucheria temperature = <90000>; 3779bac12f25SAmit Kucheria hysteresis = <2000>; 3780bac12f25SAmit Kucheria type = "hot"; 3781bac12f25SAmit Kucheria }; 3782bac12f25SAmit Kucheria }; 3783bac12f25SAmit Kucheria }; 3784bac12f25SAmit Kucheria 3785bac12f25SAmit Kucheria mem-thermal { 3786bac12f25SAmit Kucheria polling-delay-passive = <250>; 3787bac12f25SAmit Kucheria polling-delay = <1000>; 3788bac12f25SAmit Kucheria 3789bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 3790bac12f25SAmit Kucheria 3791bac12f25SAmit Kucheria trips { 3792bac12f25SAmit Kucheria mem_alert0: trip-point0 { 3793bac12f25SAmit Kucheria temperature = <90000>; 3794bac12f25SAmit Kucheria hysteresis = <2000>; 3795bac12f25SAmit Kucheria type = "hot"; 3796bac12f25SAmit Kucheria }; 3797bac12f25SAmit Kucheria }; 3798bac12f25SAmit Kucheria }; 3799bac12f25SAmit Kucheria 3800bac12f25SAmit Kucheria q6-hvx-thermal { 3801bac12f25SAmit Kucheria polling-delay-passive = <250>; 3802bac12f25SAmit Kucheria polling-delay = <1000>; 3803bac12f25SAmit Kucheria 3804bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 3805bac12f25SAmit Kucheria 3806bac12f25SAmit Kucheria trips { 3807bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 3808bac12f25SAmit Kucheria temperature = <90000>; 3809bac12f25SAmit Kucheria hysteresis = <2000>; 3810bac12f25SAmit Kucheria type = "hot"; 3811bac12f25SAmit Kucheria }; 3812bac12f25SAmit Kucheria }; 3813bac12f25SAmit Kucheria }; 3814bac12f25SAmit Kucheria 3815bac12f25SAmit Kucheria camera-thermal { 3816bac12f25SAmit Kucheria polling-delay-passive = <250>; 3817bac12f25SAmit Kucheria polling-delay = <1000>; 3818bac12f25SAmit Kucheria 3819bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 3820bac12f25SAmit Kucheria 3821bac12f25SAmit Kucheria trips { 3822bac12f25SAmit Kucheria camera_alert0: trip-point0 { 3823bac12f25SAmit Kucheria temperature = <90000>; 3824bac12f25SAmit Kucheria hysteresis = <2000>; 3825bac12f25SAmit Kucheria type = "hot"; 3826bac12f25SAmit Kucheria }; 3827bac12f25SAmit Kucheria }; 3828bac12f25SAmit Kucheria }; 3829bac12f25SAmit Kucheria 3830bac12f25SAmit Kucheria compute-thermal { 3831bac12f25SAmit Kucheria polling-delay-passive = <250>; 3832bac12f25SAmit Kucheria polling-delay = <1000>; 3833bac12f25SAmit Kucheria 3834bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 3835bac12f25SAmit Kucheria 3836bac12f25SAmit Kucheria trips { 3837bac12f25SAmit Kucheria compute_alert0: trip-point0 { 3838bac12f25SAmit Kucheria temperature = <90000>; 3839bac12f25SAmit Kucheria hysteresis = <2000>; 3840bac12f25SAmit Kucheria type = "hot"; 3841bac12f25SAmit Kucheria }; 3842bac12f25SAmit Kucheria }; 3843bac12f25SAmit Kucheria }; 3844bac12f25SAmit Kucheria 3845bac12f25SAmit Kucheria npu-thermal { 3846bac12f25SAmit Kucheria polling-delay-passive = <250>; 3847bac12f25SAmit Kucheria polling-delay = <1000>; 3848bac12f25SAmit Kucheria 3849bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 3850bac12f25SAmit Kucheria 3851bac12f25SAmit Kucheria trips { 3852bac12f25SAmit Kucheria npu_alert0: trip-point0 { 3853bac12f25SAmit Kucheria temperature = <90000>; 3854bac12f25SAmit Kucheria hysteresis = <2000>; 3855bac12f25SAmit Kucheria type = "hot"; 3856bac12f25SAmit Kucheria }; 3857bac12f25SAmit Kucheria }; 3858bac12f25SAmit Kucheria }; 3859bac12f25SAmit Kucheria 3860bac12f25SAmit Kucheria gpu-thermal-bottom { 3861bac12f25SAmit Kucheria polling-delay-passive = <250>; 3862bac12f25SAmit Kucheria polling-delay = <1000>; 3863bac12f25SAmit Kucheria 3864bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 3865bac12f25SAmit Kucheria 3866bac12f25SAmit Kucheria trips { 3867bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 3868bac12f25SAmit Kucheria temperature = <90000>; 3869bac12f25SAmit Kucheria hysteresis = <2000>; 3870bac12f25SAmit Kucheria type = "hot"; 3871bac12f25SAmit Kucheria }; 3872bac12f25SAmit Kucheria }; 3873bac12f25SAmit Kucheria }; 3874bac12f25SAmit Kucheria }; 387560378f1aSVenkata Narendra Kumar Gutta}; 3876