160378f1aSVenkata Narendra Kumar Gutta// SPDX-License-Identifier: BSD-3-Clause 260378f1aSVenkata Narendra Kumar Gutta/* 360378f1aSVenkata Narendra Kumar Gutta * Copyright (c) 2020, The Linux Foundation. All rights reserved. 460378f1aSVenkata Narendra Kumar Gutta */ 560378f1aSVenkata Narendra Kumar Gutta 660378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/interrupt-controller/arm-gic.h> 77c1dffd4SDmitry Baryshkov#include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8b7e2fba0SBryan O'Donoghue#include <dt-bindings/clock/qcom,gcc-sm8250.h> 90e6aa9dbSJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8250.h> 1060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/clock/qcom,rpmh.h> 117858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> 127858ef3cSLuca Weiss#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> 1315049bb5SKonrad Dybcio#include <dt-bindings/dma/qcom-gpi.h> 1475948800SKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1579a595bbSSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 167c1dffd4SDmitry Baryshkov#include <dt-bindings/interconnect/qcom,sm8250.h> 17e5361e75SBjorn Andersson#include <dt-bindings/mailbox/qcom-ipcc.h> 18b6f78e27SBjorn Andersson#include <dt-bindings/power/qcom-rpmpd.h> 1963e10791SSrinivas Kandagatla#include <dt-bindings/soc/qcom,apr.h> 2060378f1aSVenkata Narendra Kumar Gutta#include <dt-bindings/soc/qcom,rpmh-rsc.h> 2163e10791SSrinivas Kandagatla#include <dt-bindings/sound/qcom,q6afe.h> 22bac12f25SAmit Kucheria#include <dt-bindings/thermal/thermal.h> 23ca79a997SBryan O'Donoghue#include <dt-bindings/clock/qcom,camcc-sm8250.h> 245b9ec225Sjonathan@marek.ca#include <dt-bindings/clock/qcom,videocc-sm8250.h> 2560378f1aSVenkata Narendra Kumar Gutta 2660378f1aSVenkata Narendra Kumar Gutta/ { 2760378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 2860378f1aSVenkata Narendra Kumar Gutta 2960378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 3060378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 3160378f1aSVenkata Narendra Kumar Gutta 32e5813b15SDmitry Baryshkov aliases { 33e5813b15SDmitry Baryshkov i2c0 = &i2c0; 34e5813b15SDmitry Baryshkov i2c1 = &i2c1; 35e5813b15SDmitry Baryshkov i2c2 = &i2c2; 36e5813b15SDmitry Baryshkov i2c3 = &i2c3; 37e5813b15SDmitry Baryshkov i2c4 = &i2c4; 38e5813b15SDmitry Baryshkov i2c5 = &i2c5; 39e5813b15SDmitry Baryshkov i2c6 = &i2c6; 40e5813b15SDmitry Baryshkov i2c7 = &i2c7; 41e5813b15SDmitry Baryshkov i2c8 = &i2c8; 42e5813b15SDmitry Baryshkov i2c9 = &i2c9; 43e5813b15SDmitry Baryshkov i2c10 = &i2c10; 44e5813b15SDmitry Baryshkov i2c11 = &i2c11; 45e5813b15SDmitry Baryshkov i2c12 = &i2c12; 46e5813b15SDmitry Baryshkov i2c13 = &i2c13; 47e5813b15SDmitry Baryshkov i2c14 = &i2c14; 48e5813b15SDmitry Baryshkov i2c15 = &i2c15; 49e5813b15SDmitry Baryshkov i2c16 = &i2c16; 50e5813b15SDmitry Baryshkov i2c17 = &i2c17; 51e5813b15SDmitry Baryshkov i2c18 = &i2c18; 52e5813b15SDmitry Baryshkov i2c19 = &i2c19; 53e5813b15SDmitry Baryshkov spi0 = &spi0; 54e5813b15SDmitry Baryshkov spi1 = &spi1; 55e5813b15SDmitry Baryshkov spi2 = &spi2; 56e5813b15SDmitry Baryshkov spi3 = &spi3; 57e5813b15SDmitry Baryshkov spi4 = &spi4; 58e5813b15SDmitry Baryshkov spi5 = &spi5; 59e5813b15SDmitry Baryshkov spi6 = &spi6; 60e5813b15SDmitry Baryshkov spi7 = &spi7; 61e5813b15SDmitry Baryshkov spi8 = &spi8; 62e5813b15SDmitry Baryshkov spi9 = &spi9; 63e5813b15SDmitry Baryshkov spi10 = &spi10; 64e5813b15SDmitry Baryshkov spi11 = &spi11; 65e5813b15SDmitry Baryshkov spi12 = &spi12; 66e5813b15SDmitry Baryshkov spi13 = &spi13; 67e5813b15SDmitry Baryshkov spi14 = &spi14; 68e5813b15SDmitry Baryshkov spi15 = &spi15; 69e5813b15SDmitry Baryshkov spi16 = &spi16; 70e5813b15SDmitry Baryshkov spi17 = &spi17; 71e5813b15SDmitry Baryshkov spi18 = &spi18; 72e5813b15SDmitry Baryshkov spi19 = &spi19; 73e5813b15SDmitry Baryshkov }; 74e5813b15SDmitry Baryshkov 7560378f1aSVenkata Narendra Kumar Gutta chosen { }; 7660378f1aSVenkata Narendra Kumar Gutta 7760378f1aSVenkata Narendra Kumar Gutta clocks { 7860378f1aSVenkata Narendra Kumar Gutta xo_board: xo-board { 7960378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 8060378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8160378f1aSVenkata Narendra Kumar Gutta clock-frequency = <38400000>; 8260378f1aSVenkata Narendra Kumar Gutta clock-output-names = "xo_board"; 8360378f1aSVenkata Narendra Kumar Gutta }; 8460378f1aSVenkata Narendra Kumar Gutta 8560378f1aSVenkata Narendra Kumar Gutta sleep_clk: sleep-clk { 8660378f1aSVenkata Narendra Kumar Gutta compatible = "fixed-clock"; 879ff8b059SJonathan Marek clock-frequency = <32768>; 8860378f1aSVenkata Narendra Kumar Gutta #clock-cells = <0>; 8960378f1aSVenkata Narendra Kumar Gutta }; 9060378f1aSVenkata Narendra Kumar Gutta }; 9160378f1aSVenkata Narendra Kumar Gutta 9260378f1aSVenkata Narendra Kumar Gutta cpus { 9360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 9460378f1aSVenkata Narendra Kumar Gutta #size-cells = <0>; 9560378f1aSVenkata Narendra Kumar Gutta 9660378f1aSVenkata Narendra Kumar Gutta CPU0: cpu@0 { 9760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 9860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 9960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0>; 10060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1016aabed55SDanny Lin capacity-dmips-mhz = <448>; 1026aabed55SDanny Lin dynamic-power-coefficient = <205>; 10360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_0>; 10432bc936dSMaulik Shah power-domains = <&CPU_PD0>; 10532bc936dSMaulik Shah power-domain-names = "psci"; 10602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1078e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1088e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1098e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 110bac12f25SAmit Kucheria #cooling-cells = <2>; 11160378f1aSVenkata Narendra Kumar Gutta L2_0: l2-cache { 11260378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 11360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 11460378f1aSVenkata Narendra Kumar Gutta L3_0: l3-cache { 11560378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 11660378f1aSVenkata Narendra Kumar Gutta }; 11760378f1aSVenkata Narendra Kumar Gutta }; 11860378f1aSVenkata Narendra Kumar Gutta }; 11960378f1aSVenkata Narendra Kumar Gutta 12060378f1aSVenkata Narendra Kumar Gutta CPU1: cpu@100 { 12160378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 12260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 12360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x100>; 12460378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1256aabed55SDanny Lin capacity-dmips-mhz = <448>; 1266aabed55SDanny Lin dynamic-power-coefficient = <205>; 12760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_100>; 12832bc936dSMaulik Shah power-domains = <&CPU_PD1>; 12932bc936dSMaulik Shah power-domain-names = "psci"; 13002ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1318e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1328e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1338e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 134bac12f25SAmit Kucheria #cooling-cells = <2>; 13560378f1aSVenkata Narendra Kumar Gutta L2_100: l2-cache { 13660378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 13760378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 13860378f1aSVenkata Narendra Kumar Gutta }; 13960378f1aSVenkata Narendra Kumar Gutta }; 14060378f1aSVenkata Narendra Kumar Gutta 14160378f1aSVenkata Narendra Kumar Gutta CPU2: cpu@200 { 14260378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 14360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 14460378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x200>; 14560378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1466aabed55SDanny Lin capacity-dmips-mhz = <448>; 1476aabed55SDanny Lin dynamic-power-coefficient = <205>; 14860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_200>; 14932bc936dSMaulik Shah power-domains = <&CPU_PD2>; 15032bc936dSMaulik Shah power-domain-names = "psci"; 15102ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1528e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1538e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1548e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 155bac12f25SAmit Kucheria #cooling-cells = <2>; 15660378f1aSVenkata Narendra Kumar Gutta L2_200: l2-cache { 15760378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 15860378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 15960378f1aSVenkata Narendra Kumar Gutta }; 16060378f1aSVenkata Narendra Kumar Gutta }; 16160378f1aSVenkata Narendra Kumar Gutta 16260378f1aSVenkata Narendra Kumar Gutta CPU3: cpu@300 { 16360378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 16460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 16560378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x300>; 16660378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1676aabed55SDanny Lin capacity-dmips-mhz = <448>; 1686aabed55SDanny Lin dynamic-power-coefficient = <205>; 16960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_300>; 17032bc936dSMaulik Shah power-domains = <&CPU_PD3>; 17132bc936dSMaulik Shah power-domain-names = "psci"; 17202ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 0>; 1738e0e8016SThara Gopinath operating-points-v2 = <&cpu0_opp_table>; 1748e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1758e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 176bac12f25SAmit Kucheria #cooling-cells = <2>; 17760378f1aSVenkata Narendra Kumar Gutta L2_300: l2-cache { 17860378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 17960378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 18060378f1aSVenkata Narendra Kumar Gutta }; 18160378f1aSVenkata Narendra Kumar Gutta }; 18260378f1aSVenkata Narendra Kumar Gutta 18360378f1aSVenkata Narendra Kumar Gutta CPU4: cpu@400 { 18460378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 18560378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 18660378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x400>; 18760378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 1886aabed55SDanny Lin capacity-dmips-mhz = <1024>; 1896aabed55SDanny Lin dynamic-power-coefficient = <379>; 19060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_400>; 19132bc936dSMaulik Shah power-domains = <&CPU_PD4>; 19232bc936dSMaulik Shah power-domain-names = "psci"; 19302ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 1948e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 1958e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 1968e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 197bac12f25SAmit Kucheria #cooling-cells = <2>; 19860378f1aSVenkata Narendra Kumar Gutta L2_400: l2-cache { 19960378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 20060378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 20160378f1aSVenkata Narendra Kumar Gutta }; 20260378f1aSVenkata Narendra Kumar Gutta }; 20360378f1aSVenkata Narendra Kumar Gutta 20460378f1aSVenkata Narendra Kumar Gutta CPU5: cpu@500 { 20560378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 20660378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 20760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x500>; 20860378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2096aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2106aabed55SDanny Lin dynamic-power-coefficient = <379>; 21160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_500>; 21232bc936dSMaulik Shah power-domains = <&CPU_PD5>; 21332bc936dSMaulik Shah power-domain-names = "psci"; 21402ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2158e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 2168e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2178e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 218bac12f25SAmit Kucheria #cooling-cells = <2>; 21960378f1aSVenkata Narendra Kumar Gutta L2_500: l2-cache { 22060378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 22160378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 22260378f1aSVenkata Narendra Kumar Gutta }; 22360378f1aSVenkata Narendra Kumar Gutta 22460378f1aSVenkata Narendra Kumar Gutta }; 22560378f1aSVenkata Narendra Kumar Gutta 22660378f1aSVenkata Narendra Kumar Gutta CPU6: cpu@600 { 22760378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 22860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 22960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x600>; 23060378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2316aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2326aabed55SDanny Lin dynamic-power-coefficient = <379>; 23360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_600>; 23432bc936dSMaulik Shah power-domains = <&CPU_PD6>; 23532bc936dSMaulik Shah power-domain-names = "psci"; 23602ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 1>; 2378e0e8016SThara Gopinath operating-points-v2 = <&cpu4_opp_table>; 2388e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2398e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 240bac12f25SAmit Kucheria #cooling-cells = <2>; 24160378f1aSVenkata Narendra Kumar Gutta L2_600: l2-cache { 24260378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 24360378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 24460378f1aSVenkata Narendra Kumar Gutta }; 24560378f1aSVenkata Narendra Kumar Gutta }; 24660378f1aSVenkata Narendra Kumar Gutta 24760378f1aSVenkata Narendra Kumar Gutta CPU7: cpu@700 { 24860378f1aSVenkata Narendra Kumar Gutta device_type = "cpu"; 24960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,kryo485"; 25060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x700>; 25160378f1aSVenkata Narendra Kumar Gutta enable-method = "psci"; 2526aabed55SDanny Lin capacity-dmips-mhz = <1024>; 2536aabed55SDanny Lin dynamic-power-coefficient = <444>; 25460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L2_700>; 25532bc936dSMaulik Shah power-domains = <&CPU_PD7>; 25632bc936dSMaulik Shah power-domain-names = "psci"; 25702ae4a0eSBjorn Andersson qcom,freq-domain = <&cpufreq_hw 2>; 2588e0e8016SThara Gopinath operating-points-v2 = <&cpu7_opp_table>; 2598e0e8016SThara Gopinath interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>, 2608e0e8016SThara Gopinath <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>; 261bac12f25SAmit Kucheria #cooling-cells = <2>; 26260378f1aSVenkata Narendra Kumar Gutta L2_700: l2-cache { 26360378f1aSVenkata Narendra Kumar Gutta compatible = "cache"; 26460378f1aSVenkata Narendra Kumar Gutta next-level-cache = <&L3_0>; 26560378f1aSVenkata Narendra Kumar Gutta }; 26660378f1aSVenkata Narendra Kumar Gutta }; 267b4791e69SDanny Lin 268b4791e69SDanny Lin cpu-map { 269b4791e69SDanny Lin cluster0 { 270b4791e69SDanny Lin core0 { 271b4791e69SDanny Lin cpu = <&CPU0>; 272b4791e69SDanny Lin }; 273b4791e69SDanny Lin 274b4791e69SDanny Lin core1 { 275b4791e69SDanny Lin cpu = <&CPU1>; 276b4791e69SDanny Lin }; 277b4791e69SDanny Lin 278b4791e69SDanny Lin core2 { 279b4791e69SDanny Lin cpu = <&CPU2>; 280b4791e69SDanny Lin }; 281b4791e69SDanny Lin 282b4791e69SDanny Lin core3 { 283b4791e69SDanny Lin cpu = <&CPU3>; 284b4791e69SDanny Lin }; 285b4791e69SDanny Lin 286b4791e69SDanny Lin core4 { 287b4791e69SDanny Lin cpu = <&CPU4>; 288b4791e69SDanny Lin }; 289b4791e69SDanny Lin 290b4791e69SDanny Lin core5 { 291b4791e69SDanny Lin cpu = <&CPU5>; 292b4791e69SDanny Lin }; 293b4791e69SDanny Lin 294b4791e69SDanny Lin core6 { 295b4791e69SDanny Lin cpu = <&CPU6>; 296b4791e69SDanny Lin }; 297b4791e69SDanny Lin 298b4791e69SDanny Lin core7 { 299b4791e69SDanny Lin cpu = <&CPU7>; 300b4791e69SDanny Lin }; 301b4791e69SDanny Lin }; 302b4791e69SDanny Lin }; 30332bc936dSMaulik Shah 30432bc936dSMaulik Shah idle-states { 30532bc936dSMaulik Shah entry-method = "psci"; 30632bc936dSMaulik Shah 30732bc936dSMaulik Shah LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 30832bc936dSMaulik Shah compatible = "arm,idle-state"; 30932bc936dSMaulik Shah idle-state-name = "silver-rail-power-collapse"; 31032bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 31132bc936dSMaulik Shah entry-latency-us = <360>; 31232bc936dSMaulik Shah exit-latency-us = <531>; 31332bc936dSMaulik Shah min-residency-us = <3934>; 31432bc936dSMaulik Shah local-timer-stop; 31532bc936dSMaulik Shah }; 31632bc936dSMaulik Shah 31732bc936dSMaulik Shah BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 31832bc936dSMaulik Shah compatible = "arm,idle-state"; 31932bc936dSMaulik Shah idle-state-name = "gold-rail-power-collapse"; 32032bc936dSMaulik Shah arm,psci-suspend-param = <0x40000004>; 32132bc936dSMaulik Shah entry-latency-us = <702>; 32232bc936dSMaulik Shah exit-latency-us = <1061>; 32332bc936dSMaulik Shah min-residency-us = <4488>; 32432bc936dSMaulik Shah local-timer-stop; 32532bc936dSMaulik Shah }; 32632bc936dSMaulik Shah }; 32732bc936dSMaulik Shah 32832bc936dSMaulik Shah domain-idle-states { 32932bc936dSMaulik Shah CLUSTER_SLEEP_0: cluster-sleep-0 { 33032bc936dSMaulik Shah compatible = "domain-idle-state"; 33132bc936dSMaulik Shah idle-state-name = "cluster-llcc-off"; 33232bc936dSMaulik Shah arm,psci-suspend-param = <0x4100c244>; 33332bc936dSMaulik Shah entry-latency-us = <3264>; 33432bc936dSMaulik Shah exit-latency-us = <6562>; 33532bc936dSMaulik Shah min-residency-us = <9987>; 33632bc936dSMaulik Shah local-timer-stop; 33732bc936dSMaulik Shah }; 33832bc936dSMaulik Shah }; 33960378f1aSVenkata Narendra Kumar Gutta }; 34060378f1aSVenkata Narendra Kumar Gutta 3410e3e6546SKrzysztof Kozlowski cpu0_opp_table: opp-table-cpu0 { 3428e0e8016SThara Gopinath compatible = "operating-points-v2"; 3438e0e8016SThara Gopinath opp-shared; 3448e0e8016SThara Gopinath 3458e0e8016SThara Gopinath cpu0_opp1: opp-300000000 { 3468e0e8016SThara Gopinath opp-hz = /bits/ 64 <300000000>; 3478e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3488e0e8016SThara Gopinath }; 3498e0e8016SThara Gopinath 3508e0e8016SThara Gopinath cpu0_opp2: opp-403200000 { 3518e0e8016SThara Gopinath opp-hz = /bits/ 64 <403200000>; 3528e0e8016SThara Gopinath opp-peak-kBps = <800000 9600000>; 3538e0e8016SThara Gopinath }; 3548e0e8016SThara Gopinath 3558e0e8016SThara Gopinath cpu0_opp3: opp-518400000 { 3568e0e8016SThara Gopinath opp-hz = /bits/ 64 <518400000>; 3578e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3588e0e8016SThara Gopinath }; 3598e0e8016SThara Gopinath 3608e0e8016SThara Gopinath cpu0_opp4: opp-614400000 { 3618e0e8016SThara Gopinath opp-hz = /bits/ 64 <614400000>; 3628e0e8016SThara Gopinath opp-peak-kBps = <800000 16588800>; 3638e0e8016SThara Gopinath }; 3648e0e8016SThara Gopinath 3658e0e8016SThara Gopinath cpu0_opp5: opp-691200000 { 3668e0e8016SThara Gopinath opp-hz = /bits/ 64 <691200000>; 3678e0e8016SThara Gopinath opp-peak-kBps = <800000 19660800>; 3688e0e8016SThara Gopinath }; 3698e0e8016SThara Gopinath 3708e0e8016SThara Gopinath cpu0_opp6: opp-787200000 { 3718e0e8016SThara Gopinath opp-hz = /bits/ 64 <787200000>; 3728e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 3738e0e8016SThara Gopinath }; 3748e0e8016SThara Gopinath 3758e0e8016SThara Gopinath cpu0_opp7: opp-883200000 { 3768e0e8016SThara Gopinath opp-hz = /bits/ 64 <883200000>; 3778e0e8016SThara Gopinath opp-peak-kBps = <1804000 23347200>; 3788e0e8016SThara Gopinath }; 3798e0e8016SThara Gopinath 3808e0e8016SThara Gopinath cpu0_opp8: opp-979200000 { 3818e0e8016SThara Gopinath opp-hz = /bits/ 64 <979200000>; 3828e0e8016SThara Gopinath opp-peak-kBps = <1804000 26419200>; 3838e0e8016SThara Gopinath }; 3848e0e8016SThara Gopinath 3858e0e8016SThara Gopinath cpu0_opp9: opp-1075200000 { 3868e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 3878e0e8016SThara Gopinath opp-peak-kBps = <1804000 29491200>; 3888e0e8016SThara Gopinath }; 3898e0e8016SThara Gopinath 3908e0e8016SThara Gopinath cpu0_opp10: opp-1171200000 { 3918e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 3928e0e8016SThara Gopinath opp-peak-kBps = <1804000 32563200>; 3938e0e8016SThara Gopinath }; 3948e0e8016SThara Gopinath 3958e0e8016SThara Gopinath cpu0_opp11: opp-1248000000 { 3968e0e8016SThara Gopinath opp-hz = /bits/ 64 <1248000000>; 3978e0e8016SThara Gopinath opp-peak-kBps = <1804000 36249600>; 3988e0e8016SThara Gopinath }; 3998e0e8016SThara Gopinath 4008e0e8016SThara Gopinath cpu0_opp12: opp-1344000000 { 4018e0e8016SThara Gopinath opp-hz = /bits/ 64 <1344000000>; 4028e0e8016SThara Gopinath opp-peak-kBps = <2188000 36249600>; 4038e0e8016SThara Gopinath }; 4048e0e8016SThara Gopinath 4058e0e8016SThara Gopinath cpu0_opp13: opp-1420800000 { 4068e0e8016SThara Gopinath opp-hz = /bits/ 64 <1420800000>; 4078e0e8016SThara Gopinath opp-peak-kBps = <2188000 39321600>; 4088e0e8016SThara Gopinath }; 4098e0e8016SThara Gopinath 4108e0e8016SThara Gopinath cpu0_opp14: opp-1516800000 { 4118e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 4128e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4138e0e8016SThara Gopinath }; 4148e0e8016SThara Gopinath 4158e0e8016SThara Gopinath cpu0_opp15: opp-1612800000 { 4168e0e8016SThara Gopinath opp-hz = /bits/ 64 <1612800000>; 4178e0e8016SThara Gopinath opp-peak-kBps = <3072000 42393600>; 4188e0e8016SThara Gopinath }; 4198e0e8016SThara Gopinath 4208e0e8016SThara Gopinath cpu0_opp16: opp-1708800000 { 4218e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 4228e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4238e0e8016SThara Gopinath }; 4248e0e8016SThara Gopinath 4258e0e8016SThara Gopinath cpu0_opp17: opp-1804800000 { 4268e0e8016SThara Gopinath opp-hz = /bits/ 64 <1804800000>; 4278e0e8016SThara Gopinath opp-peak-kBps = <4068000 42393600>; 4288e0e8016SThara Gopinath }; 4298e0e8016SThara Gopinath }; 4308e0e8016SThara Gopinath 4310e3e6546SKrzysztof Kozlowski cpu4_opp_table: opp-table-cpu4 { 4328e0e8016SThara Gopinath compatible = "operating-points-v2"; 4338e0e8016SThara Gopinath opp-shared; 4348e0e8016SThara Gopinath 4358e0e8016SThara Gopinath cpu4_opp1: opp-710400000 { 4368e0e8016SThara Gopinath opp-hz = /bits/ 64 <710400000>; 4378e0e8016SThara Gopinath opp-peak-kBps = <1804000 19660800>; 4388e0e8016SThara Gopinath }; 4398e0e8016SThara Gopinath 4408e0e8016SThara Gopinath cpu4_opp2: opp-825600000 { 4418e0e8016SThara Gopinath opp-hz = /bits/ 64 <825600000>; 4428e0e8016SThara Gopinath opp-peak-kBps = <2188000 23347200>; 4438e0e8016SThara Gopinath }; 4448e0e8016SThara Gopinath 4458e0e8016SThara Gopinath cpu4_opp3: opp-940800000 { 4468e0e8016SThara Gopinath opp-hz = /bits/ 64 <940800000>; 4478e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 4488e0e8016SThara Gopinath }; 4498e0e8016SThara Gopinath 4508e0e8016SThara Gopinath cpu4_opp4: opp-1056000000 { 4518e0e8016SThara Gopinath opp-hz = /bits/ 64 <1056000000>; 4528e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 4538e0e8016SThara Gopinath }; 4548e0e8016SThara Gopinath 4558e0e8016SThara Gopinath cpu4_opp5: opp-1171200000 { 4568e0e8016SThara Gopinath opp-hz = /bits/ 64 <1171200000>; 4578e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 4588e0e8016SThara Gopinath }; 4598e0e8016SThara Gopinath 4608e0e8016SThara Gopinath cpu4_opp6: opp-1286400000 { 4618e0e8016SThara Gopinath opp-hz = /bits/ 64 <1286400000>; 4628e0e8016SThara Gopinath opp-peak-kBps = <4068000 29491200>; 4638e0e8016SThara Gopinath }; 4648e0e8016SThara Gopinath 4658e0e8016SThara Gopinath cpu4_opp7: opp-1382400000 { 4668e0e8016SThara Gopinath opp-hz = /bits/ 64 <1382400000>; 4678e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 4688e0e8016SThara Gopinath }; 4698e0e8016SThara Gopinath 4708e0e8016SThara Gopinath cpu4_opp8: opp-1478400000 { 4718e0e8016SThara Gopinath opp-hz = /bits/ 64 <1478400000>; 4728e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 4738e0e8016SThara Gopinath }; 4748e0e8016SThara Gopinath 4758e0e8016SThara Gopinath cpu4_opp9: opp-1574400000 { 4768e0e8016SThara Gopinath opp-hz = /bits/ 64 <1574400000>; 4778e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 4788e0e8016SThara Gopinath }; 4798e0e8016SThara Gopinath 4808e0e8016SThara Gopinath cpu4_opp10: opp-1670400000 { 4818e0e8016SThara Gopinath opp-hz = /bits/ 64 <1670400000>; 4828e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 4838e0e8016SThara Gopinath }; 4848e0e8016SThara Gopinath 4858e0e8016SThara Gopinath cpu4_opp11: opp-1766400000 { 4868e0e8016SThara Gopinath opp-hz = /bits/ 64 <1766400000>; 4878e0e8016SThara Gopinath opp-peak-kBps = <5412000 45465600>; 4888e0e8016SThara Gopinath }; 4898e0e8016SThara Gopinath 4908e0e8016SThara Gopinath cpu4_opp12: opp-1862400000 { 4918e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 4928e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 4938e0e8016SThara Gopinath }; 4948e0e8016SThara Gopinath 4958e0e8016SThara Gopinath cpu4_opp13: opp-1958400000 { 4968e0e8016SThara Gopinath opp-hz = /bits/ 64 <1958400000>; 4978e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 4988e0e8016SThara Gopinath }; 4998e0e8016SThara Gopinath 5008e0e8016SThara Gopinath cpu4_opp14: opp-2054400000 { 5018e0e8016SThara Gopinath opp-hz = /bits/ 64 <2054400000>; 5028e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 5038e0e8016SThara Gopinath }; 5048e0e8016SThara Gopinath 5058e0e8016SThara Gopinath cpu4_opp15: opp-2150400000 { 5068e0e8016SThara Gopinath opp-hz = /bits/ 64 <2150400000>; 5078e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5088e0e8016SThara Gopinath }; 5098e0e8016SThara Gopinath 5108e0e8016SThara Gopinath cpu4_opp16: opp-2246400000 { 5118e0e8016SThara Gopinath opp-hz = /bits/ 64 <2246400000>; 5128e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5138e0e8016SThara Gopinath }; 5148e0e8016SThara Gopinath 5158e0e8016SThara Gopinath cpu4_opp17: opp-2342400000 { 5168e0e8016SThara Gopinath opp-hz = /bits/ 64 <2342400000>; 5178e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5188e0e8016SThara Gopinath }; 5198e0e8016SThara Gopinath 5208e0e8016SThara Gopinath cpu4_opp18: opp-2419200000 { 5218e0e8016SThara Gopinath opp-hz = /bits/ 64 <2419200000>; 5228e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 5238e0e8016SThara Gopinath }; 5248e0e8016SThara Gopinath }; 5258e0e8016SThara Gopinath 5260e3e6546SKrzysztof Kozlowski cpu7_opp_table: opp-table-cpu7 { 5278e0e8016SThara Gopinath compatible = "operating-points-v2"; 5288e0e8016SThara Gopinath opp-shared; 5298e0e8016SThara Gopinath 5308e0e8016SThara Gopinath cpu7_opp1: opp-844800000 { 5318e0e8016SThara Gopinath opp-hz = /bits/ 64 <844800000>; 5328e0e8016SThara Gopinath opp-peak-kBps = <2188000 19660800>; 5338e0e8016SThara Gopinath }; 5348e0e8016SThara Gopinath 5358e0e8016SThara Gopinath cpu7_opp2: opp-960000000 { 5368e0e8016SThara Gopinath opp-hz = /bits/ 64 <960000000>; 5378e0e8016SThara Gopinath opp-peak-kBps = <2188000 26419200>; 5388e0e8016SThara Gopinath }; 5398e0e8016SThara Gopinath 5408e0e8016SThara Gopinath cpu7_opp3: opp-1075200000 { 5418e0e8016SThara Gopinath opp-hz = /bits/ 64 <1075200000>; 5428e0e8016SThara Gopinath opp-peak-kBps = <3072000 26419200>; 5438e0e8016SThara Gopinath }; 5448e0e8016SThara Gopinath 5458e0e8016SThara Gopinath cpu7_opp4: opp-1190400000 { 5468e0e8016SThara Gopinath opp-hz = /bits/ 64 <1190400000>; 5478e0e8016SThara Gopinath opp-peak-kBps = <3072000 29491200>; 5488e0e8016SThara Gopinath }; 5498e0e8016SThara Gopinath 5508e0e8016SThara Gopinath cpu7_opp5: opp-1305600000 { 5518e0e8016SThara Gopinath opp-hz = /bits/ 64 <1305600000>; 5528e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5538e0e8016SThara Gopinath }; 5548e0e8016SThara Gopinath 5558e0e8016SThara Gopinath cpu7_opp6: opp-1401600000 { 5568e0e8016SThara Gopinath opp-hz = /bits/ 64 <1401600000>; 5578e0e8016SThara Gopinath opp-peak-kBps = <4068000 32563200>; 5588e0e8016SThara Gopinath }; 5598e0e8016SThara Gopinath 5608e0e8016SThara Gopinath cpu7_opp7: opp-1516800000 { 5618e0e8016SThara Gopinath opp-hz = /bits/ 64 <1516800000>; 5628e0e8016SThara Gopinath opp-peak-kBps = <4068000 36249600>; 5638e0e8016SThara Gopinath }; 5648e0e8016SThara Gopinath 5658e0e8016SThara Gopinath cpu7_opp8: opp-1632000000 { 5668e0e8016SThara Gopinath opp-hz = /bits/ 64 <1632000000>; 5678e0e8016SThara Gopinath opp-peak-kBps = <5412000 39321600>; 5688e0e8016SThara Gopinath }; 5698e0e8016SThara Gopinath 5708e0e8016SThara Gopinath cpu7_opp9: opp-1747200000 { 5718e0e8016SThara Gopinath opp-hz = /bits/ 64 <1708800000>; 5728e0e8016SThara Gopinath opp-peak-kBps = <5412000 42393600>; 5738e0e8016SThara Gopinath }; 5748e0e8016SThara Gopinath 5758e0e8016SThara Gopinath cpu7_opp10: opp-1862400000 { 5768e0e8016SThara Gopinath opp-hz = /bits/ 64 <1862400000>; 5778e0e8016SThara Gopinath opp-peak-kBps = <6220000 45465600>; 5788e0e8016SThara Gopinath }; 5798e0e8016SThara Gopinath 5808e0e8016SThara Gopinath cpu7_opp11: opp-1977600000 { 5818e0e8016SThara Gopinath opp-hz = /bits/ 64 <1977600000>; 5828e0e8016SThara Gopinath opp-peak-kBps = <6220000 48537600>; 5838e0e8016SThara Gopinath }; 5848e0e8016SThara Gopinath 5858e0e8016SThara Gopinath cpu7_opp12: opp-2073600000 { 5868e0e8016SThara Gopinath opp-hz = /bits/ 64 <2073600000>; 5878e0e8016SThara Gopinath opp-peak-kBps = <7216000 48537600>; 5888e0e8016SThara Gopinath }; 5898e0e8016SThara Gopinath 5908e0e8016SThara Gopinath cpu7_opp13: opp-2169600000 { 5918e0e8016SThara Gopinath opp-hz = /bits/ 64 <2169600000>; 5928e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5938e0e8016SThara Gopinath }; 5948e0e8016SThara Gopinath 5958e0e8016SThara Gopinath cpu7_opp14: opp-2265600000 { 5968e0e8016SThara Gopinath opp-hz = /bits/ 64 <2265600000>; 5978e0e8016SThara Gopinath opp-peak-kBps = <7216000 51609600>; 5988e0e8016SThara Gopinath }; 5998e0e8016SThara Gopinath 6008e0e8016SThara Gopinath cpu7_opp15: opp-2361600000 { 6018e0e8016SThara Gopinath opp-hz = /bits/ 64 <2361600000>; 6028e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6038e0e8016SThara Gopinath }; 6048e0e8016SThara Gopinath 6058e0e8016SThara Gopinath cpu7_opp16: opp-2457600000 { 6068e0e8016SThara Gopinath opp-hz = /bits/ 64 <2457600000>; 6078e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6088e0e8016SThara Gopinath }; 6098e0e8016SThara Gopinath 6108e0e8016SThara Gopinath cpu7_opp17: opp-2553600000 { 6118e0e8016SThara Gopinath opp-hz = /bits/ 64 <2553600000>; 6128e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6138e0e8016SThara Gopinath }; 6148e0e8016SThara Gopinath 6158e0e8016SThara Gopinath cpu7_opp18: opp-2649600000 { 6168e0e8016SThara Gopinath opp-hz = /bits/ 64 <2649600000>; 6178e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6188e0e8016SThara Gopinath }; 6198e0e8016SThara Gopinath 6208e0e8016SThara Gopinath cpu7_opp19: opp-2745600000 { 6218e0e8016SThara Gopinath opp-hz = /bits/ 64 <2745600000>; 6228e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6238e0e8016SThara Gopinath }; 6248e0e8016SThara Gopinath 6258e0e8016SThara Gopinath cpu7_opp20: opp-2841600000 { 6268e0e8016SThara Gopinath opp-hz = /bits/ 64 <2841600000>; 6278e0e8016SThara Gopinath opp-peak-kBps = <8368000 51609600>; 6288e0e8016SThara Gopinath }; 6298e0e8016SThara Gopinath }; 6308e0e8016SThara Gopinath 63160378f1aSVenkata Narendra Kumar Gutta firmware { 63260378f1aSVenkata Narendra Kumar Gutta scm: scm { 63360378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,scm"; 63460378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 63560378f1aSVenkata Narendra Kumar Gutta }; 63660378f1aSVenkata Narendra Kumar Gutta }; 63760378f1aSVenkata Narendra Kumar Gutta 63860378f1aSVenkata Narendra Kumar Gutta memory@80000000 { 63960378f1aSVenkata Narendra Kumar Gutta device_type = "memory"; 64060378f1aSVenkata Narendra Kumar Gutta /* We expect the bootloader to fill in the size */ 64160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x0>; 64260378f1aSVenkata Narendra Kumar Gutta }; 64360378f1aSVenkata Narendra Kumar Gutta 64460378f1aSVenkata Narendra Kumar Gutta pmu { 64560378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-pmuv3"; 64693138ef5SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 64760378f1aSVenkata Narendra Kumar Gutta }; 64860378f1aSVenkata Narendra Kumar Gutta 64960378f1aSVenkata Narendra Kumar Gutta psci { 65060378f1aSVenkata Narendra Kumar Gutta compatible = "arm,psci-1.0"; 65160378f1aSVenkata Narendra Kumar Gutta method = "smc"; 65232bc936dSMaulik Shah 65332bc936dSMaulik Shah CPU_PD0: cpu0 { 65432bc936dSMaulik Shah #power-domain-cells = <0>; 65532bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 65632bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 65732bc936dSMaulik Shah }; 65832bc936dSMaulik Shah 65932bc936dSMaulik Shah CPU_PD1: cpu1 { 66032bc936dSMaulik Shah #power-domain-cells = <0>; 66132bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 66232bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 66332bc936dSMaulik Shah }; 66432bc936dSMaulik Shah 66532bc936dSMaulik Shah CPU_PD2: cpu2 { 66632bc936dSMaulik Shah #power-domain-cells = <0>; 66732bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 66832bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 66932bc936dSMaulik Shah }; 67032bc936dSMaulik Shah 67132bc936dSMaulik Shah CPU_PD3: cpu3 { 67232bc936dSMaulik Shah #power-domain-cells = <0>; 67332bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 67432bc936dSMaulik Shah domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 67532bc936dSMaulik Shah }; 67632bc936dSMaulik Shah 67732bc936dSMaulik Shah CPU_PD4: cpu4 { 67832bc936dSMaulik Shah #power-domain-cells = <0>; 67932bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 68032bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 68132bc936dSMaulik Shah }; 68232bc936dSMaulik Shah 68332bc936dSMaulik Shah CPU_PD5: cpu5 { 68432bc936dSMaulik Shah #power-domain-cells = <0>; 68532bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 68632bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 68732bc936dSMaulik Shah }; 68832bc936dSMaulik Shah 68932bc936dSMaulik Shah CPU_PD6: cpu6 { 69032bc936dSMaulik Shah #power-domain-cells = <0>; 69132bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69232bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 69332bc936dSMaulik Shah }; 69432bc936dSMaulik Shah 69532bc936dSMaulik Shah CPU_PD7: cpu7 { 69632bc936dSMaulik Shah #power-domain-cells = <0>; 69732bc936dSMaulik Shah power-domains = <&CLUSTER_PD>; 69832bc936dSMaulik Shah domain-idle-states = <&BIG_CPU_SLEEP_0>; 69932bc936dSMaulik Shah }; 70032bc936dSMaulik Shah 70132bc936dSMaulik Shah CLUSTER_PD: cpu-cluster0 { 70232bc936dSMaulik Shah #power-domain-cells = <0>; 70332bc936dSMaulik Shah domain-idle-states = <&CLUSTER_SLEEP_0>; 70432bc936dSMaulik Shah }; 70560378f1aSVenkata Narendra Kumar Gutta }; 70660378f1aSVenkata Narendra Kumar Gutta 707191c85b8SVinod Koul qup_opp_table: opp-table-qup { 708191c85b8SVinod Koul compatible = "operating-points-v2"; 709191c85b8SVinod Koul 710191c85b8SVinod Koul opp-50000000 { 711191c85b8SVinod Koul opp-hz = /bits/ 64 <50000000>; 712191c85b8SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 713191c85b8SVinod Koul }; 714191c85b8SVinod Koul 715191c85b8SVinod Koul opp-75000000 { 716191c85b8SVinod Koul opp-hz = /bits/ 64 <75000000>; 717191c85b8SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 718191c85b8SVinod Koul }; 719191c85b8SVinod Koul 720191c85b8SVinod Koul opp-120000000 { 721191c85b8SVinod Koul opp-hz = /bits/ 64 <120000000>; 722191c85b8SVinod Koul required-opps = <&rpmhpd_opp_svs>; 723191c85b8SVinod Koul }; 724191c85b8SVinod Koul }; 725191c85b8SVinod Koul 72660378f1aSVenkata Narendra Kumar Gutta reserved-memory { 72760378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 72860378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 72960378f1aSVenkata Narendra Kumar Gutta ranges; 73060378f1aSVenkata Narendra Kumar Gutta 73160378f1aSVenkata Narendra Kumar Gutta hyp_mem: memory@80000000 { 73260378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80000000 0x0 0x600000>; 73360378f1aSVenkata Narendra Kumar Gutta no-map; 73460378f1aSVenkata Narendra Kumar Gutta }; 73560378f1aSVenkata Narendra Kumar Gutta 73660378f1aSVenkata Narendra Kumar Gutta xbl_aop_mem: memory@80700000 { 73760378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80700000 0x0 0x160000>; 73860378f1aSVenkata Narendra Kumar Gutta no-map; 73960378f1aSVenkata Narendra Kumar Gutta }; 74060378f1aSVenkata Narendra Kumar Gutta 74160378f1aSVenkata Narendra Kumar Gutta cmd_db: memory@80860000 { 74260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,cmd-db"; 74360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80860000 0x0 0x20000>; 74460378f1aSVenkata Narendra Kumar Gutta no-map; 74560378f1aSVenkata Narendra Kumar Gutta }; 74660378f1aSVenkata Narendra Kumar Gutta 74760378f1aSVenkata Narendra Kumar Gutta smem_mem: memory@80900000 { 74860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80900000 0x0 0x200000>; 74960378f1aSVenkata Narendra Kumar Gutta no-map; 75060378f1aSVenkata Narendra Kumar Gutta }; 75160378f1aSVenkata Narendra Kumar Gutta 75260378f1aSVenkata Narendra Kumar Gutta removed_mem: memory@80b00000 { 75360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x80b00000 0x0 0x5300000>; 75460378f1aSVenkata Narendra Kumar Gutta no-map; 75560378f1aSVenkata Narendra Kumar Gutta }; 75660378f1aSVenkata Narendra Kumar Gutta 75760378f1aSVenkata Narendra Kumar Gutta camera_mem: memory@86200000 { 75860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86200000 0x0 0x500000>; 75960378f1aSVenkata Narendra Kumar Gutta no-map; 76060378f1aSVenkata Narendra Kumar Gutta }; 76160378f1aSVenkata Narendra Kumar Gutta 76260378f1aSVenkata Narendra Kumar Gutta wlan_mem: memory@86700000 { 76360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86700000 0x0 0x100000>; 76460378f1aSVenkata Narendra Kumar Gutta no-map; 76560378f1aSVenkata Narendra Kumar Gutta }; 76660378f1aSVenkata Narendra Kumar Gutta 76760378f1aSVenkata Narendra Kumar Gutta ipa_fw_mem: memory@86800000 { 76860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86800000 0x0 0x10000>; 76960378f1aSVenkata Narendra Kumar Gutta no-map; 77060378f1aSVenkata Narendra Kumar Gutta }; 77160378f1aSVenkata Narendra Kumar Gutta 77260378f1aSVenkata Narendra Kumar Gutta ipa_gsi_mem: memory@86810000 { 77360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86810000 0x0 0xa000>; 77460378f1aSVenkata Narendra Kumar Gutta no-map; 77560378f1aSVenkata Narendra Kumar Gutta }; 77660378f1aSVenkata Narendra Kumar Gutta 77760378f1aSVenkata Narendra Kumar Gutta gpu_mem: memory@8681a000 { 77860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8681a000 0x0 0x2000>; 77960378f1aSVenkata Narendra Kumar Gutta no-map; 78060378f1aSVenkata Narendra Kumar Gutta }; 78160378f1aSVenkata Narendra Kumar Gutta 78260378f1aSVenkata Narendra Kumar Gutta npu_mem: memory@86900000 { 78360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86900000 0x0 0x500000>; 78460378f1aSVenkata Narendra Kumar Gutta no-map; 78560378f1aSVenkata Narendra Kumar Gutta }; 78660378f1aSVenkata Narendra Kumar Gutta 78760378f1aSVenkata Narendra Kumar Gutta video_mem: memory@86e00000 { 78860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x86e00000 0x0 0x500000>; 78960378f1aSVenkata Narendra Kumar Gutta no-map; 79060378f1aSVenkata Narendra Kumar Gutta }; 79160378f1aSVenkata Narendra Kumar Gutta 79260378f1aSVenkata Narendra Kumar Gutta cvp_mem: memory@87300000 { 79360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87300000 0x0 0x500000>; 79460378f1aSVenkata Narendra Kumar Gutta no-map; 79560378f1aSVenkata Narendra Kumar Gutta }; 79660378f1aSVenkata Narendra Kumar Gutta 79760378f1aSVenkata Narendra Kumar Gutta cdsp_mem: memory@87800000 { 79860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x87800000 0x0 0x1400000>; 79960378f1aSVenkata Narendra Kumar Gutta no-map; 80060378f1aSVenkata Narendra Kumar Gutta }; 80160378f1aSVenkata Narendra Kumar Gutta 80260378f1aSVenkata Narendra Kumar Gutta slpi_mem: memory@88c00000 { 80360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x88c00000 0x0 0x1500000>; 80460378f1aSVenkata Narendra Kumar Gutta no-map; 80560378f1aSVenkata Narendra Kumar Gutta }; 80660378f1aSVenkata Narendra Kumar Gutta 80760378f1aSVenkata Narendra Kumar Gutta adsp_mem: memory@8a100000 { 80860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8a100000 0x0 0x1d00000>; 80960378f1aSVenkata Narendra Kumar Gutta no-map; 81060378f1aSVenkata Narendra Kumar Gutta }; 81160378f1aSVenkata Narendra Kumar Gutta 81260378f1aSVenkata Narendra Kumar Gutta spss_mem: memory@8be00000 { 81360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8be00000 0x0 0x100000>; 81460378f1aSVenkata Narendra Kumar Gutta no-map; 81560378f1aSVenkata Narendra Kumar Gutta }; 81660378f1aSVenkata Narendra Kumar Gutta 81760378f1aSVenkata Narendra Kumar Gutta cdsp_secure_heap: memory@8bf00000 { 81860378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x8bf00000 0x0 0x4600000>; 81960378f1aSVenkata Narendra Kumar Gutta no-map; 82060378f1aSVenkata Narendra Kumar Gutta }; 82160378f1aSVenkata Narendra Kumar Gutta }; 82260378f1aSVenkata Narendra Kumar Gutta 82388b57bc3SDmitry Baryshkov smem { 82460378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,smem"; 82560378f1aSVenkata Narendra Kumar Gutta memory-region = <&smem_mem>; 82660378f1aSVenkata Narendra Kumar Gutta hwlocks = <&tcsr_mutex 3>; 82760378f1aSVenkata Narendra Kumar Gutta }; 82860378f1aSVenkata Narendra Kumar Gutta 8298770a2a8SBjorn Andersson smp2p-adsp { 8308770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8318770a2a8SBjorn Andersson qcom,smem = <443>, <429>; 8328770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 8338770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8348770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8358770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 8368770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8378770a2a8SBjorn Andersson 8388770a2a8SBjorn Andersson qcom,local-pid = <0>; 8398770a2a8SBjorn Andersson qcom,remote-pid = <2>; 8408770a2a8SBjorn Andersson 8418770a2a8SBjorn Andersson smp2p_adsp_out: master-kernel { 8428770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8438770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8448770a2a8SBjorn Andersson }; 8458770a2a8SBjorn Andersson 8468770a2a8SBjorn Andersson smp2p_adsp_in: slave-kernel { 8478770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8488770a2a8SBjorn Andersson interrupt-controller; 8498770a2a8SBjorn Andersson #interrupt-cells = <2>; 8508770a2a8SBjorn Andersson }; 8518770a2a8SBjorn Andersson }; 8528770a2a8SBjorn Andersson 8538770a2a8SBjorn Andersson smp2p-cdsp { 8548770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8558770a2a8SBjorn Andersson qcom,smem = <94>, <432>; 8568770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 8578770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8588770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8598770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 8608770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8618770a2a8SBjorn Andersson 8628770a2a8SBjorn Andersson qcom,local-pid = <0>; 8638770a2a8SBjorn Andersson qcom,remote-pid = <5>; 8648770a2a8SBjorn Andersson 8658770a2a8SBjorn Andersson smp2p_cdsp_out: master-kernel { 8668770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8678770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8688770a2a8SBjorn Andersson }; 8698770a2a8SBjorn Andersson 8708770a2a8SBjorn Andersson smp2p_cdsp_in: slave-kernel { 8718770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8728770a2a8SBjorn Andersson interrupt-controller; 8738770a2a8SBjorn Andersson #interrupt-cells = <2>; 8748770a2a8SBjorn Andersson }; 8758770a2a8SBjorn Andersson }; 8768770a2a8SBjorn Andersson 8778770a2a8SBjorn Andersson smp2p-slpi { 8788770a2a8SBjorn Andersson compatible = "qcom,smp2p"; 8798770a2a8SBjorn Andersson qcom,smem = <481>, <430>; 8808770a2a8SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 8818770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P 8828770a2a8SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 8838770a2a8SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 8848770a2a8SBjorn Andersson IPCC_MPROC_SIGNAL_SMP2P>; 8858770a2a8SBjorn Andersson 8868770a2a8SBjorn Andersson qcom,local-pid = <0>; 8878770a2a8SBjorn Andersson qcom,remote-pid = <3>; 8888770a2a8SBjorn Andersson 8898770a2a8SBjorn Andersson smp2p_slpi_out: master-kernel { 8908770a2a8SBjorn Andersson qcom,entry-name = "master-kernel"; 8918770a2a8SBjorn Andersson #qcom,smem-state-cells = <1>; 8928770a2a8SBjorn Andersson }; 8938770a2a8SBjorn Andersson 8948770a2a8SBjorn Andersson smp2p_slpi_in: slave-kernel { 8958770a2a8SBjorn Andersson qcom,entry-name = "slave-kernel"; 8968770a2a8SBjorn Andersson interrupt-controller; 8978770a2a8SBjorn Andersson #interrupt-cells = <2>; 8988770a2a8SBjorn Andersson }; 8998770a2a8SBjorn Andersson }; 9008770a2a8SBjorn Andersson 90160378f1aSVenkata Narendra Kumar Gutta soc: soc@0 { 90260378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 90360378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 90460378f1aSVenkata Narendra Kumar Gutta ranges = <0 0 0 0 0x10 0>; 90560378f1aSVenkata Narendra Kumar Gutta dma-ranges = <0 0 0 0 0x10 0>; 90660378f1aSVenkata Narendra Kumar Gutta compatible = "simple-bus"; 90760378f1aSVenkata Narendra Kumar Gutta 90860378f1aSVenkata Narendra Kumar Gutta gcc: clock-controller@100000 { 90960378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,gcc-sm8250"; 91060378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00100000 0x0 0x1f0000>; 91160378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 91260378f1aSVenkata Narendra Kumar Gutta #reset-cells = <1>; 91360378f1aSVenkata Narendra Kumar Gutta #power-domain-cells = <1>; 91476bd127eSDmitry Baryshkov clock-names = "bi_tcxo", 91576bd127eSDmitry Baryshkov "bi_tcxo_ao", 91676bd127eSDmitry Baryshkov "sleep_clk"; 91776bd127eSDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 91876bd127eSDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 91976bd127eSDmitry Baryshkov <&sleep_clk>; 92060378f1aSVenkata Narendra Kumar Gutta }; 92160378f1aSVenkata Narendra Kumar Gutta 922e5361e75SBjorn Andersson ipcc: mailbox@408000 { 923e5361e75SBjorn Andersson compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; 924e5361e75SBjorn Andersson reg = <0 0x00408000 0 0x1000>; 925e5361e75SBjorn Andersson interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 926e5361e75SBjorn Andersson interrupt-controller; 927e5361e75SBjorn Andersson #interrupt-cells = <3>; 928e5361e75SBjorn Andersson #mbox-cells = <2>; 929e5361e75SBjorn Andersson }; 930e5361e75SBjorn Andersson 93165389ce6SManivannan Sadhasivam rng: rng@793000 { 93265389ce6SManivannan Sadhasivam compatible = "qcom,prng-ee"; 93365389ce6SManivannan Sadhasivam reg = <0 0x00793000 0 0x1000>; 93465389ce6SManivannan Sadhasivam clocks = <&gcc GCC_PRNG_AHB_CLK>; 93565389ce6SManivannan Sadhasivam clock-names = "core"; 93665389ce6SManivannan Sadhasivam }; 93765389ce6SManivannan Sadhasivam 93815049bb5SKonrad Dybcio gpi_dma2: dma-controller@800000 { 93915049bb5SKonrad Dybcio compatible = "qcom,sm8250-gpi-dma"; 94015049bb5SKonrad Dybcio reg = <0 0x00800000 0 0x70000>; 94115049bb5SKonrad Dybcio interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>, 94215049bb5SKonrad Dybcio <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>, 94315049bb5SKonrad Dybcio <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, 94415049bb5SKonrad Dybcio <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>, 94515049bb5SKonrad Dybcio <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>, 94615049bb5SKonrad Dybcio <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>, 94715049bb5SKonrad Dybcio <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>, 94815049bb5SKonrad Dybcio <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>, 94915049bb5SKonrad Dybcio <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>, 95015049bb5SKonrad Dybcio <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>; 95115049bb5SKonrad Dybcio dma-channels = <10>; 95215049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 95315049bb5SKonrad Dybcio iommus = <&apps_smmu 0x76 0x0>; 95415049bb5SKonrad Dybcio #dma-cells = <3>; 95515049bb5SKonrad Dybcio status = "disabled"; 95615049bb5SKonrad Dybcio }; 95715049bb5SKonrad Dybcio 958e5813b15SDmitry Baryshkov qupv3_id_2: geniqup@8c0000 { 959e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 960e5813b15SDmitry Baryshkov reg = <0x0 0x008c0000 0x0 0x6000>; 961e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 962e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 963e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 964e5813b15SDmitry Baryshkov #address-cells = <2>; 965e5813b15SDmitry Baryshkov #size-cells = <2>; 96685309393SDmitry Baryshkov iommus = <&apps_smmu 0x63 0x0>; 967e5813b15SDmitry Baryshkov ranges; 968e5813b15SDmitry Baryshkov status = "disabled"; 969e5813b15SDmitry Baryshkov 970e5813b15SDmitry Baryshkov i2c14: i2c@880000 { 971e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 972e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 973e5813b15SDmitry Baryshkov clock-names = "se"; 974e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 975e5813b15SDmitry Baryshkov pinctrl-names = "default"; 976e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c14_default>; 977e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 97859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, 97959983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_I2C>; 98059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 981e5813b15SDmitry Baryshkov #address-cells = <1>; 982e5813b15SDmitry Baryshkov #size-cells = <0>; 983e5813b15SDmitry Baryshkov status = "disabled"; 984e5813b15SDmitry Baryshkov }; 985e5813b15SDmitry Baryshkov 986e5813b15SDmitry Baryshkov spi14: spi@880000 { 987e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 988e5813b15SDmitry Baryshkov reg = <0 0x00880000 0 0x4000>; 989e5813b15SDmitry Baryshkov clock-names = "se"; 990e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 991e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 99259983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, 99359983a5cSKonrad Dybcio <&gpi_dma2 1 0 QCOM_GPI_SPI>; 99459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 99501e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 99601e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 99759983a5cSKonrad Dybcio #address-cells = <1>; 99859983a5cSKonrad Dybcio #size-cells = <0>; 999e5813b15SDmitry Baryshkov status = "disabled"; 1000e5813b15SDmitry Baryshkov }; 1001e5813b15SDmitry Baryshkov 1002e5813b15SDmitry Baryshkov i2c15: i2c@884000 { 1003e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1004e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1005e5813b15SDmitry Baryshkov clock-names = "se"; 1006e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1007e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1008e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c15_default>; 1009e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 101059983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, 101159983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_I2C>; 101259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1013e5813b15SDmitry Baryshkov #address-cells = <1>; 1014e5813b15SDmitry Baryshkov #size-cells = <0>; 1015e5813b15SDmitry Baryshkov status = "disabled"; 1016e5813b15SDmitry Baryshkov }; 1017e5813b15SDmitry Baryshkov 1018e5813b15SDmitry Baryshkov spi15: spi@884000 { 1019e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1020e5813b15SDmitry Baryshkov reg = <0 0x00884000 0 0x4000>; 1021e5813b15SDmitry Baryshkov clock-names = "se"; 1022e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 1023e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 102459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, 102559983a5cSKonrad Dybcio <&gpi_dma2 1 1 QCOM_GPI_SPI>; 102659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 102701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 102801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 102959983a5cSKonrad Dybcio #address-cells = <1>; 103059983a5cSKonrad Dybcio #size-cells = <0>; 1031e5813b15SDmitry Baryshkov status = "disabled"; 1032e5813b15SDmitry Baryshkov }; 1033e5813b15SDmitry Baryshkov 1034e5813b15SDmitry Baryshkov i2c16: i2c@888000 { 1035e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1036e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1037e5813b15SDmitry Baryshkov clock-names = "se"; 1038e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1039e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1040e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c16_default>; 1041e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 104259983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, 104359983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_I2C>; 104459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1045e5813b15SDmitry Baryshkov #address-cells = <1>; 1046e5813b15SDmitry Baryshkov #size-cells = <0>; 1047e5813b15SDmitry Baryshkov status = "disabled"; 1048e5813b15SDmitry Baryshkov }; 1049e5813b15SDmitry Baryshkov 1050e5813b15SDmitry Baryshkov spi16: spi@888000 { 1051e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1052e5813b15SDmitry Baryshkov reg = <0 0x00888000 0 0x4000>; 1053e5813b15SDmitry Baryshkov clock-names = "se"; 1054e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 1055e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 105659983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, 105759983a5cSKonrad Dybcio <&gpi_dma2 1 2 QCOM_GPI_SPI>; 105859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 105901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 106001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 106159983a5cSKonrad Dybcio #address-cells = <1>; 106259983a5cSKonrad Dybcio #size-cells = <0>; 1063e5813b15SDmitry Baryshkov status = "disabled"; 1064e5813b15SDmitry Baryshkov }; 1065e5813b15SDmitry Baryshkov 1066e5813b15SDmitry Baryshkov i2c17: i2c@88c000 { 1067e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1068e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1069e5813b15SDmitry Baryshkov clock-names = "se"; 1070e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1071e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1072e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c17_default>; 1073e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 107459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, 107559983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_I2C>; 107659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1077e5813b15SDmitry Baryshkov #address-cells = <1>; 1078e5813b15SDmitry Baryshkov #size-cells = <0>; 1079e5813b15SDmitry Baryshkov status = "disabled"; 1080e5813b15SDmitry Baryshkov }; 1081e5813b15SDmitry Baryshkov 1082e5813b15SDmitry Baryshkov spi17: spi@88c000 { 1083e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1084e5813b15SDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 1085e5813b15SDmitry Baryshkov clock-names = "se"; 1086e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 1087e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 108859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, 108959983a5cSKonrad Dybcio <&gpi_dma2 1 3 QCOM_GPI_SPI>; 109059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 109101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 109201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 109359983a5cSKonrad Dybcio #address-cells = <1>; 109459983a5cSKonrad Dybcio #size-cells = <0>; 1095e5813b15SDmitry Baryshkov status = "disabled"; 1096e5813b15SDmitry Baryshkov }; 1097e5813b15SDmitry Baryshkov 109808a9ae2dSDmitry Baryshkov uart17: serial@88c000 { 109908a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 110008a9ae2dSDmitry Baryshkov reg = <0 0x0088c000 0 0x4000>; 110108a9ae2dSDmitry Baryshkov clock-names = "se"; 110208a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 110308a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 110408a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart17_default>; 110508a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 110601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 110701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 110808a9ae2dSDmitry Baryshkov status = "disabled"; 110908a9ae2dSDmitry Baryshkov }; 111008a9ae2dSDmitry Baryshkov 1111e5813b15SDmitry Baryshkov i2c18: i2c@890000 { 1112e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1113e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1114e5813b15SDmitry Baryshkov clock-names = "se"; 1115e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1116e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1117e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c18_default>; 1118e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 111959983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, 112059983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_I2C>; 112159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1122e5813b15SDmitry Baryshkov #address-cells = <1>; 1123e5813b15SDmitry Baryshkov #size-cells = <0>; 1124e5813b15SDmitry Baryshkov status = "disabled"; 1125e5813b15SDmitry Baryshkov }; 1126e5813b15SDmitry Baryshkov 1127e5813b15SDmitry Baryshkov spi18: spi@890000 { 1128e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1129e5813b15SDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 1130e5813b15SDmitry Baryshkov clock-names = "se"; 1131e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 1132e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 113359983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, 113459983a5cSKonrad Dybcio <&gpi_dma2 1 4 QCOM_GPI_SPI>; 113559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 113601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 113701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 113859983a5cSKonrad Dybcio #address-cells = <1>; 113959983a5cSKonrad Dybcio #size-cells = <0>; 1140e5813b15SDmitry Baryshkov status = "disabled"; 1141e5813b15SDmitry Baryshkov }; 1142e5813b15SDmitry Baryshkov 114308a9ae2dSDmitry Baryshkov uart18: serial@890000 { 114408a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 114508a9ae2dSDmitry Baryshkov reg = <0 0x00890000 0 0x4000>; 114608a9ae2dSDmitry Baryshkov clock-names = "se"; 114708a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 114808a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 114908a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart18_default>; 115008a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 115101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 115201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 115308a9ae2dSDmitry Baryshkov status = "disabled"; 115408a9ae2dSDmitry Baryshkov }; 115508a9ae2dSDmitry Baryshkov 1156e5813b15SDmitry Baryshkov i2c19: i2c@894000 { 1157e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1158e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1159e5813b15SDmitry Baryshkov clock-names = "se"; 1160e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1161e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1162e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c19_default>; 1163e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 116459983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, 116559983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_I2C>; 116659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1167e5813b15SDmitry Baryshkov #address-cells = <1>; 1168e5813b15SDmitry Baryshkov #size-cells = <0>; 1169e5813b15SDmitry Baryshkov status = "disabled"; 1170e5813b15SDmitry Baryshkov }; 1171e5813b15SDmitry Baryshkov 1172e5813b15SDmitry Baryshkov spi19: spi@894000 { 1173e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1174e5813b15SDmitry Baryshkov reg = <0 0x00894000 0 0x4000>; 1175e5813b15SDmitry Baryshkov clock-names = "se"; 1176e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 1177e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 117859983a5cSKonrad Dybcio dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, 117959983a5cSKonrad Dybcio <&gpi_dma2 1 5 QCOM_GPI_SPI>; 118059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 118101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 118201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 118359983a5cSKonrad Dybcio #address-cells = <1>; 118459983a5cSKonrad Dybcio #size-cells = <0>; 1185e5813b15SDmitry Baryshkov status = "disabled"; 1186e5813b15SDmitry Baryshkov }; 1187e5813b15SDmitry Baryshkov }; 1188e5813b15SDmitry Baryshkov 118915049bb5SKonrad Dybcio gpi_dma0: dma-controller@900000 { 119015049bb5SKonrad Dybcio compatible = "qcom,sm8250-gpi-dma"; 119115049bb5SKonrad Dybcio reg = <0 0x00900000 0 0x70000>; 119215049bb5SKonrad Dybcio interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 119315049bb5SKonrad Dybcio <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 119415049bb5SKonrad Dybcio <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 119515049bb5SKonrad Dybcio <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, 119615049bb5SKonrad Dybcio <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 119715049bb5SKonrad Dybcio <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, 119815049bb5SKonrad Dybcio <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, 119915049bb5SKonrad Dybcio <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 120015049bb5SKonrad Dybcio <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 120115049bb5SKonrad Dybcio <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 120215049bb5SKonrad Dybcio <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 120315049bb5SKonrad Dybcio <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, 120415049bb5SKonrad Dybcio <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; 120515049bb5SKonrad Dybcio dma-channels = <15>; 120615049bb5SKonrad Dybcio dma-channel-mask = <0x7ff>; 120715049bb5SKonrad Dybcio iommus = <&apps_smmu 0x5b6 0x0>; 120815049bb5SKonrad Dybcio #dma-cells = <3>; 120915049bb5SKonrad Dybcio status = "disabled"; 121015049bb5SKonrad Dybcio }; 121115049bb5SKonrad Dybcio 1212e5813b15SDmitry Baryshkov qupv3_id_0: geniqup@9c0000 { 1213e5813b15SDmitry Baryshkov compatible = "qcom,geni-se-qup"; 1214e5813b15SDmitry Baryshkov reg = <0x0 0x009c0000 0x0 0x6000>; 1215e5813b15SDmitry Baryshkov clock-names = "m-ahb", "s-ahb"; 1216e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 1217e5813b15SDmitry Baryshkov <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 1218e5813b15SDmitry Baryshkov #address-cells = <2>; 1219e5813b15SDmitry Baryshkov #size-cells = <2>; 122085309393SDmitry Baryshkov iommus = <&apps_smmu 0x5a3 0x0>; 1221e5813b15SDmitry Baryshkov ranges; 1222e5813b15SDmitry Baryshkov status = "disabled"; 1223e5813b15SDmitry Baryshkov 1224e5813b15SDmitry Baryshkov i2c0: i2c@980000 { 1225e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1226e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1227e5813b15SDmitry Baryshkov clock-names = "se"; 1228e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1229e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1230e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c0_default>; 1231e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 123259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, 123359983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_I2C>; 123459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1235e5813b15SDmitry Baryshkov #address-cells = <1>; 1236e5813b15SDmitry Baryshkov #size-cells = <0>; 1237e5813b15SDmitry Baryshkov status = "disabled"; 1238e5813b15SDmitry Baryshkov }; 1239e5813b15SDmitry Baryshkov 1240e5813b15SDmitry Baryshkov spi0: spi@980000 { 1241e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1242e5813b15SDmitry Baryshkov reg = <0 0x00980000 0 0x4000>; 1243e5813b15SDmitry Baryshkov clock-names = "se"; 1244e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 1245e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 124659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, 124759983a5cSKonrad Dybcio <&gpi_dma0 1 0 QCOM_GPI_SPI>; 124859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 124901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 125001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 125159983a5cSKonrad Dybcio #address-cells = <1>; 125259983a5cSKonrad Dybcio #size-cells = <0>; 1253e5813b15SDmitry Baryshkov status = "disabled"; 1254e5813b15SDmitry Baryshkov }; 1255e5813b15SDmitry Baryshkov 1256e5813b15SDmitry Baryshkov i2c1: i2c@984000 { 1257e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1258e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1259e5813b15SDmitry Baryshkov clock-names = "se"; 1260e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1261e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1262e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c1_default>; 1263e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 126459983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, 126559983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_I2C>; 126659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1267e5813b15SDmitry Baryshkov #address-cells = <1>; 1268e5813b15SDmitry Baryshkov #size-cells = <0>; 1269e5813b15SDmitry Baryshkov status = "disabled"; 1270e5813b15SDmitry Baryshkov }; 1271e5813b15SDmitry Baryshkov 1272e5813b15SDmitry Baryshkov spi1: spi@984000 { 1273e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1274e5813b15SDmitry Baryshkov reg = <0 0x00984000 0 0x4000>; 1275e5813b15SDmitry Baryshkov clock-names = "se"; 1276e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 1277e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 127859983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 127959983a5cSKonrad Dybcio <&gpi_dma0 1 1 QCOM_GPI_SPI>; 128059983a5cSKonrad Dybcio dma-names = "tx", "rx"; 128101e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 128201e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 128359983a5cSKonrad Dybcio #address-cells = <1>; 128459983a5cSKonrad Dybcio #size-cells = <0>; 1285e5813b15SDmitry Baryshkov status = "disabled"; 1286e5813b15SDmitry Baryshkov }; 1287e5813b15SDmitry Baryshkov 1288e5813b15SDmitry Baryshkov i2c2: i2c@988000 { 1289e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1290e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1291e5813b15SDmitry Baryshkov clock-names = "se"; 1292e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1293e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1294e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c2_default>; 1295e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 129659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, 129759983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_I2C>; 129859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1299e5813b15SDmitry Baryshkov #address-cells = <1>; 1300e5813b15SDmitry Baryshkov #size-cells = <0>; 1301e5813b15SDmitry Baryshkov status = "disabled"; 1302e5813b15SDmitry Baryshkov }; 1303e5813b15SDmitry Baryshkov 1304e5813b15SDmitry Baryshkov spi2: spi@988000 { 1305e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1306e5813b15SDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 1307e5813b15SDmitry Baryshkov clock-names = "se"; 1308e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1309e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 131059983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, 131159983a5cSKonrad Dybcio <&gpi_dma0 1 2 QCOM_GPI_SPI>; 131259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 131301e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 131401e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 131559983a5cSKonrad Dybcio #address-cells = <1>; 131659983a5cSKonrad Dybcio #size-cells = <0>; 1317e5813b15SDmitry Baryshkov status = "disabled"; 1318e5813b15SDmitry Baryshkov }; 1319e5813b15SDmitry Baryshkov 132008a9ae2dSDmitry Baryshkov uart2: serial@988000 { 132108a9ae2dSDmitry Baryshkov compatible = "qcom,geni-debug-uart"; 132208a9ae2dSDmitry Baryshkov reg = <0 0x00988000 0 0x4000>; 132308a9ae2dSDmitry Baryshkov clock-names = "se"; 132408a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 132508a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 132608a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart2_default>; 132708a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 132801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 132901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 133008a9ae2dSDmitry Baryshkov status = "disabled"; 133108a9ae2dSDmitry Baryshkov }; 133208a9ae2dSDmitry Baryshkov 1333e5813b15SDmitry Baryshkov i2c3: i2c@98c000 { 1334e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1335e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1336e5813b15SDmitry Baryshkov clock-names = "se"; 1337e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1338e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1339e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c3_default>; 1340e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 134159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, 134259983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_I2C>; 134359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1344e5813b15SDmitry Baryshkov #address-cells = <1>; 1345e5813b15SDmitry Baryshkov #size-cells = <0>; 1346e5813b15SDmitry Baryshkov status = "disabled"; 1347e5813b15SDmitry Baryshkov }; 1348e5813b15SDmitry Baryshkov 1349e5813b15SDmitry Baryshkov spi3: spi@98c000 { 1350e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1351e5813b15SDmitry Baryshkov reg = <0 0x0098c000 0 0x4000>; 1352e5813b15SDmitry Baryshkov clock-names = "se"; 1353e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1354e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 135559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, 135659983a5cSKonrad Dybcio <&gpi_dma0 1 3 QCOM_GPI_SPI>; 135759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 135801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 135901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 136059983a5cSKonrad Dybcio #address-cells = <1>; 136159983a5cSKonrad Dybcio #size-cells = <0>; 1362e5813b15SDmitry Baryshkov status = "disabled"; 1363e5813b15SDmitry Baryshkov }; 1364e5813b15SDmitry Baryshkov 1365e5813b15SDmitry Baryshkov i2c4: i2c@990000 { 1366e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1367e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1368e5813b15SDmitry Baryshkov clock-names = "se"; 1369e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1370e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1371e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c4_default>; 1372e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 137359983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, 137459983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_I2C>; 137559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1376e5813b15SDmitry Baryshkov #address-cells = <1>; 1377e5813b15SDmitry Baryshkov #size-cells = <0>; 1378e5813b15SDmitry Baryshkov status = "disabled"; 1379e5813b15SDmitry Baryshkov }; 1380e5813b15SDmitry Baryshkov 1381e5813b15SDmitry Baryshkov spi4: spi@990000 { 1382e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1383e5813b15SDmitry Baryshkov reg = <0 0x00990000 0 0x4000>; 1384e5813b15SDmitry Baryshkov clock-names = "se"; 1385e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1386e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 138759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, 138859983a5cSKonrad Dybcio <&gpi_dma0 1 4 QCOM_GPI_SPI>; 138959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 139001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 139101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 139259983a5cSKonrad Dybcio #address-cells = <1>; 139359983a5cSKonrad Dybcio #size-cells = <0>; 1394e5813b15SDmitry Baryshkov status = "disabled"; 1395e5813b15SDmitry Baryshkov }; 1396e5813b15SDmitry Baryshkov 1397e5813b15SDmitry Baryshkov i2c5: i2c@994000 { 1398e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1399e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1400e5813b15SDmitry Baryshkov clock-names = "se"; 1401e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1402e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1403e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c5_default>; 1404e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 140559983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, 140659983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_I2C>; 140759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1408e5813b15SDmitry Baryshkov #address-cells = <1>; 1409e5813b15SDmitry Baryshkov #size-cells = <0>; 1410e5813b15SDmitry Baryshkov status = "disabled"; 1411e5813b15SDmitry Baryshkov }; 1412e5813b15SDmitry Baryshkov 1413e5813b15SDmitry Baryshkov spi5: spi@994000 { 1414e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1415e5813b15SDmitry Baryshkov reg = <0 0x00994000 0 0x4000>; 1416e5813b15SDmitry Baryshkov clock-names = "se"; 1417e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1418e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 141959983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, 142059983a5cSKonrad Dybcio <&gpi_dma0 1 5 QCOM_GPI_SPI>; 142159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 142201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 142301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 142459983a5cSKonrad Dybcio #address-cells = <1>; 142559983a5cSKonrad Dybcio #size-cells = <0>; 1426e5813b15SDmitry Baryshkov status = "disabled"; 1427e5813b15SDmitry Baryshkov }; 1428e5813b15SDmitry Baryshkov 1429e5813b15SDmitry Baryshkov i2c6: i2c@998000 { 1430e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1431e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1432e5813b15SDmitry Baryshkov clock-names = "se"; 1433e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1434e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1435e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c6_default>; 1436e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 143759983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, 143859983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_I2C>; 143959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1440e5813b15SDmitry Baryshkov #address-cells = <1>; 1441e5813b15SDmitry Baryshkov #size-cells = <0>; 1442e5813b15SDmitry Baryshkov status = "disabled"; 1443e5813b15SDmitry Baryshkov }; 1444e5813b15SDmitry Baryshkov 1445e5813b15SDmitry Baryshkov spi6: spi@998000 { 1446e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1447e5813b15SDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 1448e5813b15SDmitry Baryshkov clock-names = "se"; 1449e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1450e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 145159983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, 145259983a5cSKonrad Dybcio <&gpi_dma0 1 6 QCOM_GPI_SPI>; 145359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 145401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 145501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 145659983a5cSKonrad Dybcio #address-cells = <1>; 145759983a5cSKonrad Dybcio #size-cells = <0>; 1458e5813b15SDmitry Baryshkov status = "disabled"; 1459e5813b15SDmitry Baryshkov }; 1460e5813b15SDmitry Baryshkov 146108a9ae2dSDmitry Baryshkov uart6: serial@998000 { 146208a9ae2dSDmitry Baryshkov compatible = "qcom,geni-uart"; 146308a9ae2dSDmitry Baryshkov reg = <0 0x00998000 0 0x4000>; 146408a9ae2dSDmitry Baryshkov clock-names = "se"; 146508a9ae2dSDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 146608a9ae2dSDmitry Baryshkov pinctrl-names = "default"; 146708a9ae2dSDmitry Baryshkov pinctrl-0 = <&qup_uart6_default>; 146808a9ae2dSDmitry Baryshkov interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 146901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 147001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 147108a9ae2dSDmitry Baryshkov status = "disabled"; 147208a9ae2dSDmitry Baryshkov }; 147308a9ae2dSDmitry Baryshkov 1474e5813b15SDmitry Baryshkov i2c7: i2c@99c000 { 1475e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1476e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1477e5813b15SDmitry Baryshkov clock-names = "se"; 1478e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1479e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1480e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c7_default>; 1481e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 148259983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, 148359983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_I2C>; 148459983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1485e5813b15SDmitry Baryshkov #address-cells = <1>; 1486e5813b15SDmitry Baryshkov #size-cells = <0>; 1487e5813b15SDmitry Baryshkov status = "disabled"; 1488e5813b15SDmitry Baryshkov }; 1489e5813b15SDmitry Baryshkov 1490e5813b15SDmitry Baryshkov spi7: spi@99c000 { 1491e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1492e5813b15SDmitry Baryshkov reg = <0 0x0099c000 0 0x4000>; 1493e5813b15SDmitry Baryshkov clock-names = "se"; 1494e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1495e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 149659983a5cSKonrad Dybcio dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, 149759983a5cSKonrad Dybcio <&gpi_dma0 1 7 QCOM_GPI_SPI>; 149859983a5cSKonrad Dybcio dma-names = "tx", "rx"; 149901e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 150001e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 150159983a5cSKonrad Dybcio #address-cells = <1>; 150259983a5cSKonrad Dybcio #size-cells = <0>; 1503e5813b15SDmitry Baryshkov status = "disabled"; 1504e5813b15SDmitry Baryshkov }; 1505e5813b15SDmitry Baryshkov }; 1506e5813b15SDmitry Baryshkov 150715049bb5SKonrad Dybcio gpi_dma1: dma-controller@a00000 { 150815049bb5SKonrad Dybcio compatible = "qcom,sm8250-gpi-dma"; 150915049bb5SKonrad Dybcio reg = <0 0x00a00000 0 0x70000>; 151015049bb5SKonrad Dybcio interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 151115049bb5SKonrad Dybcio <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 151215049bb5SKonrad Dybcio <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 151315049bb5SKonrad Dybcio <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 151415049bb5SKonrad Dybcio <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 151515049bb5SKonrad Dybcio <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 151615049bb5SKonrad Dybcio <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 151715049bb5SKonrad Dybcio <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 151815049bb5SKonrad Dybcio <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 151915049bb5SKonrad Dybcio <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>; 152015049bb5SKonrad Dybcio dma-channels = <10>; 152115049bb5SKonrad Dybcio dma-channel-mask = <0x3f>; 152215049bb5SKonrad Dybcio iommus = <&apps_smmu 0x56 0x0>; 152315049bb5SKonrad Dybcio #dma-cells = <3>; 152415049bb5SKonrad Dybcio status = "disabled"; 152515049bb5SKonrad Dybcio }; 152615049bb5SKonrad Dybcio 152760378f1aSVenkata Narendra Kumar Gutta qupv3_id_1: geniqup@ac0000 { 152860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-se-qup"; 152960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00ac0000 0x0 0x6000>; 153060378f1aSVenkata Narendra Kumar Gutta clock-names = "m-ahb", "s-ahb"; 1531fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 1532fe3dfc25SJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 153360378f1aSVenkata Narendra Kumar Gutta #address-cells = <2>; 153460378f1aSVenkata Narendra Kumar Gutta #size-cells = <2>; 153585309393SDmitry Baryshkov iommus = <&apps_smmu 0x43 0x0>; 153660378f1aSVenkata Narendra Kumar Gutta ranges; 153760378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 153860378f1aSVenkata Narendra Kumar Gutta 1539e5813b15SDmitry Baryshkov i2c8: i2c@a80000 { 1540e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1541e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1542e5813b15SDmitry Baryshkov clock-names = "se"; 1543e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1544e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1545e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c8_default>; 1546e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 154759983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, 154859983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_I2C>; 154959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1550e5813b15SDmitry Baryshkov #address-cells = <1>; 1551e5813b15SDmitry Baryshkov #size-cells = <0>; 1552e5813b15SDmitry Baryshkov status = "disabled"; 1553e5813b15SDmitry Baryshkov }; 1554e5813b15SDmitry Baryshkov 1555e5813b15SDmitry Baryshkov spi8: spi@a80000 { 1556e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1557e5813b15SDmitry Baryshkov reg = <0 0x00a80000 0 0x4000>; 1558e5813b15SDmitry Baryshkov clock-names = "se"; 1559e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 1560e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 156159983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, 156259983a5cSKonrad Dybcio <&gpi_dma1 1 0 QCOM_GPI_SPI>; 156359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 156401e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 156501e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 156659983a5cSKonrad Dybcio #address-cells = <1>; 156759983a5cSKonrad Dybcio #size-cells = <0>; 1568e5813b15SDmitry Baryshkov status = "disabled"; 1569e5813b15SDmitry Baryshkov }; 1570e5813b15SDmitry Baryshkov 1571e5813b15SDmitry Baryshkov i2c9: i2c@a84000 { 1572e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1573e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1574e5813b15SDmitry Baryshkov clock-names = "se"; 1575e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1576e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1577e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c9_default>; 1578e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 157959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, 158059983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_I2C>; 158159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1582e5813b15SDmitry Baryshkov #address-cells = <1>; 1583e5813b15SDmitry Baryshkov #size-cells = <0>; 1584e5813b15SDmitry Baryshkov status = "disabled"; 1585e5813b15SDmitry Baryshkov }; 1586e5813b15SDmitry Baryshkov 1587e5813b15SDmitry Baryshkov spi9: spi@a84000 { 1588e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1589e5813b15SDmitry Baryshkov reg = <0 0x00a84000 0 0x4000>; 1590e5813b15SDmitry Baryshkov clock-names = "se"; 1591e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 1592e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 159359983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, 159459983a5cSKonrad Dybcio <&gpi_dma1 1 1 QCOM_GPI_SPI>; 159559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 159601e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 159701e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 159859983a5cSKonrad Dybcio #address-cells = <1>; 159959983a5cSKonrad Dybcio #size-cells = <0>; 1600e5813b15SDmitry Baryshkov status = "disabled"; 1601e5813b15SDmitry Baryshkov }; 1602e5813b15SDmitry Baryshkov 1603e5813b15SDmitry Baryshkov i2c10: i2c@a88000 { 1604e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1605e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1606e5813b15SDmitry Baryshkov clock-names = "se"; 1607e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1608e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1609e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c10_default>; 1610e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 161159983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, 161259983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_I2C>; 161359983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1614e5813b15SDmitry Baryshkov #address-cells = <1>; 1615e5813b15SDmitry Baryshkov #size-cells = <0>; 1616e5813b15SDmitry Baryshkov status = "disabled"; 1617e5813b15SDmitry Baryshkov }; 1618e5813b15SDmitry Baryshkov 1619e5813b15SDmitry Baryshkov spi10: spi@a88000 { 1620e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1621e5813b15SDmitry Baryshkov reg = <0 0x00a88000 0 0x4000>; 1622e5813b15SDmitry Baryshkov clock-names = "se"; 1623e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 1624e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 162559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, 162659983a5cSKonrad Dybcio <&gpi_dma1 1 2 QCOM_GPI_SPI>; 162759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 162801e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 162901e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 163059983a5cSKonrad Dybcio #address-cells = <1>; 163159983a5cSKonrad Dybcio #size-cells = <0>; 1632e5813b15SDmitry Baryshkov status = "disabled"; 1633e5813b15SDmitry Baryshkov }; 1634e5813b15SDmitry Baryshkov 1635e5813b15SDmitry Baryshkov i2c11: i2c@a8c000 { 1636e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1637e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1638e5813b15SDmitry Baryshkov clock-names = "se"; 1639e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1640e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1641e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c11_default>; 1642e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 164359983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, 164459983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_I2C>; 164559983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1646e5813b15SDmitry Baryshkov #address-cells = <1>; 1647e5813b15SDmitry Baryshkov #size-cells = <0>; 1648e5813b15SDmitry Baryshkov status = "disabled"; 1649e5813b15SDmitry Baryshkov }; 1650e5813b15SDmitry Baryshkov 1651e5813b15SDmitry Baryshkov spi11: spi@a8c000 { 1652e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1653e5813b15SDmitry Baryshkov reg = <0 0x00a8c000 0 0x4000>; 1654e5813b15SDmitry Baryshkov clock-names = "se"; 1655e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 1656e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 165759983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, 165859983a5cSKonrad Dybcio <&gpi_dma1 1 3 QCOM_GPI_SPI>; 165959983a5cSKonrad Dybcio dma-names = "tx", "rx"; 166001e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 166101e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 166259983a5cSKonrad Dybcio #address-cells = <1>; 166359983a5cSKonrad Dybcio #size-cells = <0>; 1664e5813b15SDmitry Baryshkov status = "disabled"; 1665e5813b15SDmitry Baryshkov }; 1666e5813b15SDmitry Baryshkov 1667e5813b15SDmitry Baryshkov i2c12: i2c@a90000 { 1668e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1669e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1670e5813b15SDmitry Baryshkov clock-names = "se"; 1671e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1672e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1673e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c12_default>; 1674e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 167559983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, 167659983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_I2C>; 167759983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1678e5813b15SDmitry Baryshkov #address-cells = <1>; 1679e5813b15SDmitry Baryshkov #size-cells = <0>; 1680e5813b15SDmitry Baryshkov status = "disabled"; 1681e5813b15SDmitry Baryshkov }; 1682e5813b15SDmitry Baryshkov 1683e5813b15SDmitry Baryshkov spi12: spi@a90000 { 1684e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1685e5813b15SDmitry Baryshkov reg = <0 0x00a90000 0 0x4000>; 1686e5813b15SDmitry Baryshkov clock-names = "se"; 1687e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1688e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 168959983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, 169059983a5cSKonrad Dybcio <&gpi_dma1 1 4 QCOM_GPI_SPI>; 169159983a5cSKonrad Dybcio dma-names = "tx", "rx"; 169201e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 169301e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 169459983a5cSKonrad Dybcio #address-cells = <1>; 169559983a5cSKonrad Dybcio #size-cells = <0>; 1696e5813b15SDmitry Baryshkov status = "disabled"; 1697e5813b15SDmitry Baryshkov }; 1698e5813b15SDmitry Baryshkov 1699bb1dfb4dSManivannan Sadhasivam uart12: serial@a90000 { 170060378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,geni-debug-uart"; 170160378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x00a90000 0x0 0x4000>; 170260378f1aSVenkata Narendra Kumar Gutta clock-names = "se"; 1703fe3dfc25SJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 1704bb1dfb4dSManivannan Sadhasivam pinctrl-names = "default"; 1705bb1dfb4dSManivannan Sadhasivam pinctrl-0 = <&qup_uart12_default>; 170660378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 170701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 170801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 170960378f1aSVenkata Narendra Kumar Gutta status = "disabled"; 171060378f1aSVenkata Narendra Kumar Gutta }; 1711e5813b15SDmitry Baryshkov 1712e5813b15SDmitry Baryshkov i2c13: i2c@a94000 { 1713e5813b15SDmitry Baryshkov compatible = "qcom,geni-i2c"; 1714e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1715e5813b15SDmitry Baryshkov clock-names = "se"; 1716e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1717e5813b15SDmitry Baryshkov pinctrl-names = "default"; 1718e5813b15SDmitry Baryshkov pinctrl-0 = <&qup_i2c13_default>; 1719e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 172059983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, 172159983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_I2C>; 172259983a5cSKonrad Dybcio dma-names = "tx", "rx"; 1723e5813b15SDmitry Baryshkov #address-cells = <1>; 1724e5813b15SDmitry Baryshkov #size-cells = <0>; 1725e5813b15SDmitry Baryshkov status = "disabled"; 1726e5813b15SDmitry Baryshkov }; 1727e5813b15SDmitry Baryshkov 1728e5813b15SDmitry Baryshkov spi13: spi@a94000 { 1729e5813b15SDmitry Baryshkov compatible = "qcom,geni-spi"; 1730e5813b15SDmitry Baryshkov reg = <0 0x00a94000 0 0x4000>; 1731e5813b15SDmitry Baryshkov clock-names = "se"; 1732e5813b15SDmitry Baryshkov clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 1733e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 173459983a5cSKonrad Dybcio dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, 173559983a5cSKonrad Dybcio <&gpi_dma1 1 5 QCOM_GPI_SPI>; 173659983a5cSKonrad Dybcio dma-names = "tx", "rx"; 173701e869ccSDmitry Baryshkov power-domains = <&rpmhpd SM8250_CX>; 173801e869ccSDmitry Baryshkov operating-points-v2 = <&qup_opp_table>; 173959983a5cSKonrad Dybcio #address-cells = <1>; 174059983a5cSKonrad Dybcio #size-cells = <0>; 1741e5813b15SDmitry Baryshkov status = "disabled"; 1742e5813b15SDmitry Baryshkov }; 174360378f1aSVenkata Narendra Kumar Gutta }; 174460378f1aSVenkata Narendra Kumar Gutta 1745e7e41a20SJonathan Marek config_noc: interconnect@1500000 { 1746e7e41a20SJonathan Marek compatible = "qcom,sm8250-config-noc"; 1747e7e41a20SJonathan Marek reg = <0 0x01500000 0 0xa580>; 1748e7e41a20SJonathan Marek #interconnect-cells = <1>; 1749e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1750e7e41a20SJonathan Marek }; 1751e7e41a20SJonathan Marek 1752e7e41a20SJonathan Marek system_noc: interconnect@1620000 { 1753e7e41a20SJonathan Marek compatible = "qcom,sm8250-system-noc"; 1754e7e41a20SJonathan Marek reg = <0 0x01620000 0 0x1c200>; 1755e7e41a20SJonathan Marek #interconnect-cells = <1>; 1756e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1757e7e41a20SJonathan Marek }; 1758e7e41a20SJonathan Marek 1759e7e41a20SJonathan Marek mc_virt: interconnect@163d000 { 1760e7e41a20SJonathan Marek compatible = "qcom,sm8250-mc-virt"; 1761e7e41a20SJonathan Marek reg = <0 0x0163d000 0 0x1000>; 1762e7e41a20SJonathan Marek #interconnect-cells = <1>; 1763e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1764e7e41a20SJonathan Marek }; 1765e7e41a20SJonathan Marek 1766e7e41a20SJonathan Marek aggre1_noc: interconnect@16e0000 { 1767e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre1-noc"; 1768e7e41a20SJonathan Marek reg = <0 0x016e0000 0 0x1f180>; 1769e7e41a20SJonathan Marek #interconnect-cells = <1>; 1770e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1771e7e41a20SJonathan Marek }; 1772e7e41a20SJonathan Marek 1773e7e41a20SJonathan Marek aggre2_noc: interconnect@1700000 { 1774e7e41a20SJonathan Marek compatible = "qcom,sm8250-aggre2-noc"; 1775e7e41a20SJonathan Marek reg = <0 0x01700000 0 0x33000>; 1776e7e41a20SJonathan Marek #interconnect-cells = <1>; 1777e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1778e7e41a20SJonathan Marek }; 1779e7e41a20SJonathan Marek 1780e7e41a20SJonathan Marek compute_noc: interconnect@1733000 { 1781e7e41a20SJonathan Marek compatible = "qcom,sm8250-compute-noc"; 1782e7e41a20SJonathan Marek reg = <0 0x01733000 0 0xa180>; 1783e7e41a20SJonathan Marek #interconnect-cells = <1>; 1784e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1785e7e41a20SJonathan Marek }; 1786e7e41a20SJonathan Marek 1787e7e41a20SJonathan Marek mmss_noc: interconnect@1740000 { 1788e7e41a20SJonathan Marek compatible = "qcom,sm8250-mmss-noc"; 1789e7e41a20SJonathan Marek reg = <0 0x01740000 0 0x1f080>; 1790e7e41a20SJonathan Marek #interconnect-cells = <1>; 1791e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 1792e7e41a20SJonathan Marek }; 1793e7e41a20SJonathan Marek 1794e53bdfc0SManivannan Sadhasivam pcie0: pci@1c00000 { 1795e53bdfc0SManivannan Sadhasivam compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; 1796e53bdfc0SManivannan Sadhasivam reg = <0 0x01c00000 0 0x3000>, 1797e53bdfc0SManivannan Sadhasivam <0 0x60000000 0 0xf1d>, 1798e53bdfc0SManivannan Sadhasivam <0 0x60000f20 0 0xa8>, 1799e53bdfc0SManivannan Sadhasivam <0 0x60001000 0 0x1000>, 1800e53bdfc0SManivannan Sadhasivam <0 0x60100000 0 0x100000>; 1801e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 1802e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1803e53bdfc0SManivannan Sadhasivam linux,pci-domain = <0>; 1804e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1805e53bdfc0SManivannan Sadhasivam num-lanes = <1>; 1806e53bdfc0SManivannan Sadhasivam 1807e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1808e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1809e53bdfc0SManivannan Sadhasivam 1810e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, 1811e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; 1812e53bdfc0SManivannan Sadhasivam 1813e53bdfc0SManivannan Sadhasivam interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 1814e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 1815e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1816e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1817e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1818e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1819e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1820e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1821e53bdfc0SManivannan Sadhasivam 1822e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, 1823e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_AUX_CLK>, 1824e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1825e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, 1826e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_AXI_CLK>, 1827e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, 1828e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1829e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1830e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1831e53bdfc0SManivannan Sadhasivam "aux", 1832e53bdfc0SManivannan Sadhasivam "cfg", 1833e53bdfc0SManivannan Sadhasivam "bus_master", 1834e53bdfc0SManivannan Sadhasivam "bus_slave", 1835e53bdfc0SManivannan Sadhasivam "slave_q2a", 1836e53bdfc0SManivannan Sadhasivam "tbu", 1837e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1838e53bdfc0SManivannan Sadhasivam 1839e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1c00 0x7f>; 1840e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, 1841e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c01 0x1>; 1842e53bdfc0SManivannan Sadhasivam 1843e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_BCR>; 1844e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1845e53bdfc0SManivannan Sadhasivam 1846e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_0_GDSC>; 1847e53bdfc0SManivannan Sadhasivam 1848e53bdfc0SManivannan Sadhasivam phys = <&pcie0_lane>; 1849e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1850e53bdfc0SManivannan Sadhasivam 1851d6050720SDmitry Baryshkov perst-gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; 1852d6050720SDmitry Baryshkov wake-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 185313e948a3SKonrad Dybcio 185413e948a3SKonrad Dybcio pinctrl-names = "default"; 185513e948a3SKonrad Dybcio pinctrl-0 = <&pcie0_default_state>; 185613e948a3SKonrad Dybcio 1857e53bdfc0SManivannan Sadhasivam status = "disabled"; 1858e53bdfc0SManivannan Sadhasivam }; 1859e53bdfc0SManivannan Sadhasivam 1860e53bdfc0SManivannan Sadhasivam pcie0_phy: phy@1c06000 { 1861e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy"; 1862e53bdfc0SManivannan Sadhasivam reg = <0 0x01c06000 0 0x1c0>; 1863e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 1864e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1865e53bdfc0SManivannan Sadhasivam ranges; 1866e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 1867e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 1868e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIFI_CLKREF_EN>, 1869e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1870e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 1871e53bdfc0SManivannan Sadhasivam 1872e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_0_PHY_BCR>; 1873e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 1874e53bdfc0SManivannan Sadhasivam 1875e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE0_PHY_REFGEN_CLK>; 1876e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 1877e53bdfc0SManivannan Sadhasivam 1878e53bdfc0SManivannan Sadhasivam status = "disabled"; 1879e53bdfc0SManivannan Sadhasivam 18801351512fSShawn Guo pcie0_lane: phy@1c06200 { 1881e53bdfc0SManivannan Sadhasivam reg = <0 0x1c06200 0 0x170>, /* tx */ 1882e53bdfc0SManivannan Sadhasivam <0 0x1c06400 0 0x200>, /* rx */ 1883e53bdfc0SManivannan Sadhasivam <0 0x1c06800 0 0x1f0>, /* pcs */ 1884e53bdfc0SManivannan Sadhasivam <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */ 1885e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; 1886e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 1887e53bdfc0SManivannan Sadhasivam 1888e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 1889e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_0_pipe_clk"; 1890e53bdfc0SManivannan Sadhasivam }; 1891e53bdfc0SManivannan Sadhasivam }; 1892e53bdfc0SManivannan Sadhasivam 1893e53bdfc0SManivannan Sadhasivam pcie1: pci@1c08000 { 1894e53bdfc0SManivannan Sadhasivam compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; 1895e53bdfc0SManivannan Sadhasivam reg = <0 0x01c08000 0 0x3000>, 1896e53bdfc0SManivannan Sadhasivam <0 0x40000000 0 0xf1d>, 1897e53bdfc0SManivannan Sadhasivam <0 0x40000f20 0 0xa8>, 1898e53bdfc0SManivannan Sadhasivam <0 0x40001000 0 0x1000>, 1899e53bdfc0SManivannan Sadhasivam <0 0x40100000 0 0x100000>; 1900e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 1901e53bdfc0SManivannan Sadhasivam device_type = "pci"; 1902e53bdfc0SManivannan Sadhasivam linux,pci-domain = <1>; 1903e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 1904e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 1905e53bdfc0SManivannan Sadhasivam 1906e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 1907e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1908e53bdfc0SManivannan Sadhasivam 1909e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, 1910e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 1911e53bdfc0SManivannan Sadhasivam 19121b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 1913e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 1914e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 1915e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 1916e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 1917e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 1918e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 1919e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 1920e53bdfc0SManivannan Sadhasivam 1921e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, 1922e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_AUX_CLK>, 1923e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 1924e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, 1925e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_AXI_CLK>, 1926e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 1927e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 1928e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 1929e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 1930e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 1931e53bdfc0SManivannan Sadhasivam "aux", 1932e53bdfc0SManivannan Sadhasivam "cfg", 1933e53bdfc0SManivannan Sadhasivam "bus_master", 1934e53bdfc0SManivannan Sadhasivam "bus_slave", 1935e53bdfc0SManivannan Sadhasivam "slave_q2a", 1936e53bdfc0SManivannan Sadhasivam "ref", 1937e53bdfc0SManivannan Sadhasivam "tbu", 1938e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 1939e53bdfc0SManivannan Sadhasivam 1940e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; 1941e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 1942e53bdfc0SManivannan Sadhasivam 1943e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1c80 0x7f>; 1944e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, 1945e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1c81 0x1>; 1946e53bdfc0SManivannan Sadhasivam 1947e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_BCR>; 1948e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 1949e53bdfc0SManivannan Sadhasivam 1950e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_1_GDSC>; 1951e53bdfc0SManivannan Sadhasivam 1952e53bdfc0SManivannan Sadhasivam phys = <&pcie1_lane>; 1953e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 1954e53bdfc0SManivannan Sadhasivam 1955d6050720SDmitry Baryshkov perst-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; 1956d6050720SDmitry Baryshkov wake-gpios = <&tlmm 84 GPIO_ACTIVE_HIGH>; 195713e948a3SKonrad Dybcio 195813e948a3SKonrad Dybcio pinctrl-names = "default"; 195913e948a3SKonrad Dybcio pinctrl-0 = <&pcie1_default_state>; 196013e948a3SKonrad Dybcio 1961e53bdfc0SManivannan Sadhasivam status = "disabled"; 1962e53bdfc0SManivannan Sadhasivam }; 1963e53bdfc0SManivannan Sadhasivam 1964e53bdfc0SManivannan Sadhasivam pcie1_phy: phy@1c0e000 { 1965e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy"; 1966e53bdfc0SManivannan Sadhasivam reg = <0 0x01c0e000 0 0x1c0>; 1967e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 1968e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 1969e53bdfc0SManivannan Sadhasivam ranges; 1970e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 1971e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_1_CFG_AHB_CLK>, 1972e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, 1973e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 1974e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 1975e53bdfc0SManivannan Sadhasivam 1976e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_1_PHY_BCR>; 1977e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 1978e53bdfc0SManivannan Sadhasivam 1979e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; 1980e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 1981e53bdfc0SManivannan Sadhasivam 1982e53bdfc0SManivannan Sadhasivam status = "disabled"; 1983e53bdfc0SManivannan Sadhasivam 19841351512fSShawn Guo pcie1_lane: phy@1c0e200 { 1985e53bdfc0SManivannan Sadhasivam reg = <0 0x1c0e200 0 0x170>, /* tx0 */ 1986e53bdfc0SManivannan Sadhasivam <0 0x1c0e400 0 0x200>, /* rx0 */ 1987e53bdfc0SManivannan Sadhasivam <0 0x1c0ea00 0 0x1f0>, /* pcs */ 1988e53bdfc0SManivannan Sadhasivam <0 0x1c0e600 0 0x170>, /* tx1 */ 1989e53bdfc0SManivannan Sadhasivam <0 0x1c0e800 0 0x200>, /* rx1 */ 1990e53bdfc0SManivannan Sadhasivam <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 1991e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; 1992e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 1993e53bdfc0SManivannan Sadhasivam 1994e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 1995e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_1_pipe_clk"; 1996e53bdfc0SManivannan Sadhasivam }; 1997e53bdfc0SManivannan Sadhasivam }; 1998e53bdfc0SManivannan Sadhasivam 1999e53bdfc0SManivannan Sadhasivam pcie2: pci@1c10000 { 2000e53bdfc0SManivannan Sadhasivam compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; 2001e53bdfc0SManivannan Sadhasivam reg = <0 0x01c10000 0 0x3000>, 2002e53bdfc0SManivannan Sadhasivam <0 0x64000000 0 0xf1d>, 2003e53bdfc0SManivannan Sadhasivam <0 0x64000f20 0 0xa8>, 2004e53bdfc0SManivannan Sadhasivam <0 0x64001000 0 0x1000>, 2005e53bdfc0SManivannan Sadhasivam <0 0x64100000 0 0x100000>; 2006e53bdfc0SManivannan Sadhasivam reg-names = "parf", "dbi", "elbi", "atu", "config"; 2007e53bdfc0SManivannan Sadhasivam device_type = "pci"; 2008e53bdfc0SManivannan Sadhasivam linux,pci-domain = <2>; 2009e53bdfc0SManivannan Sadhasivam bus-range = <0x00 0xff>; 2010e53bdfc0SManivannan Sadhasivam num-lanes = <2>; 2011e53bdfc0SManivannan Sadhasivam 2012e53bdfc0SManivannan Sadhasivam #address-cells = <3>; 2013e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2014e53bdfc0SManivannan Sadhasivam 2015e53bdfc0SManivannan Sadhasivam ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>, 2016e53bdfc0SManivannan Sadhasivam <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>; 2017e53bdfc0SManivannan Sadhasivam 20181b7101e8SManivannan Sadhasivam interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 2019e53bdfc0SManivannan Sadhasivam interrupt-names = "msi"; 2020e53bdfc0SManivannan Sadhasivam #interrupt-cells = <1>; 2021e53bdfc0SManivannan Sadhasivam interrupt-map-mask = <0 0 0 0x7>; 2022e53bdfc0SManivannan Sadhasivam interrupt-map = <0 0 0 1 &intc 0 290 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 2023e53bdfc0SManivannan Sadhasivam <0 0 0 2 &intc 0 415 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 2024e53bdfc0SManivannan Sadhasivam <0 0 0 3 &intc 0 416 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 2025e53bdfc0SManivannan Sadhasivam <0 0 0 4 &intc 0 417 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 2026e53bdfc0SManivannan Sadhasivam 2027e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, 2028e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_AUX_CLK>, 2029e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2030e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, 2031e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_AXI_CLK>, 2032e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, 2033e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2034e53bdfc0SManivannan Sadhasivam <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, 2035e53bdfc0SManivannan Sadhasivam <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; 2036e53bdfc0SManivannan Sadhasivam clock-names = "pipe", 2037e53bdfc0SManivannan Sadhasivam "aux", 2038e53bdfc0SManivannan Sadhasivam "cfg", 2039e53bdfc0SManivannan Sadhasivam "bus_master", 2040e53bdfc0SManivannan Sadhasivam "bus_slave", 2041e53bdfc0SManivannan Sadhasivam "slave_q2a", 2042e53bdfc0SManivannan Sadhasivam "ref", 2043e53bdfc0SManivannan Sadhasivam "tbu", 2044e53bdfc0SManivannan Sadhasivam "ddrss_sf_tbu"; 2045e53bdfc0SManivannan Sadhasivam 2046e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>; 2047e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <19200000>; 2048e53bdfc0SManivannan Sadhasivam 2049e53bdfc0SManivannan Sadhasivam iommus = <&apps_smmu 0x1d00 0x7f>; 2050e53bdfc0SManivannan Sadhasivam iommu-map = <0x0 &apps_smmu 0x1d00 0x1>, 2051e53bdfc0SManivannan Sadhasivam <0x100 &apps_smmu 0x1d01 0x1>; 2052e53bdfc0SManivannan Sadhasivam 2053e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_BCR>; 2054e53bdfc0SManivannan Sadhasivam reset-names = "pci"; 2055e53bdfc0SManivannan Sadhasivam 2056e53bdfc0SManivannan Sadhasivam power-domains = <&gcc PCIE_2_GDSC>; 2057e53bdfc0SManivannan Sadhasivam 2058e53bdfc0SManivannan Sadhasivam phys = <&pcie2_lane>; 2059e53bdfc0SManivannan Sadhasivam phy-names = "pciephy"; 2060e53bdfc0SManivannan Sadhasivam 2061d6050720SDmitry Baryshkov perst-gpios = <&tlmm 85 GPIO_ACTIVE_LOW>; 2062d6050720SDmitry Baryshkov wake-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; 206313e948a3SKonrad Dybcio 206413e948a3SKonrad Dybcio pinctrl-names = "default"; 206513e948a3SKonrad Dybcio pinctrl-0 = <&pcie2_default_state>; 206613e948a3SKonrad Dybcio 2067e53bdfc0SManivannan Sadhasivam status = "disabled"; 2068e53bdfc0SManivannan Sadhasivam }; 2069e53bdfc0SManivannan Sadhasivam 2070e53bdfc0SManivannan Sadhasivam pcie2_phy: phy@1c16000 { 2071e53bdfc0SManivannan Sadhasivam compatible = "qcom,sm8250-qmp-modem-pcie-phy"; 2072e53bdfc0SManivannan Sadhasivam reg = <0 0x1c16000 0 0x1c0>; 2073e53bdfc0SManivannan Sadhasivam #address-cells = <2>; 2074e53bdfc0SManivannan Sadhasivam #size-cells = <2>; 2075e53bdfc0SManivannan Sadhasivam ranges; 2076e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, 2077e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_2_CFG_AHB_CLK>, 2078e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE_MDM_CLKREF_EN>, 2079e53bdfc0SManivannan Sadhasivam <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2080e53bdfc0SManivannan Sadhasivam clock-names = "aux", "cfg_ahb", "ref", "refgen"; 2081e53bdfc0SManivannan Sadhasivam 2082e53bdfc0SManivannan Sadhasivam resets = <&gcc GCC_PCIE_2_PHY_BCR>; 2083e53bdfc0SManivannan Sadhasivam reset-names = "phy"; 2084e53bdfc0SManivannan Sadhasivam 2085e53bdfc0SManivannan Sadhasivam assigned-clocks = <&gcc GCC_PCIE2_PHY_REFGEN_CLK>; 2086e53bdfc0SManivannan Sadhasivam assigned-clock-rates = <100000000>; 2087e53bdfc0SManivannan Sadhasivam 2088e53bdfc0SManivannan Sadhasivam status = "disabled"; 2089e53bdfc0SManivannan Sadhasivam 20901351512fSShawn Guo pcie2_lane: phy@1c16200 { 2091e53bdfc0SManivannan Sadhasivam reg = <0 0x1c16200 0 0x170>, /* tx0 */ 2092e53bdfc0SManivannan Sadhasivam <0 0x1c16400 0 0x200>, /* rx0 */ 2093e53bdfc0SManivannan Sadhasivam <0 0x1c16a00 0 0x1f0>, /* pcs */ 2094e53bdfc0SManivannan Sadhasivam <0 0x1c16600 0 0x170>, /* tx1 */ 2095e53bdfc0SManivannan Sadhasivam <0 0x1c16800 0 0x200>, /* rx1 */ 2096e53bdfc0SManivannan Sadhasivam <0 0x1c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */ 2097e53bdfc0SManivannan Sadhasivam clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; 2098e53bdfc0SManivannan Sadhasivam clock-names = "pipe0"; 2099e53bdfc0SManivannan Sadhasivam 2100e53bdfc0SManivannan Sadhasivam #phy-cells = <0>; 2101e53bdfc0SManivannan Sadhasivam clock-output-names = "pcie_2_pipe_clk"; 2102e53bdfc0SManivannan Sadhasivam }; 2103e53bdfc0SManivannan Sadhasivam }; 2104e53bdfc0SManivannan Sadhasivam 21056b9afd8fSJonathan Marek ufs_mem_hc: ufshc@1d84000 { 2106b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-ufshc", "qcom,ufshc", 2107b7e2fba0SBryan O'Donoghue "jedec,ufs-2.0"; 2108b7e2fba0SBryan O'Donoghue reg = <0 0x01d84000 0 0x3000>; 2109b7e2fba0SBryan O'Donoghue interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 2110b7e2fba0SBryan O'Donoghue phys = <&ufs_mem_phy_lanes>; 2111b7e2fba0SBryan O'Donoghue phy-names = "ufsphy"; 2112b7e2fba0SBryan O'Donoghue lanes-per-direction = <2>; 2113b7e2fba0SBryan O'Donoghue #reset-cells = <1>; 2114b7e2fba0SBryan O'Donoghue resets = <&gcc GCC_UFS_PHY_BCR>; 2115b7e2fba0SBryan O'Donoghue reset-names = "rst"; 2116b7e2fba0SBryan O'Donoghue 2117b7e2fba0SBryan O'Donoghue power-domains = <&gcc UFS_PHY_GDSC>; 2118b7e2fba0SBryan O'Donoghue 2119a89441fcSJonathan Marek iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; 2120a89441fcSJonathan Marek 2121b7e2fba0SBryan O'Donoghue clock-names = 2122b7e2fba0SBryan O'Donoghue "core_clk", 2123b7e2fba0SBryan O'Donoghue "bus_aggr_clk", 2124b7e2fba0SBryan O'Donoghue "iface_clk", 2125b7e2fba0SBryan O'Donoghue "core_clk_unipro", 2126b7e2fba0SBryan O'Donoghue "ref_clk", 2127b7e2fba0SBryan O'Donoghue "tx_lane0_sync_clk", 2128b7e2fba0SBryan O'Donoghue "rx_lane0_sync_clk", 2129b7e2fba0SBryan O'Donoghue "rx_lane1_sync_clk"; 2130b7e2fba0SBryan O'Donoghue clocks = 2131b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AXI_CLK>, 2132b7e2fba0SBryan O'Donoghue <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 2133b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_AHB_CLK>, 2134b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 2135b7e2fba0SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 2136b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 2137b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 2138b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 2139b7e2fba0SBryan O'Donoghue freq-table-hz = 2140b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2141b7e2fba0SBryan O'Donoghue <0 0>, 2142b7e2fba0SBryan O'Donoghue <0 0>, 2143b7e2fba0SBryan O'Donoghue <37500000 300000000>, 2144b7e2fba0SBryan O'Donoghue <0 0>, 2145b7e2fba0SBryan O'Donoghue <0 0>, 2146b7e2fba0SBryan O'Donoghue <0 0>, 2147b7e2fba0SBryan O'Donoghue <0 0>; 2148b7e2fba0SBryan O'Donoghue 2149b7e2fba0SBryan O'Donoghue status = "disabled"; 2150b7e2fba0SBryan O'Donoghue }; 2151b7e2fba0SBryan O'Donoghue 2152b7e2fba0SBryan O'Donoghue ufs_mem_phy: phy@1d87000 { 2153b7e2fba0SBryan O'Donoghue compatible = "qcom,sm8250-qmp-ufs-phy"; 2154b7e2fba0SBryan O'Donoghue reg = <0 0x01d87000 0 0x1c0>; 2155b7e2fba0SBryan O'Donoghue #address-cells = <2>; 2156b7e2fba0SBryan O'Donoghue #size-cells = <2>; 2157b7e2fba0SBryan O'Donoghue ranges; 2158b7e2fba0SBryan O'Donoghue clock-names = "ref", 2159b7e2fba0SBryan O'Donoghue "ref_aux"; 2160b7e2fba0SBryan O'Donoghue clocks = <&rpmhcc RPMH_CXO_CLK>, 2161b7e2fba0SBryan O'Donoghue <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 2162b7e2fba0SBryan O'Donoghue 2163b7e2fba0SBryan O'Donoghue resets = <&ufs_mem_hc 0>; 2164b7e2fba0SBryan O'Donoghue reset-names = "ufsphy"; 2165b7e2fba0SBryan O'Donoghue status = "disabled"; 2166b7e2fba0SBryan O'Donoghue 21671351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 2168b7e2fba0SBryan O'Donoghue reg = <0 0x01d87400 0 0x108>, 2169b7e2fba0SBryan O'Donoghue <0 0x01d87600 0 0x1e0>, 2170b7e2fba0SBryan O'Donoghue <0 0x01d87c00 0 0x1dc>, 2171b7e2fba0SBryan O'Donoghue <0 0x01d87800 0 0x108>, 2172b7e2fba0SBryan O'Donoghue <0 0x01d87a00 0 0x1e0>; 2173b7e2fba0SBryan O'Donoghue #phy-cells = <0>; 2174b7e2fba0SBryan O'Donoghue }; 2175b7e2fba0SBryan O'Donoghue }; 2176b7e2fba0SBryan O'Donoghue 2177e7e41a20SJonathan Marek ipa_virt: interconnect@1e00000 { 2178e7e41a20SJonathan Marek compatible = "qcom,sm8250-ipa-virt"; 2179e7e41a20SJonathan Marek reg = <0 0x01e00000 0 0x1000>; 2180e7e41a20SJonathan Marek #interconnect-cells = <1>; 2181e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 2182e7e41a20SJonathan Marek }; 2183e7e41a20SJonathan Marek 2184dff0f49cSBjorn Andersson tcsr_mutex: hwlock@1f40000 { 2185dff0f49cSBjorn Andersson compatible = "qcom,tcsr-mutex"; 2186b9ec8cbcSJonathan Marek reg = <0x0 0x01f40000 0x0 0x40000>; 2187dff0f49cSBjorn Andersson #hwlock-cells = <1>; 218860378f1aSVenkata Narendra Kumar Gutta }; 218960378f1aSVenkata Narendra Kumar Gutta 2190768270caSSrinivas Kandagatla wsamacro: codec@3240000 { 2191768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-wsa-macro"; 2192768270caSSrinivas Kandagatla reg = <0 0x03240000 0 0x1000>; 21937858ef3cSLuca Weiss clocks = <&audiocc LPASS_CDC_WSA_MCLK>, 21947858ef3cSLuca Weiss <&audiocc LPASS_CDC_WSA_NPL>, 2195768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2196768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 21977858ef3cSLuca Weiss <&aoncc LPASS_CDC_VA_MCLK>, 2198768270caSSrinivas Kandagatla <&vamacro>; 2199768270caSSrinivas Kandagatla 2200768270caSSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; 2201768270caSSrinivas Kandagatla 2202768270caSSrinivas Kandagatla #clock-cells = <0>; 2203768270caSSrinivas Kandagatla clock-frequency = <9600000>; 2204768270caSSrinivas Kandagatla clock-output-names = "mclk"; 2205768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2206768270caSSrinivas Kandagatla 2207768270caSSrinivas Kandagatla pinctrl-names = "default"; 2208768270caSSrinivas Kandagatla pinctrl-0 = <&wsa_swr_active>; 2209768270caSSrinivas Kandagatla }; 2210768270caSSrinivas Kandagatla 2211768270caSSrinivas Kandagatla swr0: soundwire-controller@3250000 { 2212768270caSSrinivas Kandagatla reg = <0 0x03250000 0 0x2000>; 2213768270caSSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 2214768270caSSrinivas Kandagatla interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; 2215768270caSSrinivas Kandagatla clocks = <&wsamacro>; 2216768270caSSrinivas Kandagatla clock-names = "iface"; 2217768270caSSrinivas Kandagatla 2218768270caSSrinivas Kandagatla qcom,din-ports = <2>; 2219768270caSSrinivas Kandagatla qcom,dout-ports = <6>; 2220768270caSSrinivas Kandagatla 2221768270caSSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>; 2222768270caSSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>; 2223768270caSSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>; 2224768270caSSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0x0 0x0 0x1 0x0 0x0 0x1 0x0 0x0>; 2225768270caSSrinivas Kandagatla 2226768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2227768270caSSrinivas Kandagatla #address-cells = <2>; 2228768270caSSrinivas Kandagatla #size-cells = <0>; 2229768270caSSrinivas Kandagatla }; 2230768270caSSrinivas Kandagatla 2231793bbd2dSSrinivas Kandagatla audiocc: clock-controller@3300000 { 2232793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-audiocc"; 2233793bbd2dSSrinivas Kandagatla reg = <0 0x03300000 0 0x30000>; 2234793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2235793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2236793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2237793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2238793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2239793bbd2dSSrinivas Kandagatla }; 2240793bbd2dSSrinivas Kandagatla 2241768270caSSrinivas Kandagatla vamacro: codec@3370000 { 2242768270caSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-va-macro"; 2243768270caSSrinivas Kandagatla reg = <0 0x03370000 0 0x1000>; 22447858ef3cSLuca Weiss clocks = <&aoncc LPASS_CDC_VA_MCLK>, 2245768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2246768270caSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2247768270caSSrinivas Kandagatla 2248768270caSSrinivas Kandagatla clock-names = "mclk", "macro", "dcodec"; 2249768270caSSrinivas Kandagatla 2250768270caSSrinivas Kandagatla #clock-cells = <0>; 2251768270caSSrinivas Kandagatla clock-frequency = <9600000>; 2252768270caSSrinivas Kandagatla clock-output-names = "fsgen"; 2253768270caSSrinivas Kandagatla #sound-dai-cells = <1>; 2254768270caSSrinivas Kandagatla }; 2255768270caSSrinivas Kandagatla 225624f52ef0SSrinivas Kandagatla rxmacro: rxmacro@3200000 { 225724f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 225824f52ef0SSrinivas Kandagatla pinctrl-0 = <&rx_swr_active>; 225924f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-rx-macro"; 226024f52ef0SSrinivas Kandagatla reg = <0 0x3200000 0 0x1000>; 226118019eb6SDmitry Baryshkov status = "disabled"; 226224f52ef0SSrinivas Kandagatla 226324f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 226424f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 226524f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 226624f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 226724f52ef0SSrinivas Kandagatla <&vamacro>; 226824f52ef0SSrinivas Kandagatla 226924f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 227024f52ef0SSrinivas Kandagatla 227124f52ef0SSrinivas Kandagatla #clock-cells = <0>; 227224f52ef0SSrinivas Kandagatla clock-frequency = <9600000>; 227324f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 227424f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 227524f52ef0SSrinivas Kandagatla }; 227624f52ef0SSrinivas Kandagatla 227724f52ef0SSrinivas Kandagatla swr1: soundwire-controller@3210000 { 227824f52ef0SSrinivas Kandagatla reg = <0 0x3210000 0 0x2000>; 227924f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 228018019eb6SDmitry Baryshkov status = "disabled"; 228124f52ef0SSrinivas Kandagatla interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 228224f52ef0SSrinivas Kandagatla clocks = <&rxmacro>; 228324f52ef0SSrinivas Kandagatla clock-names = "iface"; 228424f52ef0SSrinivas Kandagatla label = "RX"; 228524f52ef0SSrinivas Kandagatla qcom,din-ports = <0>; 228624f52ef0SSrinivas Kandagatla qcom,dout-ports = <5>; 228724f52ef0SSrinivas Kandagatla 228824f52ef0SSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1F 0x1F 0x07 0x00>; 228924f52ef0SSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>; 229024f52ef0SSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>; 229124f52ef0SSrinivas Kandagatla qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>; 229224f52ef0SSrinivas Kandagatla qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>; 229324f52ef0SSrinivas Kandagatla qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>; 229424f52ef0SSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>; 229524f52ef0SSrinivas Kandagatla qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; 229624f52ef0SSrinivas Kandagatla qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>; 229724f52ef0SSrinivas Kandagatla 229824f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 229924f52ef0SSrinivas Kandagatla #address-cells = <2>; 230024f52ef0SSrinivas Kandagatla #size-cells = <0>; 230124f52ef0SSrinivas Kandagatla }; 230224f52ef0SSrinivas Kandagatla 230324f52ef0SSrinivas Kandagatla txmacro: txmacro@3220000 { 230424f52ef0SSrinivas Kandagatla pinctrl-names = "default"; 230524f52ef0SSrinivas Kandagatla pinctrl-0 = <&tx_swr_active>; 230624f52ef0SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-tx-macro"; 230724f52ef0SSrinivas Kandagatla reg = <0 0x3220000 0 0x1000>; 230818019eb6SDmitry Baryshkov status = "disabled"; 230924f52ef0SSrinivas Kandagatla 231024f52ef0SSrinivas Kandagatla clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231124f52ef0SSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231224f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231324f52ef0SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 231424f52ef0SSrinivas Kandagatla <&vamacro>; 231524f52ef0SSrinivas Kandagatla 231624f52ef0SSrinivas Kandagatla clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; 231724f52ef0SSrinivas Kandagatla 231824f52ef0SSrinivas Kandagatla #clock-cells = <0>; 231924f52ef0SSrinivas Kandagatla clock-frequency = <9600000>; 232024f52ef0SSrinivas Kandagatla clock-output-names = "mclk"; 232124f52ef0SSrinivas Kandagatla #address-cells = <2>; 232224f52ef0SSrinivas Kandagatla #size-cells = <2>; 232324f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 232424f52ef0SSrinivas Kandagatla }; 232524f52ef0SSrinivas Kandagatla 232624f52ef0SSrinivas Kandagatla /* tx macro */ 232724f52ef0SSrinivas Kandagatla swr2: soundwire-controller@3230000 { 232824f52ef0SSrinivas Kandagatla reg = <0 0x3230000 0 0x2000>; 232924f52ef0SSrinivas Kandagatla compatible = "qcom,soundwire-v1.5.1"; 233024f52ef0SSrinivas Kandagatla interrupts-extended = <&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; 233124f52ef0SSrinivas Kandagatla interrupt-names = "core"; 233218019eb6SDmitry Baryshkov status = "disabled"; 233324f52ef0SSrinivas Kandagatla 233424f52ef0SSrinivas Kandagatla clocks = <&txmacro>; 233524f52ef0SSrinivas Kandagatla clock-names = "iface"; 233624f52ef0SSrinivas Kandagatla label = "TX"; 233724f52ef0SSrinivas Kandagatla 233824f52ef0SSrinivas Kandagatla qcom,din-ports = <5>; 233924f52ef0SSrinivas Kandagatla qcom,dout-ports = <0>; 234024f52ef0SSrinivas Kandagatla qcom,ports-sinterval-low = /bits/ 8 <0xFF 0x01 0x01 0x03 0x03>; 234124f52ef0SSrinivas Kandagatla qcom,ports-offset1 = /bits/ 8 <0xFF 0x01 0x00 0x02 0x00>; 234224f52ef0SSrinivas Kandagatla qcom,ports-offset2 = /bits/ 8 <0xFF 0x00 0x00 0x00 0x00>; 234324f52ef0SSrinivas Kandagatla qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF>; 234424f52ef0SSrinivas Kandagatla qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF>; 234524f52ef0SSrinivas Kandagatla qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF>; 234624f52ef0SSrinivas Kandagatla qcom,ports-word-length = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF>; 234724f52ef0SSrinivas Kandagatla qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0xFF>; 234824f52ef0SSrinivas Kandagatla qcom,ports-lane-control = /bits/ 8 <0xFF 0x00 0x01 0x00 0x01>; 234924f52ef0SSrinivas Kandagatla qcom,port-offset = <1>; 235024f52ef0SSrinivas Kandagatla #sound-dai-cells = <1>; 235124f52ef0SSrinivas Kandagatla #address-cells = <2>; 235224f52ef0SSrinivas Kandagatla #size-cells = <0>; 235324f52ef0SSrinivas Kandagatla }; 235424f52ef0SSrinivas Kandagatla 2355793bbd2dSSrinivas Kandagatla aoncc: clock-controller@3380000 { 2356793bbd2dSSrinivas Kandagatla compatible = "qcom,sm8250-lpass-aoncc"; 2357793bbd2dSSrinivas Kandagatla reg = <0 0x03380000 0 0x40000>; 2358793bbd2dSSrinivas Kandagatla #clock-cells = <1>; 2359793bbd2dSSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2360793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 2361793bbd2dSSrinivas Kandagatla <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 2362793bbd2dSSrinivas Kandagatla clock-names = "core", "audio", "bus"; 2363793bbd2dSSrinivas Kandagatla }; 2364793bbd2dSSrinivas Kandagatla 23653160c1b8SSrinivas Kandagatla lpass_tlmm: pinctrl@33c0000{ 23663160c1b8SSrinivas Kandagatla compatible = "qcom,sm8250-lpass-lpi-pinctrl"; 23673160c1b8SSrinivas Kandagatla reg = <0 0x033c0000 0x0 0x20000>, 23683160c1b8SSrinivas Kandagatla <0 0x03550000 0x0 0x10000>; 23693160c1b8SSrinivas Kandagatla gpio-controller; 23703160c1b8SSrinivas Kandagatla #gpio-cells = <2>; 23713160c1b8SSrinivas Kandagatla gpio-ranges = <&lpass_tlmm 0 0 14>; 23723160c1b8SSrinivas Kandagatla 23733160c1b8SSrinivas Kandagatla clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, 23743160c1b8SSrinivas Kandagatla <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 23753160c1b8SSrinivas Kandagatla clock-names = "core", "audio"; 23763160c1b8SSrinivas Kandagatla 23773160c1b8SSrinivas Kandagatla wsa_swr_active: wsa-swr-active-pins { 23783160c1b8SSrinivas Kandagatla clk { 23793160c1b8SSrinivas Kandagatla pins = "gpio10"; 23803160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 23813160c1b8SSrinivas Kandagatla drive-strength = <2>; 23823160c1b8SSrinivas Kandagatla slew-rate = <1>; 23833160c1b8SSrinivas Kandagatla bias-disable; 23843160c1b8SSrinivas Kandagatla }; 23853160c1b8SSrinivas Kandagatla 23863160c1b8SSrinivas Kandagatla data { 23873160c1b8SSrinivas Kandagatla pins = "gpio11"; 23883160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 23893160c1b8SSrinivas Kandagatla drive-strength = <2>; 23903160c1b8SSrinivas Kandagatla slew-rate = <1>; 23913160c1b8SSrinivas Kandagatla bias-bus-hold; 23923160c1b8SSrinivas Kandagatla 23933160c1b8SSrinivas Kandagatla }; 23943160c1b8SSrinivas Kandagatla }; 23953160c1b8SSrinivas Kandagatla 23963160c1b8SSrinivas Kandagatla wsa_swr_sleep: wsa-swr-sleep-pins { 23973160c1b8SSrinivas Kandagatla clk { 23983160c1b8SSrinivas Kandagatla pins = "gpio10"; 23993160c1b8SSrinivas Kandagatla function = "wsa_swr_clk"; 24003160c1b8SSrinivas Kandagatla drive-strength = <2>; 24013160c1b8SSrinivas Kandagatla input-enable; 24023160c1b8SSrinivas Kandagatla bias-pull-down; 24033160c1b8SSrinivas Kandagatla }; 24043160c1b8SSrinivas Kandagatla 24053160c1b8SSrinivas Kandagatla data { 24063160c1b8SSrinivas Kandagatla pins = "gpio11"; 24073160c1b8SSrinivas Kandagatla function = "wsa_swr_data"; 24083160c1b8SSrinivas Kandagatla drive-strength = <2>; 24093160c1b8SSrinivas Kandagatla input-enable; 24103160c1b8SSrinivas Kandagatla bias-pull-down; 24113160c1b8SSrinivas Kandagatla 24123160c1b8SSrinivas Kandagatla }; 24133160c1b8SSrinivas Kandagatla }; 24143160c1b8SSrinivas Kandagatla 24153160c1b8SSrinivas Kandagatla dmic01_active: dmic01-active-pins { 24163160c1b8SSrinivas Kandagatla clk { 24173160c1b8SSrinivas Kandagatla pins = "gpio6"; 24183160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 24193160c1b8SSrinivas Kandagatla drive-strength = <8>; 24203160c1b8SSrinivas Kandagatla output-high; 24213160c1b8SSrinivas Kandagatla }; 24223160c1b8SSrinivas Kandagatla data { 24233160c1b8SSrinivas Kandagatla pins = "gpio7"; 24243160c1b8SSrinivas Kandagatla function = "dmic1_data"; 24253160c1b8SSrinivas Kandagatla drive-strength = <8>; 24263160c1b8SSrinivas Kandagatla input-enable; 24273160c1b8SSrinivas Kandagatla }; 24283160c1b8SSrinivas Kandagatla }; 24293160c1b8SSrinivas Kandagatla 24303160c1b8SSrinivas Kandagatla dmic01_sleep: dmic01-sleep-pins { 24313160c1b8SSrinivas Kandagatla clk { 24323160c1b8SSrinivas Kandagatla pins = "gpio6"; 24333160c1b8SSrinivas Kandagatla function = "dmic1_clk"; 24343160c1b8SSrinivas Kandagatla drive-strength = <2>; 24353160c1b8SSrinivas Kandagatla bias-disable; 24363160c1b8SSrinivas Kandagatla output-low; 24373160c1b8SSrinivas Kandagatla }; 24383160c1b8SSrinivas Kandagatla 24393160c1b8SSrinivas Kandagatla data { 24403160c1b8SSrinivas Kandagatla pins = "gpio7"; 24413160c1b8SSrinivas Kandagatla function = "dmic1_data"; 24423160c1b8SSrinivas Kandagatla drive-strength = <2>; 24433160c1b8SSrinivas Kandagatla pull-down; 24443160c1b8SSrinivas Kandagatla input-enable; 24453160c1b8SSrinivas Kandagatla }; 24463160c1b8SSrinivas Kandagatla }; 244724f52ef0SSrinivas Kandagatla 244824f52ef0SSrinivas Kandagatla rx_swr_active: rx_swr-active-pins { 244924f52ef0SSrinivas Kandagatla clk { 245024f52ef0SSrinivas Kandagatla pins = "gpio3"; 245124f52ef0SSrinivas Kandagatla function = "swr_rx_clk"; 245224f52ef0SSrinivas Kandagatla drive-strength = <2>; 245324f52ef0SSrinivas Kandagatla slew-rate = <1>; 245424f52ef0SSrinivas Kandagatla bias-disable; 245524f52ef0SSrinivas Kandagatla }; 245624f52ef0SSrinivas Kandagatla 245724f52ef0SSrinivas Kandagatla data { 245824f52ef0SSrinivas Kandagatla pins = "gpio4", "gpio5"; 245924f52ef0SSrinivas Kandagatla function = "swr_rx_data"; 246024f52ef0SSrinivas Kandagatla drive-strength = <2>; 246124f52ef0SSrinivas Kandagatla slew-rate = <1>; 246224f52ef0SSrinivas Kandagatla bias-bus-hold; 246324f52ef0SSrinivas Kandagatla }; 246424f52ef0SSrinivas Kandagatla }; 246524f52ef0SSrinivas Kandagatla 246624f52ef0SSrinivas Kandagatla tx_swr_active: tx_swr-active-pins { 246724f52ef0SSrinivas Kandagatla clk { 246824f52ef0SSrinivas Kandagatla pins = "gpio0"; 246924f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 247024f52ef0SSrinivas Kandagatla drive-strength = <2>; 247124f52ef0SSrinivas Kandagatla slew-rate = <1>; 247224f52ef0SSrinivas Kandagatla bias-disable; 247324f52ef0SSrinivas Kandagatla }; 247424f52ef0SSrinivas Kandagatla 247524f52ef0SSrinivas Kandagatla data { 247624f52ef0SSrinivas Kandagatla pins = "gpio1", "gpio2"; 247724f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 247824f52ef0SSrinivas Kandagatla drive-strength = <2>; 247924f52ef0SSrinivas Kandagatla slew-rate = <1>; 248024f52ef0SSrinivas Kandagatla bias-bus-hold; 248124f52ef0SSrinivas Kandagatla }; 248224f52ef0SSrinivas Kandagatla }; 248324f52ef0SSrinivas Kandagatla 248424f52ef0SSrinivas Kandagatla tx_swr_sleep: tx_swr-sleep-pins { 248524f52ef0SSrinivas Kandagatla clk { 248624f52ef0SSrinivas Kandagatla pins = "gpio0"; 248724f52ef0SSrinivas Kandagatla function = "swr_tx_clk"; 248824f52ef0SSrinivas Kandagatla drive-strength = <2>; 248924f52ef0SSrinivas Kandagatla input-enable; 249024f52ef0SSrinivas Kandagatla bias-pull-down; 249124f52ef0SSrinivas Kandagatla }; 249224f52ef0SSrinivas Kandagatla 249324f52ef0SSrinivas Kandagatla data1 { 249424f52ef0SSrinivas Kandagatla pins = "gpio1"; 249524f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 249624f52ef0SSrinivas Kandagatla drive-strength = <2>; 249724f52ef0SSrinivas Kandagatla input-enable; 249824f52ef0SSrinivas Kandagatla bias-bus-hold; 249924f52ef0SSrinivas Kandagatla }; 250024f52ef0SSrinivas Kandagatla 250124f52ef0SSrinivas Kandagatla data2 { 250224f52ef0SSrinivas Kandagatla pins = "gpio2"; 250324f52ef0SSrinivas Kandagatla function = "swr_tx_data"; 250424f52ef0SSrinivas Kandagatla drive-strength = <2>; 250524f52ef0SSrinivas Kandagatla input-enable; 250624f52ef0SSrinivas Kandagatla bias-pull-down; 250724f52ef0SSrinivas Kandagatla }; 250824f52ef0SSrinivas Kandagatla }; 25093160c1b8SSrinivas Kandagatla }; 25103160c1b8SSrinivas Kandagatla 251104a3605bSJonathan Marek gpu: gpu@3d00000 { 251204a3605bSJonathan Marek compatible = "qcom,adreno-650.2", 25137c1dffd4SDmitry Baryshkov "qcom,adreno"; 251404a3605bSJonathan Marek 251504a3605bSJonathan Marek reg = <0 0x03d00000 0 0x40000>; 251604a3605bSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 251704a3605bSJonathan Marek 251804a3605bSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 251904a3605bSJonathan Marek 252004a3605bSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 252104a3605bSJonathan Marek 252204a3605bSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 252304a3605bSJonathan Marek 252404a3605bSJonathan Marek qcom,gmu = <&gmu>; 252504a3605bSJonathan Marek 2526ece28cb5SKonrad Dybcio status = "disabled"; 2527ece28cb5SKonrad Dybcio 252804a3605bSJonathan Marek zap-shader { 252904a3605bSJonathan Marek memory-region = <&gpu_mem>; 253004a3605bSJonathan Marek }; 253104a3605bSJonathan Marek 253204a3605bSJonathan Marek /* note: downstream checks gpu binning for 670 Mhz */ 253304a3605bSJonathan Marek gpu_opp_table: opp-table { 253404a3605bSJonathan Marek compatible = "operating-points-v2"; 253504a3605bSJonathan Marek 253604a3605bSJonathan Marek opp-670000000 { 253704a3605bSJonathan Marek opp-hz = /bits/ 64 <670000000>; 253804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 253904a3605bSJonathan Marek }; 254004a3605bSJonathan Marek 254104a3605bSJonathan Marek opp-587000000 { 254204a3605bSJonathan Marek opp-hz = /bits/ 64 <587000000>; 254304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 254404a3605bSJonathan Marek }; 254504a3605bSJonathan Marek 254604a3605bSJonathan Marek opp-525000000 { 254704a3605bSJonathan Marek opp-hz = /bits/ 64 <525000000>; 254804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 254904a3605bSJonathan Marek }; 255004a3605bSJonathan Marek 255104a3605bSJonathan Marek opp-490000000 { 255204a3605bSJonathan Marek opp-hz = /bits/ 64 <490000000>; 255304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 255404a3605bSJonathan Marek }; 255504a3605bSJonathan Marek 255604a3605bSJonathan Marek opp-441600000 { 255704a3605bSJonathan Marek opp-hz = /bits/ 64 <441600000>; 255804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>; 255904a3605bSJonathan Marek }; 256004a3605bSJonathan Marek 256104a3605bSJonathan Marek opp-400000000 { 256204a3605bSJonathan Marek opp-hz = /bits/ 64 <400000000>; 256304a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 256404a3605bSJonathan Marek }; 256504a3605bSJonathan Marek 256604a3605bSJonathan Marek opp-305000000 { 256704a3605bSJonathan Marek opp-hz = /bits/ 64 <305000000>; 256804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 256904a3605bSJonathan Marek }; 257004a3605bSJonathan Marek }; 257104a3605bSJonathan Marek }; 257204a3605bSJonathan Marek 257304a3605bSJonathan Marek gmu: gmu@3d6a000 { 257404a3605bSJonathan Marek compatible = "qcom,adreno-gmu-650.2", "qcom,adreno-gmu"; 257504a3605bSJonathan Marek 257604a3605bSJonathan Marek reg = <0 0x03d6a000 0 0x30000>, 257704a3605bSJonathan Marek <0 0x3de0000 0 0x10000>, 257804a3605bSJonathan Marek <0 0xb290000 0 0x10000>, 257904a3605bSJonathan Marek <0 0xb490000 0 0x10000>; 258004a3605bSJonathan Marek reg-names = "gmu", "rscc", "gmu_pdc", "gmu_pdc_seq"; 258104a3605bSJonathan Marek 258204a3605bSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 258304a3605bSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 258404a3605bSJonathan Marek interrupt-names = "hfi", "gmu"; 258504a3605bSJonathan Marek 25860e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 25870e6aa9dbSJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 25880e6aa9dbSJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 258904a3605bSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 259004a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 259104a3605bSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 259204a3605bSJonathan Marek 25930e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 25940e6aa9dbSJonathan Marek <&gpucc GPU_GX_GDSC>; 259504a3605bSJonathan Marek power-domain-names = "cx", "gx"; 259604a3605bSJonathan Marek 259704a3605bSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 259804a3605bSJonathan Marek 259904a3605bSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 260004a3605bSJonathan Marek 2601ece28cb5SKonrad Dybcio status = "disabled"; 2602ece28cb5SKonrad Dybcio 260304a3605bSJonathan Marek gmu_opp_table: opp-table { 260404a3605bSJonathan Marek compatible = "operating-points-v2"; 260504a3605bSJonathan Marek 260604a3605bSJonathan Marek opp-200000000 { 260704a3605bSJonathan Marek opp-hz = /bits/ 64 <200000000>; 260804a3605bSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 260904a3605bSJonathan Marek }; 261004a3605bSJonathan Marek }; 261104a3605bSJonathan Marek }; 261204a3605bSJonathan Marek 261304a3605bSJonathan Marek gpucc: clock-controller@3d90000 { 261404a3605bSJonathan Marek compatible = "qcom,sm8250-gpucc"; 261504a3605bSJonathan Marek reg = <0 0x03d90000 0 0x9000>; 261604a3605bSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 261704a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 261804a3605bSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 261904a3605bSJonathan Marek clock-names = "bi_tcxo", 262004a3605bSJonathan Marek "gcc_gpu_gpll0_clk_src", 262104a3605bSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 262204a3605bSJonathan Marek #clock-cells = <1>; 262304a3605bSJonathan Marek #reset-cells = <1>; 262404a3605bSJonathan Marek #power-domain-cells = <1>; 262504a3605bSJonathan Marek }; 262604a3605bSJonathan Marek 262704a3605bSJonathan Marek adreno_smmu: iommu@3da0000 { 2628*213d7368SEmma Anholt compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", "arm,mmu-500"; 262904a3605bSJonathan Marek reg = <0 0x03da0000 0 0x10000>; 263004a3605bSJonathan Marek #iommu-cells = <2>; 263104a3605bSJonathan Marek #global-interrupts = <2>; 263204a3605bSJonathan Marek interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>, 263304a3605bSJonathan Marek <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>, 263404a3605bSJonathan Marek <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>, 263504a3605bSJonathan Marek <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>, 263604a3605bSJonathan Marek <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>, 263704a3605bSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 263804a3605bSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 263904a3605bSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 264004a3605bSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 264104a3605bSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>; 26420e6aa9dbSJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 264304a3605bSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 264404a3605bSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 264504a3605bSJonathan Marek clock-names = "ahb", "bus", "iface"; 264604a3605bSJonathan Marek 26470e6aa9dbSJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 264804a3605bSJonathan Marek }; 264904a3605bSJonathan Marek 265023a89037SBjorn Andersson slpi: remoteproc@5c00000 { 265123a89037SBjorn Andersson compatible = "qcom,sm8250-slpi-pas"; 265223a89037SBjorn Andersson reg = <0 0x05c00000 0 0x4000>; 265323a89037SBjorn Andersson 265423a89037SBjorn Andersson interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 265523a89037SBjorn Andersson <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 265623a89037SBjorn Andersson <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 265723a89037SBjorn Andersson <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 265823a89037SBjorn Andersson <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 265923a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 266023a89037SBjorn Andersson "handover", "stop-ack"; 266123a89037SBjorn Andersson 266223a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 266323a89037SBjorn Andersson clock-names = "xo"; 266423a89037SBjorn Andersson 2665b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 266623a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 2667b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 266823a89037SBjorn Andersson 266923a89037SBjorn Andersson memory-region = <&slpi_mem>; 267023a89037SBjorn Andersson 2671b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 2672b74ee2d7SSibi Sankar 267323a89037SBjorn Andersson qcom,smem-states = <&smp2p_slpi_out 0>; 267423a89037SBjorn Andersson qcom,smem-state-names = "stop"; 267523a89037SBjorn Andersson 267623a89037SBjorn Andersson status = "disabled"; 267723a89037SBjorn Andersson 267823a89037SBjorn Andersson glink-edge { 267923a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 268023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 268123a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 268223a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_SLPI 268323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 268423a89037SBjorn Andersson 268525695808SJonathan Marek label = "slpi"; 268623a89037SBjorn Andersson qcom,remote-pid = <3>; 268725695808SJonathan Marek 268825695808SJonathan Marek fastrpc { 268925695808SJonathan Marek compatible = "qcom,fastrpc"; 269025695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 269125695808SJonathan Marek label = "sdsp"; 26928c8ce95bSJeya R qcom,non-secure-domain; 269325695808SJonathan Marek #address-cells = <1>; 269425695808SJonathan Marek #size-cells = <0>; 269525695808SJonathan Marek 269625695808SJonathan Marek compute-cb@1 { 269725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 269825695808SJonathan Marek reg = <1>; 269925695808SJonathan Marek iommus = <&apps_smmu 0x0541 0x0>; 270025695808SJonathan Marek }; 270125695808SJonathan Marek 270225695808SJonathan Marek compute-cb@2 { 270325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 270425695808SJonathan Marek reg = <2>; 270525695808SJonathan Marek iommus = <&apps_smmu 0x0542 0x0>; 270625695808SJonathan Marek }; 270725695808SJonathan Marek 270825695808SJonathan Marek compute-cb@3 { 270925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 271025695808SJonathan Marek reg = <3>; 271125695808SJonathan Marek iommus = <&apps_smmu 0x0543 0x0>; 271225695808SJonathan Marek /* note: shared-cb = <4> in downstream */ 271325695808SJonathan Marek }; 271425695808SJonathan Marek }; 271523a89037SBjorn Andersson }; 271623a89037SBjorn Andersson }; 271723a89037SBjorn Andersson 271823a89037SBjorn Andersson cdsp: remoteproc@8300000 { 271923a89037SBjorn Andersson compatible = "qcom,sm8250-cdsp-pas"; 272023a89037SBjorn Andersson reg = <0 0x08300000 0 0x10000>; 272123a89037SBjorn Andersson 272223a89037SBjorn Andersson interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 272323a89037SBjorn Andersson <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 272423a89037SBjorn Andersson <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 272523a89037SBjorn Andersson <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 272623a89037SBjorn Andersson <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 272723a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 272823a89037SBjorn Andersson "handover", "stop-ack"; 272923a89037SBjorn Andersson 273023a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 273123a89037SBjorn Andersson clock-names = "xo"; 273223a89037SBjorn Andersson 2733b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_CX>; 273423a89037SBjorn Andersson 273523a89037SBjorn Andersson memory-region = <&cdsp_mem>; 273623a89037SBjorn Andersson 2737b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 2738b74ee2d7SSibi Sankar 273923a89037SBjorn Andersson qcom,smem-states = <&smp2p_cdsp_out 0>; 274023a89037SBjorn Andersson qcom,smem-state-names = "stop"; 274123a89037SBjorn Andersson 274223a89037SBjorn Andersson status = "disabled"; 274323a89037SBjorn Andersson 274423a89037SBjorn Andersson glink-edge { 274523a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 274623a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 274723a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 274823a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_CDSP 274923a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 275023a89037SBjorn Andersson 275125695808SJonathan Marek label = "cdsp"; 275223a89037SBjorn Andersson qcom,remote-pid = <5>; 275325695808SJonathan Marek 275425695808SJonathan Marek fastrpc { 275525695808SJonathan Marek compatible = "qcom,fastrpc"; 275625695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 275725695808SJonathan Marek label = "cdsp"; 27588c8ce95bSJeya R qcom,non-secure-domain; 275925695808SJonathan Marek #address-cells = <1>; 276025695808SJonathan Marek #size-cells = <0>; 276125695808SJonathan Marek 276225695808SJonathan Marek compute-cb@1 { 276325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 276425695808SJonathan Marek reg = <1>; 276525695808SJonathan Marek iommus = <&apps_smmu 0x1001 0x0460>; 276625695808SJonathan Marek }; 276725695808SJonathan Marek 276825695808SJonathan Marek compute-cb@2 { 276925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 277025695808SJonathan Marek reg = <2>; 277125695808SJonathan Marek iommus = <&apps_smmu 0x1002 0x0460>; 277225695808SJonathan Marek }; 277325695808SJonathan Marek 277425695808SJonathan Marek compute-cb@3 { 277525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 277625695808SJonathan Marek reg = <3>; 277725695808SJonathan Marek iommus = <&apps_smmu 0x1003 0x0460>; 277825695808SJonathan Marek }; 277925695808SJonathan Marek 278025695808SJonathan Marek compute-cb@4 { 278125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 278225695808SJonathan Marek reg = <4>; 278325695808SJonathan Marek iommus = <&apps_smmu 0x1004 0x0460>; 278425695808SJonathan Marek }; 278525695808SJonathan Marek 278625695808SJonathan Marek compute-cb@5 { 278725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 278825695808SJonathan Marek reg = <5>; 278925695808SJonathan Marek iommus = <&apps_smmu 0x1005 0x0460>; 279025695808SJonathan Marek }; 279125695808SJonathan Marek 279225695808SJonathan Marek compute-cb@6 { 279325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 279425695808SJonathan Marek reg = <6>; 279525695808SJonathan Marek iommus = <&apps_smmu 0x1006 0x0460>; 279625695808SJonathan Marek }; 279725695808SJonathan Marek 279825695808SJonathan Marek compute-cb@7 { 279925695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 280025695808SJonathan Marek reg = <7>; 280125695808SJonathan Marek iommus = <&apps_smmu 0x1007 0x0460>; 280225695808SJonathan Marek }; 280325695808SJonathan Marek 280425695808SJonathan Marek compute-cb@8 { 280525695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 280625695808SJonathan Marek reg = <8>; 280725695808SJonathan Marek iommus = <&apps_smmu 0x1008 0x0460>; 280825695808SJonathan Marek }; 280925695808SJonathan Marek 281025695808SJonathan Marek /* note: secure cb9 in downstream */ 281125695808SJonathan Marek }; 281223a89037SBjorn Andersson }; 281323a89037SBjorn Andersson }; 281423a89037SBjorn Andersson 2815590a135eSSrinivas Kandagatla sound: sound { 2816590a135eSSrinivas Kandagatla }; 2817590a135eSSrinivas Kandagatla 281846a6f297SJonathan Marek usb_1_hsphy: phy@88e3000 { 281946a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 282046a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 282146a6f297SJonathan Marek reg = <0 0x088e3000 0 0x400>; 282246a6f297SJonathan Marek status = "disabled"; 282346a6f297SJonathan Marek #phy-cells = <0>; 282446a6f297SJonathan Marek 282546a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 282646a6f297SJonathan Marek clock-names = "ref"; 282746a6f297SJonathan Marek 282846a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 282946a6f297SJonathan Marek }; 283046a6f297SJonathan Marek 283146a6f297SJonathan Marek usb_2_hsphy: phy@88e4000 { 283246a6f297SJonathan Marek compatible = "qcom,sm8250-usb-hs-phy", 283346a6f297SJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 283446a6f297SJonathan Marek reg = <0 0x088e4000 0 0x400>; 283546a6f297SJonathan Marek status = "disabled"; 283646a6f297SJonathan Marek #phy-cells = <0>; 283746a6f297SJonathan Marek 283846a6f297SJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 283946a6f297SJonathan Marek clock-names = "ref"; 284046a6f297SJonathan Marek 284146a6f297SJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 284246a6f297SJonathan Marek }; 284346a6f297SJonathan Marek 284446a6f297SJonathan Marek usb_1_qmpphy: phy@88e9000 { 28455aa0d1beSDmitry Baryshkov compatible = "qcom,sm8250-qmp-usb3-dp-phy"; 284646a6f297SJonathan Marek reg = <0 0x088e9000 0 0x200>, 28475aa0d1beSDmitry Baryshkov <0 0x088e8000 0 0x40>, 28485aa0d1beSDmitry Baryshkov <0 0x088ea000 0 0x200>; 284946a6f297SJonathan Marek status = "disabled"; 285046a6f297SJonathan Marek #address-cells = <2>; 285146a6f297SJonathan Marek #size-cells = <2>; 285246a6f297SJonathan Marek ranges; 285346a6f297SJonathan Marek 285446a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 285546a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 285646a6f297SJonathan Marek <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 285746a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "com_aux"; 285846a6f297SJonathan Marek 285946a6f297SJonathan Marek resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 286046a6f297SJonathan Marek <&gcc GCC_USB3_PHY_PRIM_BCR>; 286146a6f297SJonathan Marek reset-names = "phy", "common"; 286246a6f297SJonathan Marek 28635aa0d1beSDmitry Baryshkov usb_1_ssphy: usb3-phy@88e9200 { 286446a6f297SJonathan Marek reg = <0 0x088e9200 0 0x200>, 286546a6f297SJonathan Marek <0 0x088e9400 0 0x200>, 286646a6f297SJonathan Marek <0 0x088e9c00 0 0x400>, 286746a6f297SJonathan Marek <0 0x088e9600 0 0x200>, 286846a6f297SJonathan Marek <0 0x088e9800 0 0x200>, 286946a6f297SJonathan Marek <0 0x088e9a00 0 0x100>; 28707178d4ccSJonathan Marek #clock-cells = <0>; 287146a6f297SJonathan Marek #phy-cells = <0>; 287246a6f297SJonathan Marek clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 287346a6f297SJonathan Marek clock-names = "pipe0"; 287446a6f297SJonathan Marek clock-output-names = "usb3_phy_pipe_clk_src"; 287546a6f297SJonathan Marek }; 28765aa0d1beSDmitry Baryshkov 28775aa0d1beSDmitry Baryshkov dp_phy: dp-phy@88ea200 { 28785aa0d1beSDmitry Baryshkov reg = <0 0x088ea200 0 0x200>, 28795aa0d1beSDmitry Baryshkov <0 0x088ea400 0 0x200>, 28805aa0d1beSDmitry Baryshkov <0 0x088eac00 0 0x400>, 28815aa0d1beSDmitry Baryshkov <0 0x088ea600 0 0x200>, 28825aa0d1beSDmitry Baryshkov <0 0x088ea800 0 0x200>, 28835aa0d1beSDmitry Baryshkov <0 0x088eaa00 0 0x100>; 28845aa0d1beSDmitry Baryshkov #phy-cells = <0>; 28855aa0d1beSDmitry Baryshkov #clock-cells = <1>; 28865aa0d1beSDmitry Baryshkov clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 28875aa0d1beSDmitry Baryshkov clock-names = "pipe0"; 28885aa0d1beSDmitry Baryshkov clock-output-names = "usb3_phy_pipe_clk_src"; 28895aa0d1beSDmitry Baryshkov }; 289046a6f297SJonathan Marek }; 289146a6f297SJonathan Marek 289246a6f297SJonathan Marek usb_2_qmpphy: phy@88eb000 { 289346a6f297SJonathan Marek compatible = "qcom,sm8250-qmp-usb3-uni-phy"; 289446a6f297SJonathan Marek reg = <0 0x088eb000 0 0x200>; 289546a6f297SJonathan Marek status = "disabled"; 289646a6f297SJonathan Marek #address-cells = <2>; 289746a6f297SJonathan Marek #size-cells = <2>; 289846a6f297SJonathan Marek ranges; 289946a6f297SJonathan Marek 290046a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 290146a6f297SJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 290246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>, 290346a6f297SJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 290446a6f297SJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 290546a6f297SJonathan Marek 290646a6f297SJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 290746a6f297SJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 290846a6f297SJonathan Marek reset-names = "phy", "common"; 290946a6f297SJonathan Marek 29101351512fSShawn Guo usb_2_ssphy: phy@88eb200 { 291146a6f297SJonathan Marek reg = <0 0x088eb200 0 0x200>, 291246a6f297SJonathan Marek <0 0x088eb400 0 0x200>, 291346a6f297SJonathan Marek <0 0x088eb800 0 0x800>; 29147178d4ccSJonathan Marek #clock-cells = <0>; 291546a6f297SJonathan Marek #phy-cells = <0>; 291646a6f297SJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 291746a6f297SJonathan Marek clock-names = "pipe0"; 291846a6f297SJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 291946a6f297SJonathan Marek }; 292046a6f297SJonathan Marek }; 292146a6f297SJonathan Marek 292296bb736fSBhupesh Sharma sdhc_2: mmc@8804000 { 2923c4cf0300SManivannan Sadhasivam compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 2924c4cf0300SManivannan Sadhasivam reg = <0 0x08804000 0 0x1000>; 2925c4cf0300SManivannan Sadhasivam 2926c4cf0300SManivannan Sadhasivam interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 2927c4cf0300SManivannan Sadhasivam <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 2928c4cf0300SManivannan Sadhasivam interrupt-names = "hc_irq", "pwr_irq"; 2929c4cf0300SManivannan Sadhasivam 2930c4cf0300SManivannan Sadhasivam clocks = <&gcc GCC_SDCC2_AHB_CLK>, 2931c4cf0300SManivannan Sadhasivam <&gcc GCC_SDCC2_APPS_CLK>, 293274097d80SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 2933c4cf0300SManivannan Sadhasivam clock-names = "iface", "core", "xo"; 2934c4cf0300SManivannan Sadhasivam iommus = <&apps_smmu 0x4a0 0x0>; 2935c4cf0300SManivannan Sadhasivam qcom,dll-config = <0x0007642c>; 2936c4cf0300SManivannan Sadhasivam qcom,ddr-config = <0x80040868>; 2937c4cf0300SManivannan Sadhasivam power-domains = <&rpmhpd SM8250_CX>; 2938c4cf0300SManivannan Sadhasivam operating-points-v2 = <&sdhc2_opp_table>; 2939c4cf0300SManivannan Sadhasivam 2940c4cf0300SManivannan Sadhasivam status = "disabled"; 2941c4cf0300SManivannan Sadhasivam 29420e3e6546SKrzysztof Kozlowski sdhc2_opp_table: opp-table { 2943c4cf0300SManivannan Sadhasivam compatible = "operating-points-v2"; 2944c4cf0300SManivannan Sadhasivam 2945c4cf0300SManivannan Sadhasivam opp-19200000 { 2946c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <19200000>; 2947c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_min_svs>; 2948c4cf0300SManivannan Sadhasivam }; 2949c4cf0300SManivannan Sadhasivam 2950c4cf0300SManivannan Sadhasivam opp-50000000 { 2951c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <50000000>; 2952c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_low_svs>; 2953c4cf0300SManivannan Sadhasivam }; 2954c4cf0300SManivannan Sadhasivam 2955c4cf0300SManivannan Sadhasivam opp-100000000 { 2956c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <100000000>; 2957c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs>; 2958c4cf0300SManivannan Sadhasivam }; 2959c4cf0300SManivannan Sadhasivam 2960c4cf0300SManivannan Sadhasivam opp-202000000 { 2961c4cf0300SManivannan Sadhasivam opp-hz = /bits/ 64 <202000000>; 2962c4cf0300SManivannan Sadhasivam required-opps = <&rpmhpd_opp_svs_l1>; 2963c4cf0300SManivannan Sadhasivam }; 2964c4cf0300SManivannan Sadhasivam }; 2965c4cf0300SManivannan Sadhasivam }; 2966c4cf0300SManivannan Sadhasivam 2967e7e41a20SJonathan Marek dc_noc: interconnect@90c0000 { 2968e7e41a20SJonathan Marek compatible = "qcom,sm8250-dc-noc"; 2969e7e41a20SJonathan Marek reg = <0 0x090c0000 0 0x4200>; 2970e7e41a20SJonathan Marek #interconnect-cells = <1>; 2971e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 2972e7e41a20SJonathan Marek }; 2973e7e41a20SJonathan Marek 2974e7e41a20SJonathan Marek gem_noc: interconnect@9100000 { 2975e7e41a20SJonathan Marek compatible = "qcom,sm8250-gem-noc"; 2976e7e41a20SJonathan Marek reg = <0 0x09100000 0 0xb4000>; 2977e7e41a20SJonathan Marek #interconnect-cells = <1>; 2978e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 2979e7e41a20SJonathan Marek }; 2980e7e41a20SJonathan Marek 2981e7e41a20SJonathan Marek npu_noc: interconnect@9990000 { 2982e7e41a20SJonathan Marek compatible = "qcom,sm8250-npu-noc"; 2983e7e41a20SJonathan Marek reg = <0 0x09990000 0 0x1600>; 2984e7e41a20SJonathan Marek #interconnect-cells = <1>; 2985e7e41a20SJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 2986e7e41a20SJonathan Marek }; 2987e7e41a20SJonathan Marek 298846a6f297SJonathan Marek usb_1: usb@a6f8800 { 298946a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 299046a6f297SJonathan Marek reg = <0 0x0a6f8800 0 0x400>; 299146a6f297SJonathan Marek status = "disabled"; 299246a6f297SJonathan Marek #address-cells = <2>; 299346a6f297SJonathan Marek #size-cells = <2>; 299446a6f297SJonathan Marek ranges; 299546a6f297SJonathan Marek dma-ranges; 299646a6f297SJonathan Marek 299746a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 299846a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>, 299946a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 300046a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 30018d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 300246a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 30038d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 30048d5fd4e4SKrzysztof Kozlowski "core", 30058d5fd4e4SKrzysztof Kozlowski "iface", 30068d5fd4e4SKrzysztof Kozlowski "sleep", 30078d5fd4e4SKrzysztof Kozlowski "mock_utmi", 30088d5fd4e4SKrzysztof Kozlowski "xo"; 300946a6f297SJonathan Marek 301046a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 301146a6f297SJonathan Marek <&gcc GCC_USB30_PRIM_MASTER_CLK>; 301246a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 301346a6f297SJonathan Marek 301446a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 301546a6f297SJonathan Marek <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 301646a6f297SJonathan Marek <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 301746a6f297SJonathan Marek <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 301846a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 301946a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 302046a6f297SJonathan Marek 302146a6f297SJonathan Marek power-domains = <&gcc USB30_PRIM_GDSC>; 302246a6f297SJonathan Marek 302346a6f297SJonathan Marek resets = <&gcc GCC_USB30_PRIM_BCR>; 302446a6f297SJonathan Marek 30252aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 302646a6f297SJonathan Marek compatible = "snps,dwc3"; 302746a6f297SJonathan Marek reg = <0 0x0a600000 0 0xcd00>; 302846a6f297SJonathan Marek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 302946a6f297SJonathan Marek iommus = <&apps_smmu 0x0 0x0>; 303046a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 303146a6f297SJonathan Marek snps,dis_enblslpm_quirk; 303246a6f297SJonathan Marek phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 303346a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 303446a6f297SJonathan Marek }; 303546a6f297SJonathan Marek }; 303646a6f297SJonathan Marek 30370085a33aSManivannan Sadhasivam system-cache-controller@9200000 { 30380085a33aSManivannan Sadhasivam compatible = "qcom,sm8250-llcc"; 30390085a33aSManivannan Sadhasivam reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 30400085a33aSManivannan Sadhasivam reg-names = "llcc_base", "llcc_broadcast_base"; 30410085a33aSManivannan Sadhasivam }; 30420085a33aSManivannan Sadhasivam 304346a6f297SJonathan Marek usb_2: usb@a8f8800 { 304446a6f297SJonathan Marek compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; 304546a6f297SJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 304646a6f297SJonathan Marek status = "disabled"; 304746a6f297SJonathan Marek #address-cells = <2>; 304846a6f297SJonathan Marek #size-cells = <2>; 304946a6f297SJonathan Marek ranges; 305046a6f297SJonathan Marek dma-ranges; 305146a6f297SJonathan Marek 305246a6f297SJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 305346a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 305446a6f297SJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 305546a6f297SJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 30568d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 305746a6f297SJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_EN>; 30588d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 30598d5fd4e4SKrzysztof Kozlowski "core", 30608d5fd4e4SKrzysztof Kozlowski "iface", 30618d5fd4e4SKrzysztof Kozlowski "sleep", 30628d5fd4e4SKrzysztof Kozlowski "mock_utmi", 30638d5fd4e4SKrzysztof Kozlowski "xo"; 306446a6f297SJonathan Marek 306546a6f297SJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 306646a6f297SJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 306746a6f297SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 306846a6f297SJonathan Marek 306946a6f297SJonathan Marek interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 307046a6f297SJonathan Marek <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 307146a6f297SJonathan Marek <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 307246a6f297SJonathan Marek <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 307346a6f297SJonathan Marek interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 307446a6f297SJonathan Marek "dm_hs_phy_irq", "ss_phy_irq"; 307546a6f297SJonathan Marek 307646a6f297SJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 307746a6f297SJonathan Marek 307846a6f297SJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 307946a6f297SJonathan Marek 30802aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 308146a6f297SJonathan Marek compatible = "snps,dwc3"; 308246a6f297SJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 308346a6f297SJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 308446a6f297SJonathan Marek iommus = <&apps_smmu 0x20 0>; 308546a6f297SJonathan Marek snps,dis_u2_susphy_quirk; 308646a6f297SJonathan Marek snps,dis_enblslpm_quirk; 308746a6f297SJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 308846a6f297SJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 308946a6f297SJonathan Marek }; 309046a6f297SJonathan Marek }; 309146a6f297SJonathan Marek 3092fa245b3fSBryan O'Donoghue venus: video-codec@aa00000 { 3093fa245b3fSBryan O'Donoghue compatible = "qcom,sm8250-venus"; 3094fa245b3fSBryan O'Donoghue reg = <0 0x0aa00000 0 0x100000>; 3095fa245b3fSBryan O'Donoghue interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 3096fa245b3fSBryan O'Donoghue power-domains = <&videocc MVS0C_GDSC>, 3097fa245b3fSBryan O'Donoghue <&videocc MVS0_GDSC>, 3098fa245b3fSBryan O'Donoghue <&rpmhpd SM8250_MX>; 3099fa245b3fSBryan O'Donoghue power-domain-names = "venus", "vcodec0", "mx"; 3100fa245b3fSBryan O'Donoghue operating-points-v2 = <&venus_opp_table>; 3101fa245b3fSBryan O'Donoghue 3102fa245b3fSBryan O'Donoghue clocks = <&gcc GCC_VIDEO_AXI0_CLK>, 3103fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK>, 3104fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0_CLK>; 3105fa245b3fSBryan O'Donoghue clock-names = "iface", "core", "vcodec0_core"; 3106fa245b3fSBryan O'Donoghue 3107fa245b3fSBryan O'Donoghue interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, 3108fa245b3fSBryan O'Donoghue <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>; 3109fa245b3fSBryan O'Donoghue interconnect-names = "cpu-cfg", "video-mem"; 3110fa245b3fSBryan O'Donoghue 3111fa245b3fSBryan O'Donoghue iommus = <&apps_smmu 0x2100 0x0400>; 3112fa245b3fSBryan O'Donoghue memory-region = <&video_mem>; 3113fa245b3fSBryan O'Donoghue 3114fa245b3fSBryan O'Donoghue resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, 3115fa245b3fSBryan O'Donoghue <&videocc VIDEO_CC_MVS0C_CLK_ARES>; 3116fa245b3fSBryan O'Donoghue reset-names = "bus", "core"; 3117fa245b3fSBryan O'Donoghue 3118ece28cb5SKonrad Dybcio status = "disabled"; 3119ece28cb5SKonrad Dybcio 3120fa245b3fSBryan O'Donoghue video-decoder { 3121fa245b3fSBryan O'Donoghue compatible = "venus-decoder"; 3122fa245b3fSBryan O'Donoghue }; 3123fa245b3fSBryan O'Donoghue 3124fa245b3fSBryan O'Donoghue video-encoder { 3125fa245b3fSBryan O'Donoghue compatible = "venus-encoder"; 3126fa245b3fSBryan O'Donoghue }; 3127fa245b3fSBryan O'Donoghue 31280e3e6546SKrzysztof Kozlowski venus_opp_table: opp-table { 3129fa245b3fSBryan O'Donoghue compatible = "operating-points-v2"; 3130fa245b3fSBryan O'Donoghue 3131fa245b3fSBryan O'Donoghue opp-720000000 { 3132fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <720000000>; 3133fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 3134fa245b3fSBryan O'Donoghue }; 3135fa245b3fSBryan O'Donoghue 3136fa245b3fSBryan O'Donoghue opp-1014000000 { 3137fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1014000000>; 3138fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs>; 3139fa245b3fSBryan O'Donoghue }; 3140fa245b3fSBryan O'Donoghue 3141fa245b3fSBryan O'Donoghue opp-1098000000 { 3142fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1098000000>; 3143fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_svs_l1>; 3144fa245b3fSBryan O'Donoghue }; 3145fa245b3fSBryan O'Donoghue 3146fa245b3fSBryan O'Donoghue opp-1332000000 { 3147fa245b3fSBryan O'Donoghue opp-hz = /bits/ 64 <1332000000>; 3148fa245b3fSBryan O'Donoghue required-opps = <&rpmhpd_opp_nom>; 3149fa245b3fSBryan O'Donoghue }; 3150fa245b3fSBryan O'Donoghue }; 3151fa245b3fSBryan O'Donoghue }; 3152fa245b3fSBryan O'Donoghue 31535b9ec225Sjonathan@marek.ca videocc: clock-controller@abf0000 { 31545b9ec225Sjonathan@marek.ca compatible = "qcom,sm8250-videocc"; 31555b9ec225Sjonathan@marek.ca reg = <0 0x0abf0000 0 0x10000>; 31565b9ec225Sjonathan@marek.ca clocks = <&gcc GCC_VIDEO_AHB_CLK>, 31575b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK>, 31585b9ec225Sjonathan@marek.ca <&rpmhcc RPMH_CXO_CLK_A>; 3159266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 3160266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 31615b9ec225Sjonathan@marek.ca clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; 31625b9ec225Sjonathan@marek.ca #clock-cells = <1>; 31635b9ec225Sjonathan@marek.ca #reset-cells = <1>; 31645b9ec225Sjonathan@marek.ca #power-domain-cells = <1>; 31655b9ec225Sjonathan@marek.ca }; 31665b9ec225Sjonathan@marek.ca 3167e7173009SBryan O'Donoghue cci0: cci@ac4f000 { 3168e7173009SBryan O'Donoghue compatible = "qcom,sm8250-cci"; 3169e7173009SBryan O'Donoghue #address-cells = <1>; 3170e7173009SBryan O'Donoghue #size-cells = <0>; 3171e7173009SBryan O'Donoghue 3172e7173009SBryan O'Donoghue reg = <0 0x0ac4f000 0 0x1000>; 3173e7173009SBryan O'Donoghue interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; 3174e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3175e7173009SBryan O'Donoghue 3176e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3177e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3178e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3179e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK>, 3180e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_0_CLK_SRC>; 3181e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3182e7173009SBryan O'Donoghue "slow_ahb_src", 3183e7173009SBryan O'Donoghue "cpas_ahb", 3184e7173009SBryan O'Donoghue "cci", 3185e7173009SBryan O'Donoghue "cci_src"; 3186e7173009SBryan O'Donoghue 3187e7173009SBryan O'Donoghue pinctrl-0 = <&cci0_default>; 3188e7173009SBryan O'Donoghue pinctrl-1 = <&cci0_sleep>; 3189e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3190e7173009SBryan O'Donoghue 3191e7173009SBryan O'Donoghue status = "disabled"; 3192e7173009SBryan O'Donoghue 3193e7173009SBryan O'Donoghue cci0_i2c0: i2c-bus@0 { 3194e7173009SBryan O'Donoghue reg = <0>; 3195e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3196e7173009SBryan O'Donoghue #address-cells = <1>; 3197e7173009SBryan O'Donoghue #size-cells = <0>; 3198e7173009SBryan O'Donoghue }; 3199e7173009SBryan O'Donoghue 3200e7173009SBryan O'Donoghue cci0_i2c1: i2c-bus@1 { 3201e7173009SBryan O'Donoghue reg = <1>; 3202e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3203e7173009SBryan O'Donoghue #address-cells = <1>; 3204e7173009SBryan O'Donoghue #size-cells = <0>; 3205e7173009SBryan O'Donoghue }; 3206e7173009SBryan O'Donoghue }; 3207e7173009SBryan O'Donoghue 3208e7173009SBryan O'Donoghue cci1: cci@ac50000 { 3209e7173009SBryan O'Donoghue compatible = "qcom,sm8250-cci"; 3210e7173009SBryan O'Donoghue #address-cells = <1>; 3211e7173009SBryan O'Donoghue #size-cells = <0>; 3212e7173009SBryan O'Donoghue 3213e7173009SBryan O'Donoghue reg = <0 0x0ac50000 0 0x1000>; 3214e7173009SBryan O'Donoghue interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>; 3215e7173009SBryan O'Donoghue power-domains = <&camcc TITAN_TOP_GDSC>; 3216e7173009SBryan O'Donoghue 3217e7173009SBryan O'Donoghue clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, 3218e7173009SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 3219e7173009SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 3220e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK>, 3221e7173009SBryan O'Donoghue <&camcc CAM_CC_CCI_1_CLK_SRC>; 3222e7173009SBryan O'Donoghue clock-names = "camnoc_axi", 3223e7173009SBryan O'Donoghue "slow_ahb_src", 3224e7173009SBryan O'Donoghue "cpas_ahb", 3225e7173009SBryan O'Donoghue "cci", 3226e7173009SBryan O'Donoghue "cci_src"; 3227e7173009SBryan O'Donoghue 3228e7173009SBryan O'Donoghue pinctrl-0 = <&cci1_default>; 3229e7173009SBryan O'Donoghue pinctrl-1 = <&cci1_sleep>; 3230e7173009SBryan O'Donoghue pinctrl-names = "default", "sleep"; 3231e7173009SBryan O'Donoghue 3232e7173009SBryan O'Donoghue status = "disabled"; 3233e7173009SBryan O'Donoghue 3234e7173009SBryan O'Donoghue cci1_i2c0: i2c-bus@0 { 3235e7173009SBryan O'Donoghue reg = <0>; 3236e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3237e7173009SBryan O'Donoghue #address-cells = <1>; 3238e7173009SBryan O'Donoghue #size-cells = <0>; 3239e7173009SBryan O'Donoghue }; 3240e7173009SBryan O'Donoghue 3241e7173009SBryan O'Donoghue cci1_i2c1: i2c-bus@1 { 3242e7173009SBryan O'Donoghue reg = <1>; 3243e7173009SBryan O'Donoghue clock-frequency = <1000000>; 3244e7173009SBryan O'Donoghue #address-cells = <1>; 3245e7173009SBryan O'Donoghue #size-cells = <0>; 3246e7173009SBryan O'Donoghue }; 3247e7173009SBryan O'Donoghue }; 3248e7173009SBryan O'Donoghue 324930325603SBryan O'Donoghue camss: camss@ac6a000 { 325030325603SBryan O'Donoghue compatible = "qcom,sm8250-camss"; 325130325603SBryan O'Donoghue status = "disabled"; 325230325603SBryan O'Donoghue 325330325603SBryan O'Donoghue reg = <0 0xac6a000 0 0x2000>, 325430325603SBryan O'Donoghue <0 0xac6c000 0 0x2000>, 325530325603SBryan O'Donoghue <0 0xac6e000 0 0x1000>, 325630325603SBryan O'Donoghue <0 0xac70000 0 0x1000>, 325730325603SBryan O'Donoghue <0 0xac72000 0 0x1000>, 325830325603SBryan O'Donoghue <0 0xac74000 0 0x1000>, 325930325603SBryan O'Donoghue <0 0xacb4000 0 0xd000>, 326030325603SBryan O'Donoghue <0 0xacc3000 0 0xd000>, 326130325603SBryan O'Donoghue <0 0xacd9000 0 0x2200>, 326230325603SBryan O'Donoghue <0 0xacdb200 0 0x2200>; 326330325603SBryan O'Donoghue reg-names = "csiphy0", 326430325603SBryan O'Donoghue "csiphy1", 326530325603SBryan O'Donoghue "csiphy2", 326630325603SBryan O'Donoghue "csiphy3", 326730325603SBryan O'Donoghue "csiphy4", 326830325603SBryan O'Donoghue "csiphy5", 326930325603SBryan O'Donoghue "vfe0", 327030325603SBryan O'Donoghue "vfe1", 327130325603SBryan O'Donoghue "vfe_lite0", 327230325603SBryan O'Donoghue "vfe_lite1"; 327330325603SBryan O'Donoghue 327430325603SBryan O'Donoghue interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 327530325603SBryan O'Donoghue <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, 327630325603SBryan O'Donoghue <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, 327730325603SBryan O'Donoghue <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 327830325603SBryan O'Donoghue <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 327930325603SBryan O'Donoghue <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 328030325603SBryan O'Donoghue <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 328130325603SBryan O'Donoghue <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 328230325603SBryan O'Donoghue <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 328330325603SBryan O'Donoghue <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 328430325603SBryan O'Donoghue <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 328530325603SBryan O'Donoghue <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 328630325603SBryan O'Donoghue <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 328730325603SBryan O'Donoghue <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 328830325603SBryan O'Donoghue interrupt-names = "csiphy0", 328930325603SBryan O'Donoghue "csiphy1", 329030325603SBryan O'Donoghue "csiphy2", 329130325603SBryan O'Donoghue "csiphy3", 329230325603SBryan O'Donoghue "csiphy4", 329330325603SBryan O'Donoghue "csiphy5", 329430325603SBryan O'Donoghue "csid0", 329530325603SBryan O'Donoghue "csid1", 329630325603SBryan O'Donoghue "csid2", 329730325603SBryan O'Donoghue "csid3", 329830325603SBryan O'Donoghue "vfe0", 329930325603SBryan O'Donoghue "vfe1", 330030325603SBryan O'Donoghue "vfe_lite0", 330130325603SBryan O'Donoghue "vfe_lite1"; 330230325603SBryan O'Donoghue 330330325603SBryan O'Donoghue power-domains = <&camcc IFE_0_GDSC>, 330430325603SBryan O'Donoghue <&camcc IFE_1_GDSC>, 330530325603SBryan O'Donoghue <&camcc TITAN_TOP_GDSC>; 330630325603SBryan O'Donoghue 330730325603SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 330830325603SBryan O'Donoghue <&gcc GCC_CAMERA_HF_AXI_CLK>, 330930325603SBryan O'Donoghue <&gcc GCC_CAMERA_SF_AXI_CLK>, 331030325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK>, 331130325603SBryan O'Donoghue <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>, 331230325603SBryan O'Donoghue <&camcc CAM_CC_CORE_AHB_CLK>, 331330325603SBryan O'Donoghue <&camcc CAM_CC_CPAS_AHB_CLK>, 331430325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY0_CLK>, 331530325603SBryan O'Donoghue <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 331630325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY1_CLK>, 331730325603SBryan O'Donoghue <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 331830325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY2_CLK>, 331930325603SBryan O'Donoghue <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 332030325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY3_CLK>, 332130325603SBryan O'Donoghue <&camcc CAM_CC_CSI3PHYTIMER_CLK>, 332230325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY4_CLK>, 332330325603SBryan O'Donoghue <&camcc CAM_CC_CSI4PHYTIMER_CLK>, 332430325603SBryan O'Donoghue <&camcc CAM_CC_CSIPHY5_CLK>, 332530325603SBryan O'Donoghue <&camcc CAM_CC_CSI5PHYTIMER_CLK>, 332630325603SBryan O'Donoghue <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, 332730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AHB_CLK>, 332830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AXI_CLK>, 332930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CLK>, 333030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, 333130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_CSID_CLK>, 333230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_0_AREG_CLK>, 333330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AHB_CLK>, 333430325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AXI_CLK>, 333530325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CLK>, 333630325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, 333730325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_CSID_CLK>, 333830325603SBryan O'Donoghue <&camcc CAM_CC_IFE_1_AREG_CLK>, 333930325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AHB_CLK>, 334030325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_AXI_CLK>, 334130325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CLK>, 334230325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 334330325603SBryan O'Donoghue <&camcc CAM_CC_IFE_LITE_CSID_CLK>; 334430325603SBryan O'Donoghue 334530325603SBryan O'Donoghue clock-names = "cam_ahb_clk", 334630325603SBryan O'Donoghue "cam_hf_axi", 334730325603SBryan O'Donoghue "cam_sf_axi", 334830325603SBryan O'Donoghue "camnoc_axi", 334930325603SBryan O'Donoghue "camnoc_axi_src", 335030325603SBryan O'Donoghue "core_ahb", 335130325603SBryan O'Donoghue "cpas_ahb", 335230325603SBryan O'Donoghue "csiphy0", 335330325603SBryan O'Donoghue "csiphy0_timer", 335430325603SBryan O'Donoghue "csiphy1", 335530325603SBryan O'Donoghue "csiphy1_timer", 335630325603SBryan O'Donoghue "csiphy2", 335730325603SBryan O'Donoghue "csiphy2_timer", 335830325603SBryan O'Donoghue "csiphy3", 335930325603SBryan O'Donoghue "csiphy3_timer", 336030325603SBryan O'Donoghue "csiphy4", 336130325603SBryan O'Donoghue "csiphy4_timer", 336230325603SBryan O'Donoghue "csiphy5", 336330325603SBryan O'Donoghue "csiphy5_timer", 336430325603SBryan O'Donoghue "slow_ahb_src", 336530325603SBryan O'Donoghue "vfe0_ahb", 336630325603SBryan O'Donoghue "vfe0_axi", 336730325603SBryan O'Donoghue "vfe0", 336830325603SBryan O'Donoghue "vfe0_cphy_rx", 336930325603SBryan O'Donoghue "vfe0_csid", 337030325603SBryan O'Donoghue "vfe0_areg", 337130325603SBryan O'Donoghue "vfe1_ahb", 337230325603SBryan O'Donoghue "vfe1_axi", 337330325603SBryan O'Donoghue "vfe1", 337430325603SBryan O'Donoghue "vfe1_cphy_rx", 337530325603SBryan O'Donoghue "vfe1_csid", 337630325603SBryan O'Donoghue "vfe1_areg", 337730325603SBryan O'Donoghue "vfe_lite_ahb", 337830325603SBryan O'Donoghue "vfe_lite_axi", 337930325603SBryan O'Donoghue "vfe_lite", 338030325603SBryan O'Donoghue "vfe_lite_cphy_rx", 338130325603SBryan O'Donoghue "vfe_lite_csid"; 338230325603SBryan O'Donoghue 338330325603SBryan O'Donoghue iommus = <&apps_smmu 0x800 0x400>, 338430325603SBryan O'Donoghue <&apps_smmu 0x801 0x400>, 338530325603SBryan O'Donoghue <&apps_smmu 0x840 0x400>, 338630325603SBryan O'Donoghue <&apps_smmu 0x841 0x400>, 338730325603SBryan O'Donoghue <&apps_smmu 0xc00 0x400>, 338830325603SBryan O'Donoghue <&apps_smmu 0xc01 0x400>, 338930325603SBryan O'Donoghue <&apps_smmu 0xc40 0x400>, 339030325603SBryan O'Donoghue <&apps_smmu 0xc41 0x400>; 339130325603SBryan O'Donoghue 339230325603SBryan O'Donoghue interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>, 339330325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>, 339430325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>, 339530325603SBryan O'Donoghue <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>; 339630325603SBryan O'Donoghue interconnect-names = "cam_ahb", 339730325603SBryan O'Donoghue "cam_hf_0_mnoc", 339830325603SBryan O'Donoghue "cam_sf_0_mnoc", 339930325603SBryan O'Donoghue "cam_sf_icp_mnoc"; 340030325603SBryan O'Donoghue }; 340130325603SBryan O'Donoghue 3402ca79a997SBryan O'Donoghue camcc: clock-controller@ad00000 { 3403ca79a997SBryan O'Donoghue compatible = "qcom,sm8250-camcc"; 3404ca79a997SBryan O'Donoghue reg = <0 0x0ad00000 0 0x10000>; 3405ca79a997SBryan O'Donoghue clocks = <&gcc GCC_CAMERA_AHB_CLK>, 3406ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK>, 3407ca79a997SBryan O'Donoghue <&rpmhcc RPMH_CXO_CLK_A>, 3408ca79a997SBryan O'Donoghue <&sleep_clk>; 3409ca79a997SBryan O'Donoghue clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 3410ca79a997SBryan O'Donoghue power-domains = <&rpmhpd SM8250_MMCX>; 3411ca79a997SBryan O'Donoghue required-opps = <&rpmhpd_opp_low_svs>; 34121b3bfc40SVladimir Zapolskiy status = "disabled"; 3413ca79a997SBryan O'Donoghue #clock-cells = <1>; 3414ca79a997SBryan O'Donoghue #reset-cells = <1>; 3415ca79a997SBryan O'Donoghue #power-domain-cells = <1>; 3416ca79a997SBryan O'Donoghue }; 3417ca79a997SBryan O'Donoghue 34187c1dffd4SDmitry Baryshkov mdss: mdss@ae00000 { 3419dc5d9125SJonathan Marek compatible = "qcom,sm8250-mdss"; 34207c1dffd4SDmitry Baryshkov reg = <0 0x0ae00000 0 0x1000>; 34217c1dffd4SDmitry Baryshkov reg-names = "mdss"; 34227c1dffd4SDmitry Baryshkov 3423888771a9SJonathan Marek interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, 34247c1dffd4SDmitry Baryshkov <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; 3425888771a9SJonathan Marek interconnect-names = "mdp0-mem", "mdp1-mem"; 34267c1dffd4SDmitry Baryshkov 34277c1dffd4SDmitry Baryshkov power-domains = <&dispcc MDSS_GDSC>; 34287c1dffd4SDmitry Baryshkov 34297c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 3430e091b836SAmit Pundir <&gcc GCC_DISP_HF_AXI_CLK>, 34317c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_SF_AXI_CLK>, 34327c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>; 3433e091b836SAmit Pundir clock-names = "iface", "bus", "nrt_bus", "core"; 34347c1dffd4SDmitry Baryshkov 34357c1dffd4SDmitry Baryshkov interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 34367c1dffd4SDmitry Baryshkov interrupt-controller; 34377c1dffd4SDmitry Baryshkov #interrupt-cells = <1>; 34387c1dffd4SDmitry Baryshkov 34397c1dffd4SDmitry Baryshkov iommus = <&apps_smmu 0x820 0x402>; 34407c1dffd4SDmitry Baryshkov 34417c1dffd4SDmitry Baryshkov status = "disabled"; 34427c1dffd4SDmitry Baryshkov 34437c1dffd4SDmitry Baryshkov #address-cells = <2>; 34447c1dffd4SDmitry Baryshkov #size-cells = <2>; 34457c1dffd4SDmitry Baryshkov ranges; 34467c1dffd4SDmitry Baryshkov 34477c1dffd4SDmitry Baryshkov mdss_mdp: mdp@ae01000 { 3448dc5d9125SJonathan Marek compatible = "qcom,sm8250-dpu"; 34497c1dffd4SDmitry Baryshkov reg = <0 0x0ae01000 0 0x8f000>, 34507c1dffd4SDmitry Baryshkov <0 0x0aeb0000 0 0x2008>; 34517c1dffd4SDmitry Baryshkov reg-names = "mdp", "vbif"; 34527c1dffd4SDmitry Baryshkov 34537c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 34547c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>, 34557c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_MDP_CLK>, 34567c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 34577c1dffd4SDmitry Baryshkov clock-names = "iface", "bus", "core", "vsync"; 34587c1dffd4SDmitry Baryshkov 34596edb3238SVinod Polimera assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 34606edb3238SVinod Polimera assigned-clock-rates = <19200000>; 34617c1dffd4SDmitry Baryshkov 34627c1dffd4SDmitry Baryshkov operating-points-v2 = <&mdp_opp_table>; 34637c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 34647c1dffd4SDmitry Baryshkov 34657c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 3466be633329SDmitry Baryshkov interrupts = <0>; 34677c1dffd4SDmitry Baryshkov 34687c1dffd4SDmitry Baryshkov ports { 34697c1dffd4SDmitry Baryshkov #address-cells = <1>; 34707c1dffd4SDmitry Baryshkov #size-cells = <0>; 34717c1dffd4SDmitry Baryshkov 34727c1dffd4SDmitry Baryshkov port@0 { 34737c1dffd4SDmitry Baryshkov reg = <0>; 34747c1dffd4SDmitry Baryshkov dpu_intf1_out: endpoint { 34757c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi0_in>; 34767c1dffd4SDmitry Baryshkov }; 34777c1dffd4SDmitry Baryshkov }; 34787c1dffd4SDmitry Baryshkov 34797c1dffd4SDmitry Baryshkov port@1 { 34807c1dffd4SDmitry Baryshkov reg = <1>; 34817c1dffd4SDmitry Baryshkov dpu_intf2_out: endpoint { 34827c1dffd4SDmitry Baryshkov remote-endpoint = <&dsi1_in>; 34837c1dffd4SDmitry Baryshkov }; 34847c1dffd4SDmitry Baryshkov }; 34857c1dffd4SDmitry Baryshkov }; 34867c1dffd4SDmitry Baryshkov 34870e3e6546SKrzysztof Kozlowski mdp_opp_table: opp-table { 34887c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 34897c1dffd4SDmitry Baryshkov 34907c1dffd4SDmitry Baryshkov opp-200000000 { 34917c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <200000000>; 34927c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 34937c1dffd4SDmitry Baryshkov }; 34947c1dffd4SDmitry Baryshkov 34957c1dffd4SDmitry Baryshkov opp-300000000 { 34967c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 34977c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 34987c1dffd4SDmitry Baryshkov }; 34997c1dffd4SDmitry Baryshkov 35007c1dffd4SDmitry Baryshkov opp-345000000 { 35017c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <345000000>; 35027c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 35037c1dffd4SDmitry Baryshkov }; 35047c1dffd4SDmitry Baryshkov 35057c1dffd4SDmitry Baryshkov opp-460000000 { 35067c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <460000000>; 35077c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_nom>; 35087c1dffd4SDmitry Baryshkov }; 35097c1dffd4SDmitry Baryshkov }; 35107c1dffd4SDmitry Baryshkov }; 35117c1dffd4SDmitry Baryshkov 35127c1dffd4SDmitry Baryshkov dsi0: dsi@ae94000 { 35137c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 35147c1dffd4SDmitry Baryshkov reg = <0 0x0ae94000 0 0x400>; 35157c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 35167c1dffd4SDmitry Baryshkov 35177c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 3518be633329SDmitry Baryshkov interrupts = <4>; 35197c1dffd4SDmitry Baryshkov 35207c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 35217c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 35227c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 35237c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC0_CLK>, 35247c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 35257c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 35267c1dffd4SDmitry Baryshkov clock-names = "byte", 35277c1dffd4SDmitry Baryshkov "byte_intf", 35287c1dffd4SDmitry Baryshkov "pixel", 35297c1dffd4SDmitry Baryshkov "core", 35307c1dffd4SDmitry Baryshkov "iface", 35317c1dffd4SDmitry Baryshkov "bus"; 35327c1dffd4SDmitry Baryshkov 353397ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 353497ec669dSDmitry Baryshkov assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; 353597ec669dSDmitry Baryshkov 35367c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 35377c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 35387c1dffd4SDmitry Baryshkov 35397c1dffd4SDmitry Baryshkov phys = <&dsi0_phy>; 35407c1dffd4SDmitry Baryshkov phy-names = "dsi"; 35417c1dffd4SDmitry Baryshkov 35427c1dffd4SDmitry Baryshkov status = "disabled"; 35437c1dffd4SDmitry Baryshkov 354440f7d36dSKonrad Dybcio #address-cells = <1>; 354540f7d36dSKonrad Dybcio #size-cells = <0>; 354640f7d36dSKonrad Dybcio 35477c1dffd4SDmitry Baryshkov ports { 35487c1dffd4SDmitry Baryshkov #address-cells = <1>; 35497c1dffd4SDmitry Baryshkov #size-cells = <0>; 35507c1dffd4SDmitry Baryshkov 35517c1dffd4SDmitry Baryshkov port@0 { 35527c1dffd4SDmitry Baryshkov reg = <0>; 35537c1dffd4SDmitry Baryshkov dsi0_in: endpoint { 35547c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf1_out>; 35557c1dffd4SDmitry Baryshkov }; 35567c1dffd4SDmitry Baryshkov }; 35577c1dffd4SDmitry Baryshkov 35587c1dffd4SDmitry Baryshkov port@1 { 35597c1dffd4SDmitry Baryshkov reg = <1>; 35607c1dffd4SDmitry Baryshkov dsi0_out: endpoint { 35617c1dffd4SDmitry Baryshkov }; 35627c1dffd4SDmitry Baryshkov }; 35637c1dffd4SDmitry Baryshkov }; 35647c1dffd4SDmitry Baryshkov }; 35657c1dffd4SDmitry Baryshkov 35667c1dffd4SDmitry Baryshkov dsi0_phy: dsi-phy@ae94400 { 35677c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 35687c1dffd4SDmitry Baryshkov reg = <0 0x0ae94400 0 0x200>, 35697c1dffd4SDmitry Baryshkov <0 0x0ae94600 0 0x280>, 35707c1dffd4SDmitry Baryshkov <0 0x0ae94900 0 0x260>; 35717c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 35727c1dffd4SDmitry Baryshkov "dsi_phy_lane", 35737c1dffd4SDmitry Baryshkov "dsi_pll"; 35747c1dffd4SDmitry Baryshkov 35757c1dffd4SDmitry Baryshkov #clock-cells = <1>; 35767c1dffd4SDmitry Baryshkov #phy-cells = <0>; 35777c1dffd4SDmitry Baryshkov 35787c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 35797c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 35807c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 35817c1dffd4SDmitry Baryshkov 35827c1dffd4SDmitry Baryshkov status = "disabled"; 35837c1dffd4SDmitry Baryshkov }; 35847c1dffd4SDmitry Baryshkov 35857c1dffd4SDmitry Baryshkov dsi1: dsi@ae96000 { 35867c1dffd4SDmitry Baryshkov compatible = "qcom,mdss-dsi-ctrl"; 35877c1dffd4SDmitry Baryshkov reg = <0 0x0ae96000 0 0x400>; 35887c1dffd4SDmitry Baryshkov reg-names = "dsi_ctrl"; 35897c1dffd4SDmitry Baryshkov 35907c1dffd4SDmitry Baryshkov interrupt-parent = <&mdss>; 3591be633329SDmitry Baryshkov interrupts = <5>; 35927c1dffd4SDmitry Baryshkov 35937c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, 35947c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, 35957c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_PCLK1_CLK>, 35967c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_ESC1_CLK>, 35977c1dffd4SDmitry Baryshkov <&dispcc DISP_CC_MDSS_AHB_CLK>, 35987c1dffd4SDmitry Baryshkov <&gcc GCC_DISP_HF_AXI_CLK>; 35997c1dffd4SDmitry Baryshkov clock-names = "byte", 36007c1dffd4SDmitry Baryshkov "byte_intf", 36017c1dffd4SDmitry Baryshkov "pixel", 36027c1dffd4SDmitry Baryshkov "core", 36037c1dffd4SDmitry Baryshkov "iface", 36047c1dffd4SDmitry Baryshkov "bus"; 36057c1dffd4SDmitry Baryshkov 360697ec669dSDmitry Baryshkov assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; 360797ec669dSDmitry Baryshkov assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; 360897ec669dSDmitry Baryshkov 36097c1dffd4SDmitry Baryshkov operating-points-v2 = <&dsi_opp_table>; 36107c1dffd4SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 36117c1dffd4SDmitry Baryshkov 36127c1dffd4SDmitry Baryshkov phys = <&dsi1_phy>; 36137c1dffd4SDmitry Baryshkov phy-names = "dsi"; 36147c1dffd4SDmitry Baryshkov 36157c1dffd4SDmitry Baryshkov status = "disabled"; 36167c1dffd4SDmitry Baryshkov 361740f7d36dSKonrad Dybcio #address-cells = <1>; 361840f7d36dSKonrad Dybcio #size-cells = <0>; 361940f7d36dSKonrad Dybcio 36207c1dffd4SDmitry Baryshkov ports { 36217c1dffd4SDmitry Baryshkov #address-cells = <1>; 36227c1dffd4SDmitry Baryshkov #size-cells = <0>; 36237c1dffd4SDmitry Baryshkov 36247c1dffd4SDmitry Baryshkov port@0 { 36257c1dffd4SDmitry Baryshkov reg = <0>; 36267c1dffd4SDmitry Baryshkov dsi1_in: endpoint { 36277c1dffd4SDmitry Baryshkov remote-endpoint = <&dpu_intf2_out>; 36287c1dffd4SDmitry Baryshkov }; 36297c1dffd4SDmitry Baryshkov }; 36307c1dffd4SDmitry Baryshkov 36317c1dffd4SDmitry Baryshkov port@1 { 36327c1dffd4SDmitry Baryshkov reg = <1>; 36337c1dffd4SDmitry Baryshkov dsi1_out: endpoint { 36347c1dffd4SDmitry Baryshkov }; 36357c1dffd4SDmitry Baryshkov }; 36367c1dffd4SDmitry Baryshkov }; 36377c1dffd4SDmitry Baryshkov }; 36387c1dffd4SDmitry Baryshkov 36397c1dffd4SDmitry Baryshkov dsi1_phy: dsi-phy@ae96400 { 36407c1dffd4SDmitry Baryshkov compatible = "qcom,dsi-phy-7nm"; 36417c1dffd4SDmitry Baryshkov reg = <0 0x0ae96400 0 0x200>, 36427c1dffd4SDmitry Baryshkov <0 0x0ae96600 0 0x280>, 36437c1dffd4SDmitry Baryshkov <0 0x0ae96900 0 0x260>; 36447c1dffd4SDmitry Baryshkov reg-names = "dsi_phy", 36457c1dffd4SDmitry Baryshkov "dsi_phy_lane", 36467c1dffd4SDmitry Baryshkov "dsi_pll"; 36477c1dffd4SDmitry Baryshkov 36487c1dffd4SDmitry Baryshkov #clock-cells = <1>; 36497c1dffd4SDmitry Baryshkov #phy-cells = <0>; 36507c1dffd4SDmitry Baryshkov 36517c1dffd4SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 36527c1dffd4SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 36537c1dffd4SDmitry Baryshkov clock-names = "iface", "ref"; 36547c1dffd4SDmitry Baryshkov 36557c1dffd4SDmitry Baryshkov status = "disabled"; 36567c1dffd4SDmitry Baryshkov 36570e3e6546SKrzysztof Kozlowski dsi_opp_table: opp-table { 36587c1dffd4SDmitry Baryshkov compatible = "operating-points-v2"; 36597c1dffd4SDmitry Baryshkov 36607c1dffd4SDmitry Baryshkov opp-187500000 { 36617c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <187500000>; 36627c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 36637c1dffd4SDmitry Baryshkov }; 36647c1dffd4SDmitry Baryshkov 36657c1dffd4SDmitry Baryshkov opp-300000000 { 36667c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <300000000>; 36677c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs>; 36687c1dffd4SDmitry Baryshkov }; 36697c1dffd4SDmitry Baryshkov 36707c1dffd4SDmitry Baryshkov opp-358000000 { 36717c1dffd4SDmitry Baryshkov opp-hz = /bits/ 64 <358000000>; 36727c1dffd4SDmitry Baryshkov required-opps = <&rpmhpd_opp_svs_l1>; 36737c1dffd4SDmitry Baryshkov }; 36747c1dffd4SDmitry Baryshkov }; 36757c1dffd4SDmitry Baryshkov }; 36767c1dffd4SDmitry Baryshkov }; 36777c1dffd4SDmitry Baryshkov 36787c1dffd4SDmitry Baryshkov dispcc: clock-controller@af00000 { 36797c1dffd4SDmitry Baryshkov compatible = "qcom,sm8250-dispcc"; 3680888771a9SJonathan Marek reg = <0 0x0af00000 0 0x10000>; 3681266e5cf3SDmitry Baryshkov power-domains = <&rpmhpd SM8250_MMCX>; 3682266e5cf3SDmitry Baryshkov required-opps = <&rpmhpd_opp_low_svs>; 36837c1dffd4SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 36847c1dffd4SDmitry Baryshkov <&dsi0_phy 0>, 36857c1dffd4SDmitry Baryshkov <&dsi0_phy 1>, 36867c1dffd4SDmitry Baryshkov <&dsi1_phy 0>, 36877c1dffd4SDmitry Baryshkov <&dsi1_phy 1>, 36889b315324SDmitry Baryshkov <&dp_phy 0>, 36899b315324SDmitry Baryshkov <&dp_phy 1>; 36907c1dffd4SDmitry Baryshkov clock-names = "bi_tcxo", 36917c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_byteclk", 36927c1dffd4SDmitry Baryshkov "dsi0_phy_pll_out_dsiclk", 36937c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_byteclk", 36947c1dffd4SDmitry Baryshkov "dsi1_phy_pll_out_dsiclk", 3695888771a9SJonathan Marek "dp_phy_pll_link_clk", 3696888771a9SJonathan Marek "dp_phy_pll_vco_div_clk"; 36977c1dffd4SDmitry Baryshkov #clock-cells = <1>; 36987c1dffd4SDmitry Baryshkov #reset-cells = <1>; 36997c1dffd4SDmitry Baryshkov #power-domain-cells = <1>; 37007c1dffd4SDmitry Baryshkov }; 37017c1dffd4SDmitry Baryshkov 370260378f1aSVenkata Narendra Kumar Gutta pdc: interrupt-controller@b220000 { 370324003196SBjorn Andersson compatible = "qcom,sm8250-pdc", "qcom,pdc"; 370424003196SBjorn Andersson reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 370560378f1aSVenkata Narendra Kumar Gutta qcom,pdc-ranges = <0 480 94>, <94 609 31>, 370660378f1aSVenkata Narendra Kumar Gutta <125 63 1>, <126 716 12>; 370760378f1aSVenkata Narendra Kumar Gutta #interrupt-cells = <2>; 370860378f1aSVenkata Narendra Kumar Gutta interrupt-parent = <&intc>; 370960378f1aSVenkata Narendra Kumar Gutta interrupt-controller; 371060378f1aSVenkata Narendra Kumar Gutta }; 371160378f1aSVenkata Narendra Kumar Gutta 3712bac12f25SAmit Kucheria tsens0: thermal-sensor@c263000 { 3713bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 3714bac12f25SAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 3715bac12f25SAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 3716bac12f25SAmit Kucheria #qcom,sensors = <16>; 3717bac12f25SAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 3718bac12f25SAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 3719bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 3720bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 3721bac12f25SAmit Kucheria }; 3722bac12f25SAmit Kucheria 3723bac12f25SAmit Kucheria tsens1: thermal-sensor@c265000 { 3724bac12f25SAmit Kucheria compatible = "qcom,sm8250-tsens", "qcom,tsens-v2"; 3725bac12f25SAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 3726bac12f25SAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 3727bac12f25SAmit Kucheria #qcom,sensors = <9>; 3728bac12f25SAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 3729bac12f25SAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 3730bac12f25SAmit Kucheria interrupt-names = "uplow", "critical"; 3731bac12f25SAmit Kucheria #thermal-sensor-cells = <1>; 3732bac12f25SAmit Kucheria }; 3733bac12f25SAmit Kucheria 373443f14a0bSSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 37356ba93ba9SKrzysztof Kozlowski compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp"; 373647cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 3737087d537aSBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_AOP 3738087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 3739087d537aSBjorn Andersson IRQ_TYPE_EDGE_RISING>; 3740087d537aSBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_AOP 3741087d537aSBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 3742087d537aSBjorn Andersson 3743087d537aSBjorn Andersson #clock-cells = <0>; 3744087d537aSBjorn Andersson }; 3745087d537aSBjorn Andersson 374647cb6a06SMaulik Shah sram@c3f0000 { 374747cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 374847cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 374960378f1aSVenkata Narendra Kumar Gutta }; 375060378f1aSVenkata Narendra Kumar Gutta 375160378f1aSVenkata Narendra Kumar Gutta spmi_bus: spmi@c440000 { 375260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,spmi-pmic-arb"; 375360378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x0c440000 0x0 0x0001100>, 375460378f1aSVenkata Narendra Kumar Gutta <0x0 0x0c600000 0x0 0x2000000>, 375516951b49SBjorn Andersson <0x0 0x0e600000 0x0 0x0100000>, 375616951b49SBjorn Andersson <0x0 0x0e700000 0x0 0x00a0000>, 375716951b49SBjorn Andersson <0x0 0x0c40a000 0x0 0x0026000>; 375816951b49SBjorn Andersson reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 375916951b49SBjorn Andersson interrupt-names = "periph_irq"; 376016951b49SBjorn Andersson interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 376116951b49SBjorn Andersson qcom,ee = <0>; 376216951b49SBjorn Andersson qcom,channel = <0>; 376316951b49SBjorn Andersson #address-cells = <2>; 376416951b49SBjorn Andersson #size-cells = <0>; 376516951b49SBjorn Andersson interrupt-controller; 376616951b49SBjorn Andersson #interrupt-cells = <4>; 376716951b49SBjorn Andersson }; 3768e5813b15SDmitry Baryshkov 3769e5813b15SDmitry Baryshkov tlmm: pinctrl@f100000 { 3770e5813b15SDmitry Baryshkov compatible = "qcom,sm8250-pinctrl"; 3771e5813b15SDmitry Baryshkov reg = <0 0x0f100000 0 0x300000>, 3772e5813b15SDmitry Baryshkov <0 0x0f500000 0 0x300000>, 3773e5813b15SDmitry Baryshkov <0 0x0f900000 0 0x300000>; 3774e5813b15SDmitry Baryshkov reg-names = "west", "south", "north"; 3775e5813b15SDmitry Baryshkov interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 3776e5813b15SDmitry Baryshkov gpio-controller; 3777e5813b15SDmitry Baryshkov #gpio-cells = <2>; 3778e5813b15SDmitry Baryshkov interrupt-controller; 3779e5813b15SDmitry Baryshkov #interrupt-cells = <2>; 3780e526cb03SShawn Guo gpio-ranges = <&tlmm 0 0 181>; 378116951b49SBjorn Andersson wakeup-parent = <&pdc>; 3782e5813b15SDmitry Baryshkov 3783e7173009SBryan O'Donoghue cci0_default: cci0-default { 3784e7173009SBryan O'Donoghue cci0_i2c0_default: cci0-i2c0-default { 3785e7173009SBryan O'Donoghue /* SDA, SCL */ 3786e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 3787e7173009SBryan O'Donoghue function = "cci_i2c"; 3788e7173009SBryan O'Donoghue 3789e7173009SBryan O'Donoghue bias-pull-up; 3790e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3791e7173009SBryan O'Donoghue }; 3792e7173009SBryan O'Donoghue 3793e7173009SBryan O'Donoghue cci0_i2c1_default: cci0-i2c1-default { 3794e7173009SBryan O'Donoghue /* SDA, SCL */ 3795e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 3796e7173009SBryan O'Donoghue function = "cci_i2c"; 3797e7173009SBryan O'Donoghue 3798e7173009SBryan O'Donoghue bias-pull-up; 3799e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3800e7173009SBryan O'Donoghue }; 3801e7173009SBryan O'Donoghue }; 3802e7173009SBryan O'Donoghue 3803e7173009SBryan O'Donoghue cci0_sleep: cci0-sleep { 3804e7173009SBryan O'Donoghue cci0_i2c0_sleep: cci0-i2c0-sleep { 3805e7173009SBryan O'Donoghue /* SDA, SCL */ 3806e7173009SBryan O'Donoghue pins = "gpio101", "gpio102"; 3807e7173009SBryan O'Donoghue function = "cci_i2c"; 3808e7173009SBryan O'Donoghue 3809e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3810e7173009SBryan O'Donoghue bias-pull-down; 3811e7173009SBryan O'Donoghue }; 3812e7173009SBryan O'Donoghue 3813e7173009SBryan O'Donoghue cci0_i2c1_sleep: cci0-i2c1-sleep { 3814e7173009SBryan O'Donoghue /* SDA, SCL */ 3815e7173009SBryan O'Donoghue pins = "gpio103", "gpio104"; 3816e7173009SBryan O'Donoghue function = "cci_i2c"; 3817e7173009SBryan O'Donoghue 3818e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3819e7173009SBryan O'Donoghue bias-pull-down; 3820e7173009SBryan O'Donoghue }; 3821e7173009SBryan O'Donoghue }; 3822e7173009SBryan O'Donoghue 3823e7173009SBryan O'Donoghue cci1_default: cci1-default { 3824e7173009SBryan O'Donoghue cci1_i2c0_default: cci1-i2c0-default { 3825e7173009SBryan O'Donoghue /* SDA, SCL */ 3826e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 3827e7173009SBryan O'Donoghue function = "cci_i2c"; 3828e7173009SBryan O'Donoghue 3829e7173009SBryan O'Donoghue bias-pull-up; 3830e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3831e7173009SBryan O'Donoghue }; 3832e7173009SBryan O'Donoghue 3833e7173009SBryan O'Donoghue cci1_i2c1_default: cci1-i2c1-default { 3834e7173009SBryan O'Donoghue /* SDA, SCL */ 3835e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 3836e7173009SBryan O'Donoghue function = "cci_i2c"; 3837e7173009SBryan O'Donoghue 3838e7173009SBryan O'Donoghue bias-pull-up; 3839e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3840e7173009SBryan O'Donoghue }; 3841e7173009SBryan O'Donoghue }; 3842e7173009SBryan O'Donoghue 3843e7173009SBryan O'Donoghue cci1_sleep: cci1-sleep { 3844e7173009SBryan O'Donoghue cci1_i2c0_sleep: cci1-i2c0-sleep { 3845e7173009SBryan O'Donoghue /* SDA, SCL */ 3846e7173009SBryan O'Donoghue pins = "gpio105","gpio106"; 3847e7173009SBryan O'Donoghue function = "cci_i2c"; 3848e7173009SBryan O'Donoghue 3849e7173009SBryan O'Donoghue bias-pull-down; 3850e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3851e7173009SBryan O'Donoghue }; 3852e7173009SBryan O'Donoghue 3853e7173009SBryan O'Donoghue cci1_i2c1_sleep: cci1-i2c1-sleep { 3854e7173009SBryan O'Donoghue /* SDA, SCL */ 3855e7173009SBryan O'Donoghue pins = "gpio107","gpio108"; 3856e7173009SBryan O'Donoghue function = "cci_i2c"; 3857e7173009SBryan O'Donoghue 3858e7173009SBryan O'Donoghue bias-pull-down; 3859e7173009SBryan O'Donoghue drive-strength = <2>; /* 2 mA */ 3860e7173009SBryan O'Donoghue }; 3861e7173009SBryan O'Donoghue }; 3862e7173009SBryan O'Donoghue 3863b657d372SSrinivas Kandagatla pri_mi2s_active: pri-mi2s-active { 3864b657d372SSrinivas Kandagatla sclk { 3865b657d372SSrinivas Kandagatla pins = "gpio138"; 3866b657d372SSrinivas Kandagatla function = "mi2s0_sck"; 3867b657d372SSrinivas Kandagatla drive-strength = <8>; 3868b657d372SSrinivas Kandagatla bias-disable; 3869b657d372SSrinivas Kandagatla }; 3870b657d372SSrinivas Kandagatla 3871b657d372SSrinivas Kandagatla ws { 3872b657d372SSrinivas Kandagatla pins = "gpio141"; 3873b657d372SSrinivas Kandagatla function = "mi2s0_ws"; 3874b657d372SSrinivas Kandagatla drive-strength = <8>; 3875b657d372SSrinivas Kandagatla output-high; 3876b657d372SSrinivas Kandagatla }; 3877b657d372SSrinivas Kandagatla 3878b657d372SSrinivas Kandagatla data0 { 3879b657d372SSrinivas Kandagatla pins = "gpio139"; 3880b657d372SSrinivas Kandagatla function = "mi2s0_data0"; 3881b657d372SSrinivas Kandagatla drive-strength = <8>; 3882b657d372SSrinivas Kandagatla bias-disable; 3883b657d372SSrinivas Kandagatla output-high; 3884b657d372SSrinivas Kandagatla }; 3885b657d372SSrinivas Kandagatla 3886b657d372SSrinivas Kandagatla data1 { 3887b657d372SSrinivas Kandagatla pins = "gpio140"; 3888b657d372SSrinivas Kandagatla function = "mi2s0_data1"; 3889b657d372SSrinivas Kandagatla drive-strength = <8>; 3890b657d372SSrinivas Kandagatla output-high; 3891b657d372SSrinivas Kandagatla }; 3892b657d372SSrinivas Kandagatla }; 3893b657d372SSrinivas Kandagatla 3894e5813b15SDmitry Baryshkov qup_i2c0_default: qup-i2c0-default { 3895e5813b15SDmitry Baryshkov mux { 3896e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 3897e5813b15SDmitry Baryshkov function = "qup0"; 3898e5813b15SDmitry Baryshkov }; 3899e5813b15SDmitry Baryshkov 3900e5813b15SDmitry Baryshkov config { 3901e5813b15SDmitry Baryshkov pins = "gpio28", "gpio29"; 3902e5813b15SDmitry Baryshkov drive-strength = <2>; 3903e5813b15SDmitry Baryshkov bias-disable; 3904e5813b15SDmitry Baryshkov }; 3905e5813b15SDmitry Baryshkov }; 3906e5813b15SDmitry Baryshkov 3907e5813b15SDmitry Baryshkov qup_i2c1_default: qup-i2c1-default { 3908e5813b15SDmitry Baryshkov pinmux { 3909e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 3910e5813b15SDmitry Baryshkov function = "qup1"; 3911e5813b15SDmitry Baryshkov }; 3912e5813b15SDmitry Baryshkov 3913e5813b15SDmitry Baryshkov config { 3914e5813b15SDmitry Baryshkov pins = "gpio4", "gpio5"; 3915e5813b15SDmitry Baryshkov drive-strength = <2>; 3916e5813b15SDmitry Baryshkov bias-disable; 3917e5813b15SDmitry Baryshkov }; 3918e5813b15SDmitry Baryshkov }; 3919e5813b15SDmitry Baryshkov 3920e5813b15SDmitry Baryshkov qup_i2c2_default: qup-i2c2-default { 3921e5813b15SDmitry Baryshkov mux { 3922e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 3923e5813b15SDmitry Baryshkov function = "qup2"; 3924e5813b15SDmitry Baryshkov }; 3925e5813b15SDmitry Baryshkov 3926e5813b15SDmitry Baryshkov config { 3927e5813b15SDmitry Baryshkov pins = "gpio115", "gpio116"; 3928e5813b15SDmitry Baryshkov drive-strength = <2>; 3929e5813b15SDmitry Baryshkov bias-disable; 3930e5813b15SDmitry Baryshkov }; 3931e5813b15SDmitry Baryshkov }; 3932e5813b15SDmitry Baryshkov 3933e5813b15SDmitry Baryshkov qup_i2c3_default: qup-i2c3-default { 3934e5813b15SDmitry Baryshkov mux { 3935e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 3936e5813b15SDmitry Baryshkov function = "qup3"; 3937e5813b15SDmitry Baryshkov }; 3938e5813b15SDmitry Baryshkov 3939e5813b15SDmitry Baryshkov config { 3940e5813b15SDmitry Baryshkov pins = "gpio119", "gpio120"; 3941e5813b15SDmitry Baryshkov drive-strength = <2>; 3942e5813b15SDmitry Baryshkov bias-disable; 3943e5813b15SDmitry Baryshkov }; 3944e5813b15SDmitry Baryshkov }; 3945e5813b15SDmitry Baryshkov 3946e5813b15SDmitry Baryshkov qup_i2c4_default: qup-i2c4-default { 3947e5813b15SDmitry Baryshkov mux { 3948e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 3949e5813b15SDmitry Baryshkov function = "qup4"; 3950e5813b15SDmitry Baryshkov }; 3951e5813b15SDmitry Baryshkov 3952e5813b15SDmitry Baryshkov config { 3953e5813b15SDmitry Baryshkov pins = "gpio8", "gpio9"; 3954e5813b15SDmitry Baryshkov drive-strength = <2>; 3955e5813b15SDmitry Baryshkov bias-disable; 3956e5813b15SDmitry Baryshkov }; 3957e5813b15SDmitry Baryshkov }; 3958e5813b15SDmitry Baryshkov 3959e5813b15SDmitry Baryshkov qup_i2c5_default: qup-i2c5-default { 3960e5813b15SDmitry Baryshkov mux { 3961e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 3962e5813b15SDmitry Baryshkov function = "qup5"; 3963e5813b15SDmitry Baryshkov }; 3964e5813b15SDmitry Baryshkov 3965e5813b15SDmitry Baryshkov config { 3966e5813b15SDmitry Baryshkov pins = "gpio12", "gpio13"; 3967e5813b15SDmitry Baryshkov drive-strength = <2>; 3968e5813b15SDmitry Baryshkov bias-disable; 3969e5813b15SDmitry Baryshkov }; 3970e5813b15SDmitry Baryshkov }; 3971e5813b15SDmitry Baryshkov 3972e5813b15SDmitry Baryshkov qup_i2c6_default: qup-i2c6-default { 3973e5813b15SDmitry Baryshkov mux { 3974e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 3975e5813b15SDmitry Baryshkov function = "qup6"; 3976e5813b15SDmitry Baryshkov }; 3977e5813b15SDmitry Baryshkov 3978e5813b15SDmitry Baryshkov config { 3979e5813b15SDmitry Baryshkov pins = "gpio16", "gpio17"; 3980e5813b15SDmitry Baryshkov drive-strength = <2>; 3981e5813b15SDmitry Baryshkov bias-disable; 3982e5813b15SDmitry Baryshkov }; 3983e5813b15SDmitry Baryshkov }; 3984e5813b15SDmitry Baryshkov 3985e5813b15SDmitry Baryshkov qup_i2c7_default: qup-i2c7-default { 3986e5813b15SDmitry Baryshkov mux { 3987e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 3988e5813b15SDmitry Baryshkov function = "qup7"; 3989e5813b15SDmitry Baryshkov }; 3990e5813b15SDmitry Baryshkov 3991e5813b15SDmitry Baryshkov config { 3992e5813b15SDmitry Baryshkov pins = "gpio20", "gpio21"; 3993e5813b15SDmitry Baryshkov drive-strength = <2>; 3994e5813b15SDmitry Baryshkov bias-disable; 3995e5813b15SDmitry Baryshkov }; 3996e5813b15SDmitry Baryshkov }; 3997e5813b15SDmitry Baryshkov 3998e5813b15SDmitry Baryshkov qup_i2c8_default: qup-i2c8-default { 3999e5813b15SDmitry Baryshkov mux { 4000e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 4001e5813b15SDmitry Baryshkov function = "qup8"; 4002e5813b15SDmitry Baryshkov }; 4003e5813b15SDmitry Baryshkov 4004e5813b15SDmitry Baryshkov config { 4005e5813b15SDmitry Baryshkov pins = "gpio24", "gpio25"; 4006e5813b15SDmitry Baryshkov drive-strength = <2>; 4007e5813b15SDmitry Baryshkov bias-disable; 4008e5813b15SDmitry Baryshkov }; 4009e5813b15SDmitry Baryshkov }; 4010e5813b15SDmitry Baryshkov 4011e5813b15SDmitry Baryshkov qup_i2c9_default: qup-i2c9-default { 4012e5813b15SDmitry Baryshkov mux { 4013e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 4014e5813b15SDmitry Baryshkov function = "qup9"; 4015e5813b15SDmitry Baryshkov }; 4016e5813b15SDmitry Baryshkov 4017e5813b15SDmitry Baryshkov config { 4018e5813b15SDmitry Baryshkov pins = "gpio125", "gpio126"; 4019e5813b15SDmitry Baryshkov drive-strength = <2>; 4020e5813b15SDmitry Baryshkov bias-disable; 4021e5813b15SDmitry Baryshkov }; 4022e5813b15SDmitry Baryshkov }; 4023e5813b15SDmitry Baryshkov 4024e5813b15SDmitry Baryshkov qup_i2c10_default: qup-i2c10-default { 4025e5813b15SDmitry Baryshkov mux { 4026e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 4027e5813b15SDmitry Baryshkov function = "qup10"; 4028e5813b15SDmitry Baryshkov }; 4029e5813b15SDmitry Baryshkov 4030e5813b15SDmitry Baryshkov config { 4031e5813b15SDmitry Baryshkov pins = "gpio129", "gpio130"; 4032e5813b15SDmitry Baryshkov drive-strength = <2>; 4033e5813b15SDmitry Baryshkov bias-disable; 4034e5813b15SDmitry Baryshkov }; 4035e5813b15SDmitry Baryshkov }; 4036e5813b15SDmitry Baryshkov 4037e5813b15SDmitry Baryshkov qup_i2c11_default: qup-i2c11-default { 4038e5813b15SDmitry Baryshkov mux { 4039e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 4040e5813b15SDmitry Baryshkov function = "qup11"; 4041e5813b15SDmitry Baryshkov }; 4042e5813b15SDmitry Baryshkov 4043e5813b15SDmitry Baryshkov config { 4044e5813b15SDmitry Baryshkov pins = "gpio60", "gpio61"; 4045e5813b15SDmitry Baryshkov drive-strength = <2>; 4046e5813b15SDmitry Baryshkov bias-disable; 4047e5813b15SDmitry Baryshkov }; 4048e5813b15SDmitry Baryshkov }; 4049e5813b15SDmitry Baryshkov 4050e5813b15SDmitry Baryshkov qup_i2c12_default: qup-i2c12-default { 4051e5813b15SDmitry Baryshkov mux { 4052e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 4053e5813b15SDmitry Baryshkov function = "qup12"; 4054e5813b15SDmitry Baryshkov }; 4055e5813b15SDmitry Baryshkov 4056e5813b15SDmitry Baryshkov config { 4057e5813b15SDmitry Baryshkov pins = "gpio32", "gpio33"; 4058e5813b15SDmitry Baryshkov drive-strength = <2>; 4059e5813b15SDmitry Baryshkov bias-disable; 4060e5813b15SDmitry Baryshkov }; 4061e5813b15SDmitry Baryshkov }; 4062e5813b15SDmitry Baryshkov 4063e5813b15SDmitry Baryshkov qup_i2c13_default: qup-i2c13-default { 4064e5813b15SDmitry Baryshkov mux { 4065e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 4066e5813b15SDmitry Baryshkov function = "qup13"; 4067e5813b15SDmitry Baryshkov }; 4068e5813b15SDmitry Baryshkov 4069e5813b15SDmitry Baryshkov config { 4070e5813b15SDmitry Baryshkov pins = "gpio36", "gpio37"; 4071e5813b15SDmitry Baryshkov drive-strength = <2>; 4072e5813b15SDmitry Baryshkov bias-disable; 4073e5813b15SDmitry Baryshkov }; 4074e5813b15SDmitry Baryshkov }; 4075e5813b15SDmitry Baryshkov 4076e5813b15SDmitry Baryshkov qup_i2c14_default: qup-i2c14-default { 4077e5813b15SDmitry Baryshkov mux { 4078e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 4079e5813b15SDmitry Baryshkov function = "qup14"; 4080e5813b15SDmitry Baryshkov }; 4081e5813b15SDmitry Baryshkov 4082e5813b15SDmitry Baryshkov config { 4083e5813b15SDmitry Baryshkov pins = "gpio40", "gpio41"; 4084e5813b15SDmitry Baryshkov drive-strength = <2>; 4085e5813b15SDmitry Baryshkov bias-disable; 4086e5813b15SDmitry Baryshkov }; 4087e5813b15SDmitry Baryshkov }; 4088e5813b15SDmitry Baryshkov 4089e5813b15SDmitry Baryshkov qup_i2c15_default: qup-i2c15-default { 4090e5813b15SDmitry Baryshkov mux { 4091e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 4092e5813b15SDmitry Baryshkov function = "qup15"; 4093e5813b15SDmitry Baryshkov }; 4094e5813b15SDmitry Baryshkov 4095e5813b15SDmitry Baryshkov config { 4096e5813b15SDmitry Baryshkov pins = "gpio44", "gpio45"; 4097e5813b15SDmitry Baryshkov drive-strength = <2>; 4098e5813b15SDmitry Baryshkov bias-disable; 4099e5813b15SDmitry Baryshkov }; 4100e5813b15SDmitry Baryshkov }; 4101e5813b15SDmitry Baryshkov 4102e5813b15SDmitry Baryshkov qup_i2c16_default: qup-i2c16-default { 4103e5813b15SDmitry Baryshkov mux { 4104e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 4105e5813b15SDmitry Baryshkov function = "qup16"; 4106e5813b15SDmitry Baryshkov }; 4107e5813b15SDmitry Baryshkov 4108e5813b15SDmitry Baryshkov config { 4109e5813b15SDmitry Baryshkov pins = "gpio48", "gpio49"; 4110e5813b15SDmitry Baryshkov drive-strength = <2>; 4111e5813b15SDmitry Baryshkov bias-disable; 4112e5813b15SDmitry Baryshkov }; 4113e5813b15SDmitry Baryshkov }; 4114e5813b15SDmitry Baryshkov 4115e5813b15SDmitry Baryshkov qup_i2c17_default: qup-i2c17-default { 4116e5813b15SDmitry Baryshkov mux { 4117e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 4118e5813b15SDmitry Baryshkov function = "qup17"; 4119e5813b15SDmitry Baryshkov }; 4120e5813b15SDmitry Baryshkov 4121e5813b15SDmitry Baryshkov config { 4122e5813b15SDmitry Baryshkov pins = "gpio52", "gpio53"; 4123e5813b15SDmitry Baryshkov drive-strength = <2>; 4124e5813b15SDmitry Baryshkov bias-disable; 4125e5813b15SDmitry Baryshkov }; 4126e5813b15SDmitry Baryshkov }; 4127e5813b15SDmitry Baryshkov 4128e5813b15SDmitry Baryshkov qup_i2c18_default: qup-i2c18-default { 4129e5813b15SDmitry Baryshkov mux { 4130e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 4131e5813b15SDmitry Baryshkov function = "qup18"; 4132e5813b15SDmitry Baryshkov }; 4133e5813b15SDmitry Baryshkov 4134e5813b15SDmitry Baryshkov config { 4135e5813b15SDmitry Baryshkov pins = "gpio56", "gpio57"; 4136e5813b15SDmitry Baryshkov drive-strength = <2>; 4137e5813b15SDmitry Baryshkov bias-disable; 4138e5813b15SDmitry Baryshkov }; 4139e5813b15SDmitry Baryshkov }; 4140e5813b15SDmitry Baryshkov 4141e5813b15SDmitry Baryshkov qup_i2c19_default: qup-i2c19-default { 4142e5813b15SDmitry Baryshkov mux { 4143e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 4144e5813b15SDmitry Baryshkov function = "qup19"; 4145e5813b15SDmitry Baryshkov }; 4146e5813b15SDmitry Baryshkov 4147e5813b15SDmitry Baryshkov config { 4148e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1"; 4149e5813b15SDmitry Baryshkov drive-strength = <2>; 4150e5813b15SDmitry Baryshkov bias-disable; 4151e5813b15SDmitry Baryshkov }; 4152e5813b15SDmitry Baryshkov }; 4153e5813b15SDmitry Baryshkov 4154c88f9eccSDmitry Baryshkov qup_spi0_cs: qup-spi0-cs { 4155c88f9eccSDmitry Baryshkov pins = "gpio31"; 4156e5813b15SDmitry Baryshkov function = "qup0"; 4157e5813b15SDmitry Baryshkov }; 4158e5813b15SDmitry Baryshkov 4159eb97ccbbSDmitry Baryshkov qup_spi0_cs_gpio: qup-spi0-cs-gpio { 4160eb97ccbbSDmitry Baryshkov pins = "gpio31"; 4161eb97ccbbSDmitry Baryshkov function = "gpio"; 4162eb97ccbbSDmitry Baryshkov }; 4163eb97ccbbSDmitry Baryshkov 4164c88f9eccSDmitry Baryshkov qup_spi0_data_clk: qup-spi0-data-clk { 4165c88f9eccSDmitry Baryshkov pins = "gpio28", "gpio29", 4166c88f9eccSDmitry Baryshkov "gpio30"; 4167c88f9eccSDmitry Baryshkov function = "qup0"; 4168c88f9eccSDmitry Baryshkov }; 4169c88f9eccSDmitry Baryshkov 4170c88f9eccSDmitry Baryshkov qup_spi1_cs: qup-spi1-cs { 4171c88f9eccSDmitry Baryshkov pins = "gpio7"; 4172e5813b15SDmitry Baryshkov function = "qup1"; 4173e5813b15SDmitry Baryshkov }; 4174e5813b15SDmitry Baryshkov 4175eb97ccbbSDmitry Baryshkov qup_spi1_cs_gpio: qup-spi1-cs-gpio { 4176eb97ccbbSDmitry Baryshkov pins = "gpio7"; 4177eb97ccbbSDmitry Baryshkov function = "gpio"; 4178eb97ccbbSDmitry Baryshkov }; 4179eb97ccbbSDmitry Baryshkov 4180c88f9eccSDmitry Baryshkov qup_spi1_data_clk: qup-spi1-data-clk { 4181c88f9eccSDmitry Baryshkov pins = "gpio4", "gpio5", 4182c88f9eccSDmitry Baryshkov "gpio6"; 4183c88f9eccSDmitry Baryshkov function = "qup1"; 4184c88f9eccSDmitry Baryshkov }; 4185c88f9eccSDmitry Baryshkov 4186c88f9eccSDmitry Baryshkov qup_spi2_cs: qup-spi2-cs { 4187c88f9eccSDmitry Baryshkov pins = "gpio118"; 4188e5813b15SDmitry Baryshkov function = "qup2"; 4189e5813b15SDmitry Baryshkov }; 4190e5813b15SDmitry Baryshkov 4191eb97ccbbSDmitry Baryshkov qup_spi2_cs_gpio: qup-spi2-cs-gpio { 4192eb97ccbbSDmitry Baryshkov pins = "gpio118"; 4193eb97ccbbSDmitry Baryshkov function = "gpio"; 4194eb97ccbbSDmitry Baryshkov }; 4195eb97ccbbSDmitry Baryshkov 4196c88f9eccSDmitry Baryshkov qup_spi2_data_clk: qup-spi2-data-clk { 4197c88f9eccSDmitry Baryshkov pins = "gpio115", "gpio116", 4198c88f9eccSDmitry Baryshkov "gpio117"; 4199c88f9eccSDmitry Baryshkov function = "qup2"; 4200c88f9eccSDmitry Baryshkov }; 4201c88f9eccSDmitry Baryshkov 4202c88f9eccSDmitry Baryshkov qup_spi3_cs: qup-spi3-cs { 4203c88f9eccSDmitry Baryshkov pins = "gpio122"; 4204e5813b15SDmitry Baryshkov function = "qup3"; 4205e5813b15SDmitry Baryshkov }; 4206e5813b15SDmitry Baryshkov 4207eb97ccbbSDmitry Baryshkov qup_spi3_cs_gpio: qup-spi3-cs-gpio { 4208eb97ccbbSDmitry Baryshkov pins = "gpio122"; 4209eb97ccbbSDmitry Baryshkov function = "gpio"; 4210eb97ccbbSDmitry Baryshkov }; 4211eb97ccbbSDmitry Baryshkov 4212c88f9eccSDmitry Baryshkov qup_spi3_data_clk: qup-spi3-data-clk { 4213c88f9eccSDmitry Baryshkov pins = "gpio119", "gpio120", 4214c88f9eccSDmitry Baryshkov "gpio121"; 4215c88f9eccSDmitry Baryshkov function = "qup3"; 4216c88f9eccSDmitry Baryshkov }; 4217c88f9eccSDmitry Baryshkov 4218c88f9eccSDmitry Baryshkov qup_spi4_cs: qup-spi4-cs { 4219c88f9eccSDmitry Baryshkov pins = "gpio11"; 4220e5813b15SDmitry Baryshkov function = "qup4"; 4221e5813b15SDmitry Baryshkov }; 4222e5813b15SDmitry Baryshkov 4223eb97ccbbSDmitry Baryshkov qup_spi4_cs_gpio: qup-spi4-cs-gpio { 4224eb97ccbbSDmitry Baryshkov pins = "gpio11"; 4225eb97ccbbSDmitry Baryshkov function = "gpio"; 4226eb97ccbbSDmitry Baryshkov }; 4227eb97ccbbSDmitry Baryshkov 4228c88f9eccSDmitry Baryshkov qup_spi4_data_clk: qup-spi4-data-clk { 4229c88f9eccSDmitry Baryshkov pins = "gpio8", "gpio9", 4230c88f9eccSDmitry Baryshkov "gpio10"; 4231c88f9eccSDmitry Baryshkov function = "qup4"; 4232c88f9eccSDmitry Baryshkov }; 4233c88f9eccSDmitry Baryshkov 4234c88f9eccSDmitry Baryshkov qup_spi5_cs: qup-spi5-cs { 4235c88f9eccSDmitry Baryshkov pins = "gpio15"; 4236e5813b15SDmitry Baryshkov function = "qup5"; 4237e5813b15SDmitry Baryshkov }; 4238e5813b15SDmitry Baryshkov 4239eb97ccbbSDmitry Baryshkov qup_spi5_cs_gpio: qup-spi5-cs-gpio { 4240eb97ccbbSDmitry Baryshkov pins = "gpio15"; 4241eb97ccbbSDmitry Baryshkov function = "gpio"; 4242eb97ccbbSDmitry Baryshkov }; 4243eb97ccbbSDmitry Baryshkov 4244c88f9eccSDmitry Baryshkov qup_spi5_data_clk: qup-spi5-data-clk { 4245c88f9eccSDmitry Baryshkov pins = "gpio12", "gpio13", 4246c88f9eccSDmitry Baryshkov "gpio14"; 4247c88f9eccSDmitry Baryshkov function = "qup5"; 4248c88f9eccSDmitry Baryshkov }; 4249c88f9eccSDmitry Baryshkov 4250c88f9eccSDmitry Baryshkov qup_spi6_cs: qup-spi6-cs { 4251c88f9eccSDmitry Baryshkov pins = "gpio19"; 4252e5813b15SDmitry Baryshkov function = "qup6"; 4253e5813b15SDmitry Baryshkov }; 4254e5813b15SDmitry Baryshkov 4255eb97ccbbSDmitry Baryshkov qup_spi6_cs_gpio: qup-spi6-cs-gpio { 4256eb97ccbbSDmitry Baryshkov pins = "gpio19"; 4257eb97ccbbSDmitry Baryshkov function = "gpio"; 4258eb97ccbbSDmitry Baryshkov }; 4259eb97ccbbSDmitry Baryshkov 4260c88f9eccSDmitry Baryshkov qup_spi6_data_clk: qup-spi6-data-clk { 4261c88f9eccSDmitry Baryshkov pins = "gpio16", "gpio17", 4262c88f9eccSDmitry Baryshkov "gpio18"; 4263c88f9eccSDmitry Baryshkov function = "qup6"; 4264c88f9eccSDmitry Baryshkov }; 4265c88f9eccSDmitry Baryshkov 4266c88f9eccSDmitry Baryshkov qup_spi7_cs: qup-spi7-cs { 4267c88f9eccSDmitry Baryshkov pins = "gpio23"; 4268e5813b15SDmitry Baryshkov function = "qup7"; 4269e5813b15SDmitry Baryshkov }; 4270e5813b15SDmitry Baryshkov 4271eb97ccbbSDmitry Baryshkov qup_spi7_cs_gpio: qup-spi7-cs-gpio { 4272eb97ccbbSDmitry Baryshkov pins = "gpio23"; 4273eb97ccbbSDmitry Baryshkov function = "gpio"; 4274eb97ccbbSDmitry Baryshkov }; 4275eb97ccbbSDmitry Baryshkov 4276c88f9eccSDmitry Baryshkov qup_spi7_data_clk: qup-spi7-data-clk { 4277c88f9eccSDmitry Baryshkov pins = "gpio20", "gpio21", 4278c88f9eccSDmitry Baryshkov "gpio22"; 4279c88f9eccSDmitry Baryshkov function = "qup7"; 4280c88f9eccSDmitry Baryshkov }; 4281c88f9eccSDmitry Baryshkov 4282c88f9eccSDmitry Baryshkov qup_spi8_cs: qup-spi8-cs { 4283c88f9eccSDmitry Baryshkov pins = "gpio27"; 4284e5813b15SDmitry Baryshkov function = "qup8"; 4285e5813b15SDmitry Baryshkov }; 4286e5813b15SDmitry Baryshkov 4287eb97ccbbSDmitry Baryshkov qup_spi8_cs_gpio: qup-spi8-cs-gpio { 4288eb97ccbbSDmitry Baryshkov pins = "gpio27"; 4289eb97ccbbSDmitry Baryshkov function = "gpio"; 4290eb97ccbbSDmitry Baryshkov }; 4291eb97ccbbSDmitry Baryshkov 4292c88f9eccSDmitry Baryshkov qup_spi8_data_clk: qup-spi8-data-clk { 4293c88f9eccSDmitry Baryshkov pins = "gpio24", "gpio25", 4294c88f9eccSDmitry Baryshkov "gpio26"; 4295c88f9eccSDmitry Baryshkov function = "qup8"; 4296c88f9eccSDmitry Baryshkov }; 4297c88f9eccSDmitry Baryshkov 4298c88f9eccSDmitry Baryshkov qup_spi9_cs: qup-spi9-cs { 4299c88f9eccSDmitry Baryshkov pins = "gpio128"; 4300e5813b15SDmitry Baryshkov function = "qup9"; 4301e5813b15SDmitry Baryshkov }; 4302e5813b15SDmitry Baryshkov 4303eb97ccbbSDmitry Baryshkov qup_spi9_cs_gpio: qup-spi9-cs-gpio { 4304eb97ccbbSDmitry Baryshkov pins = "gpio128"; 4305eb97ccbbSDmitry Baryshkov function = "gpio"; 4306eb97ccbbSDmitry Baryshkov }; 4307eb97ccbbSDmitry Baryshkov 4308c88f9eccSDmitry Baryshkov qup_spi9_data_clk: qup-spi9-data-clk { 4309c88f9eccSDmitry Baryshkov pins = "gpio125", "gpio126", 4310c88f9eccSDmitry Baryshkov "gpio127"; 4311c88f9eccSDmitry Baryshkov function = "qup9"; 4312c88f9eccSDmitry Baryshkov }; 4313c88f9eccSDmitry Baryshkov 4314c88f9eccSDmitry Baryshkov qup_spi10_cs: qup-spi10-cs { 4315c88f9eccSDmitry Baryshkov pins = "gpio132"; 4316e5813b15SDmitry Baryshkov function = "qup10"; 4317e5813b15SDmitry Baryshkov }; 4318e5813b15SDmitry Baryshkov 4319eb97ccbbSDmitry Baryshkov qup_spi10_cs_gpio: qup-spi10-cs-gpio { 4320eb97ccbbSDmitry Baryshkov pins = "gpio132"; 4321eb97ccbbSDmitry Baryshkov function = "gpio"; 4322eb97ccbbSDmitry Baryshkov }; 4323eb97ccbbSDmitry Baryshkov 4324c88f9eccSDmitry Baryshkov qup_spi10_data_clk: qup-spi10-data-clk { 4325c88f9eccSDmitry Baryshkov pins = "gpio129", "gpio130", 4326c88f9eccSDmitry Baryshkov "gpio131"; 4327c88f9eccSDmitry Baryshkov function = "qup10"; 4328c88f9eccSDmitry Baryshkov }; 4329c88f9eccSDmitry Baryshkov 4330c88f9eccSDmitry Baryshkov qup_spi11_cs: qup-spi11-cs { 4331c88f9eccSDmitry Baryshkov pins = "gpio63"; 4332e5813b15SDmitry Baryshkov function = "qup11"; 4333e5813b15SDmitry Baryshkov }; 4334e5813b15SDmitry Baryshkov 4335eb97ccbbSDmitry Baryshkov qup_spi11_cs_gpio: qup-spi11-cs-gpio { 4336eb97ccbbSDmitry Baryshkov pins = "gpio63"; 4337eb97ccbbSDmitry Baryshkov function = "gpio"; 4338eb97ccbbSDmitry Baryshkov }; 4339eb97ccbbSDmitry Baryshkov 4340c88f9eccSDmitry Baryshkov qup_spi11_data_clk: qup-spi11-data-clk { 4341c88f9eccSDmitry Baryshkov pins = "gpio60", "gpio61", 4342c88f9eccSDmitry Baryshkov "gpio62"; 4343c88f9eccSDmitry Baryshkov function = "qup11"; 4344c88f9eccSDmitry Baryshkov }; 4345c88f9eccSDmitry Baryshkov 4346c88f9eccSDmitry Baryshkov qup_spi12_cs: qup-spi12-cs { 4347c88f9eccSDmitry Baryshkov pins = "gpio35"; 4348e5813b15SDmitry Baryshkov function = "qup12"; 4349e5813b15SDmitry Baryshkov }; 4350e5813b15SDmitry Baryshkov 4351eb97ccbbSDmitry Baryshkov qup_spi12_cs_gpio: qup-spi12-cs-gpio { 4352eb97ccbbSDmitry Baryshkov pins = "gpio35"; 4353eb97ccbbSDmitry Baryshkov function = "gpio"; 4354eb97ccbbSDmitry Baryshkov }; 4355eb97ccbbSDmitry Baryshkov 4356c88f9eccSDmitry Baryshkov qup_spi12_data_clk: qup-spi12-data-clk { 4357c88f9eccSDmitry Baryshkov pins = "gpio32", "gpio33", 4358c88f9eccSDmitry Baryshkov "gpio34"; 4359c88f9eccSDmitry Baryshkov function = "qup12"; 4360c88f9eccSDmitry Baryshkov }; 4361c88f9eccSDmitry Baryshkov 4362c88f9eccSDmitry Baryshkov qup_spi13_cs: qup-spi13-cs { 4363c88f9eccSDmitry Baryshkov pins = "gpio39"; 4364e5813b15SDmitry Baryshkov function = "qup13"; 4365e5813b15SDmitry Baryshkov }; 4366e5813b15SDmitry Baryshkov 4367eb97ccbbSDmitry Baryshkov qup_spi13_cs_gpio: qup-spi13-cs-gpio { 4368eb97ccbbSDmitry Baryshkov pins = "gpio39"; 4369eb97ccbbSDmitry Baryshkov function = "gpio"; 4370eb97ccbbSDmitry Baryshkov }; 4371eb97ccbbSDmitry Baryshkov 4372c88f9eccSDmitry Baryshkov qup_spi13_data_clk: qup-spi13-data-clk { 4373c88f9eccSDmitry Baryshkov pins = "gpio36", "gpio37", 4374c88f9eccSDmitry Baryshkov "gpio38"; 4375c88f9eccSDmitry Baryshkov function = "qup13"; 4376c88f9eccSDmitry Baryshkov }; 4377c88f9eccSDmitry Baryshkov 4378c88f9eccSDmitry Baryshkov qup_spi14_cs: qup-spi14-cs { 4379c88f9eccSDmitry Baryshkov pins = "gpio43"; 4380e5813b15SDmitry Baryshkov function = "qup14"; 4381e5813b15SDmitry Baryshkov }; 4382e5813b15SDmitry Baryshkov 4383eb97ccbbSDmitry Baryshkov qup_spi14_cs_gpio: qup-spi14-cs-gpio { 4384eb97ccbbSDmitry Baryshkov pins = "gpio43"; 4385eb97ccbbSDmitry Baryshkov function = "gpio"; 4386eb97ccbbSDmitry Baryshkov }; 4387eb97ccbbSDmitry Baryshkov 4388c88f9eccSDmitry Baryshkov qup_spi14_data_clk: qup-spi14-data-clk { 4389c88f9eccSDmitry Baryshkov pins = "gpio40", "gpio41", 4390c88f9eccSDmitry Baryshkov "gpio42"; 4391c88f9eccSDmitry Baryshkov function = "qup14"; 4392c88f9eccSDmitry Baryshkov }; 4393c88f9eccSDmitry Baryshkov 4394c88f9eccSDmitry Baryshkov qup_spi15_cs: qup-spi15-cs { 4395c88f9eccSDmitry Baryshkov pins = "gpio47"; 4396e5813b15SDmitry Baryshkov function = "qup15"; 4397e5813b15SDmitry Baryshkov }; 4398e5813b15SDmitry Baryshkov 4399eb97ccbbSDmitry Baryshkov qup_spi15_cs_gpio: qup-spi15-cs-gpio { 4400eb97ccbbSDmitry Baryshkov pins = "gpio47"; 4401eb97ccbbSDmitry Baryshkov function = "gpio"; 4402eb97ccbbSDmitry Baryshkov }; 4403eb97ccbbSDmitry Baryshkov 4404c88f9eccSDmitry Baryshkov qup_spi15_data_clk: qup-spi15-data-clk { 4405c88f9eccSDmitry Baryshkov pins = "gpio44", "gpio45", 4406c88f9eccSDmitry Baryshkov "gpio46"; 4407c88f9eccSDmitry Baryshkov function = "qup15"; 4408c88f9eccSDmitry Baryshkov }; 4409c88f9eccSDmitry Baryshkov 4410c88f9eccSDmitry Baryshkov qup_spi16_cs: qup-spi16-cs { 4411c88f9eccSDmitry Baryshkov pins = "gpio51"; 4412e5813b15SDmitry Baryshkov function = "qup16"; 4413e5813b15SDmitry Baryshkov }; 4414e5813b15SDmitry Baryshkov 4415eb97ccbbSDmitry Baryshkov qup_spi16_cs_gpio: qup-spi16-cs-gpio { 4416eb97ccbbSDmitry Baryshkov pins = "gpio51"; 4417eb97ccbbSDmitry Baryshkov function = "gpio"; 4418eb97ccbbSDmitry Baryshkov }; 4419eb97ccbbSDmitry Baryshkov 4420c88f9eccSDmitry Baryshkov qup_spi16_data_clk: qup-spi16-data-clk { 4421c88f9eccSDmitry Baryshkov pins = "gpio48", "gpio49", 4422c88f9eccSDmitry Baryshkov "gpio50"; 4423c88f9eccSDmitry Baryshkov function = "qup16"; 4424c88f9eccSDmitry Baryshkov }; 4425c88f9eccSDmitry Baryshkov 4426c88f9eccSDmitry Baryshkov qup_spi17_cs: qup-spi17-cs { 4427c88f9eccSDmitry Baryshkov pins = "gpio55"; 4428e5813b15SDmitry Baryshkov function = "qup17"; 4429e5813b15SDmitry Baryshkov }; 4430e5813b15SDmitry Baryshkov 4431eb97ccbbSDmitry Baryshkov qup_spi17_cs_gpio: qup-spi17-cs-gpio { 4432eb97ccbbSDmitry Baryshkov pins = "gpio55"; 4433eb97ccbbSDmitry Baryshkov function = "gpio"; 4434eb97ccbbSDmitry Baryshkov }; 4435eb97ccbbSDmitry Baryshkov 4436c88f9eccSDmitry Baryshkov qup_spi17_data_clk: qup-spi17-data-clk { 4437c88f9eccSDmitry Baryshkov pins = "gpio52", "gpio53", 4438c88f9eccSDmitry Baryshkov "gpio54"; 4439c88f9eccSDmitry Baryshkov function = "qup17"; 4440c88f9eccSDmitry Baryshkov }; 4441c88f9eccSDmitry Baryshkov 4442c88f9eccSDmitry Baryshkov qup_spi18_cs: qup-spi18-cs { 4443c88f9eccSDmitry Baryshkov pins = "gpio59"; 4444e5813b15SDmitry Baryshkov function = "qup18"; 4445e5813b15SDmitry Baryshkov }; 4446e5813b15SDmitry Baryshkov 4447eb97ccbbSDmitry Baryshkov qup_spi18_cs_gpio: qup-spi18-cs-gpio { 4448eb97ccbbSDmitry Baryshkov pins = "gpio59"; 4449eb97ccbbSDmitry Baryshkov function = "gpio"; 4450eb97ccbbSDmitry Baryshkov }; 4451eb97ccbbSDmitry Baryshkov 4452c88f9eccSDmitry Baryshkov qup_spi18_data_clk: qup-spi18-data-clk { 4453c88f9eccSDmitry Baryshkov pins = "gpio56", "gpio57", 4454c88f9eccSDmitry Baryshkov "gpio58"; 4455c88f9eccSDmitry Baryshkov function = "qup18"; 4456c88f9eccSDmitry Baryshkov }; 4457c88f9eccSDmitry Baryshkov 4458c88f9eccSDmitry Baryshkov qup_spi19_cs: qup-spi19-cs { 4459c88f9eccSDmitry Baryshkov pins = "gpio3"; 4460c88f9eccSDmitry Baryshkov function = "qup19"; 4461c88f9eccSDmitry Baryshkov }; 4462c88f9eccSDmitry Baryshkov 4463eb97ccbbSDmitry Baryshkov qup_spi19_cs_gpio: qup-spi19-cs-gpio { 4464eb97ccbbSDmitry Baryshkov pins = "gpio3"; 4465eb97ccbbSDmitry Baryshkov function = "gpio"; 4466eb97ccbbSDmitry Baryshkov }; 4467eb97ccbbSDmitry Baryshkov 4468c88f9eccSDmitry Baryshkov qup_spi19_data_clk: qup-spi19-data-clk { 4469e5813b15SDmitry Baryshkov pins = "gpio0", "gpio1", 4470c88f9eccSDmitry Baryshkov "gpio2"; 4471e5813b15SDmitry Baryshkov function = "qup19"; 4472e5813b15SDmitry Baryshkov }; 4473e5813b15SDmitry Baryshkov 447408a9ae2dSDmitry Baryshkov qup_uart2_default: qup-uart2-default { 447508a9ae2dSDmitry Baryshkov mux { 447608a9ae2dSDmitry Baryshkov pins = "gpio117", "gpio118"; 447708a9ae2dSDmitry Baryshkov function = "qup2"; 447808a9ae2dSDmitry Baryshkov }; 447908a9ae2dSDmitry Baryshkov }; 448008a9ae2dSDmitry Baryshkov 448108a9ae2dSDmitry Baryshkov qup_uart6_default: qup-uart6-default { 448208a9ae2dSDmitry Baryshkov mux { 448308a9ae2dSDmitry Baryshkov pins = "gpio16", "gpio17", 448408a9ae2dSDmitry Baryshkov "gpio18", "gpio19"; 448508a9ae2dSDmitry Baryshkov function = "qup6"; 448608a9ae2dSDmitry Baryshkov }; 448708a9ae2dSDmitry Baryshkov }; 448808a9ae2dSDmitry Baryshkov 4489bb1dfb4dSManivannan Sadhasivam qup_uart12_default: qup-uart12-default { 4490bb1dfb4dSManivannan Sadhasivam mux { 4491bb1dfb4dSManivannan Sadhasivam pins = "gpio34", "gpio35"; 4492bb1dfb4dSManivannan Sadhasivam function = "qup12"; 4493bb1dfb4dSManivannan Sadhasivam }; 4494bb1dfb4dSManivannan Sadhasivam }; 449508a9ae2dSDmitry Baryshkov 449608a9ae2dSDmitry Baryshkov qup_uart17_default: qup-uart17-default { 449708a9ae2dSDmitry Baryshkov mux { 449808a9ae2dSDmitry Baryshkov pins = "gpio52", "gpio53", 449908a9ae2dSDmitry Baryshkov "gpio54", "gpio55"; 450008a9ae2dSDmitry Baryshkov function = "qup17"; 450108a9ae2dSDmitry Baryshkov }; 450208a9ae2dSDmitry Baryshkov }; 450308a9ae2dSDmitry Baryshkov 450408a9ae2dSDmitry Baryshkov qup_uart18_default: qup-uart18-default { 450508a9ae2dSDmitry Baryshkov mux { 450608a9ae2dSDmitry Baryshkov pins = "gpio58", "gpio59"; 450708a9ae2dSDmitry Baryshkov function = "qup18"; 450808a9ae2dSDmitry Baryshkov }; 450908a9ae2dSDmitry Baryshkov }; 4510b657d372SSrinivas Kandagatla 4511b657d372SSrinivas Kandagatla tert_mi2s_active: tert-mi2s-active { 4512b657d372SSrinivas Kandagatla sck { 4513b657d372SSrinivas Kandagatla pins = "gpio133"; 4514b657d372SSrinivas Kandagatla function = "mi2s2_sck"; 4515b657d372SSrinivas Kandagatla drive-strength = <8>; 4516b657d372SSrinivas Kandagatla bias-disable; 4517b657d372SSrinivas Kandagatla }; 4518b657d372SSrinivas Kandagatla 4519b657d372SSrinivas Kandagatla data0 { 4520b657d372SSrinivas Kandagatla pins = "gpio134"; 4521b657d372SSrinivas Kandagatla function = "mi2s2_data0"; 4522b657d372SSrinivas Kandagatla drive-strength = <8>; 4523b657d372SSrinivas Kandagatla bias-disable; 4524b657d372SSrinivas Kandagatla output-high; 4525b657d372SSrinivas Kandagatla }; 4526b657d372SSrinivas Kandagatla 4527b657d372SSrinivas Kandagatla ws { 4528b657d372SSrinivas Kandagatla pins = "gpio135"; 4529b657d372SSrinivas Kandagatla function = "mi2s2_ws"; 4530b657d372SSrinivas Kandagatla drive-strength = <8>; 4531b657d372SSrinivas Kandagatla output-high; 4532b657d372SSrinivas Kandagatla }; 4533b657d372SSrinivas Kandagatla }; 45348eaa6501SKonrad Dybcio 45358eaa6501SKonrad Dybcio sdc2_sleep_state: sdc2-sleep { 45368eaa6501SKonrad Dybcio clk { 45378eaa6501SKonrad Dybcio pins = "sdc2_clk"; 45388eaa6501SKonrad Dybcio drive-strength = <2>; 45398eaa6501SKonrad Dybcio bias-disable; 45408eaa6501SKonrad Dybcio }; 45418eaa6501SKonrad Dybcio 45428eaa6501SKonrad Dybcio cmd { 45438eaa6501SKonrad Dybcio pins = "sdc2_cmd"; 45448eaa6501SKonrad Dybcio drive-strength = <2>; 45458eaa6501SKonrad Dybcio bias-pull-up; 45468eaa6501SKonrad Dybcio }; 45478eaa6501SKonrad Dybcio 45488eaa6501SKonrad Dybcio data { 45498eaa6501SKonrad Dybcio pins = "sdc2_data"; 45508eaa6501SKonrad Dybcio drive-strength = <2>; 45518eaa6501SKonrad Dybcio bias-pull-up; 45528eaa6501SKonrad Dybcio }; 45538eaa6501SKonrad Dybcio }; 455413e948a3SKonrad Dybcio 455513e948a3SKonrad Dybcio pcie0_default_state: pcie0-default { 455613e948a3SKonrad Dybcio perst { 455713e948a3SKonrad Dybcio pins = "gpio79"; 455813e948a3SKonrad Dybcio function = "gpio"; 455913e948a3SKonrad Dybcio drive-strength = <2>; 456013e948a3SKonrad Dybcio bias-pull-down; 456113e948a3SKonrad Dybcio }; 456213e948a3SKonrad Dybcio 456313e948a3SKonrad Dybcio clkreq { 456413e948a3SKonrad Dybcio pins = "gpio80"; 456513e948a3SKonrad Dybcio function = "pci_e0"; 456613e948a3SKonrad Dybcio drive-strength = <2>; 456713e948a3SKonrad Dybcio bias-pull-up; 456813e948a3SKonrad Dybcio }; 456913e948a3SKonrad Dybcio 457013e948a3SKonrad Dybcio wake { 457113e948a3SKonrad Dybcio pins = "gpio81"; 457213e948a3SKonrad Dybcio function = "gpio"; 457313e948a3SKonrad Dybcio drive-strength = <2>; 457413e948a3SKonrad Dybcio bias-pull-up; 457513e948a3SKonrad Dybcio }; 457613e948a3SKonrad Dybcio }; 457713e948a3SKonrad Dybcio 457813e948a3SKonrad Dybcio pcie1_default_state: pcie1-default { 457913e948a3SKonrad Dybcio perst { 458013e948a3SKonrad Dybcio pins = "gpio82"; 458113e948a3SKonrad Dybcio function = "gpio"; 458213e948a3SKonrad Dybcio drive-strength = <2>; 458313e948a3SKonrad Dybcio bias-pull-down; 458413e948a3SKonrad Dybcio }; 458513e948a3SKonrad Dybcio 458613e948a3SKonrad Dybcio clkreq { 458713e948a3SKonrad Dybcio pins = "gpio83"; 458813e948a3SKonrad Dybcio function = "pci_e1"; 458913e948a3SKonrad Dybcio drive-strength = <2>; 459013e948a3SKonrad Dybcio bias-pull-up; 459113e948a3SKonrad Dybcio }; 459213e948a3SKonrad Dybcio 459313e948a3SKonrad Dybcio wake { 459413e948a3SKonrad Dybcio pins = "gpio84"; 459513e948a3SKonrad Dybcio function = "gpio"; 459613e948a3SKonrad Dybcio drive-strength = <2>; 459713e948a3SKonrad Dybcio bias-pull-up; 459813e948a3SKonrad Dybcio }; 459913e948a3SKonrad Dybcio }; 460013e948a3SKonrad Dybcio 460113e948a3SKonrad Dybcio pcie2_default_state: pcie2-default { 460213e948a3SKonrad Dybcio perst { 460313e948a3SKonrad Dybcio pins = "gpio85"; 460413e948a3SKonrad Dybcio function = "gpio"; 460513e948a3SKonrad Dybcio drive-strength = <2>; 460613e948a3SKonrad Dybcio bias-pull-down; 460713e948a3SKonrad Dybcio }; 460813e948a3SKonrad Dybcio 460913e948a3SKonrad Dybcio clkreq { 461013e948a3SKonrad Dybcio pins = "gpio86"; 461113e948a3SKonrad Dybcio function = "pci_e2"; 461213e948a3SKonrad Dybcio drive-strength = <2>; 461313e948a3SKonrad Dybcio bias-pull-up; 461413e948a3SKonrad Dybcio }; 461513e948a3SKonrad Dybcio 461613e948a3SKonrad Dybcio wake { 461713e948a3SKonrad Dybcio pins = "gpio87"; 461813e948a3SKonrad Dybcio function = "gpio"; 461913e948a3SKonrad Dybcio drive-strength = <2>; 462013e948a3SKonrad Dybcio bias-pull-up; 462113e948a3SKonrad Dybcio }; 462213e948a3SKonrad Dybcio }; 462316951b49SBjorn Andersson }; 462416951b49SBjorn Andersson 4625a89441fcSJonathan Marek apps_smmu: iommu@15000000 { 4626a89441fcSJonathan Marek compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; 4627a89441fcSJonathan Marek reg = <0 0x15000000 0 0x100000>; 4628a89441fcSJonathan Marek #iommu-cells = <2>; 4629a89441fcSJonathan Marek #global-interrupts = <2>; 4630a89441fcSJonathan Marek interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 4631a89441fcSJonathan Marek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 4632a89441fcSJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 4633a89441fcSJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 4634a89441fcSJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 4635a89441fcSJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 4636a89441fcSJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 4637a89441fcSJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 4638a89441fcSJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 4639a89441fcSJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 4640a89441fcSJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 4641a89441fcSJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 4642a89441fcSJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 4643a89441fcSJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 4644a89441fcSJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 4645a89441fcSJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 4646a89441fcSJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 4647a89441fcSJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 4648a89441fcSJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 4649a89441fcSJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 4650a89441fcSJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 4651a89441fcSJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 4652a89441fcSJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 4653a89441fcSJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 4654a89441fcSJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 4655a89441fcSJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 4656a89441fcSJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 4657a89441fcSJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 4658a89441fcSJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 4659a89441fcSJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 4660a89441fcSJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 4661a89441fcSJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 4662a89441fcSJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 4663a89441fcSJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 4664a89441fcSJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 4665a89441fcSJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 4666a89441fcSJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 4667a89441fcSJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 4668a89441fcSJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 4669a89441fcSJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 4670a89441fcSJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 4671a89441fcSJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 4672a89441fcSJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 4673a89441fcSJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 4674a89441fcSJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 4675a89441fcSJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 4676a89441fcSJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 4677a89441fcSJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 4678a89441fcSJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 4679a89441fcSJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 4680a89441fcSJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 4681a89441fcSJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 4682a89441fcSJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 4683a89441fcSJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 4684a89441fcSJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 4685a89441fcSJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 4686a89441fcSJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 4687a89441fcSJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 4688a89441fcSJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 4689a89441fcSJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 4690a89441fcSJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 4691a89441fcSJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 4692a89441fcSJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 4693a89441fcSJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 4694a89441fcSJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 4695a89441fcSJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 4696a89441fcSJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 4697a89441fcSJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 4698a89441fcSJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 4699a89441fcSJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 4700a89441fcSJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 4701a89441fcSJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 4702a89441fcSJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 4703a89441fcSJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 4704a89441fcSJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 4705a89441fcSJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 4706a89441fcSJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 4707a89441fcSJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 4708a89441fcSJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 4709a89441fcSJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 4710a89441fcSJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 4711a89441fcSJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 4712a89441fcSJonathan Marek <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 4713a89441fcSJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 4714a89441fcSJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 4715a89441fcSJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 4716a89441fcSJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 4717a89441fcSJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 4718a89441fcSJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 4719a89441fcSJonathan Marek <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 4720a89441fcSJonathan Marek <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 4721a89441fcSJonathan Marek <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 4722a89441fcSJonathan Marek <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 4723a89441fcSJonathan Marek <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 4724a89441fcSJonathan Marek <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 4725a89441fcSJonathan Marek <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 4726a89441fcSJonathan Marek <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 4727a89441fcSJonathan Marek <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 4728a89441fcSJonathan Marek }; 4729a89441fcSJonathan Marek 473023a89037SBjorn Andersson adsp: remoteproc@17300000 { 473123a89037SBjorn Andersson compatible = "qcom,sm8250-adsp-pas"; 473223a89037SBjorn Andersson reg = <0 0x17300000 0 0x100>; 473323a89037SBjorn Andersson 473423a89037SBjorn Andersson interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 473523a89037SBjorn Andersson <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 473623a89037SBjorn Andersson <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 473723a89037SBjorn Andersson <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 473823a89037SBjorn Andersson <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 473923a89037SBjorn Andersson interrupt-names = "wdog", "fatal", "ready", 474023a89037SBjorn Andersson "handover", "stop-ack"; 474123a89037SBjorn Andersson 474223a89037SBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>; 474323a89037SBjorn Andersson clock-names = "xo"; 474423a89037SBjorn Andersson 4745b74ee2d7SSibi Sankar power-domains = <&rpmhpd SM8250_LCX>, 474623a89037SBjorn Andersson <&rpmhpd SM8250_LMX>; 4747b74ee2d7SSibi Sankar power-domain-names = "lcx", "lmx"; 474823a89037SBjorn Andersson 474923a89037SBjorn Andersson memory-region = <&adsp_mem>; 475023a89037SBjorn Andersson 4751b74ee2d7SSibi Sankar qcom,qmp = <&aoss_qmp>; 4752b74ee2d7SSibi Sankar 475323a89037SBjorn Andersson qcom,smem-states = <&smp2p_adsp_out 0>; 475423a89037SBjorn Andersson qcom,smem-state-names = "stop"; 475523a89037SBjorn Andersson 475623a89037SBjorn Andersson status = "disabled"; 475723a89037SBjorn Andersson 475823a89037SBjorn Andersson glink-edge { 475923a89037SBjorn Andersson interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 476023a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP 476123a89037SBjorn Andersson IRQ_TYPE_EDGE_RISING>; 476223a89037SBjorn Andersson mboxes = <&ipcc IPCC_CLIENT_LPASS 476323a89037SBjorn Andersson IPCC_MPROC_SIGNAL_GLINK_QMP>; 476423a89037SBjorn Andersson 476523a89037SBjorn Andersson label = "lpass"; 476623a89037SBjorn Andersson qcom,remote-pid = <2>; 476725695808SJonathan Marek 476863e10791SSrinivas Kandagatla apr { 476963e10791SSrinivas Kandagatla compatible = "qcom,apr-v2"; 477063e10791SSrinivas Kandagatla qcom,glink-channels = "apr_audio_svc"; 47712f114511SDavid Heidelberg qcom,domain = <APR_DOMAIN_ADSP>; 477263e10791SSrinivas Kandagatla #address-cells = <1>; 477363e10791SSrinivas Kandagatla #size-cells = <0>; 477463e10791SSrinivas Kandagatla 477563e10791SSrinivas Kandagatla apr-service@3 { 477663e10791SSrinivas Kandagatla reg = <APR_SVC_ADSP_CORE>; 477763e10791SSrinivas Kandagatla compatible = "qcom,q6core"; 477863e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 477963e10791SSrinivas Kandagatla }; 478063e10791SSrinivas Kandagatla 478163e10791SSrinivas Kandagatla q6afe: apr-service@4 { 478263e10791SSrinivas Kandagatla compatible = "qcom,q6afe"; 478363e10791SSrinivas Kandagatla reg = <APR_SVC_AFE>; 478463e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 478563e10791SSrinivas Kandagatla q6afedai: dais { 478663e10791SSrinivas Kandagatla compatible = "qcom,q6afe-dais"; 478763e10791SSrinivas Kandagatla #address-cells = <1>; 478863e10791SSrinivas Kandagatla #size-cells = <0>; 478963e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 479063e10791SSrinivas Kandagatla }; 479163e10791SSrinivas Kandagatla 479263e10791SSrinivas Kandagatla q6afecc: cc { 479363e10791SSrinivas Kandagatla compatible = "qcom,q6afe-clocks"; 479463e10791SSrinivas Kandagatla #clock-cells = <2>; 479563e10791SSrinivas Kandagatla }; 479663e10791SSrinivas Kandagatla }; 479763e10791SSrinivas Kandagatla 479863e10791SSrinivas Kandagatla q6asm: apr-service@7 { 479963e10791SSrinivas Kandagatla compatible = "qcom,q6asm"; 480063e10791SSrinivas Kandagatla reg = <APR_SVC_ASM>; 480163e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 480263e10791SSrinivas Kandagatla q6asmdai: dais { 480363e10791SSrinivas Kandagatla compatible = "qcom,q6asm-dais"; 480463e10791SSrinivas Kandagatla #address-cells = <1>; 480563e10791SSrinivas Kandagatla #size-cells = <0>; 480663e10791SSrinivas Kandagatla #sound-dai-cells = <1>; 480763e10791SSrinivas Kandagatla iommus = <&apps_smmu 0x1801 0x0>; 480863e10791SSrinivas Kandagatla }; 480963e10791SSrinivas Kandagatla }; 481063e10791SSrinivas Kandagatla 481163e10791SSrinivas Kandagatla q6adm: apr-service@8 { 481263e10791SSrinivas Kandagatla compatible = "qcom,q6adm"; 481363e10791SSrinivas Kandagatla reg = <APR_SVC_ADM>; 481463e10791SSrinivas Kandagatla qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; 481563e10791SSrinivas Kandagatla q6routing: routing { 481663e10791SSrinivas Kandagatla compatible = "qcom,q6adm-routing"; 481763e10791SSrinivas Kandagatla #sound-dai-cells = <0>; 481863e10791SSrinivas Kandagatla }; 481963e10791SSrinivas Kandagatla }; 482063e10791SSrinivas Kandagatla }; 482163e10791SSrinivas Kandagatla 482225695808SJonathan Marek fastrpc { 482325695808SJonathan Marek compatible = "qcom,fastrpc"; 482425695808SJonathan Marek qcom,glink-channels = "fastrpcglink-apps-dsp"; 482525695808SJonathan Marek label = "adsp"; 48268c8ce95bSJeya R qcom,non-secure-domain; 482725695808SJonathan Marek #address-cells = <1>; 482825695808SJonathan Marek #size-cells = <0>; 482925695808SJonathan Marek 483025695808SJonathan Marek compute-cb@3 { 483125695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 483225695808SJonathan Marek reg = <3>; 483325695808SJonathan Marek iommus = <&apps_smmu 0x1803 0x0>; 483425695808SJonathan Marek }; 483525695808SJonathan Marek 483625695808SJonathan Marek compute-cb@4 { 483725695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 483825695808SJonathan Marek reg = <4>; 483925695808SJonathan Marek iommus = <&apps_smmu 0x1804 0x0>; 484025695808SJonathan Marek }; 484125695808SJonathan Marek 484225695808SJonathan Marek compute-cb@5 { 484325695808SJonathan Marek compatible = "qcom,fastrpc-compute-cb"; 484425695808SJonathan Marek reg = <5>; 484525695808SJonathan Marek iommus = <&apps_smmu 0x1805 0x0>; 484625695808SJonathan Marek }; 484725695808SJonathan Marek }; 484823a89037SBjorn Andersson }; 484923a89037SBjorn Andersson }; 485023a89037SBjorn Andersson 4851b9ec8cbcSJonathan Marek intc: interrupt-controller@17a00000 { 4852b9ec8cbcSJonathan Marek compatible = "arm,gic-v3"; 4853b9ec8cbcSJonathan Marek #interrupt-cells = <3>; 4854b9ec8cbcSJonathan Marek interrupt-controller; 4855b9ec8cbcSJonathan Marek reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 4856b9ec8cbcSJonathan Marek <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 4857b9ec8cbcSJonathan Marek interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 4858b9ec8cbcSJonathan Marek }; 4859b9ec8cbcSJonathan Marek 4860e0d9acceSDmitry Baryshkov watchdog@17c10000 { 4861e0d9acceSDmitry Baryshkov compatible = "qcom,apss-wdt-sm8250", "qcom,kpss-wdt"; 4862e0d9acceSDmitry Baryshkov reg = <0 0x17c10000 0 0x1000>; 4863e0d9acceSDmitry Baryshkov clocks = <&sleep_clk>; 486446a4359fSSai Prakash Ranjan interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 4865e0d9acceSDmitry Baryshkov }; 4866e0d9acceSDmitry Baryshkov 4867b9ec8cbcSJonathan Marek timer@17c20000 { 4868458ebdbbSDavid Heidelberg #address-cells = <1>; 4869458ebdbbSDavid Heidelberg #size-cells = <1>; 4870458ebdbbSDavid Heidelberg ranges = <0 0 0 0x20000000>; 4871b9ec8cbcSJonathan Marek compatible = "arm,armv7-timer-mem"; 4872b9ec8cbcSJonathan Marek reg = <0x0 0x17c20000 0x0 0x1000>; 4873b9ec8cbcSJonathan Marek clock-frequency = <19200000>; 4874b9ec8cbcSJonathan Marek 4875b9ec8cbcSJonathan Marek frame@17c21000 { 4876b9ec8cbcSJonathan Marek frame-number = <0>; 4877b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 4878b9ec8cbcSJonathan Marek <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 4879458ebdbbSDavid Heidelberg reg = <0x17c21000 0x1000>, 4880458ebdbbSDavid Heidelberg <0x17c22000 0x1000>; 4881b9ec8cbcSJonathan Marek }; 4882b9ec8cbcSJonathan Marek 4883b9ec8cbcSJonathan Marek frame@17c23000 { 4884b9ec8cbcSJonathan Marek frame-number = <1>; 4885b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 4886458ebdbbSDavid Heidelberg reg = <0x17c23000 0x1000>; 4887b9ec8cbcSJonathan Marek status = "disabled"; 4888b9ec8cbcSJonathan Marek }; 4889b9ec8cbcSJonathan Marek 4890b9ec8cbcSJonathan Marek frame@17c25000 { 4891b9ec8cbcSJonathan Marek frame-number = <2>; 4892b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 4893458ebdbbSDavid Heidelberg reg = <0x17c25000 0x1000>; 4894b9ec8cbcSJonathan Marek status = "disabled"; 4895b9ec8cbcSJonathan Marek }; 4896b9ec8cbcSJonathan Marek 4897b9ec8cbcSJonathan Marek frame@17c27000 { 4898b9ec8cbcSJonathan Marek frame-number = <3>; 4899b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 4900458ebdbbSDavid Heidelberg reg = <0x17c27000 0x1000>; 4901b9ec8cbcSJonathan Marek status = "disabled"; 4902b9ec8cbcSJonathan Marek }; 4903b9ec8cbcSJonathan Marek 4904b9ec8cbcSJonathan Marek frame@17c29000 { 4905b9ec8cbcSJonathan Marek frame-number = <4>; 4906b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 4907458ebdbbSDavid Heidelberg reg = <0x17c29000 0x1000>; 4908b9ec8cbcSJonathan Marek status = "disabled"; 4909b9ec8cbcSJonathan Marek }; 4910b9ec8cbcSJonathan Marek 4911b9ec8cbcSJonathan Marek frame@17c2b000 { 4912b9ec8cbcSJonathan Marek frame-number = <5>; 4913b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 4914458ebdbbSDavid Heidelberg reg = <0x17c2b000 0x1000>; 4915b9ec8cbcSJonathan Marek status = "disabled"; 4916b9ec8cbcSJonathan Marek }; 4917b9ec8cbcSJonathan Marek 4918b9ec8cbcSJonathan Marek frame@17c2d000 { 4919b9ec8cbcSJonathan Marek frame-number = <6>; 4920b9ec8cbcSJonathan Marek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 4921458ebdbbSDavid Heidelberg reg = <0x17c2d000 0x1000>; 4922b9ec8cbcSJonathan Marek status = "disabled"; 4923b9ec8cbcSJonathan Marek }; 4924b9ec8cbcSJonathan Marek }; 4925b9ec8cbcSJonathan Marek 492660378f1aSVenkata Narendra Kumar Gutta apps_rsc: rsc@18200000 { 492760378f1aSVenkata Narendra Kumar Gutta label = "apps_rsc"; 492860378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,rpmh-rsc"; 492960378f1aSVenkata Narendra Kumar Gutta reg = <0x0 0x18200000 0x0 0x10000>, 493060378f1aSVenkata Narendra Kumar Gutta <0x0 0x18210000 0x0 0x10000>, 493160378f1aSVenkata Narendra Kumar Gutta <0x0 0x18220000 0x0 0x10000>; 493260378f1aSVenkata Narendra Kumar Gutta reg-names = "drv-0", "drv-1", "drv-2"; 493360378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 493460378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 493560378f1aSVenkata Narendra Kumar Gutta <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 493660378f1aSVenkata Narendra Kumar Gutta qcom,tcs-offset = <0xd00>; 493760378f1aSVenkata Narendra Kumar Gutta qcom,drv-id = <2>; 493860378f1aSVenkata Narendra Kumar Gutta qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 493960378f1aSVenkata Narendra Kumar Gutta <WAKE_TCS 3>, <CONTROL_TCS 1>; 494060378f1aSVenkata Narendra Kumar Gutta 494160378f1aSVenkata Narendra Kumar Gutta rpmhcc: clock-controller { 494260378f1aSVenkata Narendra Kumar Gutta compatible = "qcom,sm8250-rpmh-clk"; 494360378f1aSVenkata Narendra Kumar Gutta #clock-cells = <1>; 494460378f1aSVenkata Narendra Kumar Gutta clock-names = "xo"; 494560378f1aSVenkata Narendra Kumar Gutta clocks = <&xo_board>; 494660378f1aSVenkata Narendra Kumar Gutta }; 4947b6f78e27SBjorn Andersson 4948b6f78e27SBjorn Andersson rpmhpd: power-controller { 4949b6f78e27SBjorn Andersson compatible = "qcom,sm8250-rpmhpd"; 4950b6f78e27SBjorn Andersson #power-domain-cells = <1>; 4951b6f78e27SBjorn Andersson operating-points-v2 = <&rpmhpd_opp_table>; 4952b6f78e27SBjorn Andersson 4953b6f78e27SBjorn Andersson rpmhpd_opp_table: opp-table { 4954b6f78e27SBjorn Andersson compatible = "operating-points-v2"; 4955b6f78e27SBjorn Andersson 4956b6f78e27SBjorn Andersson rpmhpd_opp_ret: opp1 { 4957b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 4958b6f78e27SBjorn Andersson }; 4959b6f78e27SBjorn Andersson 4960b6f78e27SBjorn Andersson rpmhpd_opp_min_svs: opp2 { 4961b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 4962b6f78e27SBjorn Andersson }; 4963b6f78e27SBjorn Andersson 4964b6f78e27SBjorn Andersson rpmhpd_opp_low_svs: opp3 { 4965b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 4966b6f78e27SBjorn Andersson }; 4967b6f78e27SBjorn Andersson 4968b6f78e27SBjorn Andersson rpmhpd_opp_svs: opp4 { 4969b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 4970b6f78e27SBjorn Andersson }; 4971b6f78e27SBjorn Andersson 4972b6f78e27SBjorn Andersson rpmhpd_opp_svs_l1: opp5 { 4973b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 4974b6f78e27SBjorn Andersson }; 4975b6f78e27SBjorn Andersson 4976b6f78e27SBjorn Andersson rpmhpd_opp_nom: opp6 { 4977b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 4978b6f78e27SBjorn Andersson }; 4979b6f78e27SBjorn Andersson 4980b6f78e27SBjorn Andersson rpmhpd_opp_nom_l1: opp7 { 4981b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 4982b6f78e27SBjorn Andersson }; 4983b6f78e27SBjorn Andersson 4984b6f78e27SBjorn Andersson rpmhpd_opp_nom_l2: opp8 { 4985b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 4986b6f78e27SBjorn Andersson }; 4987b6f78e27SBjorn Andersson 4988b6f78e27SBjorn Andersson rpmhpd_opp_turbo: opp9 { 4989b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 4990b6f78e27SBjorn Andersson }; 4991b6f78e27SBjorn Andersson 4992b6f78e27SBjorn Andersson rpmhpd_opp_turbo_l1: opp10 { 4993b6f78e27SBjorn Andersson opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 4994b6f78e27SBjorn Andersson }; 4995b6f78e27SBjorn Andersson }; 4996b6f78e27SBjorn Andersson }; 4997e7e41a20SJonathan Marek 4998fc0e7dd6SKrzysztof Kozlowski apps_bcm_voter: bcm-voter { 4999e7e41a20SJonathan Marek compatible = "qcom,bcm-voter"; 5000e7e41a20SJonathan Marek }; 500160378f1aSVenkata Narendra Kumar Gutta }; 500279a595bbSSibi Sankar 500377b53d65SGeorgi Djakov epss_l3: interconnect@18590000 { 500479a595bbSSibi Sankar compatible = "qcom,sm8250-epss-l3"; 500579a595bbSSibi Sankar reg = <0 0x18590000 0 0x1000>; 500679a595bbSSibi Sankar 500779a595bbSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 500879a595bbSSibi Sankar clock-names = "xo", "alternate"; 500979a595bbSSibi Sankar 501079a595bbSSibi Sankar #interconnect-cells = <1>; 501179a595bbSSibi Sankar }; 501202ae4a0eSBjorn Andersson 501302ae4a0eSBjorn Andersson cpufreq_hw: cpufreq@18591000 { 501402ae4a0eSBjorn Andersson compatible = "qcom,sm8250-cpufreq-epss", "qcom,cpufreq-epss"; 501502ae4a0eSBjorn Andersson reg = <0 0x18591000 0 0x1000>, 501602ae4a0eSBjorn Andersson <0 0x18592000 0 0x1000>, 501702ae4a0eSBjorn Andersson <0 0x18593000 0 0x1000>; 501802ae4a0eSBjorn Andersson reg-names = "freq-domain0", "freq-domain1", 501902ae4a0eSBjorn Andersson "freq-domain2"; 502002ae4a0eSBjorn Andersson 502102ae4a0eSBjorn Andersson clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 502202ae4a0eSBjorn Andersson clock-names = "xo", "alternate"; 5023ffd6cc92SVladimir Zapolskiy interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 5024ffd6cc92SVladimir Zapolskiy <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 5025ffd6cc92SVladimir Zapolskiy <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 5026ffd6cc92SVladimir Zapolskiy interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; 502702ae4a0eSBjorn Andersson #freq-domain-cells = <1>; 502802ae4a0eSBjorn Andersson }; 502960378f1aSVenkata Narendra Kumar Gutta }; 503060378f1aSVenkata Narendra Kumar Gutta 503160378f1aSVenkata Narendra Kumar Gutta timer { 503260378f1aSVenkata Narendra Kumar Gutta compatible = "arm,armv8-timer"; 503360378f1aSVenkata Narendra Kumar Gutta interrupts = <GIC_PPI 13 503460378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 503560378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 14 503660378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 503760378f1aSVenkata Narendra Kumar Gutta <GIC_PPI 11 503860378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 503929a33495SSai Prakash Ranjan <GIC_PPI 10 504060378f1aSVenkata Narendra Kumar Gutta (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 504160378f1aSVenkata Narendra Kumar Gutta }; 5042bac12f25SAmit Kucheria 5043bac12f25SAmit Kucheria thermal-zones { 5044bac12f25SAmit Kucheria cpu0-thermal { 5045bac12f25SAmit Kucheria polling-delay-passive = <250>; 5046bac12f25SAmit Kucheria polling-delay = <1000>; 5047bac12f25SAmit Kucheria 5048bac12f25SAmit Kucheria thermal-sensors = <&tsens0 1>; 5049bac12f25SAmit Kucheria 5050bac12f25SAmit Kucheria trips { 5051bac12f25SAmit Kucheria cpu0_alert0: trip-point0 { 5052bac12f25SAmit Kucheria temperature = <90000>; 5053bac12f25SAmit Kucheria hysteresis = <2000>; 5054bac12f25SAmit Kucheria type = "passive"; 5055bac12f25SAmit Kucheria }; 5056bac12f25SAmit Kucheria 5057bac12f25SAmit Kucheria cpu0_alert1: trip-point1 { 5058bac12f25SAmit Kucheria temperature = <95000>; 5059bac12f25SAmit Kucheria hysteresis = <2000>; 5060bac12f25SAmit Kucheria type = "passive"; 5061bac12f25SAmit Kucheria }; 5062bac12f25SAmit Kucheria 5063bac12f25SAmit Kucheria cpu0_crit: cpu_crit { 5064bac12f25SAmit Kucheria temperature = <110000>; 5065bac12f25SAmit Kucheria hysteresis = <1000>; 5066bac12f25SAmit Kucheria type = "critical"; 5067bac12f25SAmit Kucheria }; 5068bac12f25SAmit Kucheria }; 5069bac12f25SAmit Kucheria 5070bac12f25SAmit Kucheria cooling-maps { 5071bac12f25SAmit Kucheria map0 { 5072bac12f25SAmit Kucheria trip = <&cpu0_alert0>; 5073bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5074bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5075bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5076bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5077bac12f25SAmit Kucheria }; 5078bac12f25SAmit Kucheria map1 { 5079bac12f25SAmit Kucheria trip = <&cpu0_alert1>; 5080bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5081bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5082bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5083bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5084bac12f25SAmit Kucheria }; 5085bac12f25SAmit Kucheria }; 5086bac12f25SAmit Kucheria }; 5087bac12f25SAmit Kucheria 5088bac12f25SAmit Kucheria cpu1-thermal { 5089bac12f25SAmit Kucheria polling-delay-passive = <250>; 5090bac12f25SAmit Kucheria polling-delay = <1000>; 5091bac12f25SAmit Kucheria 5092bac12f25SAmit Kucheria thermal-sensors = <&tsens0 2>; 5093bac12f25SAmit Kucheria 5094bac12f25SAmit Kucheria trips { 5095bac12f25SAmit Kucheria cpu1_alert0: trip-point0 { 5096bac12f25SAmit Kucheria temperature = <90000>; 5097bac12f25SAmit Kucheria hysteresis = <2000>; 5098bac12f25SAmit Kucheria type = "passive"; 5099bac12f25SAmit Kucheria }; 5100bac12f25SAmit Kucheria 5101bac12f25SAmit Kucheria cpu1_alert1: trip-point1 { 5102bac12f25SAmit Kucheria temperature = <95000>; 5103bac12f25SAmit Kucheria hysteresis = <2000>; 5104bac12f25SAmit Kucheria type = "passive"; 5105bac12f25SAmit Kucheria }; 5106bac12f25SAmit Kucheria 5107bac12f25SAmit Kucheria cpu1_crit: cpu_crit { 5108bac12f25SAmit Kucheria temperature = <110000>; 5109bac12f25SAmit Kucheria hysteresis = <1000>; 5110bac12f25SAmit Kucheria type = "critical"; 5111bac12f25SAmit Kucheria }; 5112bac12f25SAmit Kucheria }; 5113bac12f25SAmit Kucheria 5114bac12f25SAmit Kucheria cooling-maps { 5115bac12f25SAmit Kucheria map0 { 5116bac12f25SAmit Kucheria trip = <&cpu1_alert0>; 5117bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5118bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5119bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5120bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5121bac12f25SAmit Kucheria }; 5122bac12f25SAmit Kucheria map1 { 5123bac12f25SAmit Kucheria trip = <&cpu1_alert1>; 5124bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5125bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5126bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5127bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5128bac12f25SAmit Kucheria }; 5129bac12f25SAmit Kucheria }; 5130bac12f25SAmit Kucheria }; 5131bac12f25SAmit Kucheria 5132bac12f25SAmit Kucheria cpu2-thermal { 5133bac12f25SAmit Kucheria polling-delay-passive = <250>; 5134bac12f25SAmit Kucheria polling-delay = <1000>; 5135bac12f25SAmit Kucheria 5136bac12f25SAmit Kucheria thermal-sensors = <&tsens0 3>; 5137bac12f25SAmit Kucheria 5138bac12f25SAmit Kucheria trips { 5139bac12f25SAmit Kucheria cpu2_alert0: trip-point0 { 5140bac12f25SAmit Kucheria temperature = <90000>; 5141bac12f25SAmit Kucheria hysteresis = <2000>; 5142bac12f25SAmit Kucheria type = "passive"; 5143bac12f25SAmit Kucheria }; 5144bac12f25SAmit Kucheria 5145bac12f25SAmit Kucheria cpu2_alert1: trip-point1 { 5146bac12f25SAmit Kucheria temperature = <95000>; 5147bac12f25SAmit Kucheria hysteresis = <2000>; 5148bac12f25SAmit Kucheria type = "passive"; 5149bac12f25SAmit Kucheria }; 5150bac12f25SAmit Kucheria 5151bac12f25SAmit Kucheria cpu2_crit: cpu_crit { 5152bac12f25SAmit Kucheria temperature = <110000>; 5153bac12f25SAmit Kucheria hysteresis = <1000>; 5154bac12f25SAmit Kucheria type = "critical"; 5155bac12f25SAmit Kucheria }; 5156bac12f25SAmit Kucheria }; 5157bac12f25SAmit Kucheria 5158bac12f25SAmit Kucheria cooling-maps { 5159bac12f25SAmit Kucheria map0 { 5160bac12f25SAmit Kucheria trip = <&cpu2_alert0>; 5161bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5162bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5163bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5164bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5165bac12f25SAmit Kucheria }; 5166bac12f25SAmit Kucheria map1 { 5167bac12f25SAmit Kucheria trip = <&cpu2_alert1>; 5168bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5169bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5170bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5171bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5172bac12f25SAmit Kucheria }; 5173bac12f25SAmit Kucheria }; 5174bac12f25SAmit Kucheria }; 5175bac12f25SAmit Kucheria 5176bac12f25SAmit Kucheria cpu3-thermal { 5177bac12f25SAmit Kucheria polling-delay-passive = <250>; 5178bac12f25SAmit Kucheria polling-delay = <1000>; 5179bac12f25SAmit Kucheria 5180bac12f25SAmit Kucheria thermal-sensors = <&tsens0 4>; 5181bac12f25SAmit Kucheria 5182bac12f25SAmit Kucheria trips { 5183bac12f25SAmit Kucheria cpu3_alert0: trip-point0 { 5184bac12f25SAmit Kucheria temperature = <90000>; 5185bac12f25SAmit Kucheria hysteresis = <2000>; 5186bac12f25SAmit Kucheria type = "passive"; 5187bac12f25SAmit Kucheria }; 5188bac12f25SAmit Kucheria 5189bac12f25SAmit Kucheria cpu3_alert1: trip-point1 { 5190bac12f25SAmit Kucheria temperature = <95000>; 5191bac12f25SAmit Kucheria hysteresis = <2000>; 5192bac12f25SAmit Kucheria type = "passive"; 5193bac12f25SAmit Kucheria }; 5194bac12f25SAmit Kucheria 5195bac12f25SAmit Kucheria cpu3_crit: cpu_crit { 5196bac12f25SAmit Kucheria temperature = <110000>; 5197bac12f25SAmit Kucheria hysteresis = <1000>; 5198bac12f25SAmit Kucheria type = "critical"; 5199bac12f25SAmit Kucheria }; 5200bac12f25SAmit Kucheria }; 5201bac12f25SAmit Kucheria 5202bac12f25SAmit Kucheria cooling-maps { 5203bac12f25SAmit Kucheria map0 { 5204bac12f25SAmit Kucheria trip = <&cpu3_alert0>; 5205bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5206bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5207bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5208bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5209bac12f25SAmit Kucheria }; 5210bac12f25SAmit Kucheria map1 { 5211bac12f25SAmit Kucheria trip = <&cpu3_alert1>; 5212bac12f25SAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5213bac12f25SAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5214bac12f25SAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5215bac12f25SAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5216bac12f25SAmit Kucheria }; 5217bac12f25SAmit Kucheria }; 5218bac12f25SAmit Kucheria }; 5219bac12f25SAmit Kucheria 5220bac12f25SAmit Kucheria cpu4-top-thermal { 5221bac12f25SAmit Kucheria polling-delay-passive = <250>; 5222bac12f25SAmit Kucheria polling-delay = <1000>; 5223bac12f25SAmit Kucheria 5224bac12f25SAmit Kucheria thermal-sensors = <&tsens0 7>; 5225bac12f25SAmit Kucheria 5226bac12f25SAmit Kucheria trips { 5227bac12f25SAmit Kucheria cpu4_top_alert0: trip-point0 { 5228bac12f25SAmit Kucheria temperature = <90000>; 5229bac12f25SAmit Kucheria hysteresis = <2000>; 5230bac12f25SAmit Kucheria type = "passive"; 5231bac12f25SAmit Kucheria }; 5232bac12f25SAmit Kucheria 5233bac12f25SAmit Kucheria cpu4_top_alert1: trip-point1 { 5234bac12f25SAmit Kucheria temperature = <95000>; 5235bac12f25SAmit Kucheria hysteresis = <2000>; 5236bac12f25SAmit Kucheria type = "passive"; 5237bac12f25SAmit Kucheria }; 5238bac12f25SAmit Kucheria 5239bac12f25SAmit Kucheria cpu4_top_crit: cpu_crit { 5240bac12f25SAmit Kucheria temperature = <110000>; 5241bac12f25SAmit Kucheria hysteresis = <1000>; 5242bac12f25SAmit Kucheria type = "critical"; 5243bac12f25SAmit Kucheria }; 5244bac12f25SAmit Kucheria }; 5245bac12f25SAmit Kucheria 5246bac12f25SAmit Kucheria cooling-maps { 5247bac12f25SAmit Kucheria map0 { 5248bac12f25SAmit Kucheria trip = <&cpu4_top_alert0>; 5249bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5250bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5251bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5252bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5253bac12f25SAmit Kucheria }; 5254bac12f25SAmit Kucheria map1 { 5255bac12f25SAmit Kucheria trip = <&cpu4_top_alert1>; 5256bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5257bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5258bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5259bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5260bac12f25SAmit Kucheria }; 5261bac12f25SAmit Kucheria }; 5262bac12f25SAmit Kucheria }; 5263bac12f25SAmit Kucheria 5264bac12f25SAmit Kucheria cpu5-top-thermal { 5265bac12f25SAmit Kucheria polling-delay-passive = <250>; 5266bac12f25SAmit Kucheria polling-delay = <1000>; 5267bac12f25SAmit Kucheria 5268bac12f25SAmit Kucheria thermal-sensors = <&tsens0 8>; 5269bac12f25SAmit Kucheria 5270bac12f25SAmit Kucheria trips { 5271bac12f25SAmit Kucheria cpu5_top_alert0: trip-point0 { 5272bac12f25SAmit Kucheria temperature = <90000>; 5273bac12f25SAmit Kucheria hysteresis = <2000>; 5274bac12f25SAmit Kucheria type = "passive"; 5275bac12f25SAmit Kucheria }; 5276bac12f25SAmit Kucheria 5277bac12f25SAmit Kucheria cpu5_top_alert1: trip-point1 { 5278bac12f25SAmit Kucheria temperature = <95000>; 5279bac12f25SAmit Kucheria hysteresis = <2000>; 5280bac12f25SAmit Kucheria type = "passive"; 5281bac12f25SAmit Kucheria }; 5282bac12f25SAmit Kucheria 5283bac12f25SAmit Kucheria cpu5_top_crit: cpu_crit { 5284bac12f25SAmit Kucheria temperature = <110000>; 5285bac12f25SAmit Kucheria hysteresis = <1000>; 5286bac12f25SAmit Kucheria type = "critical"; 5287bac12f25SAmit Kucheria }; 5288bac12f25SAmit Kucheria }; 5289bac12f25SAmit Kucheria 5290bac12f25SAmit Kucheria cooling-maps { 5291bac12f25SAmit Kucheria map0 { 5292bac12f25SAmit Kucheria trip = <&cpu5_top_alert0>; 5293bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5294bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5295bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5296bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5297bac12f25SAmit Kucheria }; 5298bac12f25SAmit Kucheria map1 { 5299bac12f25SAmit Kucheria trip = <&cpu5_top_alert1>; 5300bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5301bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5302bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5303bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5304bac12f25SAmit Kucheria }; 5305bac12f25SAmit Kucheria }; 5306bac12f25SAmit Kucheria }; 5307bac12f25SAmit Kucheria 5308bac12f25SAmit Kucheria cpu6-top-thermal { 5309bac12f25SAmit Kucheria polling-delay-passive = <250>; 5310bac12f25SAmit Kucheria polling-delay = <1000>; 5311bac12f25SAmit Kucheria 5312bac12f25SAmit Kucheria thermal-sensors = <&tsens0 9>; 5313bac12f25SAmit Kucheria 5314bac12f25SAmit Kucheria trips { 5315bac12f25SAmit Kucheria cpu6_top_alert0: trip-point0 { 5316bac12f25SAmit Kucheria temperature = <90000>; 5317bac12f25SAmit Kucheria hysteresis = <2000>; 5318bac12f25SAmit Kucheria type = "passive"; 5319bac12f25SAmit Kucheria }; 5320bac12f25SAmit Kucheria 5321bac12f25SAmit Kucheria cpu6_top_alert1: trip-point1 { 5322bac12f25SAmit Kucheria temperature = <95000>; 5323bac12f25SAmit Kucheria hysteresis = <2000>; 5324bac12f25SAmit Kucheria type = "passive"; 5325bac12f25SAmit Kucheria }; 5326bac12f25SAmit Kucheria 5327bac12f25SAmit Kucheria cpu6_top_crit: cpu_crit { 5328bac12f25SAmit Kucheria temperature = <110000>; 5329bac12f25SAmit Kucheria hysteresis = <1000>; 5330bac12f25SAmit Kucheria type = "critical"; 5331bac12f25SAmit Kucheria }; 5332bac12f25SAmit Kucheria }; 5333bac12f25SAmit Kucheria 5334bac12f25SAmit Kucheria cooling-maps { 5335bac12f25SAmit Kucheria map0 { 5336bac12f25SAmit Kucheria trip = <&cpu6_top_alert0>; 5337bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5338bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5339bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5340bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5341bac12f25SAmit Kucheria }; 5342bac12f25SAmit Kucheria map1 { 5343bac12f25SAmit Kucheria trip = <&cpu6_top_alert1>; 5344bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5345bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5346bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5347bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5348bac12f25SAmit Kucheria }; 5349bac12f25SAmit Kucheria }; 5350bac12f25SAmit Kucheria }; 5351bac12f25SAmit Kucheria 5352bac12f25SAmit Kucheria cpu7-top-thermal { 5353bac12f25SAmit Kucheria polling-delay-passive = <250>; 5354bac12f25SAmit Kucheria polling-delay = <1000>; 5355bac12f25SAmit Kucheria 5356bac12f25SAmit Kucheria thermal-sensors = <&tsens0 10>; 5357bac12f25SAmit Kucheria 5358bac12f25SAmit Kucheria trips { 5359bac12f25SAmit Kucheria cpu7_top_alert0: trip-point0 { 5360bac12f25SAmit Kucheria temperature = <90000>; 5361bac12f25SAmit Kucheria hysteresis = <2000>; 5362bac12f25SAmit Kucheria type = "passive"; 5363bac12f25SAmit Kucheria }; 5364bac12f25SAmit Kucheria 5365bac12f25SAmit Kucheria cpu7_top_alert1: trip-point1 { 5366bac12f25SAmit Kucheria temperature = <95000>; 5367bac12f25SAmit Kucheria hysteresis = <2000>; 5368bac12f25SAmit Kucheria type = "passive"; 5369bac12f25SAmit Kucheria }; 5370bac12f25SAmit Kucheria 5371bac12f25SAmit Kucheria cpu7_top_crit: cpu_crit { 5372bac12f25SAmit Kucheria temperature = <110000>; 5373bac12f25SAmit Kucheria hysteresis = <1000>; 5374bac12f25SAmit Kucheria type = "critical"; 5375bac12f25SAmit Kucheria }; 5376bac12f25SAmit Kucheria }; 5377bac12f25SAmit Kucheria 5378bac12f25SAmit Kucheria cooling-maps { 5379bac12f25SAmit Kucheria map0 { 5380bac12f25SAmit Kucheria trip = <&cpu7_top_alert0>; 5381bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5382bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5383bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5384bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5385bac12f25SAmit Kucheria }; 5386bac12f25SAmit Kucheria map1 { 5387bac12f25SAmit Kucheria trip = <&cpu7_top_alert1>; 5388bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5389bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5390bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5391bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5392bac12f25SAmit Kucheria }; 5393bac12f25SAmit Kucheria }; 5394bac12f25SAmit Kucheria }; 5395bac12f25SAmit Kucheria 5396bac12f25SAmit Kucheria cpu4-bottom-thermal { 5397bac12f25SAmit Kucheria polling-delay-passive = <250>; 5398bac12f25SAmit Kucheria polling-delay = <1000>; 5399bac12f25SAmit Kucheria 5400bac12f25SAmit Kucheria thermal-sensors = <&tsens0 11>; 5401bac12f25SAmit Kucheria 5402bac12f25SAmit Kucheria trips { 5403bac12f25SAmit Kucheria cpu4_bottom_alert0: trip-point0 { 5404bac12f25SAmit Kucheria temperature = <90000>; 5405bac12f25SAmit Kucheria hysteresis = <2000>; 5406bac12f25SAmit Kucheria type = "passive"; 5407bac12f25SAmit Kucheria }; 5408bac12f25SAmit Kucheria 5409bac12f25SAmit Kucheria cpu4_bottom_alert1: trip-point1 { 5410bac12f25SAmit Kucheria temperature = <95000>; 5411bac12f25SAmit Kucheria hysteresis = <2000>; 5412bac12f25SAmit Kucheria type = "passive"; 5413bac12f25SAmit Kucheria }; 5414bac12f25SAmit Kucheria 5415bac12f25SAmit Kucheria cpu4_bottom_crit: cpu_crit { 5416bac12f25SAmit Kucheria temperature = <110000>; 5417bac12f25SAmit Kucheria hysteresis = <1000>; 5418bac12f25SAmit Kucheria type = "critical"; 5419bac12f25SAmit Kucheria }; 5420bac12f25SAmit Kucheria }; 5421bac12f25SAmit Kucheria 5422bac12f25SAmit Kucheria cooling-maps { 5423bac12f25SAmit Kucheria map0 { 5424bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert0>; 5425bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5426bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5427bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5428bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5429bac12f25SAmit Kucheria }; 5430bac12f25SAmit Kucheria map1 { 5431bac12f25SAmit Kucheria trip = <&cpu4_bottom_alert1>; 5432bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5433bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5434bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5435bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5436bac12f25SAmit Kucheria }; 5437bac12f25SAmit Kucheria }; 5438bac12f25SAmit Kucheria }; 5439bac12f25SAmit Kucheria 5440bac12f25SAmit Kucheria cpu5-bottom-thermal { 5441bac12f25SAmit Kucheria polling-delay-passive = <250>; 5442bac12f25SAmit Kucheria polling-delay = <1000>; 5443bac12f25SAmit Kucheria 5444bac12f25SAmit Kucheria thermal-sensors = <&tsens0 12>; 5445bac12f25SAmit Kucheria 5446bac12f25SAmit Kucheria trips { 5447bac12f25SAmit Kucheria cpu5_bottom_alert0: trip-point0 { 5448bac12f25SAmit Kucheria temperature = <90000>; 5449bac12f25SAmit Kucheria hysteresis = <2000>; 5450bac12f25SAmit Kucheria type = "passive"; 5451bac12f25SAmit Kucheria }; 5452bac12f25SAmit Kucheria 5453bac12f25SAmit Kucheria cpu5_bottom_alert1: trip-point1 { 5454bac12f25SAmit Kucheria temperature = <95000>; 5455bac12f25SAmit Kucheria hysteresis = <2000>; 5456bac12f25SAmit Kucheria type = "passive"; 5457bac12f25SAmit Kucheria }; 5458bac12f25SAmit Kucheria 5459bac12f25SAmit Kucheria cpu5_bottom_crit: cpu_crit { 5460bac12f25SAmit Kucheria temperature = <110000>; 5461bac12f25SAmit Kucheria hysteresis = <1000>; 5462bac12f25SAmit Kucheria type = "critical"; 5463bac12f25SAmit Kucheria }; 5464bac12f25SAmit Kucheria }; 5465bac12f25SAmit Kucheria 5466bac12f25SAmit Kucheria cooling-maps { 5467bac12f25SAmit Kucheria map0 { 5468bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert0>; 5469bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5470bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5471bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5472bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5473bac12f25SAmit Kucheria }; 5474bac12f25SAmit Kucheria map1 { 5475bac12f25SAmit Kucheria trip = <&cpu5_bottom_alert1>; 5476bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5477bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5478bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5479bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5480bac12f25SAmit Kucheria }; 5481bac12f25SAmit Kucheria }; 5482bac12f25SAmit Kucheria }; 5483bac12f25SAmit Kucheria 5484bac12f25SAmit Kucheria cpu6-bottom-thermal { 5485bac12f25SAmit Kucheria polling-delay-passive = <250>; 5486bac12f25SAmit Kucheria polling-delay = <1000>; 5487bac12f25SAmit Kucheria 5488bac12f25SAmit Kucheria thermal-sensors = <&tsens0 13>; 5489bac12f25SAmit Kucheria 5490bac12f25SAmit Kucheria trips { 5491bac12f25SAmit Kucheria cpu6_bottom_alert0: trip-point0 { 5492bac12f25SAmit Kucheria temperature = <90000>; 5493bac12f25SAmit Kucheria hysteresis = <2000>; 5494bac12f25SAmit Kucheria type = "passive"; 5495bac12f25SAmit Kucheria }; 5496bac12f25SAmit Kucheria 5497bac12f25SAmit Kucheria cpu6_bottom_alert1: trip-point1 { 5498bac12f25SAmit Kucheria temperature = <95000>; 5499bac12f25SAmit Kucheria hysteresis = <2000>; 5500bac12f25SAmit Kucheria type = "passive"; 5501bac12f25SAmit Kucheria }; 5502bac12f25SAmit Kucheria 5503bac12f25SAmit Kucheria cpu6_bottom_crit: cpu_crit { 5504bac12f25SAmit Kucheria temperature = <110000>; 5505bac12f25SAmit Kucheria hysteresis = <1000>; 5506bac12f25SAmit Kucheria type = "critical"; 5507bac12f25SAmit Kucheria }; 5508bac12f25SAmit Kucheria }; 5509bac12f25SAmit Kucheria 5510bac12f25SAmit Kucheria cooling-maps { 5511bac12f25SAmit Kucheria map0 { 5512bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert0>; 5513bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5514bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5515bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5516bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5517bac12f25SAmit Kucheria }; 5518bac12f25SAmit Kucheria map1 { 5519bac12f25SAmit Kucheria trip = <&cpu6_bottom_alert1>; 5520bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5521bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5522bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5523bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5524bac12f25SAmit Kucheria }; 5525bac12f25SAmit Kucheria }; 5526bac12f25SAmit Kucheria }; 5527bac12f25SAmit Kucheria 5528bac12f25SAmit Kucheria cpu7-bottom-thermal { 5529bac12f25SAmit Kucheria polling-delay-passive = <250>; 5530bac12f25SAmit Kucheria polling-delay = <1000>; 5531bac12f25SAmit Kucheria 5532bac12f25SAmit Kucheria thermal-sensors = <&tsens0 14>; 5533bac12f25SAmit Kucheria 5534bac12f25SAmit Kucheria trips { 5535bac12f25SAmit Kucheria cpu7_bottom_alert0: trip-point0 { 5536bac12f25SAmit Kucheria temperature = <90000>; 5537bac12f25SAmit Kucheria hysteresis = <2000>; 5538bac12f25SAmit Kucheria type = "passive"; 5539bac12f25SAmit Kucheria }; 5540bac12f25SAmit Kucheria 5541bac12f25SAmit Kucheria cpu7_bottom_alert1: trip-point1 { 5542bac12f25SAmit Kucheria temperature = <95000>; 5543bac12f25SAmit Kucheria hysteresis = <2000>; 5544bac12f25SAmit Kucheria type = "passive"; 5545bac12f25SAmit Kucheria }; 5546bac12f25SAmit Kucheria 5547bac12f25SAmit Kucheria cpu7_bottom_crit: cpu_crit { 5548bac12f25SAmit Kucheria temperature = <110000>; 5549bac12f25SAmit Kucheria hysteresis = <1000>; 5550bac12f25SAmit Kucheria type = "critical"; 5551bac12f25SAmit Kucheria }; 5552bac12f25SAmit Kucheria }; 5553bac12f25SAmit Kucheria 5554bac12f25SAmit Kucheria cooling-maps { 5555bac12f25SAmit Kucheria map0 { 5556bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert0>; 5557bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5558bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5559bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5560bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5561bac12f25SAmit Kucheria }; 5562bac12f25SAmit Kucheria map1 { 5563bac12f25SAmit Kucheria trip = <&cpu7_bottom_alert1>; 5564bac12f25SAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5565bac12f25SAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5566bac12f25SAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 5567bac12f25SAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 5568bac12f25SAmit Kucheria }; 5569bac12f25SAmit Kucheria }; 5570bac12f25SAmit Kucheria }; 5571bac12f25SAmit Kucheria 5572bac12f25SAmit Kucheria aoss0-thermal { 5573bac12f25SAmit Kucheria polling-delay-passive = <250>; 5574bac12f25SAmit Kucheria polling-delay = <1000>; 5575bac12f25SAmit Kucheria 5576bac12f25SAmit Kucheria thermal-sensors = <&tsens0 0>; 5577bac12f25SAmit Kucheria 5578bac12f25SAmit Kucheria trips { 5579bac12f25SAmit Kucheria aoss0_alert0: trip-point0 { 5580bac12f25SAmit Kucheria temperature = <90000>; 5581bac12f25SAmit Kucheria hysteresis = <2000>; 5582bac12f25SAmit Kucheria type = "hot"; 5583bac12f25SAmit Kucheria }; 5584bac12f25SAmit Kucheria }; 5585bac12f25SAmit Kucheria }; 5586bac12f25SAmit Kucheria 5587bac12f25SAmit Kucheria cluster0-thermal { 5588bac12f25SAmit Kucheria polling-delay-passive = <250>; 5589bac12f25SAmit Kucheria polling-delay = <1000>; 5590bac12f25SAmit Kucheria 5591bac12f25SAmit Kucheria thermal-sensors = <&tsens0 5>; 5592bac12f25SAmit Kucheria 5593bac12f25SAmit Kucheria trips { 5594bac12f25SAmit Kucheria cluster0_alert0: trip-point0 { 5595bac12f25SAmit Kucheria temperature = <90000>; 5596bac12f25SAmit Kucheria hysteresis = <2000>; 5597bac12f25SAmit Kucheria type = "hot"; 5598bac12f25SAmit Kucheria }; 5599bac12f25SAmit Kucheria cluster0_crit: cluster0_crit { 5600bac12f25SAmit Kucheria temperature = <110000>; 5601bac12f25SAmit Kucheria hysteresis = <2000>; 5602bac12f25SAmit Kucheria type = "critical"; 5603bac12f25SAmit Kucheria }; 5604bac12f25SAmit Kucheria }; 5605bac12f25SAmit Kucheria }; 5606bac12f25SAmit Kucheria 5607bac12f25SAmit Kucheria cluster1-thermal { 5608bac12f25SAmit Kucheria polling-delay-passive = <250>; 5609bac12f25SAmit Kucheria polling-delay = <1000>; 5610bac12f25SAmit Kucheria 5611bac12f25SAmit Kucheria thermal-sensors = <&tsens0 6>; 5612bac12f25SAmit Kucheria 5613bac12f25SAmit Kucheria trips { 5614bac12f25SAmit Kucheria cluster1_alert0: trip-point0 { 5615bac12f25SAmit Kucheria temperature = <90000>; 5616bac12f25SAmit Kucheria hysteresis = <2000>; 5617bac12f25SAmit Kucheria type = "hot"; 5618bac12f25SAmit Kucheria }; 5619bac12f25SAmit Kucheria cluster1_crit: cluster1_crit { 5620bac12f25SAmit Kucheria temperature = <110000>; 5621bac12f25SAmit Kucheria hysteresis = <2000>; 5622bac12f25SAmit Kucheria type = "critical"; 5623bac12f25SAmit Kucheria }; 5624bac12f25SAmit Kucheria }; 5625bac12f25SAmit Kucheria }; 5626bac12f25SAmit Kucheria 56277be1c395SDavid Heidelberg gpu-top-thermal { 5628bac12f25SAmit Kucheria polling-delay-passive = <250>; 5629bac12f25SAmit Kucheria polling-delay = <1000>; 5630bac12f25SAmit Kucheria 5631bac12f25SAmit Kucheria thermal-sensors = <&tsens0 15>; 5632bac12f25SAmit Kucheria 5633bac12f25SAmit Kucheria trips { 5634bac12f25SAmit Kucheria gpu1_alert0: trip-point0 { 5635bac12f25SAmit Kucheria temperature = <90000>; 5636bac12f25SAmit Kucheria hysteresis = <2000>; 5637bac12f25SAmit Kucheria type = "hot"; 5638bac12f25SAmit Kucheria }; 5639bac12f25SAmit Kucheria }; 5640bac12f25SAmit Kucheria }; 5641bac12f25SAmit Kucheria 5642bac12f25SAmit Kucheria aoss1-thermal { 5643bac12f25SAmit Kucheria polling-delay-passive = <250>; 5644bac12f25SAmit Kucheria polling-delay = <1000>; 5645bac12f25SAmit Kucheria 5646bac12f25SAmit Kucheria thermal-sensors = <&tsens1 0>; 5647bac12f25SAmit Kucheria 5648bac12f25SAmit Kucheria trips { 5649bac12f25SAmit Kucheria aoss1_alert0: trip-point0 { 5650bac12f25SAmit Kucheria temperature = <90000>; 5651bac12f25SAmit Kucheria hysteresis = <2000>; 5652bac12f25SAmit Kucheria type = "hot"; 5653bac12f25SAmit Kucheria }; 5654bac12f25SAmit Kucheria }; 5655bac12f25SAmit Kucheria }; 5656bac12f25SAmit Kucheria 5657bac12f25SAmit Kucheria wlan-thermal { 5658bac12f25SAmit Kucheria polling-delay-passive = <250>; 5659bac12f25SAmit Kucheria polling-delay = <1000>; 5660bac12f25SAmit Kucheria 5661bac12f25SAmit Kucheria thermal-sensors = <&tsens1 1>; 5662bac12f25SAmit Kucheria 5663bac12f25SAmit Kucheria trips { 5664bac12f25SAmit Kucheria wlan_alert0: trip-point0 { 5665bac12f25SAmit Kucheria temperature = <90000>; 5666bac12f25SAmit Kucheria hysteresis = <2000>; 5667bac12f25SAmit Kucheria type = "hot"; 5668bac12f25SAmit Kucheria }; 5669bac12f25SAmit Kucheria }; 5670bac12f25SAmit Kucheria }; 5671bac12f25SAmit Kucheria 5672bac12f25SAmit Kucheria video-thermal { 5673bac12f25SAmit Kucheria polling-delay-passive = <250>; 5674bac12f25SAmit Kucheria polling-delay = <1000>; 5675bac12f25SAmit Kucheria 5676bac12f25SAmit Kucheria thermal-sensors = <&tsens1 2>; 5677bac12f25SAmit Kucheria 5678bac12f25SAmit Kucheria trips { 5679bac12f25SAmit Kucheria video_alert0: trip-point0 { 5680bac12f25SAmit Kucheria temperature = <90000>; 5681bac12f25SAmit Kucheria hysteresis = <2000>; 5682bac12f25SAmit Kucheria type = "hot"; 5683bac12f25SAmit Kucheria }; 5684bac12f25SAmit Kucheria }; 5685bac12f25SAmit Kucheria }; 5686bac12f25SAmit Kucheria 5687bac12f25SAmit Kucheria mem-thermal { 5688bac12f25SAmit Kucheria polling-delay-passive = <250>; 5689bac12f25SAmit Kucheria polling-delay = <1000>; 5690bac12f25SAmit Kucheria 5691bac12f25SAmit Kucheria thermal-sensors = <&tsens1 3>; 5692bac12f25SAmit Kucheria 5693bac12f25SAmit Kucheria trips { 5694bac12f25SAmit Kucheria mem_alert0: trip-point0 { 5695bac12f25SAmit Kucheria temperature = <90000>; 5696bac12f25SAmit Kucheria hysteresis = <2000>; 5697bac12f25SAmit Kucheria type = "hot"; 5698bac12f25SAmit Kucheria }; 5699bac12f25SAmit Kucheria }; 5700bac12f25SAmit Kucheria }; 5701bac12f25SAmit Kucheria 5702bac12f25SAmit Kucheria q6-hvx-thermal { 5703bac12f25SAmit Kucheria polling-delay-passive = <250>; 5704bac12f25SAmit Kucheria polling-delay = <1000>; 5705bac12f25SAmit Kucheria 5706bac12f25SAmit Kucheria thermal-sensors = <&tsens1 4>; 5707bac12f25SAmit Kucheria 5708bac12f25SAmit Kucheria trips { 5709bac12f25SAmit Kucheria q6_hvx_alert0: trip-point0 { 5710bac12f25SAmit Kucheria temperature = <90000>; 5711bac12f25SAmit Kucheria hysteresis = <2000>; 5712bac12f25SAmit Kucheria type = "hot"; 5713bac12f25SAmit Kucheria }; 5714bac12f25SAmit Kucheria }; 5715bac12f25SAmit Kucheria }; 5716bac12f25SAmit Kucheria 5717bac12f25SAmit Kucheria camera-thermal { 5718bac12f25SAmit Kucheria polling-delay-passive = <250>; 5719bac12f25SAmit Kucheria polling-delay = <1000>; 5720bac12f25SAmit Kucheria 5721bac12f25SAmit Kucheria thermal-sensors = <&tsens1 5>; 5722bac12f25SAmit Kucheria 5723bac12f25SAmit Kucheria trips { 5724bac12f25SAmit Kucheria camera_alert0: trip-point0 { 5725bac12f25SAmit Kucheria temperature = <90000>; 5726bac12f25SAmit Kucheria hysteresis = <2000>; 5727bac12f25SAmit Kucheria type = "hot"; 5728bac12f25SAmit Kucheria }; 5729bac12f25SAmit Kucheria }; 5730bac12f25SAmit Kucheria }; 5731bac12f25SAmit Kucheria 5732bac12f25SAmit Kucheria compute-thermal { 5733bac12f25SAmit Kucheria polling-delay-passive = <250>; 5734bac12f25SAmit Kucheria polling-delay = <1000>; 5735bac12f25SAmit Kucheria 5736bac12f25SAmit Kucheria thermal-sensors = <&tsens1 6>; 5737bac12f25SAmit Kucheria 5738bac12f25SAmit Kucheria trips { 5739bac12f25SAmit Kucheria compute_alert0: trip-point0 { 5740bac12f25SAmit Kucheria temperature = <90000>; 5741bac12f25SAmit Kucheria hysteresis = <2000>; 5742bac12f25SAmit Kucheria type = "hot"; 5743bac12f25SAmit Kucheria }; 5744bac12f25SAmit Kucheria }; 5745bac12f25SAmit Kucheria }; 5746bac12f25SAmit Kucheria 5747bac12f25SAmit Kucheria npu-thermal { 5748bac12f25SAmit Kucheria polling-delay-passive = <250>; 5749bac12f25SAmit Kucheria polling-delay = <1000>; 5750bac12f25SAmit Kucheria 5751bac12f25SAmit Kucheria thermal-sensors = <&tsens1 7>; 5752bac12f25SAmit Kucheria 5753bac12f25SAmit Kucheria trips { 5754bac12f25SAmit Kucheria npu_alert0: trip-point0 { 5755bac12f25SAmit Kucheria temperature = <90000>; 5756bac12f25SAmit Kucheria hysteresis = <2000>; 5757bac12f25SAmit Kucheria type = "hot"; 5758bac12f25SAmit Kucheria }; 5759bac12f25SAmit Kucheria }; 5760bac12f25SAmit Kucheria }; 5761bac12f25SAmit Kucheria 57627be1c395SDavid Heidelberg gpu-bottom-thermal { 5763bac12f25SAmit Kucheria polling-delay-passive = <250>; 5764bac12f25SAmit Kucheria polling-delay = <1000>; 5765bac12f25SAmit Kucheria 5766bac12f25SAmit Kucheria thermal-sensors = <&tsens1 8>; 5767bac12f25SAmit Kucheria 5768bac12f25SAmit Kucheria trips { 5769bac12f25SAmit Kucheria gpu2_alert0: trip-point0 { 5770bac12f25SAmit Kucheria temperature = <90000>; 5771bac12f25SAmit Kucheria hysteresis = <2000>; 5772bac12f25SAmit Kucheria type = "hot"; 5773bac12f25SAmit Kucheria }; 5774bac12f25SAmit Kucheria }; 5775bac12f25SAmit Kucheria }; 5776bac12f25SAmit Kucheria }; 577760378f1aSVenkata Narendra Kumar Gutta}; 5778