1e13c6d14SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2e13c6d14SVinod Koul/* 3e13c6d14SVinod Koul * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4e13c6d14SVinod Koul * Copyright (c) 2019, Linaro Limited 5e13c6d14SVinod Koul */ 6e13c6d14SVinod Koul 7e13c6d14SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 849076351SSibi Sankar#include <dt-bindings/power/qcom-aoss-qmp.h> 9017e7856SSibi Sankar#include <dt-bindings/power/qcom-rpmpd.h> 10e13c6d14SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 11e13c6d14SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 12d6f55763SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8150.h> 13f1269916SJonathan Marek#include <dt-bindings/clock/qcom,gpucc-sm8150.h> 14a6d435c1SSibi Sankar#include <dt-bindings/interconnect/qcom,osm-l3.h> 15d2fa630cSAmit Kucheria#include <dt-bindings/thermal/thermal.h> 16e13c6d14SVinod Koul 17e13c6d14SVinod Koul/ { 18e13c6d14SVinod Koul interrupt-parent = <&intc>; 19e13c6d14SVinod Koul 20e13c6d14SVinod Koul #address-cells = <2>; 21e13c6d14SVinod Koul #size-cells = <2>; 22e13c6d14SVinod Koul 23e13c6d14SVinod Koul chosen { }; 24e13c6d14SVinod Koul 25e13c6d14SVinod Koul clocks { 26e13c6d14SVinod Koul xo_board: xo-board { 27e13c6d14SVinod Koul compatible = "fixed-clock"; 28e13c6d14SVinod Koul #clock-cells = <0>; 29e13c6d14SVinod Koul clock-frequency = <38400000>; 30e13c6d14SVinod Koul clock-output-names = "xo_board"; 31e13c6d14SVinod Koul }; 32e13c6d14SVinod Koul 33e13c6d14SVinod Koul sleep_clk: sleep-clk { 34e13c6d14SVinod Koul compatible = "fixed-clock"; 35e13c6d14SVinod Koul #clock-cells = <0>; 36e13c6d14SVinod Koul clock-frequency = <32764>; 37e13c6d14SVinod Koul clock-output-names = "sleep_clk"; 38e13c6d14SVinod Koul }; 39e13c6d14SVinod Koul }; 40e13c6d14SVinod Koul 41e13c6d14SVinod Koul cpus { 42e13c6d14SVinod Koul #address-cells = <2>; 43e13c6d14SVinod Koul #size-cells = <0>; 44e13c6d14SVinod Koul 45e13c6d14SVinod Koul CPU0: cpu@0 { 46e13c6d14SVinod Koul device_type = "cpu"; 47e13c6d14SVinod Koul compatible = "qcom,kryo485"; 48e13c6d14SVinod Koul reg = <0x0 0x0>; 49e13c6d14SVinod Koul enable-method = "psci"; 505b2dae72SDanny Lin capacity-dmips-mhz = <488>; 515b2dae72SDanny Lin dynamic-power-coefficient = <232>; 52e13c6d14SVinod Koul next-level-cache = <&L2_0>; 53fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 0>; 54*b2e3f897SDanny Lin power-domains = <&CPU_PD0>; 55*b2e3f897SDanny Lin power-domain-names = "psci"; 56d2fa630cSAmit Kucheria #cooling-cells = <2>; 57e13c6d14SVinod Koul L2_0: l2-cache { 58e13c6d14SVinod Koul compatible = "cache"; 59e13c6d14SVinod Koul next-level-cache = <&L3_0>; 60e13c6d14SVinod Koul L3_0: l3-cache { 61e13c6d14SVinod Koul compatible = "cache"; 62e13c6d14SVinod Koul }; 63e13c6d14SVinod Koul }; 64e13c6d14SVinod Koul }; 65e13c6d14SVinod Koul 66e13c6d14SVinod Koul CPU1: cpu@100 { 67e13c6d14SVinod Koul device_type = "cpu"; 68e13c6d14SVinod Koul compatible = "qcom,kryo485"; 69e13c6d14SVinod Koul reg = <0x0 0x100>; 70e13c6d14SVinod Koul enable-method = "psci"; 715b2dae72SDanny Lin capacity-dmips-mhz = <488>; 725b2dae72SDanny Lin dynamic-power-coefficient = <232>; 73e13c6d14SVinod Koul next-level-cache = <&L2_100>; 74fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 0>; 75*b2e3f897SDanny Lin power-domains = <&CPU_PD1>; 76*b2e3f897SDanny Lin power-domain-names = "psci"; 77d2fa630cSAmit Kucheria #cooling-cells = <2>; 78e13c6d14SVinod Koul L2_100: l2-cache { 79e13c6d14SVinod Koul compatible = "cache"; 80e13c6d14SVinod Koul next-level-cache = <&L3_0>; 81e13c6d14SVinod Koul }; 82e13c6d14SVinod Koul 83e13c6d14SVinod Koul }; 84e13c6d14SVinod Koul 85e13c6d14SVinod Koul CPU2: cpu@200 { 86e13c6d14SVinod Koul device_type = "cpu"; 87e13c6d14SVinod Koul compatible = "qcom,kryo485"; 88e13c6d14SVinod Koul reg = <0x0 0x200>; 89e13c6d14SVinod Koul enable-method = "psci"; 905b2dae72SDanny Lin capacity-dmips-mhz = <488>; 915b2dae72SDanny Lin dynamic-power-coefficient = <232>; 92e13c6d14SVinod Koul next-level-cache = <&L2_200>; 93fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 0>; 94*b2e3f897SDanny Lin power-domains = <&CPU_PD2>; 95*b2e3f897SDanny Lin power-domain-names = "psci"; 96d2fa630cSAmit Kucheria #cooling-cells = <2>; 97e13c6d14SVinod Koul L2_200: l2-cache { 98e13c6d14SVinod Koul compatible = "cache"; 99e13c6d14SVinod Koul next-level-cache = <&L3_0>; 100e13c6d14SVinod Koul }; 101e13c6d14SVinod Koul }; 102e13c6d14SVinod Koul 103e13c6d14SVinod Koul CPU3: cpu@300 { 104e13c6d14SVinod Koul device_type = "cpu"; 105e13c6d14SVinod Koul compatible = "qcom,kryo485"; 106e13c6d14SVinod Koul reg = <0x0 0x300>; 107e13c6d14SVinod Koul enable-method = "psci"; 1085b2dae72SDanny Lin capacity-dmips-mhz = <488>; 1095b2dae72SDanny Lin dynamic-power-coefficient = <232>; 110e13c6d14SVinod Koul next-level-cache = <&L2_300>; 111fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 0>; 112*b2e3f897SDanny Lin power-domains = <&CPU_PD3>; 113*b2e3f897SDanny Lin power-domain-names = "psci"; 114d2fa630cSAmit Kucheria #cooling-cells = <2>; 115e13c6d14SVinod Koul L2_300: l2-cache { 116e13c6d14SVinod Koul compatible = "cache"; 117e13c6d14SVinod Koul next-level-cache = <&L3_0>; 118e13c6d14SVinod Koul }; 119e13c6d14SVinod Koul }; 120e13c6d14SVinod Koul 121e13c6d14SVinod Koul CPU4: cpu@400 { 122e13c6d14SVinod Koul device_type = "cpu"; 123e13c6d14SVinod Koul compatible = "qcom,kryo485"; 124e13c6d14SVinod Koul reg = <0x0 0x400>; 125e13c6d14SVinod Koul enable-method = "psci"; 1265b2dae72SDanny Lin capacity-dmips-mhz = <1024>; 1275b2dae72SDanny Lin dynamic-power-coefficient = <369>; 128e13c6d14SVinod Koul next-level-cache = <&L2_400>; 129fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 1>; 130*b2e3f897SDanny Lin power-domains = <&CPU_PD4>; 131*b2e3f897SDanny Lin power-domain-names = "psci"; 132d2fa630cSAmit Kucheria #cooling-cells = <2>; 133e13c6d14SVinod Koul L2_400: l2-cache { 134e13c6d14SVinod Koul compatible = "cache"; 135e13c6d14SVinod Koul next-level-cache = <&L3_0>; 136e13c6d14SVinod Koul }; 137e13c6d14SVinod Koul }; 138e13c6d14SVinod Koul 139e13c6d14SVinod Koul CPU5: cpu@500 { 140e13c6d14SVinod Koul device_type = "cpu"; 141e13c6d14SVinod Koul compatible = "qcom,kryo485"; 142e13c6d14SVinod Koul reg = <0x0 0x500>; 143e13c6d14SVinod Koul enable-method = "psci"; 1445b2dae72SDanny Lin capacity-dmips-mhz = <1024>; 1455b2dae72SDanny Lin dynamic-power-coefficient = <369>; 146e13c6d14SVinod Koul next-level-cache = <&L2_500>; 147fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 1>; 148*b2e3f897SDanny Lin power-domains = <&CPU_PD5>; 149*b2e3f897SDanny Lin power-domain-names = "psci"; 150d2fa630cSAmit Kucheria #cooling-cells = <2>; 151e13c6d14SVinod Koul L2_500: l2-cache { 152e13c6d14SVinod Koul compatible = "cache"; 153e13c6d14SVinod Koul next-level-cache = <&L3_0>; 154e13c6d14SVinod Koul }; 155e13c6d14SVinod Koul }; 156e13c6d14SVinod Koul 157e13c6d14SVinod Koul CPU6: cpu@600 { 158e13c6d14SVinod Koul device_type = "cpu"; 159e13c6d14SVinod Koul compatible = "qcom,kryo485"; 160e13c6d14SVinod Koul reg = <0x0 0x600>; 161e13c6d14SVinod Koul enable-method = "psci"; 1625b2dae72SDanny Lin capacity-dmips-mhz = <1024>; 1635b2dae72SDanny Lin dynamic-power-coefficient = <369>; 164e13c6d14SVinod Koul next-level-cache = <&L2_600>; 165fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 1>; 166*b2e3f897SDanny Lin power-domains = <&CPU_PD6>; 167*b2e3f897SDanny Lin power-domain-names = "psci"; 168d2fa630cSAmit Kucheria #cooling-cells = <2>; 169e13c6d14SVinod Koul L2_600: l2-cache { 170e13c6d14SVinod Koul compatible = "cache"; 171e13c6d14SVinod Koul next-level-cache = <&L3_0>; 172e13c6d14SVinod Koul }; 173e13c6d14SVinod Koul }; 174e13c6d14SVinod Koul 175e13c6d14SVinod Koul CPU7: cpu@700 { 176e13c6d14SVinod Koul device_type = "cpu"; 177e13c6d14SVinod Koul compatible = "qcom,kryo485"; 178e13c6d14SVinod Koul reg = <0x0 0x700>; 179e13c6d14SVinod Koul enable-method = "psci"; 1805b2dae72SDanny Lin capacity-dmips-mhz = <1024>; 1815b2dae72SDanny Lin dynamic-power-coefficient = <421>; 182e13c6d14SVinod Koul next-level-cache = <&L2_700>; 183fea8930bSSibi Sankar qcom,freq-domain = <&cpufreq_hw 2>; 184*b2e3f897SDanny Lin power-domains = <&CPU_PD7>; 185*b2e3f897SDanny Lin power-domain-names = "psci"; 186d2fa630cSAmit Kucheria #cooling-cells = <2>; 187e13c6d14SVinod Koul L2_700: l2-cache { 188e13c6d14SVinod Koul compatible = "cache"; 189e13c6d14SVinod Koul next-level-cache = <&L3_0>; 190e13c6d14SVinod Koul }; 191e13c6d14SVinod Koul }; 192066d21bcSDanny Lin 193066d21bcSDanny Lin cpu-map { 194066d21bcSDanny Lin cluster0 { 195066d21bcSDanny Lin core0 { 196066d21bcSDanny Lin cpu = <&CPU0>; 197066d21bcSDanny Lin }; 198066d21bcSDanny Lin 199066d21bcSDanny Lin core1 { 200066d21bcSDanny Lin cpu = <&CPU1>; 201066d21bcSDanny Lin }; 202066d21bcSDanny Lin 203066d21bcSDanny Lin core2 { 204066d21bcSDanny Lin cpu = <&CPU2>; 205066d21bcSDanny Lin }; 206066d21bcSDanny Lin 207066d21bcSDanny Lin core3 { 208066d21bcSDanny Lin cpu = <&CPU3>; 209066d21bcSDanny Lin }; 210066d21bcSDanny Lin 211066d21bcSDanny Lin core4 { 212066d21bcSDanny Lin cpu = <&CPU4>; 213066d21bcSDanny Lin }; 214066d21bcSDanny Lin 215066d21bcSDanny Lin core5 { 216066d21bcSDanny Lin cpu = <&CPU5>; 217066d21bcSDanny Lin }; 218066d21bcSDanny Lin 219066d21bcSDanny Lin core6 { 220066d21bcSDanny Lin cpu = <&CPU6>; 221066d21bcSDanny Lin }; 222066d21bcSDanny Lin 223066d21bcSDanny Lin core7 { 224066d21bcSDanny Lin cpu = <&CPU7>; 225066d21bcSDanny Lin }; 226066d21bcSDanny Lin }; 227066d21bcSDanny Lin }; 22881188f58SDanny Lin 22981188f58SDanny Lin idle-states { 23081188f58SDanny Lin entry-method = "psci"; 23181188f58SDanny Lin 23281188f58SDanny Lin LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 23381188f58SDanny Lin compatible = "arm,idle-state"; 23481188f58SDanny Lin idle-state-name = "little-rail-power-collapse"; 23581188f58SDanny Lin arm,psci-suspend-param = <0x40000004>; 23681188f58SDanny Lin entry-latency-us = <355>; 23781188f58SDanny Lin exit-latency-us = <909>; 23881188f58SDanny Lin min-residency-us = <3934>; 23981188f58SDanny Lin local-timer-stop; 24081188f58SDanny Lin }; 24181188f58SDanny Lin 24281188f58SDanny Lin BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 24381188f58SDanny Lin compatible = "arm,idle-state"; 24481188f58SDanny Lin idle-state-name = "big-rail-power-collapse"; 24581188f58SDanny Lin arm,psci-suspend-param = <0x40000004>; 24681188f58SDanny Lin entry-latency-us = <241>; 24781188f58SDanny Lin exit-latency-us = <1461>; 24881188f58SDanny Lin min-residency-us = <4488>; 24981188f58SDanny Lin local-timer-stop; 25081188f58SDanny Lin }; 251*b2e3f897SDanny Lin }; 25281188f58SDanny Lin 253*b2e3f897SDanny Lin domain-idle-states { 25481188f58SDanny Lin CLUSTER_SLEEP_0: cluster-sleep-0 { 255*b2e3f897SDanny Lin compatible = "domain-idle-state"; 25681188f58SDanny Lin idle-state-name = "cluster-power-collapse"; 257*b2e3f897SDanny Lin arm,psci-suspend-param = <0x4100c244>; 25881188f58SDanny Lin entry-latency-us = <3263>; 25981188f58SDanny Lin exit-latency-us = <6562>; 26081188f58SDanny Lin min-residency-us = <9987>; 26181188f58SDanny Lin local-timer-stop; 26281188f58SDanny Lin }; 26381188f58SDanny Lin }; 264e13c6d14SVinod Koul }; 265e13c6d14SVinod Koul 266e13c6d14SVinod Koul firmware { 267e13c6d14SVinod Koul scm: scm { 268e13c6d14SVinod Koul compatible = "qcom,scm-sm8150", "qcom,scm"; 269e13c6d14SVinod Koul #reset-cells = <1>; 270e13c6d14SVinod Koul }; 271e13c6d14SVinod Koul }; 272e13c6d14SVinod Koul 273d8cf9372SVinod Koul tcsr_mutex: hwlock { 274d8cf9372SVinod Koul compatible = "qcom,tcsr-mutex"; 275d8cf9372SVinod Koul syscon = <&tcsr_mutex_regs 0 0x1000>; 276d8cf9372SVinod Koul #hwlock-cells = <1>; 277d8cf9372SVinod Koul }; 278d8cf9372SVinod Koul 279e13c6d14SVinod Koul memory@80000000 { 280e13c6d14SVinod Koul device_type = "memory"; 281e13c6d14SVinod Koul /* We expect the bootloader to fill in the size */ 282e13c6d14SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 283e13c6d14SVinod Koul }; 284e13c6d14SVinod Koul 285d8cf9372SVinod Koul pmu { 286d8cf9372SVinod Koul compatible = "arm,armv8-pmuv3"; 287d8cf9372SVinod Koul interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; 288d8cf9372SVinod Koul }; 289d8cf9372SVinod Koul 290e13c6d14SVinod Koul psci { 291e13c6d14SVinod Koul compatible = "arm,psci-1.0"; 292e13c6d14SVinod Koul method = "smc"; 293*b2e3f897SDanny Lin 294*b2e3f897SDanny Lin CPU_PD0: cpu0 { 295*b2e3f897SDanny Lin #power-domain-cells = <0>; 296*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 297*b2e3f897SDanny Lin domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 298*b2e3f897SDanny Lin }; 299*b2e3f897SDanny Lin 300*b2e3f897SDanny Lin CPU_PD1: cpu1 { 301*b2e3f897SDanny Lin #power-domain-cells = <0>; 302*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 303*b2e3f897SDanny Lin domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 304*b2e3f897SDanny Lin }; 305*b2e3f897SDanny Lin 306*b2e3f897SDanny Lin CPU_PD2: cpu2 { 307*b2e3f897SDanny Lin #power-domain-cells = <0>; 308*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 309*b2e3f897SDanny Lin domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 310*b2e3f897SDanny Lin }; 311*b2e3f897SDanny Lin 312*b2e3f897SDanny Lin CPU_PD3: cpu3 { 313*b2e3f897SDanny Lin #power-domain-cells = <0>; 314*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 315*b2e3f897SDanny Lin domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 316*b2e3f897SDanny Lin }; 317*b2e3f897SDanny Lin 318*b2e3f897SDanny Lin CPU_PD4: cpu4 { 319*b2e3f897SDanny Lin #power-domain-cells = <0>; 320*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 321*b2e3f897SDanny Lin domain-idle-states = <&BIG_CPU_SLEEP_0>; 322*b2e3f897SDanny Lin }; 323*b2e3f897SDanny Lin 324*b2e3f897SDanny Lin CPU_PD5: cpu5 { 325*b2e3f897SDanny Lin #power-domain-cells = <0>; 326*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 327*b2e3f897SDanny Lin domain-idle-states = <&BIG_CPU_SLEEP_0>; 328*b2e3f897SDanny Lin }; 329*b2e3f897SDanny Lin 330*b2e3f897SDanny Lin CPU_PD6: cpu6 { 331*b2e3f897SDanny Lin #power-domain-cells = <0>; 332*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 333*b2e3f897SDanny Lin domain-idle-states = <&BIG_CPU_SLEEP_0>; 334*b2e3f897SDanny Lin }; 335*b2e3f897SDanny Lin 336*b2e3f897SDanny Lin CPU_PD7: cpu7 { 337*b2e3f897SDanny Lin #power-domain-cells = <0>; 338*b2e3f897SDanny Lin power-domains = <&CLUSTER_PD>; 339*b2e3f897SDanny Lin domain-idle-states = <&BIG_CPU_SLEEP_0>; 340*b2e3f897SDanny Lin }; 341*b2e3f897SDanny Lin 342*b2e3f897SDanny Lin CLUSTER_PD: cpu-cluster0 { 343*b2e3f897SDanny Lin #power-domain-cells = <0>; 344*b2e3f897SDanny Lin domain-idle-states = <&CLUSTER_SLEEP_0>; 345*b2e3f897SDanny Lin }; 346e13c6d14SVinod Koul }; 347e13c6d14SVinod Koul 348912c373aSVinod Koul reserved-memory { 349912c373aSVinod Koul #address-cells = <2>; 350912c373aSVinod Koul #size-cells = <2>; 351912c373aSVinod Koul ranges; 352912c373aSVinod Koul 353912c373aSVinod Koul hyp_mem: memory@85700000 { 354912c373aSVinod Koul reg = <0x0 0x85700000 0x0 0x600000>; 355912c373aSVinod Koul no-map; 356912c373aSVinod Koul }; 357912c373aSVinod Koul 358912c373aSVinod Koul xbl_mem: memory@85d00000 { 359912c373aSVinod Koul reg = <0x0 0x85d00000 0x0 0x140000>; 360912c373aSVinod Koul no-map; 361912c373aSVinod Koul }; 362912c373aSVinod Koul 363912c373aSVinod Koul aop_mem: memory@85f00000 { 364912c373aSVinod Koul reg = <0x0 0x85f00000 0x0 0x20000>; 365912c373aSVinod Koul no-map; 366912c373aSVinod Koul }; 367912c373aSVinod Koul 368912c373aSVinod Koul aop_cmd_db: memory@85f20000 { 369912c373aSVinod Koul compatible = "qcom,cmd-db"; 370912c373aSVinod Koul reg = <0x0 0x85f20000 0x0 0x20000>; 371912c373aSVinod Koul no-map; 372912c373aSVinod Koul }; 373912c373aSVinod Koul 374912c373aSVinod Koul smem_mem: memory@86000000 { 375912c373aSVinod Koul reg = <0x0 0x86000000 0x0 0x200000>; 376912c373aSVinod Koul no-map; 377912c373aSVinod Koul }; 378912c373aSVinod Koul 379912c373aSVinod Koul tz_mem: memory@86200000 { 380912c373aSVinod Koul reg = <0x0 0x86200000 0x0 0x3900000>; 381912c373aSVinod Koul no-map; 382912c373aSVinod Koul }; 383912c373aSVinod Koul 384912c373aSVinod Koul rmtfs_mem: memory@89b00000 { 385912c373aSVinod Koul compatible = "qcom,rmtfs-mem"; 386912c373aSVinod Koul reg = <0x0 0x89b00000 0x0 0x200000>; 387912c373aSVinod Koul no-map; 388912c373aSVinod Koul 389912c373aSVinod Koul qcom,client-id = <1>; 390912c373aSVinod Koul qcom,vmid = <15>; 391912c373aSVinod Koul }; 392912c373aSVinod Koul 393912c373aSVinod Koul camera_mem: memory@8b700000 { 394912c373aSVinod Koul reg = <0x0 0x8b700000 0x0 0x500000>; 395912c373aSVinod Koul no-map; 396912c373aSVinod Koul }; 397912c373aSVinod Koul 398912c373aSVinod Koul wlan_mem: memory@8bc00000 { 399912c373aSVinod Koul reg = <0x0 0x8bc00000 0x0 0x180000>; 400912c373aSVinod Koul no-map; 401912c373aSVinod Koul }; 402912c373aSVinod Koul 403912c373aSVinod Koul npu_mem: memory@8bd80000 { 404912c373aSVinod Koul reg = <0x0 0x8bd80000 0x0 0x80000>; 405912c373aSVinod Koul no-map; 406912c373aSVinod Koul }; 407912c373aSVinod Koul 408912c373aSVinod Koul adsp_mem: memory@8be00000 { 409912c373aSVinod Koul reg = <0x0 0x8be00000 0x0 0x1a00000>; 410912c373aSVinod Koul no-map; 411912c373aSVinod Koul }; 412912c373aSVinod Koul 413912c373aSVinod Koul mpss_mem: memory@8d800000 { 414912c373aSVinod Koul reg = <0x0 0x8d800000 0x0 0x9600000>; 415912c373aSVinod Koul no-map; 416912c373aSVinod Koul }; 417912c373aSVinod Koul 418912c373aSVinod Koul venus_mem: memory@96e00000 { 419912c373aSVinod Koul reg = <0x0 0x96e00000 0x0 0x500000>; 420912c373aSVinod Koul no-map; 421912c373aSVinod Koul }; 422912c373aSVinod Koul 423912c373aSVinod Koul slpi_mem: memory@97300000 { 424912c373aSVinod Koul reg = <0x0 0x97300000 0x0 0x1400000>; 425912c373aSVinod Koul no-map; 426912c373aSVinod Koul }; 427912c373aSVinod Koul 428912c373aSVinod Koul ipa_fw_mem: memory@98700000 { 429912c373aSVinod Koul reg = <0x0 0x98700000 0x0 0x10000>; 430912c373aSVinod Koul no-map; 431912c373aSVinod Koul }; 432912c373aSVinod Koul 433912c373aSVinod Koul ipa_gsi_mem: memory@98710000 { 434912c373aSVinod Koul reg = <0x0 0x98710000 0x0 0x5000>; 435912c373aSVinod Koul no-map; 436912c373aSVinod Koul }; 437912c373aSVinod Koul 438912c373aSVinod Koul gpu_mem: memory@98715000 { 439912c373aSVinod Koul reg = <0x0 0x98715000 0x0 0x2000>; 440912c373aSVinod Koul no-map; 441912c373aSVinod Koul }; 442912c373aSVinod Koul 443912c373aSVinod Koul spss_mem: memory@98800000 { 444912c373aSVinod Koul reg = <0x0 0x98800000 0x0 0x100000>; 445912c373aSVinod Koul no-map; 446912c373aSVinod Koul }; 447912c373aSVinod Koul 448912c373aSVinod Koul cdsp_mem: memory@98900000 { 449912c373aSVinod Koul reg = <0x0 0x98900000 0x0 0x1400000>; 450912c373aSVinod Koul no-map; 451912c373aSVinod Koul }; 452912c373aSVinod Koul 453912c373aSVinod Koul qseecom_mem: memory@9e400000 { 454912c373aSVinod Koul reg = <0x0 0x9e400000 0x0 0x1400000>; 455912c373aSVinod Koul no-map; 456912c373aSVinod Koul }; 457912c373aSVinod Koul }; 458912c373aSVinod Koul 459d8cf9372SVinod Koul smem { 460d8cf9372SVinod Koul compatible = "qcom,smem"; 461d8cf9372SVinod Koul memory-region = <&smem_mem>; 462d8cf9372SVinod Koul hwlocks = <&tcsr_mutex 3>; 463d8cf9372SVinod Koul }; 464d8cf9372SVinod Koul 46561025b81SSibi Sankar smp2p-cdsp { 46661025b81SSibi Sankar compatible = "qcom,smp2p"; 46761025b81SSibi Sankar qcom,smem = <94>, <432>; 46861025b81SSibi Sankar 46961025b81SSibi Sankar interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; 47061025b81SSibi Sankar 47161025b81SSibi Sankar mboxes = <&apss_shared 6>; 47261025b81SSibi Sankar 47361025b81SSibi Sankar qcom,local-pid = <0>; 47461025b81SSibi Sankar qcom,remote-pid = <5>; 47561025b81SSibi Sankar 47661025b81SSibi Sankar cdsp_smp2p_out: master-kernel { 47761025b81SSibi Sankar qcom,entry-name = "master-kernel"; 47861025b81SSibi Sankar #qcom,smem-state-cells = <1>; 47961025b81SSibi Sankar }; 48061025b81SSibi Sankar 48161025b81SSibi Sankar cdsp_smp2p_in: slave-kernel { 48261025b81SSibi Sankar qcom,entry-name = "slave-kernel"; 48361025b81SSibi Sankar 48461025b81SSibi Sankar interrupt-controller; 48561025b81SSibi Sankar #interrupt-cells = <2>; 48661025b81SSibi Sankar }; 48761025b81SSibi Sankar }; 48861025b81SSibi Sankar 48961025b81SSibi Sankar smp2p-lpass { 49061025b81SSibi Sankar compatible = "qcom,smp2p"; 49161025b81SSibi Sankar qcom,smem = <443>, <429>; 49261025b81SSibi Sankar 49361025b81SSibi Sankar interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; 49461025b81SSibi Sankar 49561025b81SSibi Sankar mboxes = <&apss_shared 10>; 49661025b81SSibi Sankar 49761025b81SSibi Sankar qcom,local-pid = <0>; 49861025b81SSibi Sankar qcom,remote-pid = <2>; 49961025b81SSibi Sankar 50061025b81SSibi Sankar adsp_smp2p_out: master-kernel { 50161025b81SSibi Sankar qcom,entry-name = "master-kernel"; 50261025b81SSibi Sankar #qcom,smem-state-cells = <1>; 50361025b81SSibi Sankar }; 50461025b81SSibi Sankar 50561025b81SSibi Sankar adsp_smp2p_in: slave-kernel { 50661025b81SSibi Sankar qcom,entry-name = "slave-kernel"; 50761025b81SSibi Sankar 50861025b81SSibi Sankar interrupt-controller; 50961025b81SSibi Sankar #interrupt-cells = <2>; 51061025b81SSibi Sankar }; 51161025b81SSibi Sankar }; 51261025b81SSibi Sankar 51361025b81SSibi Sankar smp2p-mpss { 51461025b81SSibi Sankar compatible = "qcom,smp2p"; 51561025b81SSibi Sankar qcom,smem = <435>, <428>; 51661025b81SSibi Sankar 51761025b81SSibi Sankar interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; 51861025b81SSibi Sankar 51961025b81SSibi Sankar mboxes = <&apss_shared 14>; 52061025b81SSibi Sankar 52161025b81SSibi Sankar qcom,local-pid = <0>; 52261025b81SSibi Sankar qcom,remote-pid = <1>; 52361025b81SSibi Sankar 52461025b81SSibi Sankar modem_smp2p_out: master-kernel { 52561025b81SSibi Sankar qcom,entry-name = "master-kernel"; 52661025b81SSibi Sankar #qcom,smem-state-cells = <1>; 52761025b81SSibi Sankar }; 52861025b81SSibi Sankar 52961025b81SSibi Sankar modem_smp2p_in: slave-kernel { 53061025b81SSibi Sankar qcom,entry-name = "slave-kernel"; 53161025b81SSibi Sankar 53261025b81SSibi Sankar interrupt-controller; 53361025b81SSibi Sankar #interrupt-cells = <2>; 53461025b81SSibi Sankar }; 53561025b81SSibi Sankar }; 53661025b81SSibi Sankar 53761025b81SSibi Sankar smp2p-slpi { 53861025b81SSibi Sankar compatible = "qcom,smp2p"; 53961025b81SSibi Sankar qcom,smem = <481>, <430>; 54061025b81SSibi Sankar 54161025b81SSibi Sankar interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>; 54261025b81SSibi Sankar 54361025b81SSibi Sankar mboxes = <&apss_shared 26>; 54461025b81SSibi Sankar 54561025b81SSibi Sankar qcom,local-pid = <0>; 54661025b81SSibi Sankar qcom,remote-pid = <3>; 54761025b81SSibi Sankar 54861025b81SSibi Sankar slpi_smp2p_out: master-kernel { 54961025b81SSibi Sankar qcom,entry-name = "master-kernel"; 55061025b81SSibi Sankar #qcom,smem-state-cells = <1>; 55161025b81SSibi Sankar }; 55261025b81SSibi Sankar 55361025b81SSibi Sankar slpi_smp2p_in: slave-kernel { 55461025b81SSibi Sankar qcom,entry-name = "slave-kernel"; 55561025b81SSibi Sankar 55661025b81SSibi Sankar interrupt-controller; 55761025b81SSibi Sankar #interrupt-cells = <2>; 55861025b81SSibi Sankar }; 55961025b81SSibi Sankar }; 56061025b81SSibi Sankar 561e13c6d14SVinod Koul soc: soc@0 { 562e13c6d14SVinod Koul #address-cells = <2>; 563e13c6d14SVinod Koul #size-cells = <2>; 564e13c6d14SVinod Koul ranges = <0 0 0 0 0x10 0>; 565e13c6d14SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 566e13c6d14SVinod Koul compatible = "simple-bus"; 567e13c6d14SVinod Koul 568e13c6d14SVinod Koul gcc: clock-controller@100000 { 569e13c6d14SVinod Koul compatible = "qcom,gcc-sm8150"; 570e13c6d14SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 571e13c6d14SVinod Koul #clock-cells = <1>; 572e13c6d14SVinod Koul #reset-cells = <1>; 573e13c6d14SVinod Koul #power-domain-cells = <1>; 574e13c6d14SVinod Koul clock-names = "bi_tcxo", 575e13c6d14SVinod Koul "sleep_clk"; 576e13c6d14SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 577e13c6d14SVinod Koul <&sleep_clk>; 578e13c6d14SVinod Koul }; 579e13c6d14SVinod Koul 580e13c6d14SVinod Koul qupv3_id_1: geniqup@ac0000 { 581e13c6d14SVinod Koul compatible = "qcom,geni-se-qup"; 582e13c6d14SVinod Koul reg = <0x0 0x00ac0000 0x0 0x6000>; 583e13c6d14SVinod Koul clock-names = "m-ahb", "s-ahb"; 584d6f55763SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 585d6f55763SVinod Koul <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 586e13c6d14SVinod Koul #address-cells = <2>; 587e13c6d14SVinod Koul #size-cells = <2>; 588e13c6d14SVinod Koul ranges; 589e13c6d14SVinod Koul status = "disabled"; 590e13c6d14SVinod Koul 591e13c6d14SVinod Koul uart2: serial@a90000 { 592e13c6d14SVinod Koul compatible = "qcom,geni-debug-uart"; 593e13c6d14SVinod Koul reg = <0x0 0x00a90000 0x0 0x4000>; 594e13c6d14SVinod Koul clock-names = "se"; 595d6f55763SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 596e13c6d14SVinod Koul interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 597e13c6d14SVinod Koul status = "disabled"; 598e13c6d14SVinod Koul }; 599e13c6d14SVinod Koul }; 600e13c6d14SVinod Koul 60171a2fc6eSJonathan Marek config_noc: interconnect@1500000 { 60271a2fc6eSJonathan Marek compatible = "qcom,sm8150-config-noc"; 60371a2fc6eSJonathan Marek reg = <0 0x01500000 0 0x7400>; 60471a2fc6eSJonathan Marek #interconnect-cells = <1>; 60571a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 60671a2fc6eSJonathan Marek }; 60771a2fc6eSJonathan Marek 60871a2fc6eSJonathan Marek system_noc: interconnect@1620000 { 60971a2fc6eSJonathan Marek compatible = "qcom,sm8150-system-noc"; 61071a2fc6eSJonathan Marek reg = <0 0x01620000 0 0x19400>; 61171a2fc6eSJonathan Marek #interconnect-cells = <1>; 61271a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 61371a2fc6eSJonathan Marek }; 61471a2fc6eSJonathan Marek 61571a2fc6eSJonathan Marek mc_virt: interconnect@163a000 { 61671a2fc6eSJonathan Marek compatible = "qcom,sm8150-mc-virt"; 61771a2fc6eSJonathan Marek reg = <0 0x0163a000 0 0x1000>; 61871a2fc6eSJonathan Marek #interconnect-cells = <1>; 61971a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 62071a2fc6eSJonathan Marek }; 62171a2fc6eSJonathan Marek 62271a2fc6eSJonathan Marek aggre1_noc: interconnect@16e0000 { 62371a2fc6eSJonathan Marek compatible = "qcom,sm8150-aggre1-noc"; 62471a2fc6eSJonathan Marek reg = <0 0x016e0000 0 0xd080>; 62571a2fc6eSJonathan Marek #interconnect-cells = <1>; 62671a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 62771a2fc6eSJonathan Marek }; 62871a2fc6eSJonathan Marek 62971a2fc6eSJonathan Marek aggre2_noc: interconnect@1700000 { 63071a2fc6eSJonathan Marek compatible = "qcom,sm8150-aggre2-noc"; 63171a2fc6eSJonathan Marek reg = <0 0x01700000 0 0x20000>; 63271a2fc6eSJonathan Marek #interconnect-cells = <1>; 63371a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 63471a2fc6eSJonathan Marek }; 63571a2fc6eSJonathan Marek 63671a2fc6eSJonathan Marek compute_noc: interconnect@1720000 { 63771a2fc6eSJonathan Marek compatible = "qcom,sm8150-compute-noc"; 63871a2fc6eSJonathan Marek reg = <0 0x01720000 0 0x7000>; 63971a2fc6eSJonathan Marek #interconnect-cells = <1>; 64071a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 64171a2fc6eSJonathan Marek }; 64271a2fc6eSJonathan Marek 64371a2fc6eSJonathan Marek mmss_noc: interconnect@1740000 { 64471a2fc6eSJonathan Marek compatible = "qcom,sm8150-mmss-noc"; 64571a2fc6eSJonathan Marek reg = <0 0x01740000 0 0x1c100>; 64671a2fc6eSJonathan Marek #interconnect-cells = <1>; 64771a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 64871a2fc6eSJonathan Marek }; 64971a2fc6eSJonathan Marek 650bb1f7cf6SSouradeep Chowdhury system-cache-controller@9200000 { 651bb1f7cf6SSouradeep Chowdhury compatible = "qcom,sm8150-llcc"; 652bb1f7cf6SSouradeep Chowdhury reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; 653bb1f7cf6SSouradeep Chowdhury reg-names = "llcc_base", "llcc_broadcast_base"; 654bb1f7cf6SSouradeep Chowdhury interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; 655bb1f7cf6SSouradeep Chowdhury }; 656bb1f7cf6SSouradeep Chowdhury 6573834a2e9SVinod Koul ufs_mem_hc: ufshc@1d84000 { 6583834a2e9SVinod Koul compatible = "qcom,sm8150-ufshc", "qcom,ufshc", 6593834a2e9SVinod Koul "jedec,ufs-2.0"; 6603834a2e9SVinod Koul reg = <0 0x01d84000 0 0x2500>; 6613834a2e9SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 6623834a2e9SVinod Koul phys = <&ufs_mem_phy_lanes>; 6633834a2e9SVinod Koul phy-names = "ufsphy"; 6643834a2e9SVinod Koul lanes-per-direction = <2>; 6653834a2e9SVinod Koul #reset-cells = <1>; 6663834a2e9SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 6673834a2e9SVinod Koul reset-names = "rst"; 6683834a2e9SVinod Koul 66948156232SJonathan Marek iommus = <&apps_smmu 0x300 0>; 67048156232SJonathan Marek 6713834a2e9SVinod Koul clock-names = 6723834a2e9SVinod Koul "core_clk", 6733834a2e9SVinod Koul "bus_aggr_clk", 6743834a2e9SVinod Koul "iface_clk", 6753834a2e9SVinod Koul "core_clk_unipro", 6763834a2e9SVinod Koul "ref_clk", 6773834a2e9SVinod Koul "tx_lane0_sync_clk", 6783834a2e9SVinod Koul "rx_lane0_sync_clk", 6793834a2e9SVinod Koul "rx_lane1_sync_clk"; 6803834a2e9SVinod Koul clocks = 6813834a2e9SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 6823834a2e9SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 6833834a2e9SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 6843834a2e9SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 6853834a2e9SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 6863834a2e9SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 6873834a2e9SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 6883834a2e9SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 6893834a2e9SVinod Koul freq-table-hz = 6903834a2e9SVinod Koul <37500000 300000000>, 6913834a2e9SVinod Koul <0 0>, 6923834a2e9SVinod Koul <0 0>, 6933834a2e9SVinod Koul <37500000 300000000>, 6943834a2e9SVinod Koul <0 0>, 6953834a2e9SVinod Koul <0 0>, 6963834a2e9SVinod Koul <0 0>, 6973834a2e9SVinod Koul <0 0>; 6983834a2e9SVinod Koul 6993834a2e9SVinod Koul status = "disabled"; 7003834a2e9SVinod Koul }; 7013834a2e9SVinod Koul 7023834a2e9SVinod Koul ufs_mem_phy: phy@1d87000 { 7033834a2e9SVinod Koul compatible = "qcom,sm8150-qmp-ufs-phy"; 704c79ec891SVinod Koul reg = <0 0x01d87000 0 0x1c0>; 7053834a2e9SVinod Koul #address-cells = <2>; 7063834a2e9SVinod Koul #size-cells = <2>; 7073834a2e9SVinod Koul ranges; 7083834a2e9SVinod Koul clock-names = "ref", 7093834a2e9SVinod Koul "ref_aux"; 7103834a2e9SVinod Koul clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, 7113834a2e9SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 7123834a2e9SVinod Koul 7133834a2e9SVinod Koul resets = <&ufs_mem_hc 0>; 7143834a2e9SVinod Koul reset-names = "ufsphy"; 7153834a2e9SVinod Koul status = "disabled"; 7163834a2e9SVinod Koul 7173834a2e9SVinod Koul ufs_mem_phy_lanes: lanes@1d87400 { 7183834a2e9SVinod Koul reg = <0 0x01d87400 0 0x108>, 7193834a2e9SVinod Koul <0 0x01d87600 0 0x1e0>, 7203834a2e9SVinod Koul <0 0x01d87c00 0 0x1dc>, 7213834a2e9SVinod Koul <0 0x01d87800 0 0x108>, 7223834a2e9SVinod Koul <0 0x01d87a00 0 0x1e0>; 7233834a2e9SVinod Koul #phy-cells = <0>; 7243834a2e9SVinod Koul }; 7253834a2e9SVinod Koul }; 7263834a2e9SVinod Koul 72771a2fc6eSJonathan Marek ipa_virt: interconnect@1e00000 { 72871a2fc6eSJonathan Marek compatible = "qcom,sm8150-ipa-virt"; 72971a2fc6eSJonathan Marek reg = <0 0x01e00000 0 0x1000>; 73071a2fc6eSJonathan Marek #interconnect-cells = <1>; 73171a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 73271a2fc6eSJonathan Marek }; 73371a2fc6eSJonathan Marek 734d8cf9372SVinod Koul tcsr_mutex_regs: syscon@1f40000 { 735d8cf9372SVinod Koul compatible = "syscon"; 736d8cf9372SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 737d8cf9372SVinod Koul }; 738d8cf9372SVinod Koul 73949076351SSibi Sankar remoteproc_slpi: remoteproc@2400000 { 74049076351SSibi Sankar compatible = "qcom,sm8150-slpi-pas"; 74149076351SSibi Sankar reg = <0x0 0x02400000 0x0 0x4040>; 74249076351SSibi Sankar 74349076351SSibi Sankar interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>, 74449076351SSibi Sankar <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 74549076351SSibi Sankar <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 74649076351SSibi Sankar <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 74749076351SSibi Sankar <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; 74849076351SSibi Sankar interrupt-names = "wdog", "fatal", "ready", 74949076351SSibi Sankar "handover", "stop-ack"; 75049076351SSibi Sankar 75149076351SSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>; 75249076351SSibi Sankar clock-names = "xo"; 75349076351SSibi Sankar 75449076351SSibi Sankar power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 755d0770627SBjorn Andersson <&rpmhpd 3>, 756d0770627SBjorn Andersson <&rpmhpd 2>; 75749076351SSibi Sankar power-domain-names = "load_state", "lcx", "lmx"; 75849076351SSibi Sankar 75949076351SSibi Sankar memory-region = <&slpi_mem>; 76049076351SSibi Sankar 76149076351SSibi Sankar qcom,smem-states = <&slpi_smp2p_out 0>; 76249076351SSibi Sankar qcom,smem-state-names = "stop"; 76349076351SSibi Sankar 76449076351SSibi Sankar status = "disabled"; 76549076351SSibi Sankar 76649076351SSibi Sankar glink-edge { 76749076351SSibi Sankar interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>; 76849076351SSibi Sankar label = "dsps"; 76949076351SSibi Sankar qcom,remote-pid = <3>; 77049076351SSibi Sankar mboxes = <&apss_shared 24>; 77149076351SSibi Sankar }; 77249076351SSibi Sankar }; 77349076351SSibi Sankar 774f30ac26dSJonathan Marek gpu: gpu@2c00000 { 775f30ac26dSJonathan Marek /* 776f30ac26dSJonathan Marek * note: the amd,imageon compatible makes it possible 777f30ac26dSJonathan Marek * to use the drm/msm driver without the display node, 778f30ac26dSJonathan Marek * make sure to remove it when display node is added 779f30ac26dSJonathan Marek */ 780f30ac26dSJonathan Marek compatible = "qcom,adreno-640.1", 781f30ac26dSJonathan Marek "qcom,adreno", 782f30ac26dSJonathan Marek "amd,imageon"; 783f30ac26dSJonathan Marek #stream-id-cells = <16>; 784f30ac26dSJonathan Marek 785f30ac26dSJonathan Marek reg = <0 0x02c00000 0 0x40000>; 786f30ac26dSJonathan Marek reg-names = "kgsl_3d0_reg_memory"; 787f30ac26dSJonathan Marek 788f30ac26dSJonathan Marek interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; 789f30ac26dSJonathan Marek 790f30ac26dSJonathan Marek iommus = <&adreno_smmu 0 0x401>; 791f30ac26dSJonathan Marek 792f30ac26dSJonathan Marek operating-points-v2 = <&gpu_opp_table>; 793f30ac26dSJonathan Marek 794f30ac26dSJonathan Marek qcom,gmu = <&gmu>; 795f30ac26dSJonathan Marek 796f30ac26dSJonathan Marek zap-shader { 797f30ac26dSJonathan Marek memory-region = <&gpu_mem>; 798f30ac26dSJonathan Marek }; 799f30ac26dSJonathan Marek 800f30ac26dSJonathan Marek /* note: downstream checks gpu binning for 675 Mhz */ 801f30ac26dSJonathan Marek gpu_opp_table: opp-table { 802f30ac26dSJonathan Marek compatible = "operating-points-v2"; 803f30ac26dSJonathan Marek 804f30ac26dSJonathan Marek opp-675000000 { 805f30ac26dSJonathan Marek opp-hz = /bits/ 64 <675000000>; 806f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 807f30ac26dSJonathan Marek }; 808f30ac26dSJonathan Marek 809f30ac26dSJonathan Marek opp-585000000 { 810f30ac26dSJonathan Marek opp-hz = /bits/ 64 <585000000>; 811f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 812f30ac26dSJonathan Marek }; 813f30ac26dSJonathan Marek 814f30ac26dSJonathan Marek opp-499200000 { 815f30ac26dSJonathan Marek opp-hz = /bits/ 64 <499200000>; 816f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; 817f30ac26dSJonathan Marek }; 818f30ac26dSJonathan Marek 819f30ac26dSJonathan Marek opp-427000000 { 820f30ac26dSJonathan Marek opp-hz = /bits/ 64 <427000000>; 821f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 822f30ac26dSJonathan Marek }; 823f30ac26dSJonathan Marek 824f30ac26dSJonathan Marek opp-345000000 { 825f30ac26dSJonathan Marek opp-hz = /bits/ 64 <345000000>; 826f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 827f30ac26dSJonathan Marek }; 828f30ac26dSJonathan Marek 829f30ac26dSJonathan Marek opp-257000000 { 830f30ac26dSJonathan Marek opp-hz = /bits/ 64 <257000000>; 831f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 832f30ac26dSJonathan Marek }; 833f30ac26dSJonathan Marek }; 834f30ac26dSJonathan Marek }; 835f30ac26dSJonathan Marek 836f30ac26dSJonathan Marek gmu: gmu@2c6a000 { 837f30ac26dSJonathan Marek compatible="qcom,adreno-gmu-640.1", "qcom,adreno-gmu"; 838f30ac26dSJonathan Marek 839f30ac26dSJonathan Marek reg = <0 0x02c6a000 0 0x30000>, 840f30ac26dSJonathan Marek <0 0x0b290000 0 0x10000>, 841f30ac26dSJonathan Marek <0 0x0b490000 0 0x10000>; 842f30ac26dSJonathan Marek reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; 843f30ac26dSJonathan Marek 844f30ac26dSJonathan Marek interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 845f30ac26dSJonathan Marek <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 846f30ac26dSJonathan Marek interrupt-names = "hfi", "gmu"; 847f30ac26dSJonathan Marek 848f1269916SJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 849f1269916SJonathan Marek <&gpucc GPU_CC_CX_GMU_CLK>, 850f1269916SJonathan Marek <&gpucc GPU_CC_CXO_CLK>, 851f30ac26dSJonathan Marek <&gcc GCC_DDRSS_GPU_AXI_CLK>, 852f30ac26dSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>; 853f30ac26dSJonathan Marek clock-names = "ahb", "gmu", "cxo", "axi", "memnoc"; 854f30ac26dSJonathan Marek 855f1269916SJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>, 856f1269916SJonathan Marek <&gpucc GPU_GX_GDSC>; 857f30ac26dSJonathan Marek power-domain-names = "cx", "gx"; 858f30ac26dSJonathan Marek 859f30ac26dSJonathan Marek iommus = <&adreno_smmu 5 0x400>; 860f30ac26dSJonathan Marek 861f30ac26dSJonathan Marek operating-points-v2 = <&gmu_opp_table>; 862f30ac26dSJonathan Marek 863f30ac26dSJonathan Marek gmu_opp_table: opp-table { 864f30ac26dSJonathan Marek compatible = "operating-points-v2"; 865f30ac26dSJonathan Marek 866f30ac26dSJonathan Marek opp-200000000 { 867f30ac26dSJonathan Marek opp-hz = /bits/ 64 <200000000>; 868f30ac26dSJonathan Marek opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 869f30ac26dSJonathan Marek }; 870f30ac26dSJonathan Marek }; 871f30ac26dSJonathan Marek }; 872f30ac26dSJonathan Marek 873f30ac26dSJonathan Marek gpucc: clock-controller@2c90000 { 874f30ac26dSJonathan Marek compatible = "qcom,sm8150-gpucc"; 875f30ac26dSJonathan Marek reg = <0 0x02c90000 0 0x9000>; 876f30ac26dSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>, 877f30ac26dSJonathan Marek <&gcc GCC_GPU_GPLL0_CLK_SRC>, 878f30ac26dSJonathan Marek <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 879f30ac26dSJonathan Marek clock-names = "bi_tcxo", 880f30ac26dSJonathan Marek "gcc_gpu_gpll0_clk_src", 881f30ac26dSJonathan Marek "gcc_gpu_gpll0_div_clk_src"; 882f30ac26dSJonathan Marek #clock-cells = <1>; 883f30ac26dSJonathan Marek #reset-cells = <1>; 884f30ac26dSJonathan Marek #power-domain-cells = <1>; 885f30ac26dSJonathan Marek }; 886f30ac26dSJonathan Marek 887f30ac26dSJonathan Marek adreno_smmu: iommu@2ca0000 { 888f30ac26dSJonathan Marek compatible = "qcom,sm8150-smmu-500", "arm,mmu-500"; 889f30ac26dSJonathan Marek reg = <0 0x02ca0000 0 0x10000>; 890f30ac26dSJonathan Marek #iommu-cells = <2>; 891f30ac26dSJonathan Marek #global-interrupts = <1>; 892f30ac26dSJonathan Marek interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>, 893f30ac26dSJonathan Marek <GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH>, 894f30ac26dSJonathan Marek <GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH>, 895f30ac26dSJonathan Marek <GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>, 896f30ac26dSJonathan Marek <GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>, 897f30ac26dSJonathan Marek <GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>, 898f30ac26dSJonathan Marek <GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH>, 899f30ac26dSJonathan Marek <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>, 900f30ac26dSJonathan Marek <GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH>; 901f1269916SJonathan Marek clocks = <&gpucc GPU_CC_AHB_CLK>, 902f30ac26dSJonathan Marek <&gcc GCC_GPU_MEMNOC_GFX_CLK>, 903f30ac26dSJonathan Marek <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>; 904f30ac26dSJonathan Marek clock-names = "ahb", "bus", "iface"; 905f30ac26dSJonathan Marek 906f1269916SJonathan Marek power-domains = <&gpucc GPU_CX_GDSC>; 907f30ac26dSJonathan Marek }; 908f30ac26dSJonathan Marek 909e13c6d14SVinod Koul tlmm: pinctrl@3100000 { 910e13c6d14SVinod Koul compatible = "qcom,sm8150-pinctrl"; 911e13c6d14SVinod Koul reg = <0x0 0x03100000 0x0 0x300000>, 912e13c6d14SVinod Koul <0x0 0x03500000 0x0 0x300000>, 913e13c6d14SVinod Koul <0x0 0x03900000 0x0 0x300000>, 914e13c6d14SVinod Koul <0x0 0x03D00000 0x0 0x300000>; 915e13c6d14SVinod Koul reg-names = "west", "east", "north", "south"; 916e13c6d14SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 917e13c6d14SVinod Koul gpio-ranges = <&tlmm 0 0 175>; 918e13c6d14SVinod Koul gpio-controller; 919e13c6d14SVinod Koul #gpio-cells = <2>; 920e13c6d14SVinod Koul interrupt-controller; 921e13c6d14SVinod Koul #interrupt-cells = <2>; 922e13c6d14SVinod Koul }; 923e13c6d14SVinod Koul 92449076351SSibi Sankar remoteproc_mpss: remoteproc@4080000 { 92549076351SSibi Sankar compatible = "qcom,sm8150-mpss-pas"; 92649076351SSibi Sankar reg = <0x0 0x04080000 0x0 0x4040>; 92749076351SSibi Sankar 92849076351SSibi Sankar interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, 92949076351SSibi Sankar <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 93049076351SSibi Sankar <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 93149076351SSibi Sankar <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 93249076351SSibi Sankar <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, 93349076351SSibi Sankar <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; 93449076351SSibi Sankar interrupt-names = "wdog", "fatal", "ready", "handover", 93549076351SSibi Sankar "stop-ack", "shutdown-ack"; 93649076351SSibi Sankar 93749076351SSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>; 93849076351SSibi Sankar clock-names = "xo"; 93949076351SSibi Sankar 94049076351SSibi Sankar power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, 941d0770627SBjorn Andersson <&rpmhpd 7>, 942d0770627SBjorn Andersson <&rpmhpd 0>; 94349076351SSibi Sankar power-domain-names = "load_state", "cx", "mss"; 94449076351SSibi Sankar 94549076351SSibi Sankar memory-region = <&mpss_mem>; 94649076351SSibi Sankar 94749076351SSibi Sankar qcom,smem-states = <&modem_smp2p_out 0>; 94849076351SSibi Sankar qcom,smem-state-names = "stop"; 94949076351SSibi Sankar 95049076351SSibi Sankar glink-edge { 95149076351SSibi Sankar interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 95249076351SSibi Sankar label = "modem"; 95349076351SSibi Sankar qcom,remote-pid = <1>; 95449076351SSibi Sankar mboxes = <&apss_shared 12>; 95549076351SSibi Sankar }; 95649076351SSibi Sankar }; 95749076351SSibi Sankar 95824244cefSSai Prakash Ranjan stm@6002000 { 95924244cefSSai Prakash Ranjan compatible = "arm,coresight-stm", "arm,primecell"; 96024244cefSSai Prakash Ranjan reg = <0 0x06002000 0 0x1000>, 96124244cefSSai Prakash Ranjan <0 0x16280000 0 0x180000>; 96224244cefSSai Prakash Ranjan reg-names = "stm-base", "stm-stimulus-base"; 96324244cefSSai Prakash Ranjan 96424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 96524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 96624244cefSSai Prakash Ranjan 96724244cefSSai Prakash Ranjan out-ports { 96824244cefSSai Prakash Ranjan port { 96924244cefSSai Prakash Ranjan stm_out: endpoint { 97024244cefSSai Prakash Ranjan remote-endpoint = <&funnel0_in7>; 97124244cefSSai Prakash Ranjan }; 97224244cefSSai Prakash Ranjan }; 97324244cefSSai Prakash Ranjan }; 97424244cefSSai Prakash Ranjan }; 97524244cefSSai Prakash Ranjan 97624244cefSSai Prakash Ranjan funnel@6041000 { 97724244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 97824244cefSSai Prakash Ranjan reg = <0 0x06041000 0 0x1000>; 97924244cefSSai Prakash Ranjan 98024244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 98124244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 98224244cefSSai Prakash Ranjan 98324244cefSSai Prakash Ranjan out-ports { 98424244cefSSai Prakash Ranjan port { 98524244cefSSai Prakash Ranjan funnel0_out: endpoint { 98624244cefSSai Prakash Ranjan remote-endpoint = <&merge_funnel_in0>; 98724244cefSSai Prakash Ranjan }; 98824244cefSSai Prakash Ranjan }; 98924244cefSSai Prakash Ranjan }; 99024244cefSSai Prakash Ranjan 99124244cefSSai Prakash Ranjan in-ports { 99224244cefSSai Prakash Ranjan #address-cells = <1>; 99324244cefSSai Prakash Ranjan #size-cells = <0>; 99424244cefSSai Prakash Ranjan 99524244cefSSai Prakash Ranjan port@7 { 99624244cefSSai Prakash Ranjan reg = <7>; 99724244cefSSai Prakash Ranjan funnel0_in7: endpoint { 99824244cefSSai Prakash Ranjan remote-endpoint = <&stm_out>; 99924244cefSSai Prakash Ranjan }; 100024244cefSSai Prakash Ranjan }; 100124244cefSSai Prakash Ranjan }; 100224244cefSSai Prakash Ranjan }; 100324244cefSSai Prakash Ranjan 100424244cefSSai Prakash Ranjan funnel@6042000 { 100524244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 100624244cefSSai Prakash Ranjan reg = <0 0x06042000 0 0x1000>; 100724244cefSSai Prakash Ranjan 100824244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 100924244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 101024244cefSSai Prakash Ranjan 101124244cefSSai Prakash Ranjan out-ports { 101224244cefSSai Prakash Ranjan port { 101324244cefSSai Prakash Ranjan funnel1_out: endpoint { 101424244cefSSai Prakash Ranjan remote-endpoint = <&merge_funnel_in1>; 101524244cefSSai Prakash Ranjan }; 101624244cefSSai Prakash Ranjan }; 101724244cefSSai Prakash Ranjan }; 101824244cefSSai Prakash Ranjan 101924244cefSSai Prakash Ranjan in-ports { 102024244cefSSai Prakash Ranjan #address-cells = <1>; 102124244cefSSai Prakash Ranjan #size-cells = <0>; 102224244cefSSai Prakash Ranjan 102324244cefSSai Prakash Ranjan port@4 { 102424244cefSSai Prakash Ranjan reg = <4>; 102524244cefSSai Prakash Ranjan funnel1_in4: endpoint { 102624244cefSSai Prakash Ranjan remote-endpoint = <&swao_replicator_out>; 102724244cefSSai Prakash Ranjan }; 102824244cefSSai Prakash Ranjan }; 102924244cefSSai Prakash Ranjan }; 103024244cefSSai Prakash Ranjan }; 103124244cefSSai Prakash Ranjan 103224244cefSSai Prakash Ranjan funnel@6043000 { 103324244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 103424244cefSSai Prakash Ranjan reg = <0 0x06043000 0 0x1000>; 103524244cefSSai Prakash Ranjan 103624244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 103724244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 103824244cefSSai Prakash Ranjan 103924244cefSSai Prakash Ranjan out-ports { 104024244cefSSai Prakash Ranjan port { 104124244cefSSai Prakash Ranjan funnel2_out: endpoint { 104224244cefSSai Prakash Ranjan remote-endpoint = <&merge_funnel_in2>; 104324244cefSSai Prakash Ranjan }; 104424244cefSSai Prakash Ranjan }; 104524244cefSSai Prakash Ranjan }; 104624244cefSSai Prakash Ranjan 104724244cefSSai Prakash Ranjan in-ports { 104824244cefSSai Prakash Ranjan #address-cells = <1>; 104924244cefSSai Prakash Ranjan #size-cells = <0>; 105024244cefSSai Prakash Ranjan 105124244cefSSai Prakash Ranjan port@2 { 105224244cefSSai Prakash Ranjan reg = <2>; 105324244cefSSai Prakash Ranjan funnel2_in2: endpoint { 105424244cefSSai Prakash Ranjan remote-endpoint = <&apss_merge_funnel_out>; 105524244cefSSai Prakash Ranjan }; 105624244cefSSai Prakash Ranjan }; 105724244cefSSai Prakash Ranjan }; 105824244cefSSai Prakash Ranjan }; 105924244cefSSai Prakash Ranjan 106024244cefSSai Prakash Ranjan funnel@6045000 { 106124244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 106224244cefSSai Prakash Ranjan reg = <0 0x06045000 0 0x1000>; 106324244cefSSai Prakash Ranjan 106424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 106524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 106624244cefSSai Prakash Ranjan 106724244cefSSai Prakash Ranjan out-ports { 106824244cefSSai Prakash Ranjan port { 106924244cefSSai Prakash Ranjan merge_funnel_out: endpoint { 107024244cefSSai Prakash Ranjan remote-endpoint = <&etf_in>; 107124244cefSSai Prakash Ranjan }; 107224244cefSSai Prakash Ranjan }; 107324244cefSSai Prakash Ranjan }; 107424244cefSSai Prakash Ranjan 107524244cefSSai Prakash Ranjan in-ports { 107624244cefSSai Prakash Ranjan #address-cells = <1>; 107724244cefSSai Prakash Ranjan #size-cells = <0>; 107824244cefSSai Prakash Ranjan 107924244cefSSai Prakash Ranjan port@0 { 108024244cefSSai Prakash Ranjan reg = <0>; 108124244cefSSai Prakash Ranjan merge_funnel_in0: endpoint { 108224244cefSSai Prakash Ranjan remote-endpoint = <&funnel0_out>; 108324244cefSSai Prakash Ranjan }; 108424244cefSSai Prakash Ranjan }; 108524244cefSSai Prakash Ranjan 108624244cefSSai Prakash Ranjan port@1 { 108724244cefSSai Prakash Ranjan reg = <1>; 108824244cefSSai Prakash Ranjan merge_funnel_in1: endpoint { 108924244cefSSai Prakash Ranjan remote-endpoint = <&funnel1_out>; 109024244cefSSai Prakash Ranjan }; 109124244cefSSai Prakash Ranjan }; 109224244cefSSai Prakash Ranjan 109324244cefSSai Prakash Ranjan port@2 { 109424244cefSSai Prakash Ranjan reg = <2>; 109524244cefSSai Prakash Ranjan merge_funnel_in2: endpoint { 109624244cefSSai Prakash Ranjan remote-endpoint = <&funnel2_out>; 109724244cefSSai Prakash Ranjan }; 109824244cefSSai Prakash Ranjan }; 109924244cefSSai Prakash Ranjan }; 110024244cefSSai Prakash Ranjan }; 110124244cefSSai Prakash Ranjan 110224244cefSSai Prakash Ranjan replicator@6046000 { 110324244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 110424244cefSSai Prakash Ranjan reg = <0 0x06046000 0 0x1000>; 110524244cefSSai Prakash Ranjan 110624244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 110724244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 110824244cefSSai Prakash Ranjan 110924244cefSSai Prakash Ranjan out-ports { 111024244cefSSai Prakash Ranjan #address-cells = <1>; 111124244cefSSai Prakash Ranjan #size-cells = <0>; 111224244cefSSai Prakash Ranjan 111324244cefSSai Prakash Ranjan port@0 { 111424244cefSSai Prakash Ranjan reg = <0>; 111524244cefSSai Prakash Ranjan replicator_out0: endpoint { 111624244cefSSai Prakash Ranjan remote-endpoint = <&etr_in>; 111724244cefSSai Prakash Ranjan }; 111824244cefSSai Prakash Ranjan }; 111924244cefSSai Prakash Ranjan 112024244cefSSai Prakash Ranjan port@1 { 112124244cefSSai Prakash Ranjan reg = <1>; 112224244cefSSai Prakash Ranjan replicator_out1: endpoint { 112324244cefSSai Prakash Ranjan remote-endpoint = <&replicator1_in>; 112424244cefSSai Prakash Ranjan }; 112524244cefSSai Prakash Ranjan }; 112624244cefSSai Prakash Ranjan }; 112724244cefSSai Prakash Ranjan 112824244cefSSai Prakash Ranjan in-ports { 112924244cefSSai Prakash Ranjan port { 113024244cefSSai Prakash Ranjan replicator_in0: endpoint { 113124244cefSSai Prakash Ranjan remote-endpoint = <&etf_out>; 113224244cefSSai Prakash Ranjan }; 113324244cefSSai Prakash Ranjan }; 113424244cefSSai Prakash Ranjan }; 113524244cefSSai Prakash Ranjan }; 113624244cefSSai Prakash Ranjan 113724244cefSSai Prakash Ranjan etf@6047000 { 113824244cefSSai Prakash Ranjan compatible = "arm,coresight-tmc", "arm,primecell"; 113924244cefSSai Prakash Ranjan reg = <0 0x06047000 0 0x1000>; 114024244cefSSai Prakash Ranjan 114124244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 114224244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 114324244cefSSai Prakash Ranjan 114424244cefSSai Prakash Ranjan out-ports { 114524244cefSSai Prakash Ranjan port { 114624244cefSSai Prakash Ranjan etf_out: endpoint { 114724244cefSSai Prakash Ranjan remote-endpoint = <&replicator_in0>; 114824244cefSSai Prakash Ranjan }; 114924244cefSSai Prakash Ranjan }; 115024244cefSSai Prakash Ranjan }; 115124244cefSSai Prakash Ranjan 115224244cefSSai Prakash Ranjan in-ports { 115324244cefSSai Prakash Ranjan port { 115424244cefSSai Prakash Ranjan etf_in: endpoint { 115524244cefSSai Prakash Ranjan remote-endpoint = <&merge_funnel_out>; 115624244cefSSai Prakash Ranjan }; 115724244cefSSai Prakash Ranjan }; 115824244cefSSai Prakash Ranjan }; 115924244cefSSai Prakash Ranjan }; 116024244cefSSai Prakash Ranjan 116124244cefSSai Prakash Ranjan etr@6048000 { 116224244cefSSai Prakash Ranjan compatible = "arm,coresight-tmc", "arm,primecell"; 116324244cefSSai Prakash Ranjan reg = <0 0x06048000 0 0x1000>; 116424244cefSSai Prakash Ranjan iommus = <&apps_smmu 0x05e0 0x0>; 116524244cefSSai Prakash Ranjan 116624244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 116724244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 116824244cefSSai Prakash Ranjan arm,scatter-gather; 116924244cefSSai Prakash Ranjan 117024244cefSSai Prakash Ranjan in-ports { 117124244cefSSai Prakash Ranjan port { 117224244cefSSai Prakash Ranjan etr_in: endpoint { 117324244cefSSai Prakash Ranjan remote-endpoint = <&replicator_out0>; 117424244cefSSai Prakash Ranjan }; 117524244cefSSai Prakash Ranjan }; 117624244cefSSai Prakash Ranjan }; 117724244cefSSai Prakash Ranjan }; 117824244cefSSai Prakash Ranjan 117924244cefSSai Prakash Ranjan replicator@604a000 { 118024244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 118124244cefSSai Prakash Ranjan reg = <0 0x0604a000 0 0x1000>; 118224244cefSSai Prakash Ranjan 118324244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 118424244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 118524244cefSSai Prakash Ranjan 118624244cefSSai Prakash Ranjan out-ports { 118724244cefSSai Prakash Ranjan #address-cells = <1>; 118824244cefSSai Prakash Ranjan #size-cells = <0>; 118924244cefSSai Prakash Ranjan 119024244cefSSai Prakash Ranjan port@1 { 119124244cefSSai Prakash Ranjan reg = <1>; 119224244cefSSai Prakash Ranjan replicator1_out: endpoint { 119324244cefSSai Prakash Ranjan remote-endpoint = <&swao_funnel_in>; 119424244cefSSai Prakash Ranjan }; 119524244cefSSai Prakash Ranjan }; 119624244cefSSai Prakash Ranjan }; 119724244cefSSai Prakash Ranjan 119824244cefSSai Prakash Ranjan in-ports { 119924244cefSSai Prakash Ranjan #address-cells = <1>; 120024244cefSSai Prakash Ranjan #size-cells = <0>; 120124244cefSSai Prakash Ranjan 120224244cefSSai Prakash Ranjan port@1 { 120324244cefSSai Prakash Ranjan reg = <1>; 120424244cefSSai Prakash Ranjan replicator1_in: endpoint { 120524244cefSSai Prakash Ranjan remote-endpoint = <&replicator_out1>; 120624244cefSSai Prakash Ranjan }; 120724244cefSSai Prakash Ranjan }; 120824244cefSSai Prakash Ranjan }; 120924244cefSSai Prakash Ranjan }; 121024244cefSSai Prakash Ranjan 121124244cefSSai Prakash Ranjan funnel@6b08000 { 121224244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 121324244cefSSai Prakash Ranjan reg = <0 0x06b08000 0 0x1000>; 121424244cefSSai Prakash Ranjan 121524244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 121624244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 121724244cefSSai Prakash Ranjan 121824244cefSSai Prakash Ranjan out-ports { 121924244cefSSai Prakash Ranjan port { 122024244cefSSai Prakash Ranjan swao_funnel_out: endpoint { 122124244cefSSai Prakash Ranjan remote-endpoint = <&swao_etf_in>; 122224244cefSSai Prakash Ranjan }; 122324244cefSSai Prakash Ranjan }; 122424244cefSSai Prakash Ranjan }; 122524244cefSSai Prakash Ranjan 122624244cefSSai Prakash Ranjan in-ports { 122724244cefSSai Prakash Ranjan #address-cells = <1>; 122824244cefSSai Prakash Ranjan #size-cells = <0>; 122924244cefSSai Prakash Ranjan 123024244cefSSai Prakash Ranjan port@6 { 123124244cefSSai Prakash Ranjan reg = <6>; 123224244cefSSai Prakash Ranjan swao_funnel_in: endpoint { 123324244cefSSai Prakash Ranjan remote-endpoint = <&replicator1_out>; 123424244cefSSai Prakash Ranjan }; 123524244cefSSai Prakash Ranjan }; 123624244cefSSai Prakash Ranjan }; 123724244cefSSai Prakash Ranjan }; 123824244cefSSai Prakash Ranjan 123924244cefSSai Prakash Ranjan etf@6b09000 { 124024244cefSSai Prakash Ranjan compatible = "arm,coresight-tmc", "arm,primecell"; 124124244cefSSai Prakash Ranjan reg = <0 0x06b09000 0 0x1000>; 124224244cefSSai Prakash Ranjan 124324244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 124424244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 124524244cefSSai Prakash Ranjan 124624244cefSSai Prakash Ranjan out-ports { 124724244cefSSai Prakash Ranjan port { 124824244cefSSai Prakash Ranjan swao_etf_out: endpoint { 124924244cefSSai Prakash Ranjan remote-endpoint = <&swao_replicator_in>; 125024244cefSSai Prakash Ranjan }; 125124244cefSSai Prakash Ranjan }; 125224244cefSSai Prakash Ranjan }; 125324244cefSSai Prakash Ranjan 125424244cefSSai Prakash Ranjan in-ports { 125524244cefSSai Prakash Ranjan port { 125624244cefSSai Prakash Ranjan swao_etf_in: endpoint { 125724244cefSSai Prakash Ranjan remote-endpoint = <&swao_funnel_out>; 125824244cefSSai Prakash Ranjan }; 125924244cefSSai Prakash Ranjan }; 126024244cefSSai Prakash Ranjan }; 126124244cefSSai Prakash Ranjan }; 126224244cefSSai Prakash Ranjan 126324244cefSSai Prakash Ranjan replicator@6b0a000 { 126424244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; 126524244cefSSai Prakash Ranjan reg = <0 0x06b0a000 0 0x1000>; 126624244cefSSai Prakash Ranjan 126724244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 126824244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 126924244cefSSai Prakash Ranjan qcom,replicator-loses-context; 127024244cefSSai Prakash Ranjan 127124244cefSSai Prakash Ranjan out-ports { 127224244cefSSai Prakash Ranjan port { 127324244cefSSai Prakash Ranjan swao_replicator_out: endpoint { 127424244cefSSai Prakash Ranjan remote-endpoint = <&funnel1_in4>; 127524244cefSSai Prakash Ranjan }; 127624244cefSSai Prakash Ranjan }; 127724244cefSSai Prakash Ranjan }; 127824244cefSSai Prakash Ranjan 127924244cefSSai Prakash Ranjan in-ports { 128024244cefSSai Prakash Ranjan port { 128124244cefSSai Prakash Ranjan swao_replicator_in: endpoint { 128224244cefSSai Prakash Ranjan remote-endpoint = <&swao_etf_out>; 128324244cefSSai Prakash Ranjan }; 128424244cefSSai Prakash Ranjan }; 128524244cefSSai Prakash Ranjan }; 128624244cefSSai Prakash Ranjan }; 128724244cefSSai Prakash Ranjan 128824244cefSSai Prakash Ranjan etm@7040000 { 128924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 129024244cefSSai Prakash Ranjan reg = <0 0x07040000 0 0x1000>; 129124244cefSSai Prakash Ranjan 129224244cefSSai Prakash Ranjan cpu = <&CPU0>; 129324244cefSSai Prakash Ranjan 129424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 129524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 129624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 129724244cefSSai Prakash Ranjan qcom,skip-power-up; 129824244cefSSai Prakash Ranjan 129924244cefSSai Prakash Ranjan out-ports { 130024244cefSSai Prakash Ranjan port { 130124244cefSSai Prakash Ranjan etm0_out: endpoint { 130224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in0>; 130324244cefSSai Prakash Ranjan }; 130424244cefSSai Prakash Ranjan }; 130524244cefSSai Prakash Ranjan }; 130624244cefSSai Prakash Ranjan }; 130724244cefSSai Prakash Ranjan 130824244cefSSai Prakash Ranjan etm@7140000 { 130924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 131024244cefSSai Prakash Ranjan reg = <0 0x07140000 0 0x1000>; 131124244cefSSai Prakash Ranjan 131224244cefSSai Prakash Ranjan cpu = <&CPU1>; 131324244cefSSai Prakash Ranjan 131424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 131524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 131624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 131724244cefSSai Prakash Ranjan qcom,skip-power-up; 131824244cefSSai Prakash Ranjan 131924244cefSSai Prakash Ranjan out-ports { 132024244cefSSai Prakash Ranjan port { 132124244cefSSai Prakash Ranjan etm1_out: endpoint { 132224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in1>; 132324244cefSSai Prakash Ranjan }; 132424244cefSSai Prakash Ranjan }; 132524244cefSSai Prakash Ranjan }; 132624244cefSSai Prakash Ranjan }; 132724244cefSSai Prakash Ranjan 132824244cefSSai Prakash Ranjan etm@7240000 { 132924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 133024244cefSSai Prakash Ranjan reg = <0 0x07240000 0 0x1000>; 133124244cefSSai Prakash Ranjan 133224244cefSSai Prakash Ranjan cpu = <&CPU2>; 133324244cefSSai Prakash Ranjan 133424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 133524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 133624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 133724244cefSSai Prakash Ranjan qcom,skip-power-up; 133824244cefSSai Prakash Ranjan 133924244cefSSai Prakash Ranjan out-ports { 134024244cefSSai Prakash Ranjan port { 134124244cefSSai Prakash Ranjan etm2_out: endpoint { 134224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in2>; 134324244cefSSai Prakash Ranjan }; 134424244cefSSai Prakash Ranjan }; 134524244cefSSai Prakash Ranjan }; 134624244cefSSai Prakash Ranjan }; 134724244cefSSai Prakash Ranjan 134824244cefSSai Prakash Ranjan etm@7340000 { 134924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 135024244cefSSai Prakash Ranjan reg = <0 0x07340000 0 0x1000>; 135124244cefSSai Prakash Ranjan 135224244cefSSai Prakash Ranjan cpu = <&CPU3>; 135324244cefSSai Prakash Ranjan 135424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 135524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 135624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 135724244cefSSai Prakash Ranjan qcom,skip-power-up; 135824244cefSSai Prakash Ranjan 135924244cefSSai Prakash Ranjan out-ports { 136024244cefSSai Prakash Ranjan port { 136124244cefSSai Prakash Ranjan etm3_out: endpoint { 136224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in3>; 136324244cefSSai Prakash Ranjan }; 136424244cefSSai Prakash Ranjan }; 136524244cefSSai Prakash Ranjan }; 136624244cefSSai Prakash Ranjan }; 136724244cefSSai Prakash Ranjan 136824244cefSSai Prakash Ranjan etm@7440000 { 136924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 137024244cefSSai Prakash Ranjan reg = <0 0x07440000 0 0x1000>; 137124244cefSSai Prakash Ranjan 137224244cefSSai Prakash Ranjan cpu = <&CPU4>; 137324244cefSSai Prakash Ranjan 137424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 137524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 137624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 137724244cefSSai Prakash Ranjan qcom,skip-power-up; 137824244cefSSai Prakash Ranjan 137924244cefSSai Prakash Ranjan out-ports { 138024244cefSSai Prakash Ranjan port { 138124244cefSSai Prakash Ranjan etm4_out: endpoint { 138224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in4>; 138324244cefSSai Prakash Ranjan }; 138424244cefSSai Prakash Ranjan }; 138524244cefSSai Prakash Ranjan }; 138624244cefSSai Prakash Ranjan }; 138724244cefSSai Prakash Ranjan 138824244cefSSai Prakash Ranjan etm@7540000 { 138924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 139024244cefSSai Prakash Ranjan reg = <0 0x07540000 0 0x1000>; 139124244cefSSai Prakash Ranjan 139224244cefSSai Prakash Ranjan cpu = <&CPU5>; 139324244cefSSai Prakash Ranjan 139424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 139524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 139624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 139724244cefSSai Prakash Ranjan qcom,skip-power-up; 139824244cefSSai Prakash Ranjan 139924244cefSSai Prakash Ranjan out-ports { 140024244cefSSai Prakash Ranjan port { 140124244cefSSai Prakash Ranjan etm5_out: endpoint { 140224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in5>; 140324244cefSSai Prakash Ranjan }; 140424244cefSSai Prakash Ranjan }; 140524244cefSSai Prakash Ranjan }; 140624244cefSSai Prakash Ranjan }; 140724244cefSSai Prakash Ranjan 140824244cefSSai Prakash Ranjan etm@7640000 { 140924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 141024244cefSSai Prakash Ranjan reg = <0 0x07640000 0 0x1000>; 141124244cefSSai Prakash Ranjan 141224244cefSSai Prakash Ranjan cpu = <&CPU6>; 141324244cefSSai Prakash Ranjan 141424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 141524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 141624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 141724244cefSSai Prakash Ranjan qcom,skip-power-up; 141824244cefSSai Prakash Ranjan 141924244cefSSai Prakash Ranjan out-ports { 142024244cefSSai Prakash Ranjan port { 142124244cefSSai Prakash Ranjan etm6_out: endpoint { 142224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in6>; 142324244cefSSai Prakash Ranjan }; 142424244cefSSai Prakash Ranjan }; 142524244cefSSai Prakash Ranjan }; 142624244cefSSai Prakash Ranjan }; 142724244cefSSai Prakash Ranjan 142824244cefSSai Prakash Ranjan etm@7740000 { 142924244cefSSai Prakash Ranjan compatible = "arm,coresight-etm4x", "arm,primecell"; 143024244cefSSai Prakash Ranjan reg = <0 0x07740000 0 0x1000>; 143124244cefSSai Prakash Ranjan 143224244cefSSai Prakash Ranjan cpu = <&CPU7>; 143324244cefSSai Prakash Ranjan 143424244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 143524244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 143624244cefSSai Prakash Ranjan arm,coresight-loses-context-with-cpu; 143724244cefSSai Prakash Ranjan qcom,skip-power-up; 143824244cefSSai Prakash Ranjan 143924244cefSSai Prakash Ranjan out-ports { 144024244cefSSai Prakash Ranjan port { 144124244cefSSai Prakash Ranjan etm7_out: endpoint { 144224244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_in7>; 144324244cefSSai Prakash Ranjan }; 144424244cefSSai Prakash Ranjan }; 144524244cefSSai Prakash Ranjan }; 144624244cefSSai Prakash Ranjan }; 144724244cefSSai Prakash Ranjan 144824244cefSSai Prakash Ranjan funnel@7800000 { /* APSS Funnel */ 144924244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 145024244cefSSai Prakash Ranjan reg = <0 0x07800000 0 0x1000>; 145124244cefSSai Prakash Ranjan 145224244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 145324244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 145424244cefSSai Prakash Ranjan 145524244cefSSai Prakash Ranjan out-ports { 145624244cefSSai Prakash Ranjan port { 145724244cefSSai Prakash Ranjan apss_funnel_out: endpoint { 145824244cefSSai Prakash Ranjan remote-endpoint = <&apss_merge_funnel_in>; 145924244cefSSai Prakash Ranjan }; 146024244cefSSai Prakash Ranjan }; 146124244cefSSai Prakash Ranjan }; 146224244cefSSai Prakash Ranjan 146324244cefSSai Prakash Ranjan in-ports { 146424244cefSSai Prakash Ranjan #address-cells = <1>; 146524244cefSSai Prakash Ranjan #size-cells = <0>; 146624244cefSSai Prakash Ranjan 146724244cefSSai Prakash Ranjan port@0 { 146824244cefSSai Prakash Ranjan reg = <0>; 146924244cefSSai Prakash Ranjan apss_funnel_in0: endpoint { 147024244cefSSai Prakash Ranjan remote-endpoint = <&etm0_out>; 147124244cefSSai Prakash Ranjan }; 147224244cefSSai Prakash Ranjan }; 147324244cefSSai Prakash Ranjan 147424244cefSSai Prakash Ranjan port@1 { 147524244cefSSai Prakash Ranjan reg = <1>; 147624244cefSSai Prakash Ranjan apss_funnel_in1: endpoint { 147724244cefSSai Prakash Ranjan remote-endpoint = <&etm1_out>; 147824244cefSSai Prakash Ranjan }; 147924244cefSSai Prakash Ranjan }; 148024244cefSSai Prakash Ranjan 148124244cefSSai Prakash Ranjan port@2 { 148224244cefSSai Prakash Ranjan reg = <2>; 148324244cefSSai Prakash Ranjan apss_funnel_in2: endpoint { 148424244cefSSai Prakash Ranjan remote-endpoint = <&etm2_out>; 148524244cefSSai Prakash Ranjan }; 148624244cefSSai Prakash Ranjan }; 148724244cefSSai Prakash Ranjan 148824244cefSSai Prakash Ranjan port@3 { 148924244cefSSai Prakash Ranjan reg = <3>; 149024244cefSSai Prakash Ranjan apss_funnel_in3: endpoint { 149124244cefSSai Prakash Ranjan remote-endpoint = <&etm3_out>; 149224244cefSSai Prakash Ranjan }; 149324244cefSSai Prakash Ranjan }; 149424244cefSSai Prakash Ranjan 149524244cefSSai Prakash Ranjan port@4 { 149624244cefSSai Prakash Ranjan reg = <4>; 149724244cefSSai Prakash Ranjan apss_funnel_in4: endpoint { 149824244cefSSai Prakash Ranjan remote-endpoint = <&etm4_out>; 149924244cefSSai Prakash Ranjan }; 150024244cefSSai Prakash Ranjan }; 150124244cefSSai Prakash Ranjan 150224244cefSSai Prakash Ranjan port@5 { 150324244cefSSai Prakash Ranjan reg = <5>; 150424244cefSSai Prakash Ranjan apss_funnel_in5: endpoint { 150524244cefSSai Prakash Ranjan remote-endpoint = <&etm5_out>; 150624244cefSSai Prakash Ranjan }; 150724244cefSSai Prakash Ranjan }; 150824244cefSSai Prakash Ranjan 150924244cefSSai Prakash Ranjan port@6 { 151024244cefSSai Prakash Ranjan reg = <6>; 151124244cefSSai Prakash Ranjan apss_funnel_in6: endpoint { 151224244cefSSai Prakash Ranjan remote-endpoint = <&etm6_out>; 151324244cefSSai Prakash Ranjan }; 151424244cefSSai Prakash Ranjan }; 151524244cefSSai Prakash Ranjan 151624244cefSSai Prakash Ranjan port@7 { 151724244cefSSai Prakash Ranjan reg = <7>; 151824244cefSSai Prakash Ranjan apss_funnel_in7: endpoint { 151924244cefSSai Prakash Ranjan remote-endpoint = <&etm7_out>; 152024244cefSSai Prakash Ranjan }; 152124244cefSSai Prakash Ranjan }; 152224244cefSSai Prakash Ranjan }; 152324244cefSSai Prakash Ranjan }; 152424244cefSSai Prakash Ranjan 152524244cefSSai Prakash Ranjan funnel@7810000 { 152624244cefSSai Prakash Ranjan compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 152724244cefSSai Prakash Ranjan reg = <0 0x07810000 0 0x1000>; 152824244cefSSai Prakash Ranjan 152924244cefSSai Prakash Ranjan clocks = <&aoss_qmp>; 153024244cefSSai Prakash Ranjan clock-names = "apb_pclk"; 153124244cefSSai Prakash Ranjan 153224244cefSSai Prakash Ranjan out-ports { 153324244cefSSai Prakash Ranjan port { 153424244cefSSai Prakash Ranjan apss_merge_funnel_out: endpoint { 153524244cefSSai Prakash Ranjan remote-endpoint = <&funnel2_in2>; 153624244cefSSai Prakash Ranjan }; 153724244cefSSai Prakash Ranjan }; 153824244cefSSai Prakash Ranjan }; 153924244cefSSai Prakash Ranjan 154024244cefSSai Prakash Ranjan in-ports { 154124244cefSSai Prakash Ranjan port { 154224244cefSSai Prakash Ranjan apss_merge_funnel_in: endpoint { 154324244cefSSai Prakash Ranjan remote-endpoint = <&apss_funnel_out>; 154424244cefSSai Prakash Ranjan }; 154524244cefSSai Prakash Ranjan }; 154624244cefSSai Prakash Ranjan }; 154724244cefSSai Prakash Ranjan }; 154824244cefSSai Prakash Ranjan 154949076351SSibi Sankar remoteproc_cdsp: remoteproc@8300000 { 155049076351SSibi Sankar compatible = "qcom,sm8150-cdsp-pas"; 155149076351SSibi Sankar reg = <0x0 0x08300000 0x0 0x4040>; 155249076351SSibi Sankar 155349076351SSibi Sankar interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, 155449076351SSibi Sankar <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 155549076351SSibi Sankar <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 155649076351SSibi Sankar <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 155749076351SSibi Sankar <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; 155849076351SSibi Sankar interrupt-names = "wdog", "fatal", "ready", 155949076351SSibi Sankar "handover", "stop-ack"; 156049076351SSibi Sankar 156149076351SSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>; 156249076351SSibi Sankar clock-names = "xo"; 156349076351SSibi Sankar 156449076351SSibi Sankar power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 1565d0770627SBjorn Andersson <&rpmhpd 7>; 156649076351SSibi Sankar power-domain-names = "load_state", "cx"; 156749076351SSibi Sankar 156849076351SSibi Sankar memory-region = <&cdsp_mem>; 156949076351SSibi Sankar 157049076351SSibi Sankar qcom,smem-states = <&cdsp_smp2p_out 0>; 157149076351SSibi Sankar qcom,smem-state-names = "stop"; 157249076351SSibi Sankar 157349076351SSibi Sankar status = "disabled"; 157449076351SSibi Sankar 157549076351SSibi Sankar glink-edge { 157649076351SSibi Sankar interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; 157749076351SSibi Sankar label = "cdsp"; 157849076351SSibi Sankar qcom,remote-pid = <5>; 157949076351SSibi Sankar mboxes = <&apss_shared 4>; 158049076351SSibi Sankar }; 158149076351SSibi Sankar }; 158249076351SSibi Sankar 1583b33d2868SJack Pham usb_1_hsphy: phy@88e2000 { 1584b33d2868SJack Pham compatible = "qcom,sm8150-usb-hs-phy", 1585b33d2868SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1586b33d2868SJack Pham reg = <0 0x088e2000 0 0x400>; 1587b33d2868SJack Pham status = "disabled"; 1588b33d2868SJack Pham #phy-cells = <0>; 1589b33d2868SJack Pham 1590b33d2868SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1591b33d2868SJack Pham clock-names = "ref"; 1592b33d2868SJack Pham 1593b33d2868SJack Pham resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 1594b33d2868SJack Pham }; 1595b33d2868SJack Pham 15960c9dde0dSJonathan Marek usb_2_hsphy: phy@88e3000 { 15970c9dde0dSJonathan Marek compatible = "qcom,sm8150-usb-hs-phy", 15980c9dde0dSJonathan Marek "qcom,usb-snps-hs-7nm-phy"; 15990c9dde0dSJonathan Marek reg = <0 0x088e3000 0 0x400>; 16000c9dde0dSJonathan Marek status = "disabled"; 16010c9dde0dSJonathan Marek #phy-cells = <0>; 16020c9dde0dSJonathan Marek 16030c9dde0dSJonathan Marek clocks = <&rpmhcc RPMH_CXO_CLK>; 16040c9dde0dSJonathan Marek clock-names = "ref"; 16050c9dde0dSJonathan Marek 16060c9dde0dSJonathan Marek resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 16070c9dde0dSJonathan Marek }; 16080c9dde0dSJonathan Marek 1609b33d2868SJack Pham usb_1_qmpphy: phy@88e9000 { 1610b33d2868SJack Pham compatible = "qcom,sm8150-qmp-usb3-phy"; 1611b33d2868SJack Pham reg = <0 0x088e9000 0 0x18c>, 1612b33d2868SJack Pham <0 0x088e8000 0 0x10>; 1613b33d2868SJack Pham reg-names = "reg-base", "dp_com"; 1614b33d2868SJack Pham status = "disabled"; 1615b33d2868SJack Pham #clock-cells = <1>; 1616b33d2868SJack Pham #address-cells = <2>; 1617b33d2868SJack Pham #size-cells = <2>; 1618b33d2868SJack Pham ranges; 1619b33d2868SJack Pham 1620b33d2868SJack Pham clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 1621b33d2868SJack Pham <&rpmhcc RPMH_CXO_CLK>, 1622b33d2868SJack Pham <&gcc GCC_USB3_PRIM_CLKREF_CLK>, 1623b33d2868SJack Pham <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 1624b33d2868SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 1625b33d2868SJack Pham 1626b33d2868SJack Pham resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 1627b33d2868SJack Pham <&gcc GCC_USB3_PHY_PRIM_BCR>; 1628b33d2868SJack Pham reset-names = "phy", "common"; 1629b33d2868SJack Pham 1630b33d2868SJack Pham usb_1_ssphy: lanes@88e9200 { 1631b33d2868SJack Pham reg = <0 0x088e9200 0 0x200>, 1632b33d2868SJack Pham <0 0x088e9400 0 0x200>, 1633b33d2868SJack Pham <0 0x088e9c00 0 0x218>, 1634b33d2868SJack Pham <0 0x088e9600 0 0x200>, 1635b33d2868SJack Pham <0 0x088e9800 0 0x200>, 1636b33d2868SJack Pham <0 0x088e9a00 0 0x100>; 1637b33d2868SJack Pham #phy-cells = <0>; 1638b33d2868SJack Pham clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 1639b33d2868SJack Pham clock-names = "pipe0"; 1640b33d2868SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 1641b33d2868SJack Pham }; 1642b33d2868SJack Pham }; 1643b33d2868SJack Pham 164471a2fc6eSJonathan Marek dc_noc: interconnect@9160000 { 164571a2fc6eSJonathan Marek compatible = "qcom,sm8150-dc-noc"; 164671a2fc6eSJonathan Marek reg = <0 0x09160000 0 0x3200>; 164771a2fc6eSJonathan Marek #interconnect-cells = <1>; 164871a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 164971a2fc6eSJonathan Marek }; 165071a2fc6eSJonathan Marek 165171a2fc6eSJonathan Marek gem_noc: interconnect@9680000 { 165271a2fc6eSJonathan Marek compatible = "qcom,sm8150-gem-noc"; 165371a2fc6eSJonathan Marek reg = <0 0x09680000 0 0x3e200>; 165471a2fc6eSJonathan Marek #interconnect-cells = <1>; 165571a2fc6eSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 165671a2fc6eSJonathan Marek }; 165771a2fc6eSJonathan Marek 16580c9dde0dSJonathan Marek usb_2_qmpphy: phy@88eb000 { 16590c9dde0dSJonathan Marek compatible = "qcom,sm8150-qmp-usb3-uni-phy"; 16600c9dde0dSJonathan Marek reg = <0 0x088eb000 0 0x200>; 16610c9dde0dSJonathan Marek status = "disabled"; 16620c9dde0dSJonathan Marek #clock-cells = <1>; 16630c9dde0dSJonathan Marek #address-cells = <2>; 16640c9dde0dSJonathan Marek #size-cells = <2>; 16650c9dde0dSJonathan Marek ranges; 16660c9dde0dSJonathan Marek 16670c9dde0dSJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 16680c9dde0dSJonathan Marek <&rpmhcc RPMH_CXO_CLK>, 16690c9dde0dSJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_CLK>, 16700c9dde0dSJonathan Marek <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 16710c9dde0dSJonathan Marek clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 16720c9dde0dSJonathan Marek 16730c9dde0dSJonathan Marek resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 16740c9dde0dSJonathan Marek <&gcc GCC_USB3_PHY_SEC_BCR>; 16750c9dde0dSJonathan Marek reset-names = "phy", "common"; 16760c9dde0dSJonathan Marek 16770c9dde0dSJonathan Marek usb_2_ssphy: lane@88eb200 { 16780c9dde0dSJonathan Marek reg = <0 0x088eb200 0 0x200>, 16790c9dde0dSJonathan Marek <0 0x088eb400 0 0x200>, 16800c9dde0dSJonathan Marek <0 0x088eb800 0 0x800>, 16810c9dde0dSJonathan Marek <0 0x088eb600 0 0x200>; 16820c9dde0dSJonathan Marek #phy-cells = <0>; 16830c9dde0dSJonathan Marek clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 16840c9dde0dSJonathan Marek clock-names = "pipe0"; 16850c9dde0dSJonathan Marek clock-output-names = "usb3_uni_phy_pipe_clk_src"; 16860c9dde0dSJonathan Marek }; 16870c9dde0dSJonathan Marek }; 16880c9dde0dSJonathan Marek 1689b33d2868SJack Pham usb_1: usb@a6f8800 { 1690b33d2868SJack Pham compatible = "qcom,sm8150-dwc3", "qcom,dwc3"; 1691b33d2868SJack Pham reg = <0 0x0a6f8800 0 0x400>; 1692b33d2868SJack Pham status = "disabled"; 1693b33d2868SJack Pham #address-cells = <2>; 1694b33d2868SJack Pham #size-cells = <2>; 1695b33d2868SJack Pham ranges; 1696b33d2868SJack Pham dma-ranges; 1697b33d2868SJack Pham 1698b33d2868SJack Pham clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 1699b33d2868SJack Pham <&gcc GCC_USB30_PRIM_MASTER_CLK>, 1700b33d2868SJack Pham <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 1701b33d2868SJack Pham <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 1702b33d2868SJack Pham <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 1703b33d2868SJack Pham <&gcc GCC_USB3_SEC_CLKREF_CLK>; 1704b33d2868SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1705b33d2868SJack Pham "sleep", "xo"; 1706b33d2868SJack Pham 1707b33d2868SJack Pham assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 1708b33d2868SJack Pham <&gcc GCC_USB30_PRIM_MASTER_CLK>; 170979493db5SJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 1710b33d2868SJack Pham 1711b33d2868SJack Pham interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 1712b33d2868SJack Pham <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, 1713b33d2868SJack Pham <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, 1714b33d2868SJack Pham <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; 1715b33d2868SJack Pham interrupt-names = "hs_phy_irq", "ss_phy_irq", 1716b33d2868SJack Pham "dm_hs_phy_irq", "dp_hs_phy_irq"; 1717b33d2868SJack Pham 1718b33d2868SJack Pham power-domains = <&gcc USB30_PRIM_GDSC>; 1719b33d2868SJack Pham 1720b33d2868SJack Pham resets = <&gcc GCC_USB30_PRIM_BCR>; 1721b33d2868SJack Pham 1722b33d2868SJack Pham usb_1_dwc3: dwc3@a600000 { 1723b33d2868SJack Pham compatible = "snps,dwc3"; 1724b33d2868SJack Pham reg = <0 0x0a600000 0 0xcd00>; 1725b33d2868SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 172648156232SJonathan Marek iommus = <&apps_smmu 0x140 0>; 1727b33d2868SJack Pham snps,dis_u2_susphy_quirk; 1728b33d2868SJack Pham snps,dis_enblslpm_quirk; 1729b33d2868SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 1730b33d2868SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1731b33d2868SJack Pham }; 1732b33d2868SJack Pham }; 1733b33d2868SJack Pham 17340c9dde0dSJonathan Marek usb_2: usb@a8f8800 { 17350c9dde0dSJonathan Marek compatible = "qcom,sm8150-dwc3", "qcom,dwc3"; 17360c9dde0dSJonathan Marek reg = <0 0x0a8f8800 0 0x400>; 17370c9dde0dSJonathan Marek status = "disabled"; 17380c9dde0dSJonathan Marek #address-cells = <2>; 17390c9dde0dSJonathan Marek #size-cells = <2>; 17400c9dde0dSJonathan Marek ranges; 17410c9dde0dSJonathan Marek dma-ranges; 17420c9dde0dSJonathan Marek 17430c9dde0dSJonathan Marek clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 17440c9dde0dSJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>, 17450c9dde0dSJonathan Marek <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 17460c9dde0dSJonathan Marek <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 17470c9dde0dSJonathan Marek <&gcc GCC_USB30_SEC_SLEEP_CLK>, 17480c9dde0dSJonathan Marek <&gcc GCC_USB3_SEC_CLKREF_CLK>; 17490c9dde0dSJonathan Marek clock-names = "cfg_noc", "core", "iface", "mock_utmi", 17500c9dde0dSJonathan Marek "sleep", "xo"; 17510c9dde0dSJonathan Marek 17520c9dde0dSJonathan Marek assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 17530c9dde0dSJonathan Marek <&gcc GCC_USB30_SEC_MASTER_CLK>; 17540c9dde0dSJonathan Marek assigned-clock-rates = <19200000>, <200000000>; 17550c9dde0dSJonathan Marek 17560c9dde0dSJonathan Marek interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 17570c9dde0dSJonathan Marek <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, 17580c9dde0dSJonathan Marek <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, 17590c9dde0dSJonathan Marek <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>; 17600c9dde0dSJonathan Marek interrupt-names = "hs_phy_irq", "ss_phy_irq", 17610c9dde0dSJonathan Marek "dm_hs_phy_irq", "dp_hs_phy_irq"; 17620c9dde0dSJonathan Marek 17630c9dde0dSJonathan Marek power-domains = <&gcc USB30_SEC_GDSC>; 17640c9dde0dSJonathan Marek 17650c9dde0dSJonathan Marek resets = <&gcc GCC_USB30_SEC_BCR>; 17660c9dde0dSJonathan Marek 17670c9dde0dSJonathan Marek usb_2_dwc3: dwc3@a800000 { 17680c9dde0dSJonathan Marek compatible = "snps,dwc3"; 17690c9dde0dSJonathan Marek reg = <0 0x0a800000 0 0xcd00>; 17700c9dde0dSJonathan Marek interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 17710c9dde0dSJonathan Marek iommus = <&apps_smmu 0x160 0>; 17720c9dde0dSJonathan Marek snps,dis_u2_susphy_quirk; 17730c9dde0dSJonathan Marek snps,dis_enblslpm_quirk; 17740c9dde0dSJonathan Marek phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 17750c9dde0dSJonathan Marek phy-names = "usb2-phy", "usb3-phy"; 17760c9dde0dSJonathan Marek }; 17770c9dde0dSJonathan Marek }; 17780c9dde0dSJonathan Marek 17796acb71fdSJonathan Marek camnoc_virt: interconnect@ac00000 { 17806acb71fdSJonathan Marek compatible = "qcom,sm8150-camnoc-virt"; 17816acb71fdSJonathan Marek reg = <0 0x0ac00000 0 0x1000>; 17826acb71fdSJonathan Marek #interconnect-cells = <1>; 17836acb71fdSJonathan Marek qcom,bcm-voters = <&apps_bcm_voter>; 17846acb71fdSJonathan Marek }; 17856acb71fdSJonathan Marek 1786d8cf9372SVinod Koul aoss_qmp: power-controller@c300000 { 1787d8cf9372SVinod Koul compatible = "qcom,sm8150-aoss-qmp"; 1788d8cf9372SVinod Koul reg = <0x0 0x0c300000 0x0 0x100000>; 1789d8cf9372SVinod Koul interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; 1790d8cf9372SVinod Koul mboxes = <&apss_shared 0>; 1791d8cf9372SVinod Koul 1792d8cf9372SVinod Koul #clock-cells = <0>; 1793d8cf9372SVinod Koul #power-domain-cells = <1>; 1794d8cf9372SVinod Koul }; 1795d8cf9372SVinod Koul 1796d2fa630cSAmit Kucheria tsens0: thermal-sensor@c263000 { 1797d2fa630cSAmit Kucheria compatible = "qcom,sm8150-tsens", "qcom,tsens-v2"; 1798d2fa630cSAmit Kucheria reg = <0 0x0c263000 0 0x1ff>, /* TM */ 1799d2fa630cSAmit Kucheria <0 0x0c222000 0 0x1ff>; /* SROT */ 1800d2fa630cSAmit Kucheria #qcom,sensors = <16>; 1801d2fa630cSAmit Kucheria interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 1802d2fa630cSAmit Kucheria <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 1803d2fa630cSAmit Kucheria interrupt-names = "uplow", "critical"; 1804d2fa630cSAmit Kucheria #thermal-sensor-cells = <1>; 1805d2fa630cSAmit Kucheria }; 1806d2fa630cSAmit Kucheria 1807d2fa630cSAmit Kucheria tsens1: thermal-sensor@c265000 { 1808d2fa630cSAmit Kucheria compatible = "qcom,sm8150-tsens", "qcom,tsens-v2"; 1809d2fa630cSAmit Kucheria reg = <0 0x0c265000 0 0x1ff>, /* TM */ 1810d2fa630cSAmit Kucheria <0 0x0c223000 0 0x1ff>; /* SROT */ 1811d2fa630cSAmit Kucheria #qcom,sensors = <8>; 1812d2fa630cSAmit Kucheria interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 1813d2fa630cSAmit Kucheria <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 1814d2fa630cSAmit Kucheria interrupt-names = "uplow", "critical"; 1815d2fa630cSAmit Kucheria #thermal-sensor-cells = <1>; 1816d2fa630cSAmit Kucheria }; 1817d2fa630cSAmit Kucheria 1818e13c6d14SVinod Koul spmi_bus: spmi@c440000 { 1819e13c6d14SVinod Koul compatible = "qcom,spmi-pmic-arb"; 1820e13c6d14SVinod Koul reg = <0x0 0x0c440000 0x0 0x0001100>, 1821e13c6d14SVinod Koul <0x0 0x0c600000 0x0 0x2000000>, 1822e13c6d14SVinod Koul <0x0 0x0e600000 0x0 0x0100000>, 1823e13c6d14SVinod Koul <0x0 0x0e700000 0x0 0x00a0000>, 1824e13c6d14SVinod Koul <0x0 0x0c40a000 0x0 0x0026000>; 1825e13c6d14SVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 1826e13c6d14SVinod Koul interrupt-names = "periph_irq"; 1827e13c6d14SVinod Koul interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>; 1828e13c6d14SVinod Koul qcom,ee = <0>; 1829e13c6d14SVinod Koul qcom,channel = <0>; 1830e13c6d14SVinod Koul #address-cells = <2>; 1831e13c6d14SVinod Koul #size-cells = <0>; 1832e13c6d14SVinod Koul interrupt-controller; 1833e13c6d14SVinod Koul #interrupt-cells = <4>; 1834e13c6d14SVinod Koul cell-index = <0>; 1835e13c6d14SVinod Koul }; 1836e13c6d14SVinod Koul 183748156232SJonathan Marek apps_smmu: iommu@15000000 { 183848156232SJonathan Marek compatible = "qcom,sm8150-smmu-500", "arm,mmu-500"; 183948156232SJonathan Marek reg = <0 0x15000000 0 0x100000>; 184048156232SJonathan Marek #iommu-cells = <2>; 184148156232SJonathan Marek #global-interrupts = <1>; 184248156232SJonathan Marek interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 184348156232SJonathan Marek <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 184448156232SJonathan Marek <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 184548156232SJonathan Marek <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 184648156232SJonathan Marek <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 184748156232SJonathan Marek <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 184848156232SJonathan Marek <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 184948156232SJonathan Marek <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 185048156232SJonathan Marek <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 185148156232SJonathan Marek <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 185248156232SJonathan Marek <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 185348156232SJonathan Marek <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 185448156232SJonathan Marek <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 185548156232SJonathan Marek <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 185648156232SJonathan Marek <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 185748156232SJonathan Marek <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 185848156232SJonathan Marek <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 185948156232SJonathan Marek <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 186048156232SJonathan Marek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 186148156232SJonathan Marek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 186248156232SJonathan Marek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 186348156232SJonathan Marek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 186448156232SJonathan Marek <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 186548156232SJonathan Marek <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 186648156232SJonathan Marek <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 186748156232SJonathan Marek <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 186848156232SJonathan Marek <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 186948156232SJonathan Marek <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 187048156232SJonathan Marek <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 187148156232SJonathan Marek <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 187248156232SJonathan Marek <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 187348156232SJonathan Marek <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 187448156232SJonathan Marek <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 187548156232SJonathan Marek <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 187648156232SJonathan Marek <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 187748156232SJonathan Marek <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 187848156232SJonathan Marek <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 187948156232SJonathan Marek <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 188048156232SJonathan Marek <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 188148156232SJonathan Marek <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 188248156232SJonathan Marek <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 188348156232SJonathan Marek <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 188448156232SJonathan Marek <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 188548156232SJonathan Marek <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 188648156232SJonathan Marek <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 188748156232SJonathan Marek <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 188848156232SJonathan Marek <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 188948156232SJonathan Marek <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 189048156232SJonathan Marek <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 189148156232SJonathan Marek <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 189248156232SJonathan Marek <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 189348156232SJonathan Marek <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 189448156232SJonathan Marek <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 189548156232SJonathan Marek <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 189648156232SJonathan Marek <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 189748156232SJonathan Marek <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 189848156232SJonathan Marek <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 189948156232SJonathan Marek <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 190048156232SJonathan Marek <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 190148156232SJonathan Marek <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 190248156232SJonathan Marek <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 190348156232SJonathan Marek <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 190448156232SJonathan Marek <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 190548156232SJonathan Marek <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 190648156232SJonathan Marek <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 190748156232SJonathan Marek <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 190848156232SJonathan Marek <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 190948156232SJonathan Marek <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 191048156232SJonathan Marek <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 191148156232SJonathan Marek <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 191248156232SJonathan Marek <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 191348156232SJonathan Marek <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 191448156232SJonathan Marek <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 191548156232SJonathan Marek <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 191648156232SJonathan Marek <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 191748156232SJonathan Marek <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 191848156232SJonathan Marek <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 191948156232SJonathan Marek <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 192048156232SJonathan Marek <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 192148156232SJonathan Marek <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 192248156232SJonathan Marek <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 192348156232SJonathan Marek }; 192448156232SJonathan Marek 192549076351SSibi Sankar remoteproc_adsp: remoteproc@17300000 { 192649076351SSibi Sankar compatible = "qcom,sm8150-adsp-pas"; 192749076351SSibi Sankar reg = <0x0 0x17300000 0x0 0x4040>; 192849076351SSibi Sankar 192949076351SSibi Sankar interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, 193049076351SSibi Sankar <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 193149076351SSibi Sankar <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 193249076351SSibi Sankar <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 193349076351SSibi Sankar <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; 193449076351SSibi Sankar interrupt-names = "wdog", "fatal", "ready", 193549076351SSibi Sankar "handover", "stop-ack"; 193649076351SSibi Sankar 193749076351SSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>; 193849076351SSibi Sankar clock-names = "xo"; 193949076351SSibi Sankar 194049076351SSibi Sankar power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 1941d0770627SBjorn Andersson <&rpmhpd 7>; 194249076351SSibi Sankar power-domain-names = "load_state", "cx"; 194349076351SSibi Sankar 194449076351SSibi Sankar memory-region = <&adsp_mem>; 194549076351SSibi Sankar 194649076351SSibi Sankar qcom,smem-states = <&adsp_smp2p_out 0>; 194749076351SSibi Sankar qcom,smem-state-names = "stop"; 194849076351SSibi Sankar 194949076351SSibi Sankar status = "disabled"; 195049076351SSibi Sankar 195149076351SSibi Sankar glink-edge { 195249076351SSibi Sankar interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; 195349076351SSibi Sankar label = "lpass"; 195449076351SSibi Sankar qcom,remote-pid = <2>; 195549076351SSibi Sankar mboxes = <&apss_shared 8>; 195649076351SSibi Sankar }; 195749076351SSibi Sankar }; 195849076351SSibi Sankar 1959e13c6d14SVinod Koul intc: interrupt-controller@17a00000 { 1960e13c6d14SVinod Koul compatible = "arm,gic-v3"; 1961e13c6d14SVinod Koul interrupt-controller; 1962e13c6d14SVinod Koul #interrupt-cells = <3>; 1963e13c6d14SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 1964e13c6d14SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 1965e13c6d14SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1966e13c6d14SVinod Koul }; 1967e13c6d14SVinod Koul 1968d8cf9372SVinod Koul apss_shared: mailbox@17c00000 { 1969d8cf9372SVinod Koul compatible = "qcom,sm8150-apss-shared"; 1970d8cf9372SVinod Koul reg = <0x0 0x17c00000 0x0 0x1000>; 1971d8cf9372SVinod Koul #mbox-cells = <1>; 1972d8cf9372SVinod Koul }; 1973d8cf9372SVinod Koul 1974fb2d8150SSai Prakash Ranjan watchdog@17c10000 { 1975fb2d8150SSai Prakash Ranjan compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt"; 1976fb2d8150SSai Prakash Ranjan reg = <0 0x17c10000 0 0x1000>; 1977fb2d8150SSai Prakash Ranjan clocks = <&sleep_clk>; 1978fb2d8150SSai Prakash Ranjan }; 1979fb2d8150SSai Prakash Ranjan 1980e13c6d14SVinod Koul timer@17c20000 { 1981e13c6d14SVinod Koul #address-cells = <2>; 1982e13c6d14SVinod Koul #size-cells = <2>; 1983e13c6d14SVinod Koul ranges; 1984e13c6d14SVinod Koul compatible = "arm,armv7-timer-mem"; 1985e13c6d14SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 1986e13c6d14SVinod Koul clock-frequency = <19200000>; 1987e13c6d14SVinod Koul 1988e13c6d14SVinod Koul frame@17c21000{ 1989e13c6d14SVinod Koul frame-number = <0>; 1990e13c6d14SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 1991e13c6d14SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 1992e13c6d14SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 1993e13c6d14SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 1994e13c6d14SVinod Koul }; 1995e13c6d14SVinod Koul 1996e13c6d14SVinod Koul frame@17c23000 { 1997e13c6d14SVinod Koul frame-number = <1>; 1998e13c6d14SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 1999e13c6d14SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 2000e13c6d14SVinod Koul status = "disabled"; 2001e13c6d14SVinod Koul }; 2002e13c6d14SVinod Koul 2003e13c6d14SVinod Koul frame@17c25000 { 2004e13c6d14SVinod Koul frame-number = <2>; 2005e13c6d14SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 2006e13c6d14SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 2007e13c6d14SVinod Koul status = "disabled"; 2008e13c6d14SVinod Koul }; 2009e13c6d14SVinod Koul 2010e13c6d14SVinod Koul frame@17c27000 { 2011e13c6d14SVinod Koul frame-number = <3>; 2012e13c6d14SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 2013e13c6d14SVinod Koul reg = <0x0 0x17c26000 0x0 0x1000>; 2014e13c6d14SVinod Koul status = "disabled"; 2015e13c6d14SVinod Koul }; 2016e13c6d14SVinod Koul 2017e13c6d14SVinod Koul frame@17c29000 { 2018e13c6d14SVinod Koul frame-number = <4>; 2019e13c6d14SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 2020e13c6d14SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 2021e13c6d14SVinod Koul status = "disabled"; 2022e13c6d14SVinod Koul }; 2023e13c6d14SVinod Koul 2024e13c6d14SVinod Koul frame@17c2b000 { 2025e13c6d14SVinod Koul frame-number = <5>; 2026e13c6d14SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 2027e13c6d14SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 2028e13c6d14SVinod Koul status = "disabled"; 2029e13c6d14SVinod Koul }; 2030e13c6d14SVinod Koul 2031e13c6d14SVinod Koul frame@17c2d000 { 2032e13c6d14SVinod Koul frame-number = <6>; 2033e13c6d14SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 2034e13c6d14SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 2035e13c6d14SVinod Koul status = "disabled"; 2036e13c6d14SVinod Koul }; 2037e13c6d14SVinod Koul }; 2038d8cf9372SVinod Koul 2039d8cf9372SVinod Koul apps_rsc: rsc@18200000 { 2040d8cf9372SVinod Koul label = "apps_rsc"; 2041d8cf9372SVinod Koul compatible = "qcom,rpmh-rsc"; 2042d8cf9372SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 2043d8cf9372SVinod Koul <0x0 0x18210000 0x0 0x10000>, 2044d8cf9372SVinod Koul <0x0 0x18220000 0x0 0x10000>; 2045d8cf9372SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 2046d8cf9372SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 2047d8cf9372SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 2048d8cf9372SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 2049d8cf9372SVinod Koul qcom,tcs-offset = <0xd00>; 2050d8cf9372SVinod Koul qcom,drv-id = <2>; 2051d8cf9372SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, 2052d8cf9372SVinod Koul <SLEEP_TCS 1>, 2053d8cf9372SVinod Koul <WAKE_TCS 1>, 2054d8cf9372SVinod Koul <CONTROL_TCS 0>; 2055d8cf9372SVinod Koul 2056d8cf9372SVinod Koul rpmhcc: clock-controller { 2057d8cf9372SVinod Koul compatible = "qcom,sm8150-rpmh-clk"; 2058d8cf9372SVinod Koul #clock-cells = <1>; 2059d8cf9372SVinod Koul clock-names = "xo"; 2060d8cf9372SVinod Koul clocks = <&xo_board>; 2061d8cf9372SVinod Koul }; 2062017e7856SSibi Sankar 2063017e7856SSibi Sankar rpmhpd: power-controller { 2064017e7856SSibi Sankar compatible = "qcom,sm8150-rpmhpd"; 2065017e7856SSibi Sankar #power-domain-cells = <1>; 2066017e7856SSibi Sankar operating-points-v2 = <&rpmhpd_opp_table>; 2067017e7856SSibi Sankar 2068017e7856SSibi Sankar rpmhpd_opp_table: opp-table { 2069017e7856SSibi Sankar compatible = "operating-points-v2"; 2070017e7856SSibi Sankar 2071017e7856SSibi Sankar rpmhpd_opp_ret: opp1 { 2072017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 2073017e7856SSibi Sankar }; 2074017e7856SSibi Sankar 2075017e7856SSibi Sankar rpmhpd_opp_min_svs: opp2 { 2076017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 2077017e7856SSibi Sankar }; 2078017e7856SSibi Sankar 2079017e7856SSibi Sankar rpmhpd_opp_low_svs: opp3 { 2080017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 2081017e7856SSibi Sankar }; 2082017e7856SSibi Sankar 2083017e7856SSibi Sankar rpmhpd_opp_svs: opp4 { 2084017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 2085017e7856SSibi Sankar }; 2086017e7856SSibi Sankar 2087017e7856SSibi Sankar rpmhpd_opp_svs_l1: opp5 { 2088017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 2089017e7856SSibi Sankar }; 2090017e7856SSibi Sankar 2091017e7856SSibi Sankar rpmhpd_opp_svs_l2: opp6 { 2092017e7856SSibi Sankar opp-level = <224>; 2093017e7856SSibi Sankar }; 2094017e7856SSibi Sankar 2095017e7856SSibi Sankar rpmhpd_opp_nom: opp7 { 2096017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 2097017e7856SSibi Sankar }; 2098017e7856SSibi Sankar 2099017e7856SSibi Sankar rpmhpd_opp_nom_l1: opp8 { 2100017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 2101017e7856SSibi Sankar }; 2102017e7856SSibi Sankar 2103017e7856SSibi Sankar rpmhpd_opp_nom_l2: opp9 { 2104017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 2105017e7856SSibi Sankar }; 2106017e7856SSibi Sankar 2107017e7856SSibi Sankar rpmhpd_opp_turbo: opp10 { 2108017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 2109017e7856SSibi Sankar }; 2110017e7856SSibi Sankar 2111017e7856SSibi Sankar rpmhpd_opp_turbo_l1: opp11 { 2112017e7856SSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 2113017e7856SSibi Sankar }; 2114017e7856SSibi Sankar }; 2115017e7856SSibi Sankar }; 211671a2fc6eSJonathan Marek 211771a2fc6eSJonathan Marek apps_bcm_voter: bcm_voter { 211871a2fc6eSJonathan Marek compatible = "qcom,bcm-voter"; 211971a2fc6eSJonathan Marek }; 2120d8cf9372SVinod Koul }; 2121fea8930bSSibi Sankar 2122a6d435c1SSibi Sankar osm_l3: interconnect@18321000 { 2123a6d435c1SSibi Sankar compatible = "qcom,sm8150-osm-l3"; 2124a6d435c1SSibi Sankar reg = <0 0x18321000 0 0x1400>; 2125a6d435c1SSibi Sankar 2126a6d435c1SSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 2127a6d435c1SSibi Sankar clock-names = "xo", "alternate"; 2128a6d435c1SSibi Sankar 2129a6d435c1SSibi Sankar #interconnect-cells = <1>; 2130a6d435c1SSibi Sankar }; 2131a6d435c1SSibi Sankar 2132fea8930bSSibi Sankar cpufreq_hw: cpufreq@18323000 { 2133fea8930bSSibi Sankar compatible = "qcom,cpufreq-hw"; 2134fea8930bSSibi Sankar reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>, 2135fea8930bSSibi Sankar <0 0x18327800 0 0x1400>; 2136fea8930bSSibi Sankar reg-names = "freq-domain0", "freq-domain1", 2137fea8930bSSibi Sankar "freq-domain2"; 2138fea8930bSSibi Sankar 2139fea8930bSSibi Sankar clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 2140fea8930bSSibi Sankar clock-names = "xo", "alternate"; 2141fea8930bSSibi Sankar 2142fea8930bSSibi Sankar #freq-domain-cells = <1>; 2143fea8930bSSibi Sankar }; 214405090bb9SJonathan Marek 214505090bb9SJonathan Marek wifi: wifi@18800000 { 214605090bb9SJonathan Marek compatible = "qcom,wcn3990-wifi"; 214705090bb9SJonathan Marek reg = <0 0x18800000 0 0x800000>; 214805090bb9SJonathan Marek reg-names = "membase"; 214905090bb9SJonathan Marek memory-region = <&wlan_mem>; 215005090bb9SJonathan Marek clock-names = "cxo_ref_clk_pin", "qdss"; 215105090bb9SJonathan Marek clocks = <&rpmhcc RPMH_RF_CLK2>, <&aoss_qmp>; 215205090bb9SJonathan Marek interrupts = <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, 215305090bb9SJonathan Marek <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>, 215405090bb9SJonathan Marek <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 215505090bb9SJonathan Marek <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 215605090bb9SJonathan Marek <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 215705090bb9SJonathan Marek <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 215805090bb9SJonathan Marek <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 215905090bb9SJonathan Marek <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 216005090bb9SJonathan Marek <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 216105090bb9SJonathan Marek <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 216205090bb9SJonathan Marek <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 216305090bb9SJonathan Marek <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>; 216405090bb9SJonathan Marek iommus = <&apps_smmu 0x0640 0x1>; 216505090bb9SJonathan Marek status = "disabled"; 216605090bb9SJonathan Marek }; 2167e13c6d14SVinod Koul }; 2168e13c6d14SVinod Koul 2169e13c6d14SVinod Koul timer { 2170e13c6d14SVinod Koul compatible = "arm,armv8-timer"; 2171e13c6d14SVinod Koul interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>, 2172e13c6d14SVinod Koul <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>, 2173e13c6d14SVinod Koul <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>, 2174e13c6d14SVinod Koul <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>; 2175e13c6d14SVinod Koul }; 2176d2fa630cSAmit Kucheria 2177d2fa630cSAmit Kucheria thermal-zones { 2178d2fa630cSAmit Kucheria cpu0-thermal { 2179d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2180d2fa630cSAmit Kucheria polling-delay = <1000>; 2181d2fa630cSAmit Kucheria 2182d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 1>; 2183d2fa630cSAmit Kucheria 2184d2fa630cSAmit Kucheria trips { 2185d2fa630cSAmit Kucheria cpu0_alert0: trip-point0 { 2186d2fa630cSAmit Kucheria temperature = <90000>; 2187d2fa630cSAmit Kucheria hysteresis = <2000>; 2188d2fa630cSAmit Kucheria type = "passive"; 2189d2fa630cSAmit Kucheria }; 2190d2fa630cSAmit Kucheria 2191d2fa630cSAmit Kucheria cpu0_alert1: trip-point1 { 2192d2fa630cSAmit Kucheria temperature = <95000>; 2193d2fa630cSAmit Kucheria hysteresis = <2000>; 2194d2fa630cSAmit Kucheria type = "passive"; 2195d2fa630cSAmit Kucheria }; 2196d2fa630cSAmit Kucheria 2197d2fa630cSAmit Kucheria cpu0_crit: cpu_crit { 2198d2fa630cSAmit Kucheria temperature = <110000>; 2199d2fa630cSAmit Kucheria hysteresis = <1000>; 2200d2fa630cSAmit Kucheria type = "critical"; 2201d2fa630cSAmit Kucheria }; 2202d2fa630cSAmit Kucheria }; 2203d2fa630cSAmit Kucheria 2204d2fa630cSAmit Kucheria cooling-maps { 2205d2fa630cSAmit Kucheria map0 { 2206d2fa630cSAmit Kucheria trip = <&cpu0_alert0>; 2207d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2208d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2209d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2210d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2211d2fa630cSAmit Kucheria }; 2212d2fa630cSAmit Kucheria map1 { 2213d2fa630cSAmit Kucheria trip = <&cpu0_alert1>; 2214d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2215d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2216d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2217d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2218d2fa630cSAmit Kucheria }; 2219d2fa630cSAmit Kucheria }; 2220d2fa630cSAmit Kucheria }; 2221d2fa630cSAmit Kucheria 2222d2fa630cSAmit Kucheria cpu1-thermal { 2223d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2224d2fa630cSAmit Kucheria polling-delay = <1000>; 2225d2fa630cSAmit Kucheria 2226d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 2>; 2227d2fa630cSAmit Kucheria 2228d2fa630cSAmit Kucheria trips { 2229d2fa630cSAmit Kucheria cpu1_alert0: trip-point0 { 2230d2fa630cSAmit Kucheria temperature = <90000>; 2231d2fa630cSAmit Kucheria hysteresis = <2000>; 2232d2fa630cSAmit Kucheria type = "passive"; 2233d2fa630cSAmit Kucheria }; 2234d2fa630cSAmit Kucheria 2235d2fa630cSAmit Kucheria cpu1_alert1: trip-point1 { 2236d2fa630cSAmit Kucheria temperature = <95000>; 2237d2fa630cSAmit Kucheria hysteresis = <2000>; 2238d2fa630cSAmit Kucheria type = "passive"; 2239d2fa630cSAmit Kucheria }; 2240d2fa630cSAmit Kucheria 2241d2fa630cSAmit Kucheria cpu1_crit: cpu_crit { 2242d2fa630cSAmit Kucheria temperature = <110000>; 2243d2fa630cSAmit Kucheria hysteresis = <1000>; 2244d2fa630cSAmit Kucheria type = "critical"; 2245d2fa630cSAmit Kucheria }; 2246d2fa630cSAmit Kucheria }; 2247d2fa630cSAmit Kucheria 2248d2fa630cSAmit Kucheria cooling-maps { 2249d2fa630cSAmit Kucheria map0 { 2250d2fa630cSAmit Kucheria trip = <&cpu1_alert0>; 2251d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2252d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2253d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2254d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2255d2fa630cSAmit Kucheria }; 2256d2fa630cSAmit Kucheria map1 { 2257d2fa630cSAmit Kucheria trip = <&cpu1_alert1>; 2258d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2259d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2260d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2261d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2262d2fa630cSAmit Kucheria }; 2263d2fa630cSAmit Kucheria }; 2264d2fa630cSAmit Kucheria }; 2265d2fa630cSAmit Kucheria 2266d2fa630cSAmit Kucheria cpu2-thermal { 2267d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2268d2fa630cSAmit Kucheria polling-delay = <1000>; 2269d2fa630cSAmit Kucheria 2270d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 3>; 2271d2fa630cSAmit Kucheria 2272d2fa630cSAmit Kucheria trips { 2273d2fa630cSAmit Kucheria cpu2_alert0: trip-point0 { 2274d2fa630cSAmit Kucheria temperature = <90000>; 2275d2fa630cSAmit Kucheria hysteresis = <2000>; 2276d2fa630cSAmit Kucheria type = "passive"; 2277d2fa630cSAmit Kucheria }; 2278d2fa630cSAmit Kucheria 2279d2fa630cSAmit Kucheria cpu2_alert1: trip-point1 { 2280d2fa630cSAmit Kucheria temperature = <95000>; 2281d2fa630cSAmit Kucheria hysteresis = <2000>; 2282d2fa630cSAmit Kucheria type = "passive"; 2283d2fa630cSAmit Kucheria }; 2284d2fa630cSAmit Kucheria 2285d2fa630cSAmit Kucheria cpu2_crit: cpu_crit { 2286d2fa630cSAmit Kucheria temperature = <110000>; 2287d2fa630cSAmit Kucheria hysteresis = <1000>; 2288d2fa630cSAmit Kucheria type = "critical"; 2289d2fa630cSAmit Kucheria }; 2290d2fa630cSAmit Kucheria }; 2291d2fa630cSAmit Kucheria 2292d2fa630cSAmit Kucheria cooling-maps { 2293d2fa630cSAmit Kucheria map0 { 2294d2fa630cSAmit Kucheria trip = <&cpu2_alert0>; 2295d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2296d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2297d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2298d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2299d2fa630cSAmit Kucheria }; 2300d2fa630cSAmit Kucheria map1 { 2301d2fa630cSAmit Kucheria trip = <&cpu2_alert1>; 2302d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2303d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2304d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2305d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2306d2fa630cSAmit Kucheria }; 2307d2fa630cSAmit Kucheria }; 2308d2fa630cSAmit Kucheria }; 2309d2fa630cSAmit Kucheria 2310d2fa630cSAmit Kucheria cpu3-thermal { 2311d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2312d2fa630cSAmit Kucheria polling-delay = <1000>; 2313d2fa630cSAmit Kucheria 2314d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 4>; 2315d2fa630cSAmit Kucheria 2316d2fa630cSAmit Kucheria trips { 2317d2fa630cSAmit Kucheria cpu3_alert0: trip-point0 { 2318d2fa630cSAmit Kucheria temperature = <90000>; 2319d2fa630cSAmit Kucheria hysteresis = <2000>; 2320d2fa630cSAmit Kucheria type = "passive"; 2321d2fa630cSAmit Kucheria }; 2322d2fa630cSAmit Kucheria 2323d2fa630cSAmit Kucheria cpu3_alert1: trip-point1 { 2324d2fa630cSAmit Kucheria temperature = <95000>; 2325d2fa630cSAmit Kucheria hysteresis = <2000>; 2326d2fa630cSAmit Kucheria type = "passive"; 2327d2fa630cSAmit Kucheria }; 2328d2fa630cSAmit Kucheria 2329d2fa630cSAmit Kucheria cpu3_crit: cpu_crit { 2330d2fa630cSAmit Kucheria temperature = <110000>; 2331d2fa630cSAmit Kucheria hysteresis = <1000>; 2332d2fa630cSAmit Kucheria type = "critical"; 2333d2fa630cSAmit Kucheria }; 2334d2fa630cSAmit Kucheria }; 2335d2fa630cSAmit Kucheria 2336d2fa630cSAmit Kucheria cooling-maps { 2337d2fa630cSAmit Kucheria map0 { 2338d2fa630cSAmit Kucheria trip = <&cpu3_alert0>; 2339d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2340d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2341d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2342d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2343d2fa630cSAmit Kucheria }; 2344d2fa630cSAmit Kucheria map1 { 2345d2fa630cSAmit Kucheria trip = <&cpu3_alert1>; 2346d2fa630cSAmit Kucheria cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2347d2fa630cSAmit Kucheria <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2348d2fa630cSAmit Kucheria <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2349d2fa630cSAmit Kucheria <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2350d2fa630cSAmit Kucheria }; 2351d2fa630cSAmit Kucheria }; 2352d2fa630cSAmit Kucheria }; 2353d2fa630cSAmit Kucheria 2354d2fa630cSAmit Kucheria cpu4-top-thermal { 2355d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2356d2fa630cSAmit Kucheria polling-delay = <1000>; 2357d2fa630cSAmit Kucheria 2358d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 7>; 2359d2fa630cSAmit Kucheria 2360d2fa630cSAmit Kucheria trips { 2361d2fa630cSAmit Kucheria cpu4_top_alert0: trip-point0 { 2362d2fa630cSAmit Kucheria temperature = <90000>; 2363d2fa630cSAmit Kucheria hysteresis = <2000>; 2364d2fa630cSAmit Kucheria type = "passive"; 2365d2fa630cSAmit Kucheria }; 2366d2fa630cSAmit Kucheria 2367d2fa630cSAmit Kucheria cpu4_top_alert1: trip-point1 { 2368d2fa630cSAmit Kucheria temperature = <95000>; 2369d2fa630cSAmit Kucheria hysteresis = <2000>; 2370d2fa630cSAmit Kucheria type = "passive"; 2371d2fa630cSAmit Kucheria }; 2372d2fa630cSAmit Kucheria 2373d2fa630cSAmit Kucheria cpu4_top_crit: cpu_crit { 2374d2fa630cSAmit Kucheria temperature = <110000>; 2375d2fa630cSAmit Kucheria hysteresis = <1000>; 2376d2fa630cSAmit Kucheria type = "critical"; 2377d2fa630cSAmit Kucheria }; 2378d2fa630cSAmit Kucheria }; 2379d2fa630cSAmit Kucheria 2380d2fa630cSAmit Kucheria cooling-maps { 2381d2fa630cSAmit Kucheria map0 { 2382d2fa630cSAmit Kucheria trip = <&cpu4_top_alert0>; 2383d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2384d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2385d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2386d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2387d2fa630cSAmit Kucheria }; 2388d2fa630cSAmit Kucheria map1 { 2389d2fa630cSAmit Kucheria trip = <&cpu4_top_alert1>; 2390d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2391d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2392d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2393d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2394d2fa630cSAmit Kucheria }; 2395d2fa630cSAmit Kucheria }; 2396d2fa630cSAmit Kucheria }; 2397d2fa630cSAmit Kucheria 2398d2fa630cSAmit Kucheria cpu5-top-thermal { 2399d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2400d2fa630cSAmit Kucheria polling-delay = <1000>; 2401d2fa630cSAmit Kucheria 2402d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 8>; 2403d2fa630cSAmit Kucheria 2404d2fa630cSAmit Kucheria trips { 2405d2fa630cSAmit Kucheria cpu5_top_alert0: trip-point0 { 2406d2fa630cSAmit Kucheria temperature = <90000>; 2407d2fa630cSAmit Kucheria hysteresis = <2000>; 2408d2fa630cSAmit Kucheria type = "passive"; 2409d2fa630cSAmit Kucheria }; 2410d2fa630cSAmit Kucheria 2411d2fa630cSAmit Kucheria cpu5_top_alert1: trip-point1 { 2412d2fa630cSAmit Kucheria temperature = <95000>; 2413d2fa630cSAmit Kucheria hysteresis = <2000>; 2414d2fa630cSAmit Kucheria type = "passive"; 2415d2fa630cSAmit Kucheria }; 2416d2fa630cSAmit Kucheria 2417d2fa630cSAmit Kucheria cpu5_top_crit: cpu_crit { 2418d2fa630cSAmit Kucheria temperature = <110000>; 2419d2fa630cSAmit Kucheria hysteresis = <1000>; 2420d2fa630cSAmit Kucheria type = "critical"; 2421d2fa630cSAmit Kucheria }; 2422d2fa630cSAmit Kucheria }; 2423d2fa630cSAmit Kucheria 2424d2fa630cSAmit Kucheria cooling-maps { 2425d2fa630cSAmit Kucheria map0 { 2426d2fa630cSAmit Kucheria trip = <&cpu5_top_alert0>; 2427d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2428d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2429d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2430d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2431d2fa630cSAmit Kucheria }; 2432d2fa630cSAmit Kucheria map1 { 2433d2fa630cSAmit Kucheria trip = <&cpu5_top_alert1>; 2434d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2435d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2436d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2437d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2438d2fa630cSAmit Kucheria }; 2439d2fa630cSAmit Kucheria }; 2440d2fa630cSAmit Kucheria }; 2441d2fa630cSAmit Kucheria 2442d2fa630cSAmit Kucheria cpu6-top-thermal { 2443d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2444d2fa630cSAmit Kucheria polling-delay = <1000>; 2445d2fa630cSAmit Kucheria 2446d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 9>; 2447d2fa630cSAmit Kucheria 2448d2fa630cSAmit Kucheria trips { 2449d2fa630cSAmit Kucheria cpu6_top_alert0: trip-point0 { 2450d2fa630cSAmit Kucheria temperature = <90000>; 2451d2fa630cSAmit Kucheria hysteresis = <2000>; 2452d2fa630cSAmit Kucheria type = "passive"; 2453d2fa630cSAmit Kucheria }; 2454d2fa630cSAmit Kucheria 2455d2fa630cSAmit Kucheria cpu6_top_alert1: trip-point1 { 2456d2fa630cSAmit Kucheria temperature = <95000>; 2457d2fa630cSAmit Kucheria hysteresis = <2000>; 2458d2fa630cSAmit Kucheria type = "passive"; 2459d2fa630cSAmit Kucheria }; 2460d2fa630cSAmit Kucheria 2461d2fa630cSAmit Kucheria cpu6_top_crit: cpu_crit { 2462d2fa630cSAmit Kucheria temperature = <110000>; 2463d2fa630cSAmit Kucheria hysteresis = <1000>; 2464d2fa630cSAmit Kucheria type = "critical"; 2465d2fa630cSAmit Kucheria }; 2466d2fa630cSAmit Kucheria }; 2467d2fa630cSAmit Kucheria 2468d2fa630cSAmit Kucheria cooling-maps { 2469d2fa630cSAmit Kucheria map0 { 2470d2fa630cSAmit Kucheria trip = <&cpu6_top_alert0>; 2471d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2472d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2473d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2474d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2475d2fa630cSAmit Kucheria }; 2476d2fa630cSAmit Kucheria map1 { 2477d2fa630cSAmit Kucheria trip = <&cpu6_top_alert1>; 2478d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2479d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2480d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2481d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2482d2fa630cSAmit Kucheria }; 2483d2fa630cSAmit Kucheria }; 2484d2fa630cSAmit Kucheria }; 2485d2fa630cSAmit Kucheria 2486d2fa630cSAmit Kucheria cpu7-top-thermal { 2487d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2488d2fa630cSAmit Kucheria polling-delay = <1000>; 2489d2fa630cSAmit Kucheria 2490d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 10>; 2491d2fa630cSAmit Kucheria 2492d2fa630cSAmit Kucheria trips { 2493d2fa630cSAmit Kucheria cpu7_top_alert0: trip-point0 { 2494d2fa630cSAmit Kucheria temperature = <90000>; 2495d2fa630cSAmit Kucheria hysteresis = <2000>; 2496d2fa630cSAmit Kucheria type = "passive"; 2497d2fa630cSAmit Kucheria }; 2498d2fa630cSAmit Kucheria 2499d2fa630cSAmit Kucheria cpu7_top_alert1: trip-point1 { 2500d2fa630cSAmit Kucheria temperature = <95000>; 2501d2fa630cSAmit Kucheria hysteresis = <2000>; 2502d2fa630cSAmit Kucheria type = "passive"; 2503d2fa630cSAmit Kucheria }; 2504d2fa630cSAmit Kucheria 2505d2fa630cSAmit Kucheria cpu7_top_crit: cpu_crit { 2506d2fa630cSAmit Kucheria temperature = <110000>; 2507d2fa630cSAmit Kucheria hysteresis = <1000>; 2508d2fa630cSAmit Kucheria type = "critical"; 2509d2fa630cSAmit Kucheria }; 2510d2fa630cSAmit Kucheria }; 2511d2fa630cSAmit Kucheria 2512d2fa630cSAmit Kucheria cooling-maps { 2513d2fa630cSAmit Kucheria map0 { 2514d2fa630cSAmit Kucheria trip = <&cpu7_top_alert0>; 2515d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2516d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2517d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2518d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2519d2fa630cSAmit Kucheria }; 2520d2fa630cSAmit Kucheria map1 { 2521d2fa630cSAmit Kucheria trip = <&cpu7_top_alert1>; 2522d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2523d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2524d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2525d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2526d2fa630cSAmit Kucheria }; 2527d2fa630cSAmit Kucheria }; 2528d2fa630cSAmit Kucheria }; 2529d2fa630cSAmit Kucheria 2530d2fa630cSAmit Kucheria cpu4-bottom-thermal { 2531d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2532d2fa630cSAmit Kucheria polling-delay = <1000>; 2533d2fa630cSAmit Kucheria 2534d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 11>; 2535d2fa630cSAmit Kucheria 2536d2fa630cSAmit Kucheria trips { 2537d2fa630cSAmit Kucheria cpu4_bottom_alert0: trip-point0 { 2538d2fa630cSAmit Kucheria temperature = <90000>; 2539d2fa630cSAmit Kucheria hysteresis = <2000>; 2540d2fa630cSAmit Kucheria type = "passive"; 2541d2fa630cSAmit Kucheria }; 2542d2fa630cSAmit Kucheria 2543d2fa630cSAmit Kucheria cpu4_bottom_alert1: trip-point1 { 2544d2fa630cSAmit Kucheria temperature = <95000>; 2545d2fa630cSAmit Kucheria hysteresis = <2000>; 2546d2fa630cSAmit Kucheria type = "passive"; 2547d2fa630cSAmit Kucheria }; 2548d2fa630cSAmit Kucheria 2549d2fa630cSAmit Kucheria cpu4_bottom_crit: cpu_crit { 2550d2fa630cSAmit Kucheria temperature = <110000>; 2551d2fa630cSAmit Kucheria hysteresis = <1000>; 2552d2fa630cSAmit Kucheria type = "critical"; 2553d2fa630cSAmit Kucheria }; 2554d2fa630cSAmit Kucheria }; 2555d2fa630cSAmit Kucheria 2556d2fa630cSAmit Kucheria cooling-maps { 2557d2fa630cSAmit Kucheria map0 { 2558d2fa630cSAmit Kucheria trip = <&cpu4_bottom_alert0>; 2559d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2560d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2561d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2562d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2563d2fa630cSAmit Kucheria }; 2564d2fa630cSAmit Kucheria map1 { 2565d2fa630cSAmit Kucheria trip = <&cpu4_bottom_alert1>; 2566d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2567d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2568d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2569d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2570d2fa630cSAmit Kucheria }; 2571d2fa630cSAmit Kucheria }; 2572d2fa630cSAmit Kucheria }; 2573d2fa630cSAmit Kucheria 2574d2fa630cSAmit Kucheria cpu5-bottom-thermal { 2575d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2576d2fa630cSAmit Kucheria polling-delay = <1000>; 2577d2fa630cSAmit Kucheria 2578d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 12>; 2579d2fa630cSAmit Kucheria 2580d2fa630cSAmit Kucheria trips { 2581d2fa630cSAmit Kucheria cpu5_bottom_alert0: trip-point0 { 2582d2fa630cSAmit Kucheria temperature = <90000>; 2583d2fa630cSAmit Kucheria hysteresis = <2000>; 2584d2fa630cSAmit Kucheria type = "passive"; 2585d2fa630cSAmit Kucheria }; 2586d2fa630cSAmit Kucheria 2587d2fa630cSAmit Kucheria cpu5_bottom_alert1: trip-point1 { 2588d2fa630cSAmit Kucheria temperature = <95000>; 2589d2fa630cSAmit Kucheria hysteresis = <2000>; 2590d2fa630cSAmit Kucheria type = "passive"; 2591d2fa630cSAmit Kucheria }; 2592d2fa630cSAmit Kucheria 2593d2fa630cSAmit Kucheria cpu5_bottom_crit: cpu_crit { 2594d2fa630cSAmit Kucheria temperature = <110000>; 2595d2fa630cSAmit Kucheria hysteresis = <1000>; 2596d2fa630cSAmit Kucheria type = "critical"; 2597d2fa630cSAmit Kucheria }; 2598d2fa630cSAmit Kucheria }; 2599d2fa630cSAmit Kucheria 2600d2fa630cSAmit Kucheria cooling-maps { 2601d2fa630cSAmit Kucheria map0 { 2602d2fa630cSAmit Kucheria trip = <&cpu5_bottom_alert0>; 2603d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2604d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2605d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2606d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2607d2fa630cSAmit Kucheria }; 2608d2fa630cSAmit Kucheria map1 { 2609d2fa630cSAmit Kucheria trip = <&cpu5_bottom_alert1>; 2610d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2611d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2612d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2613d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2614d2fa630cSAmit Kucheria }; 2615d2fa630cSAmit Kucheria }; 2616d2fa630cSAmit Kucheria }; 2617d2fa630cSAmit Kucheria 2618d2fa630cSAmit Kucheria cpu6-bottom-thermal { 2619d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2620d2fa630cSAmit Kucheria polling-delay = <1000>; 2621d2fa630cSAmit Kucheria 2622d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 13>; 2623d2fa630cSAmit Kucheria 2624d2fa630cSAmit Kucheria trips { 2625d2fa630cSAmit Kucheria cpu6_bottom_alert0: trip-point0 { 2626d2fa630cSAmit Kucheria temperature = <90000>; 2627d2fa630cSAmit Kucheria hysteresis = <2000>; 2628d2fa630cSAmit Kucheria type = "passive"; 2629d2fa630cSAmit Kucheria }; 2630d2fa630cSAmit Kucheria 2631d2fa630cSAmit Kucheria cpu6_bottom_alert1: trip-point1 { 2632d2fa630cSAmit Kucheria temperature = <95000>; 2633d2fa630cSAmit Kucheria hysteresis = <2000>; 2634d2fa630cSAmit Kucheria type = "passive"; 2635d2fa630cSAmit Kucheria }; 2636d2fa630cSAmit Kucheria 2637d2fa630cSAmit Kucheria cpu6_bottom_crit: cpu_crit { 2638d2fa630cSAmit Kucheria temperature = <110000>; 2639d2fa630cSAmit Kucheria hysteresis = <1000>; 2640d2fa630cSAmit Kucheria type = "critical"; 2641d2fa630cSAmit Kucheria }; 2642d2fa630cSAmit Kucheria }; 2643d2fa630cSAmit Kucheria 2644d2fa630cSAmit Kucheria cooling-maps { 2645d2fa630cSAmit Kucheria map0 { 2646d2fa630cSAmit Kucheria trip = <&cpu6_bottom_alert0>; 2647d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2648d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2649d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2650d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2651d2fa630cSAmit Kucheria }; 2652d2fa630cSAmit Kucheria map1 { 2653d2fa630cSAmit Kucheria trip = <&cpu6_bottom_alert1>; 2654d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2655d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2656d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2657d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2658d2fa630cSAmit Kucheria }; 2659d2fa630cSAmit Kucheria }; 2660d2fa630cSAmit Kucheria }; 2661d2fa630cSAmit Kucheria 2662d2fa630cSAmit Kucheria cpu7-bottom-thermal { 2663d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2664d2fa630cSAmit Kucheria polling-delay = <1000>; 2665d2fa630cSAmit Kucheria 2666d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 14>; 2667d2fa630cSAmit Kucheria 2668d2fa630cSAmit Kucheria trips { 2669d2fa630cSAmit Kucheria cpu7_bottom_alert0: trip-point0 { 2670d2fa630cSAmit Kucheria temperature = <90000>; 2671d2fa630cSAmit Kucheria hysteresis = <2000>; 2672d2fa630cSAmit Kucheria type = "passive"; 2673d2fa630cSAmit Kucheria }; 2674d2fa630cSAmit Kucheria 2675d2fa630cSAmit Kucheria cpu7_bottom_alert1: trip-point1 { 2676d2fa630cSAmit Kucheria temperature = <95000>; 2677d2fa630cSAmit Kucheria hysteresis = <2000>; 2678d2fa630cSAmit Kucheria type = "passive"; 2679d2fa630cSAmit Kucheria }; 2680d2fa630cSAmit Kucheria 2681d2fa630cSAmit Kucheria cpu7_bottom_crit: cpu_crit { 2682d2fa630cSAmit Kucheria temperature = <110000>; 2683d2fa630cSAmit Kucheria hysteresis = <1000>; 2684d2fa630cSAmit Kucheria type = "critical"; 2685d2fa630cSAmit Kucheria }; 2686d2fa630cSAmit Kucheria }; 2687d2fa630cSAmit Kucheria 2688d2fa630cSAmit Kucheria cooling-maps { 2689d2fa630cSAmit Kucheria map0 { 2690d2fa630cSAmit Kucheria trip = <&cpu7_bottom_alert0>; 2691d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2692d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2693d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2694d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2695d2fa630cSAmit Kucheria }; 2696d2fa630cSAmit Kucheria map1 { 2697d2fa630cSAmit Kucheria trip = <&cpu7_bottom_alert1>; 2698d2fa630cSAmit Kucheria cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2699d2fa630cSAmit Kucheria <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2700d2fa630cSAmit Kucheria <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2701d2fa630cSAmit Kucheria <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 2702d2fa630cSAmit Kucheria }; 2703d2fa630cSAmit Kucheria }; 2704d2fa630cSAmit Kucheria }; 2705d2fa630cSAmit Kucheria 2706d2fa630cSAmit Kucheria aoss0-thermal { 2707d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2708d2fa630cSAmit Kucheria polling-delay = <1000>; 2709d2fa630cSAmit Kucheria 2710d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 0>; 2711d2fa630cSAmit Kucheria 2712d2fa630cSAmit Kucheria trips { 2713d2fa630cSAmit Kucheria aoss0_alert0: trip-point0 { 2714d2fa630cSAmit Kucheria temperature = <90000>; 2715d2fa630cSAmit Kucheria hysteresis = <2000>; 2716d2fa630cSAmit Kucheria type = "hot"; 2717d2fa630cSAmit Kucheria }; 2718d2fa630cSAmit Kucheria }; 2719d2fa630cSAmit Kucheria }; 2720d2fa630cSAmit Kucheria 2721d2fa630cSAmit Kucheria cluster0-thermal { 2722d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2723d2fa630cSAmit Kucheria polling-delay = <1000>; 2724d2fa630cSAmit Kucheria 2725d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 5>; 2726d2fa630cSAmit Kucheria 2727d2fa630cSAmit Kucheria trips { 2728d2fa630cSAmit Kucheria cluster0_alert0: trip-point0 { 2729d2fa630cSAmit Kucheria temperature = <90000>; 2730d2fa630cSAmit Kucheria hysteresis = <2000>; 2731d2fa630cSAmit Kucheria type = "hot"; 2732d2fa630cSAmit Kucheria }; 2733d2fa630cSAmit Kucheria cluster0_crit: cluster0_crit { 2734d2fa630cSAmit Kucheria temperature = <110000>; 2735d2fa630cSAmit Kucheria hysteresis = <2000>; 2736d2fa630cSAmit Kucheria type = "critical"; 2737d2fa630cSAmit Kucheria }; 2738d2fa630cSAmit Kucheria }; 2739d2fa630cSAmit Kucheria }; 2740d2fa630cSAmit Kucheria 2741d2fa630cSAmit Kucheria cluster1-thermal { 2742d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2743d2fa630cSAmit Kucheria polling-delay = <1000>; 2744d2fa630cSAmit Kucheria 2745d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 6>; 2746d2fa630cSAmit Kucheria 2747d2fa630cSAmit Kucheria trips { 2748d2fa630cSAmit Kucheria cluster1_alert0: trip-point0 { 2749d2fa630cSAmit Kucheria temperature = <90000>; 2750d2fa630cSAmit Kucheria hysteresis = <2000>; 2751d2fa630cSAmit Kucheria type = "hot"; 2752d2fa630cSAmit Kucheria }; 2753d2fa630cSAmit Kucheria cluster1_crit: cluster1_crit { 2754d2fa630cSAmit Kucheria temperature = <110000>; 2755d2fa630cSAmit Kucheria hysteresis = <2000>; 2756d2fa630cSAmit Kucheria type = "critical"; 2757d2fa630cSAmit Kucheria }; 2758d2fa630cSAmit Kucheria }; 2759d2fa630cSAmit Kucheria }; 2760d2fa630cSAmit Kucheria 2761d2fa630cSAmit Kucheria gpu-thermal-top { 2762d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2763d2fa630cSAmit Kucheria polling-delay = <1000>; 2764d2fa630cSAmit Kucheria 2765d2fa630cSAmit Kucheria thermal-sensors = <&tsens0 15>; 2766d2fa630cSAmit Kucheria 2767d2fa630cSAmit Kucheria trips { 2768d2fa630cSAmit Kucheria gpu1_alert0: trip-point0 { 2769d2fa630cSAmit Kucheria temperature = <90000>; 2770d2fa630cSAmit Kucheria hysteresis = <2000>; 2771d2fa630cSAmit Kucheria type = "hot"; 2772d2fa630cSAmit Kucheria }; 2773d2fa630cSAmit Kucheria }; 2774d2fa630cSAmit Kucheria }; 2775d2fa630cSAmit Kucheria 2776d2fa630cSAmit Kucheria aoss1-thermal { 2777d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2778d2fa630cSAmit Kucheria polling-delay = <1000>; 2779d2fa630cSAmit Kucheria 2780d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 0>; 2781d2fa630cSAmit Kucheria 2782d2fa630cSAmit Kucheria trips { 2783d2fa630cSAmit Kucheria aoss1_alert0: trip-point0 { 2784d2fa630cSAmit Kucheria temperature = <90000>; 2785d2fa630cSAmit Kucheria hysteresis = <2000>; 2786d2fa630cSAmit Kucheria type = "hot"; 2787d2fa630cSAmit Kucheria }; 2788d2fa630cSAmit Kucheria }; 2789d2fa630cSAmit Kucheria }; 2790d2fa630cSAmit Kucheria 2791d2fa630cSAmit Kucheria wlan-thermal { 2792d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2793d2fa630cSAmit Kucheria polling-delay = <1000>; 2794d2fa630cSAmit Kucheria 2795d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 1>; 2796d2fa630cSAmit Kucheria 2797d2fa630cSAmit Kucheria trips { 2798d2fa630cSAmit Kucheria wlan_alert0: trip-point0 { 2799d2fa630cSAmit Kucheria temperature = <90000>; 2800d2fa630cSAmit Kucheria hysteresis = <2000>; 2801d2fa630cSAmit Kucheria type = "hot"; 2802d2fa630cSAmit Kucheria }; 2803d2fa630cSAmit Kucheria }; 2804d2fa630cSAmit Kucheria }; 2805d2fa630cSAmit Kucheria 2806d2fa630cSAmit Kucheria video-thermal { 2807d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2808d2fa630cSAmit Kucheria polling-delay = <1000>; 2809d2fa630cSAmit Kucheria 2810d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 2>; 2811d2fa630cSAmit Kucheria 2812d2fa630cSAmit Kucheria trips { 2813d2fa630cSAmit Kucheria video_alert0: trip-point0 { 2814d2fa630cSAmit Kucheria temperature = <90000>; 2815d2fa630cSAmit Kucheria hysteresis = <2000>; 2816d2fa630cSAmit Kucheria type = "hot"; 2817d2fa630cSAmit Kucheria }; 2818d2fa630cSAmit Kucheria }; 2819d2fa630cSAmit Kucheria }; 2820d2fa630cSAmit Kucheria 2821d2fa630cSAmit Kucheria mem-thermal { 2822d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2823d2fa630cSAmit Kucheria polling-delay = <1000>; 2824d2fa630cSAmit Kucheria 2825d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 3>; 2826d2fa630cSAmit Kucheria 2827d2fa630cSAmit Kucheria trips { 2828d2fa630cSAmit Kucheria mem_alert0: trip-point0 { 2829d2fa630cSAmit Kucheria temperature = <90000>; 2830d2fa630cSAmit Kucheria hysteresis = <2000>; 2831d2fa630cSAmit Kucheria type = "hot"; 2832d2fa630cSAmit Kucheria }; 2833d2fa630cSAmit Kucheria }; 2834d2fa630cSAmit Kucheria }; 2835d2fa630cSAmit Kucheria 2836d2fa630cSAmit Kucheria q6-hvx-thermal { 2837d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2838d2fa630cSAmit Kucheria polling-delay = <1000>; 2839d2fa630cSAmit Kucheria 2840d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 4>; 2841d2fa630cSAmit Kucheria 2842d2fa630cSAmit Kucheria trips { 2843d2fa630cSAmit Kucheria q6_hvx_alert0: trip-point0 { 2844d2fa630cSAmit Kucheria temperature = <90000>; 2845d2fa630cSAmit Kucheria hysteresis = <2000>; 2846d2fa630cSAmit Kucheria type = "hot"; 2847d2fa630cSAmit Kucheria }; 2848d2fa630cSAmit Kucheria }; 2849d2fa630cSAmit Kucheria }; 2850d2fa630cSAmit Kucheria 2851d2fa630cSAmit Kucheria camera-thermal { 2852d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2853d2fa630cSAmit Kucheria polling-delay = <1000>; 2854d2fa630cSAmit Kucheria 2855d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 5>; 2856d2fa630cSAmit Kucheria 2857d2fa630cSAmit Kucheria trips { 2858d2fa630cSAmit Kucheria camera_alert0: trip-point0 { 2859d2fa630cSAmit Kucheria temperature = <90000>; 2860d2fa630cSAmit Kucheria hysteresis = <2000>; 2861d2fa630cSAmit Kucheria type = "hot"; 2862d2fa630cSAmit Kucheria }; 2863d2fa630cSAmit Kucheria }; 2864d2fa630cSAmit Kucheria }; 2865d2fa630cSAmit Kucheria 2866d2fa630cSAmit Kucheria compute-thermal { 2867d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2868d2fa630cSAmit Kucheria polling-delay = <1000>; 2869d2fa630cSAmit Kucheria 2870d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 6>; 2871d2fa630cSAmit Kucheria 2872d2fa630cSAmit Kucheria trips { 2873d2fa630cSAmit Kucheria compute_alert0: trip-point0 { 2874d2fa630cSAmit Kucheria temperature = <90000>; 2875d2fa630cSAmit Kucheria hysteresis = <2000>; 2876d2fa630cSAmit Kucheria type = "hot"; 2877d2fa630cSAmit Kucheria }; 2878d2fa630cSAmit Kucheria }; 2879d2fa630cSAmit Kucheria }; 2880d2fa630cSAmit Kucheria 2881d2fa630cSAmit Kucheria modem-thermal { 2882d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2883d2fa630cSAmit Kucheria polling-delay = <1000>; 2884d2fa630cSAmit Kucheria 2885d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 7>; 2886d2fa630cSAmit Kucheria 2887d2fa630cSAmit Kucheria trips { 2888d2fa630cSAmit Kucheria modem_alert0: trip-point0 { 2889d2fa630cSAmit Kucheria temperature = <90000>; 2890d2fa630cSAmit Kucheria hysteresis = <2000>; 2891d2fa630cSAmit Kucheria type = "hot"; 2892d2fa630cSAmit Kucheria }; 2893d2fa630cSAmit Kucheria }; 2894d2fa630cSAmit Kucheria }; 2895d2fa630cSAmit Kucheria 2896d2fa630cSAmit Kucheria npu-thermal { 2897d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2898d2fa630cSAmit Kucheria polling-delay = <1000>; 2899d2fa630cSAmit Kucheria 2900d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 8>; 2901d2fa630cSAmit Kucheria 2902d2fa630cSAmit Kucheria trips { 2903d2fa630cSAmit Kucheria npu_alert0: trip-point0 { 2904d2fa630cSAmit Kucheria temperature = <90000>; 2905d2fa630cSAmit Kucheria hysteresis = <2000>; 2906d2fa630cSAmit Kucheria type = "hot"; 2907d2fa630cSAmit Kucheria }; 2908d2fa630cSAmit Kucheria }; 2909d2fa630cSAmit Kucheria }; 2910d2fa630cSAmit Kucheria 2911d2fa630cSAmit Kucheria modem-vec-thermal { 2912d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2913d2fa630cSAmit Kucheria polling-delay = <1000>; 2914d2fa630cSAmit Kucheria 2915d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 9>; 2916d2fa630cSAmit Kucheria 2917d2fa630cSAmit Kucheria trips { 2918d2fa630cSAmit Kucheria modem_vec_alert0: trip-point0 { 2919d2fa630cSAmit Kucheria temperature = <90000>; 2920d2fa630cSAmit Kucheria hysteresis = <2000>; 2921d2fa630cSAmit Kucheria type = "hot"; 2922d2fa630cSAmit Kucheria }; 2923d2fa630cSAmit Kucheria }; 2924d2fa630cSAmit Kucheria }; 2925d2fa630cSAmit Kucheria 2926d2fa630cSAmit Kucheria modem-scl-thermal { 2927d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2928d2fa630cSAmit Kucheria polling-delay = <1000>; 2929d2fa630cSAmit Kucheria 2930d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 10>; 2931d2fa630cSAmit Kucheria 2932d2fa630cSAmit Kucheria trips { 2933d2fa630cSAmit Kucheria modem_scl_alert0: trip-point0 { 2934d2fa630cSAmit Kucheria temperature = <90000>; 2935d2fa630cSAmit Kucheria hysteresis = <2000>; 2936d2fa630cSAmit Kucheria type = "hot"; 2937d2fa630cSAmit Kucheria }; 2938d2fa630cSAmit Kucheria }; 2939d2fa630cSAmit Kucheria }; 2940d2fa630cSAmit Kucheria 2941d2fa630cSAmit Kucheria gpu-thermal-bottom { 2942d2fa630cSAmit Kucheria polling-delay-passive = <250>; 2943d2fa630cSAmit Kucheria polling-delay = <1000>; 2944d2fa630cSAmit Kucheria 2945d2fa630cSAmit Kucheria thermal-sensors = <&tsens1 11>; 2946d2fa630cSAmit Kucheria 2947d2fa630cSAmit Kucheria trips { 2948d2fa630cSAmit Kucheria gpu2_alert0: trip-point0 { 2949d2fa630cSAmit Kucheria temperature = <90000>; 2950d2fa630cSAmit Kucheria hysteresis = <2000>; 2951d2fa630cSAmit Kucheria type = "hot"; 2952d2fa630cSAmit Kucheria }; 2953d2fa630cSAmit Kucheria }; 2954d2fa630cSAmit Kucheria }; 2955d2fa630cSAmit Kucheria }; 2956e13c6d14SVinod Koul}; 2957