1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16 17/ { 18 model = "Thundercomm Dragonboard 845c"; 19 compatible = "thundercomm,db845c", "qcom,sdm845"; 20 21 aliases { 22 serial0 = &uart9; 23 hsuart0 = &uart6; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 dc12v: dc12v-regulator { 31 compatible = "regulator-fixed"; 32 regulator-name = "DC12V"; 33 regulator-min-microvolt = <12000000>; 34 regulator-max-microvolt = <12000000>; 35 regulator-always-on; 36 }; 37 38 gpio_keys { 39 compatible = "gpio-keys"; 40 autorepeat; 41 42 pinctrl-names = "default"; 43 pinctrl-0 = <&vol_up_pin_a>; 44 45 vol-up { 46 label = "Volume Up"; 47 linux,code = <KEY_VOLUMEUP>; 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 55 user4 { 56 label = "green:user4"; 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 58 linux,default-trigger = "panic-indicator"; 59 default-state = "off"; 60 }; 61 62 wlan { 63 label = "yellow:wlan"; 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 65 linux,default-trigger = "phy0tx"; 66 default-state = "off"; 67 }; 68 69 bt { 70 label = "blue:bt"; 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "bluetooth-power"; 73 default-state = "off"; 74 }; 75 }; 76 77 hdmi-out { 78 compatible = "hdmi-connector"; 79 type = "a"; 80 81 port { 82 hdmi_con: endpoint { 83 remote-endpoint = <<9611_out>; 84 }; 85 }; 86 }; 87 88 lt9611_1v8: lt9611-vdd18-regulator { 89 compatible = "regulator-fixed"; 90 regulator-name = "LT9611_1V8"; 91 92 vin-supply = <&vdc_5v>; 93 regulator-min-microvolt = <1800000>; 94 regulator-max-microvolt = <1800000>; 95 96 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 97 enable-active-high; 98 }; 99 100 lt9611_3v3: lt9611-3v3 { 101 compatible = "regulator-fixed"; 102 regulator-name = "LT9611_3V3"; 103 104 vin-supply = <&vdc_3v3>; 105 regulator-min-microvolt = <3300000>; 106 regulator-max-microvolt = <3300000>; 107 108 // TODO: make it possible to drive same GPIO from two clients 109 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 110 // enable-active-high; 111 }; 112 113 pcie0_1p05v: pcie-0-1p05v-regulator { 114 compatible = "regulator-fixed"; 115 regulator-name = "PCIE0_1.05V"; 116 117 vin-supply = <&vbat>; 118 regulator-min-microvolt = <1050000>; 119 regulator-max-microvolt = <1050000>; 120 121 // TODO: make it possible to drive same GPIO from two clients 122 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 123 // enable-active-high; 124 }; 125 126 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { 127 compatible = "regulator-fixed"; 128 regulator-name = "CAM0_DVDD_1V2"; 129 regulator-min-microvolt = <1200000>; 130 regulator-max-microvolt = <1200000>; 131 enable-active-high; 132 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 135 vin-supply = <&vbat>; 136 }; 137 138 cam0_avdd_2v8: reg_cam0_avdd_2v8 { 139 compatible = "regulator-fixed"; 140 regulator-name = "CAM0_AVDD_2V8"; 141 regulator-min-microvolt = <2800000>; 142 regulator-max-microvolt = <2800000>; 143 enable-active-high; 144 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 147 vin-supply = <&vbat>; 148 }; 149 150 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 151 cam3_avdd_2v8: reg_cam3_avdd_2v8 { 152 compatible = "regulator-fixed"; 153 regulator-name = "CAM3_AVDD_2V8"; 154 regulator-min-microvolt = <2800000>; 155 regulator-max-microvolt = <2800000>; 156 regulator-always-on; 157 vin-supply = <&vbat>; 158 }; 159 160 pcie0_3p3v_dual: vldo-3v3-regulator { 161 compatible = "regulator-fixed"; 162 regulator-name = "VLDO_3V3"; 163 164 vin-supply = <&vbat>; 165 regulator-min-microvolt = <3300000>; 166 regulator-max-microvolt = <3300000>; 167 168 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 169 enable-active-high; 170 171 pinctrl-names = "default"; 172 pinctrl-0 = <&pcie0_pwren_state>; 173 }; 174 175 v5p0_hdmiout: v5p0-hdmiout-regulator { 176 compatible = "regulator-fixed"; 177 regulator-name = "V5P0_HDMIOUT"; 178 179 vin-supply = <&vdc_5v>; 180 regulator-min-microvolt = <500000>; 181 regulator-max-microvolt = <500000>; 182 183 // TODO: make it possible to drive same GPIO from two clients 184 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 185 // enable-active-high; 186 }; 187 188 vbat: vbat-regulator { 189 compatible = "regulator-fixed"; 190 regulator-name = "VBAT"; 191 192 vin-supply = <&dc12v>; 193 regulator-min-microvolt = <4200000>; 194 regulator-max-microvolt = <4200000>; 195 regulator-always-on; 196 }; 197 198 vbat_som: vbat-som-regulator { 199 compatible = "regulator-fixed"; 200 regulator-name = "VBAT_SOM"; 201 202 vin-supply = <&dc12v>; 203 regulator-min-microvolt = <4200000>; 204 regulator-max-microvolt = <4200000>; 205 regulator-always-on; 206 }; 207 208 vdc_3v3: vdc-3v3-regulator { 209 compatible = "regulator-fixed"; 210 regulator-name = "VDC_3V3"; 211 vin-supply = <&dc12v>; 212 regulator-min-microvolt = <3300000>; 213 regulator-max-microvolt = <3300000>; 214 regulator-always-on; 215 }; 216 217 vdc_5v: vdc-5v-regulator { 218 compatible = "regulator-fixed"; 219 regulator-name = "VDC_5V"; 220 221 vin-supply = <&dc12v>; 222 regulator-min-microvolt = <500000>; 223 regulator-max-microvolt = <500000>; 224 regulator-always-on; 225 }; 226 227 vreg_s4a_1p8: vreg-s4a-1p8 { 228 compatible = "regulator-fixed"; 229 regulator-name = "vreg_s4a_1p8"; 230 231 regulator-min-microvolt = <1800000>; 232 regulator-max-microvolt = <1800000>; 233 regulator-always-on; 234 }; 235 236 vph_pwr: vph-pwr-regulator { 237 compatible = "regulator-fixed"; 238 regulator-name = "vph_pwr"; 239 240 vin-supply = <&vbat_som>; 241 }; 242}; 243 244&adsp_pas { 245 status = "okay"; 246 247 firmware-name = "qcom/sdm845/adsp.mdt"; 248}; 249 250&apps_rsc { 251 pm8998-rpmh-regulators { 252 compatible = "qcom,pm8998-rpmh-regulators"; 253 qcom,pmic-id = "a"; 254 vdd-s1-supply = <&vph_pwr>; 255 vdd-s2-supply = <&vph_pwr>; 256 vdd-s3-supply = <&vph_pwr>; 257 vdd-s4-supply = <&vph_pwr>; 258 vdd-s5-supply = <&vph_pwr>; 259 vdd-s6-supply = <&vph_pwr>; 260 vdd-s7-supply = <&vph_pwr>; 261 vdd-s8-supply = <&vph_pwr>; 262 vdd-s9-supply = <&vph_pwr>; 263 vdd-s10-supply = <&vph_pwr>; 264 vdd-s11-supply = <&vph_pwr>; 265 vdd-s12-supply = <&vph_pwr>; 266 vdd-s13-supply = <&vph_pwr>; 267 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 268 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 269 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 270 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 271 vdd-l6-supply = <&vph_pwr>; 272 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 273 vdd-l9-supply = <&vreg_bob>; 274 vdd-l10-l23-l25-supply = <&vreg_bob>; 275 vdd-l13-l19-l21-supply = <&vreg_bob>; 276 vdd-l16-l28-supply = <&vreg_bob>; 277 vdd-l18-l22-supply = <&vreg_bob>; 278 vdd-l20-l24-supply = <&vreg_bob>; 279 vdd-l26-supply = <&vreg_s3a_1p35>; 280 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 281 282 vreg_s3a_1p35: smps3 { 283 regulator-min-microvolt = <1352000>; 284 regulator-max-microvolt = <1352000>; 285 }; 286 287 vreg_s5a_2p04: smps5 { 288 regulator-min-microvolt = <1904000>; 289 regulator-max-microvolt = <2040000>; 290 }; 291 292 vreg_s7a_1p025: smps7 { 293 regulator-min-microvolt = <900000>; 294 regulator-max-microvolt = <1028000>; 295 }; 296 297 vreg_l1a_0p875: ldo1 { 298 regulator-min-microvolt = <880000>; 299 regulator-max-microvolt = <880000>; 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 301 }; 302 303 vreg_l5a_0p8: ldo5 { 304 regulator-min-microvolt = <800000>; 305 regulator-max-microvolt = <800000>; 306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 307 }; 308 309 vreg_l12a_1p8: ldo12 { 310 regulator-min-microvolt = <1800000>; 311 regulator-max-microvolt = <1800000>; 312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 313 }; 314 315 vreg_l7a_1p8: ldo7 { 316 regulator-min-microvolt = <1800000>; 317 regulator-max-microvolt = <1800000>; 318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 319 }; 320 321 vreg_l13a_2p95: ldo13 { 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <2960000>; 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 325 }; 326 327 vreg_l17a_1p3: ldo17 { 328 regulator-min-microvolt = <1304000>; 329 regulator-max-microvolt = <1304000>; 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 331 }; 332 333 vreg_l20a_2p95: ldo20 { 334 regulator-min-microvolt = <2960000>; 335 regulator-max-microvolt = <2968000>; 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 337 }; 338 339 vreg_l21a_2p95: ldo21 { 340 regulator-min-microvolt = <2960000>; 341 regulator-max-microvolt = <2968000>; 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 343 }; 344 345 vreg_l24a_3p075: ldo24 { 346 regulator-min-microvolt = <3088000>; 347 regulator-max-microvolt = <3088000>; 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 349 }; 350 351 vreg_l25a_3p3: ldo25 { 352 regulator-min-microvolt = <3300000>; 353 regulator-max-microvolt = <3312000>; 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 355 }; 356 357 vreg_l26a_1p2: ldo26 { 358 regulator-min-microvolt = <1200000>; 359 regulator-max-microvolt = <1200000>; 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 361 }; 362 363 vreg_lvs1a_1p8: lvs1 { 364 regulator-min-microvolt = <1800000>; 365 regulator-max-microvolt = <1800000>; 366 regulator-always-on; 367 }; 368 369 vreg_lvs2a_1p8: lvs2 { 370 regulator-min-microvolt = <1800000>; 371 regulator-max-microvolt = <1800000>; 372 regulator-always-on; 373 }; 374 }; 375 376 pmi8998-rpmh-regulators { 377 compatible = "qcom,pmi8998-rpmh-regulators"; 378 qcom,pmic-id = "b"; 379 380 vdd-bob-supply = <&vph_pwr>; 381 382 vreg_bob: bob { 383 regulator-min-microvolt = <3312000>; 384 regulator-max-microvolt = <3600000>; 385 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 386 regulator-allow-bypass; 387 }; 388 }; 389}; 390 391&cdsp_pas { 392 status = "okay"; 393 firmware-name = "qcom/sdm845/cdsp.mdt"; 394}; 395 396&dsi0 { 397 status = "okay"; 398 vdda-supply = <&vreg_l26a_1p2>; 399 400 ports { 401 port@1 { 402 endpoint { 403 remote-endpoint = <<9611_a>; 404 data-lanes = <0 1 2 3>; 405 }; 406 }; 407 }; 408}; 409 410&dsi0_phy { 411 status = "okay"; 412 vdds-supply = <&vreg_l1a_0p875>; 413}; 414 415&gcc { 416 protected-clocks = <GCC_QSPI_CORE_CLK>, 417 <GCC_QSPI_CORE_CLK_SRC>, 418 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; 419}; 420 421&gpu { 422 zap-shader { 423 memory-region = <&gpu_mem>; 424 firmware-name = "qcom/sdm845/a630_zap.mbn"; 425 }; 426}; 427 428&i2c10 { 429 status = "okay"; 430 clock-frequency = <400000>; 431 432 lt9611_codec: hdmi-bridge@3b { 433 compatible = "lontium,lt9611"; 434 reg = <0x3b>; 435 #sound-dai-cells = <1>; 436 437 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 438 439 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 440 441 vdd-supply = <<9611_1v8>; 442 vcc-supply = <<9611_3v3>; 443 444 pinctrl-names = "default"; 445 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 446 447 ports { 448 #address-cells = <1>; 449 #size-cells = <0>; 450 451 port@0 { 452 reg = <0>; 453 454 lt9611_a: endpoint { 455 remote-endpoint = <&dsi0_out>; 456 }; 457 }; 458 459 port@2 { 460 reg = <2>; 461 462 lt9611_out: endpoint { 463 remote-endpoint = <&hdmi_con>; 464 }; 465 }; 466 }; 467 }; 468}; 469 470&i2c11 { 471 /* On Low speed expansion */ 472 label = "LS-I2C1"; 473 status = "okay"; 474}; 475 476&i2c14 { 477 /* On Low speed expansion */ 478 label = "LS-I2C0"; 479 status = "okay"; 480}; 481 482&mdss { 483 status = "okay"; 484}; 485 486&mdss_mdp { 487 status = "okay"; 488}; 489 490&mss_pil { 491 status = "okay"; 492 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 493}; 494 495&pcie0 { 496 status = "okay"; 497 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 498 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 499 500 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 501 502 pinctrl-names = "default"; 503 pinctrl-0 = <&pcie0_default_state>; 504}; 505 506&pcie0_phy { 507 status = "okay"; 508 509 vdda-phy-supply = <&vreg_l1a_0p875>; 510 vdda-pll-supply = <&vreg_l26a_1p2>; 511}; 512 513&pcie1 { 514 status = "okay"; 515 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 516 517 pinctrl-names = "default"; 518 pinctrl-0 = <&pcie1_default_state>; 519}; 520 521&pcie1_phy { 522 status = "okay"; 523 524 vdda-phy-supply = <&vreg_l1a_0p875>; 525 vdda-pll-supply = <&vreg_l26a_1p2>; 526}; 527 528&pm8998_gpio { 529 gpio-line-names = 530 "NC", 531 "NC", 532 "WLAN_SW_CTRL", 533 "NC", 534 "PM_GPIO5_BLUE_BT_LED", 535 "VOL_UP_N", 536 "NC", 537 "ADC_IN1", 538 "PM_GPIO9_YEL_WIFI_LED", 539 "CAM0_AVDD_EN", 540 "NC", 541 "CAM0_DVDD_EN", 542 "PM_GPIO13_GREEN_U4_LED", 543 "DIV_CLK2", 544 "NC", 545 "NC", 546 "NC", 547 "SMB_STAT", 548 "NC", 549 "NC", 550 "ADC_IN2", 551 "OPTION1", 552 "WCSS_PWR_REQ", 553 "PM845_GPIO24", 554 "OPTION2", 555 "PM845_SLB"; 556 557 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { 558 pins = "gpio12"; 559 function = "normal"; 560 561 bias-pull-up; 562 drive-push-pull; 563 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 564 }; 565 566 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { 567 pins = "gpio10"; 568 function = "normal"; 569 570 bias-pull-up; 571 drive-push-pull; 572 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 573 }; 574 575 vol_up_pin_a: vol-up-active { 576 pins = "gpio6"; 577 function = "normal"; 578 input-enable; 579 bias-pull-up; 580 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 581 }; 582}; 583 584&pm8998_pon { 585 resin { 586 compatible = "qcom,pm8941-resin"; 587 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 588 debounce = <15625>; 589 bias-pull-up; 590 linux,code = <KEY_VOLUMEDOWN>; 591 }; 592}; 593 594/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 595&q6afedai { 596 qi2s@22 { 597 reg = <22>; 598 qcom,sd-lines = <0 1 2 3>; 599 }; 600}; 601 602&q6asmdai { 603 dai@0 { 604 reg = <0>; 605 }; 606 607 dai@1 { 608 reg = <1>; 609 }; 610 611 dai@2 { 612 reg = <2>; 613 }; 614 615 dai@3 { 616 reg = <3>; 617 direction = <2>; 618 is-compress-dai; 619 }; 620}; 621 622&qupv3_id_0 { 623 status = "okay"; 624}; 625 626&qupv3_id_1 { 627 status = "okay"; 628}; 629 630&sdhc_2 { 631 status = "okay"; 632 633 pinctrl-names = "default"; 634 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 635 636 vmmc-supply = <&vreg_l21a_2p95>; 637 vqmmc-supply = <&vreg_l13a_2p95>; 638 639 bus-width = <4>; 640 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 641}; 642 643&sound { 644 compatible = "qcom,db845c-sndcard"; 645 pinctrl-0 = <&quat_mi2s_active 646 &quat_mi2s_sd0_active 647 &quat_mi2s_sd1_active 648 &quat_mi2s_sd2_active 649 &quat_mi2s_sd3_active>; 650 pinctrl-names = "default"; 651 model = "DB845c"; 652 audio-routing = 653 "RX_BIAS", "MCLK", 654 "AMIC1", "MIC BIAS1", 655 "AMIC2", "MIC BIAS2", 656 "DMIC0", "MIC BIAS1", 657 "DMIC1", "MIC BIAS1", 658 "DMIC2", "MIC BIAS3", 659 "DMIC3", "MIC BIAS3", 660 "SpkrLeft IN", "SPK1 OUT", 661 "SpkrRight IN", "SPK2 OUT", 662 "MM_DL1", "MultiMedia1 Playback", 663 "MM_DL2", "MultiMedia2 Playback", 664 "MM_DL4", "MultiMedia4 Playback", 665 "MultiMedia3 Capture", "MM_UL3"; 666 667 mm1-dai-link { 668 link-name = "MultiMedia1"; 669 cpu { 670 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 671 }; 672 }; 673 674 mm2-dai-link { 675 link-name = "MultiMedia2"; 676 cpu { 677 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 678 }; 679 }; 680 681 mm3-dai-link { 682 link-name = "MultiMedia3"; 683 cpu { 684 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 685 }; 686 }; 687 688 mm4-dai-link { 689 link-name = "MultiMedia4"; 690 cpu { 691 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 692 }; 693 }; 694 695 hdmi-dai-link { 696 link-name = "HDMI Playback"; 697 cpu { 698 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 699 }; 700 701 platform { 702 sound-dai = <&q6routing>; 703 }; 704 705 codec { 706 sound-dai = <<9611_codec 0>; 707 }; 708 }; 709 710 slim-dai-link { 711 link-name = "SLIM Playback"; 712 cpu { 713 sound-dai = <&q6afedai SLIMBUS_0_RX>; 714 }; 715 716 platform { 717 sound-dai = <&q6routing>; 718 }; 719 720 codec { 721 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 722 }; 723 }; 724 725 slimcap-dai-link { 726 link-name = "SLIM Capture"; 727 cpu { 728 sound-dai = <&q6afedai SLIMBUS_0_TX>; 729 }; 730 731 platform { 732 sound-dai = <&q6routing>; 733 }; 734 735 codec { 736 sound-dai = <&wcd9340 1>; 737 }; 738 }; 739}; 740 741&spi2 { 742 /* On Low speed expansion */ 743 label = "LS-SPI0"; 744 status = "okay"; 745}; 746 747&tlmm { 748 cam0_default: cam0_default { 749 rst { 750 pins = "gpio9"; 751 function = "gpio"; 752 753 drive-strength = <16>; 754 bias-disable; 755 }; 756 757 mclk0 { 758 pins = "gpio13"; 759 function = "cam_mclk"; 760 761 drive-strength = <16>; 762 bias-disable; 763 }; 764 }; 765 766 cam3_default: cam3_default { 767 rst { 768 function = "gpio"; 769 pins = "gpio21"; 770 771 drive-strength = <16>; 772 bias-disable; 773 }; 774 775 mclk3 { 776 function = "cam_mclk"; 777 pins = "gpio16"; 778 779 drive-strength = <16>; 780 bias-disable; 781 }; 782 }; 783 784 dsi_sw_sel: dsi-sw-sel { 785 pins = "gpio120"; 786 function = "gpio"; 787 788 drive-strength = <2>; 789 bias-disable; 790 output-high; 791 }; 792 793 lt9611_irq_pin: lt9611-irq { 794 pins = "gpio84"; 795 function = "gpio"; 796 bias-disable; 797 }; 798 799 pcie0_default_state: pcie0-default { 800 clkreq { 801 pins = "gpio36"; 802 function = "pci_e0"; 803 bias-pull-up; 804 }; 805 806 reset-n { 807 pins = "gpio35"; 808 function = "gpio"; 809 810 drive-strength = <2>; 811 output-low; 812 bias-pull-down; 813 }; 814 815 wake-n { 816 pins = "gpio37"; 817 function = "gpio"; 818 819 drive-strength = <2>; 820 bias-pull-up; 821 }; 822 }; 823 824 pcie0_pwren_state: pcie0-pwren { 825 pins = "gpio90"; 826 function = "gpio"; 827 828 drive-strength = <2>; 829 bias-disable; 830 }; 831 832 pcie1_default_state: pcie1-default { 833 perst-n { 834 pins = "gpio102"; 835 function = "gpio"; 836 837 drive-strength = <16>; 838 bias-disable; 839 }; 840 841 clkreq { 842 pins = "gpio103"; 843 function = "pci_e1"; 844 bias-pull-up; 845 }; 846 847 wake-n { 848 pins = "gpio11"; 849 function = "gpio"; 850 851 drive-strength = <2>; 852 bias-pull-up; 853 }; 854 855 reset-n { 856 pins = "gpio75"; 857 function = "gpio"; 858 859 drive-strength = <16>; 860 bias-pull-up; 861 output-high; 862 }; 863 }; 864 865 sdc2_default_state: sdc2-default { 866 clk { 867 pins = "sdc2_clk"; 868 bias-disable; 869 870 /* 871 * It seems that mmc_test reports errors if drive 872 * strength is not 16 on clk, cmd, and data pins. 873 */ 874 drive-strength = <16>; 875 }; 876 877 cmd { 878 pins = "sdc2_cmd"; 879 bias-pull-up; 880 drive-strength = <10>; 881 }; 882 883 data { 884 pins = "sdc2_data"; 885 bias-pull-up; 886 drive-strength = <10>; 887 }; 888 }; 889 890 sdc2_card_det_n: sd-card-det-n { 891 pins = "gpio126"; 892 function = "gpio"; 893 bias-pull-up; 894 }; 895 896 wcd_intr_default: wcd_intr_default { 897 pins = <54>; 898 function = "gpio"; 899 900 input-enable; 901 bias-pull-down; 902 drive-strength = <2>; 903 }; 904}; 905 906&uart3 { 907 label = "LS-UART0"; 908 status = "disabled"; 909}; 910 911&uart6 { 912 status = "okay"; 913 914 bluetooth { 915 compatible = "qcom,wcn3990-bt"; 916 917 vddio-supply = <&vreg_s4a_1p8>; 918 vddxo-supply = <&vreg_l7a_1p8>; 919 vddrf-supply = <&vreg_l17a_1p3>; 920 vddch0-supply = <&vreg_l25a_3p3>; 921 max-speed = <3200000>; 922 }; 923}; 924 925&uart9 { 926 label = "LS-UART1"; 927 status = "okay"; 928}; 929 930&usb_1 { 931 status = "okay"; 932}; 933 934&usb_1_dwc3 { 935 dr_mode = "peripheral"; 936}; 937 938&usb_1_hsphy { 939 status = "okay"; 940 941 vdd-supply = <&vreg_l1a_0p875>; 942 vdda-pll-supply = <&vreg_l12a_1p8>; 943 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 944 945 qcom,imp-res-offset-value = <8>; 946 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 947 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 948 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 949}; 950 951&usb_1_qmpphy { 952 status = "okay"; 953 954 vdda-phy-supply = <&vreg_l26a_1p2>; 955 vdda-pll-supply = <&vreg_l1a_0p875>; 956}; 957 958&usb_2 { 959 status = "okay"; 960}; 961 962&usb_2_dwc3 { 963 dr_mode = "host"; 964}; 965 966&usb_2_hsphy { 967 status = "okay"; 968 969 vdd-supply = <&vreg_l1a_0p875>; 970 vdda-pll-supply = <&vreg_l12a_1p8>; 971 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 972 973 qcom,imp-res-offset-value = <8>; 974 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 975}; 976 977&usb_2_qmpphy { 978 status = "okay"; 979 980 vdda-phy-supply = <&vreg_l26a_1p2>; 981 vdda-pll-supply = <&vreg_l1a_0p875>; 982}; 983 984&ufs_mem_hc { 985 status = "okay"; 986 987 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 988 989 vcc-supply = <&vreg_l20a_2p95>; 990 vcc-max-microamp = <800000>; 991}; 992 993&ufs_mem_phy { 994 status = "okay"; 995 996 vdda-phy-supply = <&vreg_l1a_0p875>; 997 vdda-pll-supply = <&vreg_l26a_1p2>; 998}; 999 1000&wcd9340{ 1001 pinctrl-0 = <&wcd_intr_default>; 1002 pinctrl-names = "default"; 1003 clock-names = "extclk"; 1004 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 1005 reset-gpios = <&tlmm 64 0>; 1006 vdd-buck-supply = <&vreg_s4a_1p8>; 1007 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1008 vdd-tx-supply = <&vreg_s4a_1p8>; 1009 vdd-rx-supply = <&vreg_s4a_1p8>; 1010 vdd-io-supply = <&vreg_s4a_1p8>; 1011 1012 swm: swm@c85 { 1013 left_spkr: wsa8810-left{ 1014 compatible = "sdw10217201000"; 1015 reg = <0 1>; 1016 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; 1017 #thermal-sensor-cells = <0>; 1018 sound-name-prefix = "SpkrLeft"; 1019 #sound-dai-cells = <0>; 1020 }; 1021 1022 right_spkr: wsa8810-right{ 1023 compatible = "sdw10217201000"; 1024 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; 1025 reg = <0 2>; 1026 #thermal-sensor-cells = <0>; 1027 sound-name-prefix = "SpkrRight"; 1028 #sound-dai-cells = <0>; 1029 }; 1030 }; 1031}; 1032 1033&wifi { 1034 status = "okay"; 1035 1036 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1037 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1038 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1039 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1040 1041 qcom,snoc-host-cap-8bit-quirk; 1042}; 1043 1044/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1045&qup_spi2_default { 1046 drive-strength = <16>; 1047}; 1048 1049&qup_uart3_default{ 1050 pinmux { 1051 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 1052 function = "qup3"; 1053 }; 1054}; 1055 1056&qup_i2c10_default { 1057 pinconf { 1058 pins = "gpio55", "gpio56"; 1059 drive-strength = <2>; 1060 bias-disable; 1061 }; 1062}; 1063 1064&qup_uart6_default { 1065 pinmux { 1066 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 1067 function = "qup6"; 1068 }; 1069 1070 cts { 1071 pins = "gpio45"; 1072 bias-disable; 1073 }; 1074 1075 rts-tx { 1076 pins = "gpio46", "gpio47"; 1077 drive-strength = <2>; 1078 bias-disable; 1079 }; 1080 1081 rx { 1082 pins = "gpio48"; 1083 bias-pull-up; 1084 }; 1085}; 1086 1087&qup_uart9_default { 1088 pinconf-tx { 1089 pins = "gpio4"; 1090 drive-strength = <2>; 1091 bias-disable; 1092 }; 1093 1094 pinconf-rx { 1095 pins = "gpio5"; 1096 drive-strength = <2>; 1097 bias-pull-up; 1098 }; 1099}; 1100 1101&pm8998_gpio { 1102 1103}; 1104 1105&cci { 1106 status = "okay"; 1107}; 1108 1109&cci_i2c0 { 1110 camera@10 { 1111 compatible = "ovti,ov8856"; 1112 reg = <0x10>; 1113 1114 // CAM0_RST_N 1115 reset-gpios = <&tlmm 9 0>; 1116 pinctrl-names = "default"; 1117 pinctrl-0 = <&cam0_default>; 1118 gpios = <&tlmm 13 0>, 1119 <&tlmm 9 0>; 1120 1121 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 1122 clock-names = "xvclk"; 1123 clock-frequency = <19200000>; 1124 1125 /* The &vreg_s4a_1p8 trace is powered on as a, 1126 * so it is represented by a fixed regulator. 1127 * 1128 * The 2.8V vdda-supply and 1.2V vddd-supply regulators 1129 * both have to be enabled through the power management 1130 * gpios. 1131 */ 1132 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1133 1134 dovdd-supply = <&vreg_lvs1a_1p8>; 1135 avdd-supply = <&cam0_avdd_2v8>; 1136 dvdd-supply = <&cam0_dvdd_1v2>; 1137 1138 status = "disable"; 1139 1140 port { 1141 ov8856_ep: endpoint { 1142 clock-lanes = <1>; 1143 link-frequencies = /bits/ 64 1144 <360000000 180000000>; 1145 data-lanes = <1 2 3 4>; 1146// remote-endpoint = <&csiphy0_ep>; 1147 }; 1148 }; 1149 }; 1150}; 1151 1152&cci_i2c1 { 1153 camera@60 { 1154 compatible = "ovti,ov7251"; 1155 1156 // I2C address as per ov7251.txt linux documentation 1157 reg = <0x60>; 1158 1159 // CAM3_RST_N 1160 enable-gpios = <&tlmm 21 0>; 1161 pinctrl-names = "default"; 1162 pinctrl-0 = <&cam3_default>; 1163 gpios = <&tlmm 16 0>, 1164 <&tlmm 21 0>; 1165 1166 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; 1167 clock-names = "xclk"; 1168 clock-frequency = <24000000>; 1169 1170 /* The &vreg_s4a_1p8 trace always powered on. 1171 * 1172 * The 2.8V vdda-supply regulator is enabled when the 1173 * vreg_s4a_1p8 trace is pulled high. 1174 * It too is represented by a fixed regulator. 1175 * 1176 * No 1.2V vddd-supply regulator is used. 1177 */ 1178 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1179 1180 vdddo-supply = <&vreg_lvs1a_1p8>; 1181 vdda-supply = <&cam3_avdd_2v8>; 1182 1183 status = "disable"; 1184 1185 port { 1186 ov7251_ep: endpoint { 1187 clock-lanes = <1>; 1188 data-lanes = <0 1>; 1189// remote-endpoint = <&csiphy3_ep>; 1190 }; 1191 }; 1192 }; 1193}; 1194