1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10#include <dt-bindings/sound/qcom,q6afe.h> 11#include <dt-bindings/sound/qcom,q6asm.h> 12#include "sdm845.dtsi" 13#include "pm8998.dtsi" 14#include "pmi8998.dtsi" 15 16/ { 17 model = "Thundercomm Dragonboard 845c"; 18 compatible = "thundercomm,db845c", "qcom,sdm845"; 19 qcom,msm-id = <341 0x20001>; 20 qcom,board-id = <8 0>; 21 22 aliases { 23 serial0 = &uart9; 24 hsuart0 = &uart6; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 dc12v: dc12v-regulator { 32 compatible = "regulator-fixed"; 33 regulator-name = "DC12V"; 34 regulator-min-microvolt = <12000000>; 35 regulator-max-microvolt = <12000000>; 36 regulator-always-on; 37 }; 38 39 gpio_keys { 40 compatible = "gpio-keys"; 41 autorepeat; 42 43 pinctrl-names = "default"; 44 pinctrl-0 = <&vol_up_pin_a>; 45 46 vol-up { 47 label = "Volume Up"; 48 linux,code = <KEY_VOLUMEUP>; 49 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 50 }; 51 }; 52 53 leds { 54 compatible = "gpio-leds"; 55 56 user4 { 57 label = "green:user4"; 58 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 59 linux,default-trigger = "panic-indicator"; 60 default-state = "off"; 61 }; 62 63 wlan { 64 label = "yellow:wlan"; 65 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "phy0tx"; 67 default-state = "off"; 68 }; 69 70 bt { 71 label = "blue:bt"; 72 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 73 linux,default-trigger = "bluetooth-power"; 74 default-state = "off"; 75 }; 76 }; 77 78 hdmi-out { 79 compatible = "hdmi-connector"; 80 type = "a"; 81 82 port { 83 hdmi_con: endpoint { 84 remote-endpoint = <<9611_out>; 85 }; 86 }; 87 }; 88 89 lt9611_1v8: lt9611-vdd18-regulator { 90 compatible = "regulator-fixed"; 91 regulator-name = "LT9611_1V8"; 92 93 vin-supply = <&vdc_5v>; 94 regulator-min-microvolt = <1800000>; 95 regulator-max-microvolt = <1800000>; 96 97 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 98 enable-active-high; 99 }; 100 101 lt9611_3v3: lt9611-3v3 { 102 compatible = "regulator-fixed"; 103 regulator-name = "LT9611_3V3"; 104 105 vin-supply = <&vdc_3v3>; 106 regulator-min-microvolt = <3300000>; 107 regulator-max-microvolt = <3300000>; 108 109 // TODO: make it possible to drive same GPIO from two clients 110 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 111 // enable-active-high; 112 }; 113 114 pcie0_1p05v: pcie-0-1p05v-regulator { 115 compatible = "regulator-fixed"; 116 regulator-name = "PCIE0_1.05V"; 117 118 vin-supply = <&vbat>; 119 regulator-min-microvolt = <1050000>; 120 regulator-max-microvolt = <1050000>; 121 122 // TODO: make it possible to drive same GPIO from two clients 123 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 124 // enable-active-high; 125 }; 126 127 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { 128 compatible = "regulator-fixed"; 129 regulator-name = "CAM0_DVDD_1V2"; 130 regulator-min-microvolt = <1200000>; 131 regulator-max-microvolt = <1200000>; 132 enable-active-high; 133 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; 134 pinctrl-names = "default"; 135 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 136 vin-supply = <&vbat>; 137 }; 138 139 cam0_avdd_2v8: reg_cam0_avdd_2v8 { 140 compatible = "regulator-fixed"; 141 regulator-name = "CAM0_AVDD_2V8"; 142 regulator-min-microvolt = <2800000>; 143 regulator-max-microvolt = <2800000>; 144 enable-active-high; 145 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 148 vin-supply = <&vbat>; 149 }; 150 151 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 152 cam3_avdd_2v8: reg_cam3_avdd_2v8 { 153 compatible = "regulator-fixed"; 154 regulator-name = "CAM3_AVDD_2V8"; 155 regulator-min-microvolt = <2800000>; 156 regulator-max-microvolt = <2800000>; 157 regulator-always-on; 158 vin-supply = <&vbat>; 159 }; 160 161 pcie0_3p3v_dual: vldo-3v3-regulator { 162 compatible = "regulator-fixed"; 163 regulator-name = "VLDO_3V3"; 164 165 vin-supply = <&vbat>; 166 regulator-min-microvolt = <3300000>; 167 regulator-max-microvolt = <3300000>; 168 169 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 170 enable-active-high; 171 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pcie0_pwren_state>; 174 }; 175 176 v5p0_hdmiout: v5p0-hdmiout-regulator { 177 compatible = "regulator-fixed"; 178 regulator-name = "V5P0_HDMIOUT"; 179 180 vin-supply = <&vdc_5v>; 181 regulator-min-microvolt = <500000>; 182 regulator-max-microvolt = <500000>; 183 184 // TODO: make it possible to drive same GPIO from two clients 185 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 186 // enable-active-high; 187 }; 188 189 vbat: vbat-regulator { 190 compatible = "regulator-fixed"; 191 regulator-name = "VBAT"; 192 193 vin-supply = <&dc12v>; 194 regulator-min-microvolt = <4200000>; 195 regulator-max-microvolt = <4200000>; 196 regulator-always-on; 197 }; 198 199 vbat_som: vbat-som-regulator { 200 compatible = "regulator-fixed"; 201 regulator-name = "VBAT_SOM"; 202 203 vin-supply = <&dc12v>; 204 regulator-min-microvolt = <4200000>; 205 regulator-max-microvolt = <4200000>; 206 regulator-always-on; 207 }; 208 209 vdc_3v3: vdc-3v3-regulator { 210 compatible = "regulator-fixed"; 211 regulator-name = "VDC_3V3"; 212 vin-supply = <&dc12v>; 213 regulator-min-microvolt = <3300000>; 214 regulator-max-microvolt = <3300000>; 215 regulator-always-on; 216 }; 217 218 vdc_5v: vdc-5v-regulator { 219 compatible = "regulator-fixed"; 220 regulator-name = "VDC_5V"; 221 222 vin-supply = <&dc12v>; 223 regulator-min-microvolt = <500000>; 224 regulator-max-microvolt = <500000>; 225 regulator-always-on; 226 }; 227 228 vreg_s4a_1p8: vreg-s4a-1p8 { 229 compatible = "regulator-fixed"; 230 regulator-name = "vreg_s4a_1p8"; 231 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 }; 236 237 vph_pwr: vph-pwr-regulator { 238 compatible = "regulator-fixed"; 239 regulator-name = "vph_pwr"; 240 241 vin-supply = <&vbat_som>; 242 }; 243}; 244 245&adsp_pas { 246 status = "okay"; 247 248 firmware-name = "qcom/sdm845/adsp.mbn"; 249}; 250 251&apps_rsc { 252 pm8998-rpmh-regulators { 253 compatible = "qcom,pm8998-rpmh-regulators"; 254 qcom,pmic-id = "a"; 255 vdd-s1-supply = <&vph_pwr>; 256 vdd-s2-supply = <&vph_pwr>; 257 vdd-s3-supply = <&vph_pwr>; 258 vdd-s4-supply = <&vph_pwr>; 259 vdd-s5-supply = <&vph_pwr>; 260 vdd-s6-supply = <&vph_pwr>; 261 vdd-s7-supply = <&vph_pwr>; 262 vdd-s8-supply = <&vph_pwr>; 263 vdd-s9-supply = <&vph_pwr>; 264 vdd-s10-supply = <&vph_pwr>; 265 vdd-s11-supply = <&vph_pwr>; 266 vdd-s12-supply = <&vph_pwr>; 267 vdd-s13-supply = <&vph_pwr>; 268 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 269 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 270 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 271 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 272 vdd-l6-supply = <&vph_pwr>; 273 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 274 vdd-l9-supply = <&vreg_bob>; 275 vdd-l10-l23-l25-supply = <&vreg_bob>; 276 vdd-l13-l19-l21-supply = <&vreg_bob>; 277 vdd-l16-l28-supply = <&vreg_bob>; 278 vdd-l18-l22-supply = <&vreg_bob>; 279 vdd-l20-l24-supply = <&vreg_bob>; 280 vdd-l26-supply = <&vreg_s3a_1p35>; 281 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 282 283 vreg_s3a_1p35: smps3 { 284 regulator-min-microvolt = <1352000>; 285 regulator-max-microvolt = <1352000>; 286 }; 287 288 vreg_s5a_2p04: smps5 { 289 regulator-min-microvolt = <1904000>; 290 regulator-max-microvolt = <2040000>; 291 }; 292 293 vreg_s7a_1p025: smps7 { 294 regulator-min-microvolt = <900000>; 295 regulator-max-microvolt = <1028000>; 296 }; 297 298 vreg_l1a_0p875: ldo1 { 299 regulator-min-microvolt = <880000>; 300 regulator-max-microvolt = <880000>; 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 302 }; 303 304 vreg_l5a_0p8: ldo5 { 305 regulator-min-microvolt = <800000>; 306 regulator-max-microvolt = <800000>; 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 308 }; 309 310 vreg_l12a_1p8: ldo12 { 311 regulator-min-microvolt = <1800000>; 312 regulator-max-microvolt = <1800000>; 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 314 }; 315 316 vreg_l7a_1p8: ldo7 { 317 regulator-min-microvolt = <1800000>; 318 regulator-max-microvolt = <1800000>; 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 320 }; 321 322 vreg_l13a_2p95: ldo13 { 323 regulator-min-microvolt = <1800000>; 324 regulator-max-microvolt = <2960000>; 325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 326 }; 327 328 vreg_l17a_1p3: ldo17 { 329 regulator-min-microvolt = <1304000>; 330 regulator-max-microvolt = <1304000>; 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 332 }; 333 334 vreg_l20a_2p95: ldo20 { 335 regulator-min-microvolt = <2960000>; 336 regulator-max-microvolt = <2968000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l21a_2p95: ldo21 { 341 regulator-min-microvolt = <2960000>; 342 regulator-max-microvolt = <2968000>; 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 344 }; 345 346 vreg_l24a_3p075: ldo24 { 347 regulator-min-microvolt = <3088000>; 348 regulator-max-microvolt = <3088000>; 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 350 }; 351 352 vreg_l25a_3p3: ldo25 { 353 regulator-min-microvolt = <3300000>; 354 regulator-max-microvolt = <3312000>; 355 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 356 }; 357 358 vreg_l26a_1p2: ldo26 { 359 regulator-min-microvolt = <1200000>; 360 regulator-max-microvolt = <1200000>; 361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 362 }; 363 364 vreg_lvs1a_1p8: lvs1 { 365 regulator-min-microvolt = <1800000>; 366 regulator-max-microvolt = <1800000>; 367 regulator-always-on; 368 }; 369 370 vreg_lvs2a_1p8: lvs2 { 371 regulator-min-microvolt = <1800000>; 372 regulator-max-microvolt = <1800000>; 373 regulator-always-on; 374 }; 375 }; 376 377 pmi8998-rpmh-regulators { 378 compatible = "qcom,pmi8998-rpmh-regulators"; 379 qcom,pmic-id = "b"; 380 381 vdd-bob-supply = <&vph_pwr>; 382 383 vreg_bob: bob { 384 regulator-min-microvolt = <3312000>; 385 regulator-max-microvolt = <3600000>; 386 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 387 regulator-allow-bypass; 388 }; 389 }; 390}; 391 392&cdsp_pas { 393 status = "okay"; 394 firmware-name = "qcom/sdm845/cdsp.mbn"; 395}; 396 397&dsi0 { 398 status = "okay"; 399 vdda-supply = <&vreg_l26a_1p2>; 400 401 ports { 402 port@1 { 403 endpoint { 404 remote-endpoint = <<9611_a>; 405 data-lanes = <0 1 2 3>; 406 }; 407 }; 408 }; 409}; 410 411&dsi0_phy { 412 status = "okay"; 413 vdds-supply = <&vreg_l1a_0p875>; 414}; 415 416&gcc { 417 protected-clocks = <GCC_QSPI_CORE_CLK>, 418 <GCC_QSPI_CORE_CLK_SRC>, 419 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 420 <GCC_LPASS_Q6_AXI_CLK>, 421 <GCC_LPASS_SWAY_CLK>; 422}; 423 424&gmu { 425 status = "okay"; 426}; 427 428&gpu { 429 status = "okay"; 430 zap-shader { 431 memory-region = <&gpu_mem>; 432 firmware-name = "qcom/sdm845/a630_zap.mbn"; 433 }; 434}; 435 436&i2c10 { 437 status = "okay"; 438 clock-frequency = <400000>; 439 440 lt9611_codec: hdmi-bridge@3b { 441 compatible = "lontium,lt9611"; 442 reg = <0x3b>; 443 #sound-dai-cells = <1>; 444 445 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 446 447 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 448 449 vdd-supply = <<9611_1v8>; 450 vcc-supply = <<9611_3v3>; 451 452 pinctrl-names = "default"; 453 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 454 455 ports { 456 #address-cells = <1>; 457 #size-cells = <0>; 458 459 port@0 { 460 reg = <0>; 461 462 lt9611_a: endpoint { 463 remote-endpoint = <&dsi0_out>; 464 }; 465 }; 466 467 port@2 { 468 reg = <2>; 469 470 lt9611_out: endpoint { 471 remote-endpoint = <&hdmi_con>; 472 }; 473 }; 474 }; 475 }; 476}; 477 478&i2c11 { 479 /* On Low speed expansion */ 480 label = "LS-I2C1"; 481 status = "okay"; 482}; 483 484&i2c14 { 485 /* On Low speed expansion */ 486 label = "LS-I2C0"; 487 status = "okay"; 488}; 489 490&mdss { 491 status = "okay"; 492}; 493 494&mss_pil { 495 status = "okay"; 496 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 497}; 498 499&pcie0 { 500 status = "okay"; 501 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 502 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 503 504 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 505 506 pinctrl-names = "default"; 507 pinctrl-0 = <&pcie0_default_state>; 508}; 509 510&pcie0_phy { 511 status = "okay"; 512 513 vdda-phy-supply = <&vreg_l1a_0p875>; 514 vdda-pll-supply = <&vreg_l26a_1p2>; 515}; 516 517&pcie1 { 518 status = "okay"; 519 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 520 521 pinctrl-names = "default"; 522 pinctrl-0 = <&pcie1_default_state>; 523}; 524 525&pcie1_phy { 526 status = "okay"; 527 528 vdda-phy-supply = <&vreg_l1a_0p875>; 529 vdda-pll-supply = <&vreg_l26a_1p2>; 530}; 531 532&pm8998_gpio { 533 gpio-line-names = 534 "NC", 535 "NC", 536 "WLAN_SW_CTRL", 537 "NC", 538 "PM_GPIO5_BLUE_BT_LED", 539 "VOL_UP_N", 540 "NC", 541 "ADC_IN1", 542 "PM_GPIO9_YEL_WIFI_LED", 543 "CAM0_AVDD_EN", 544 "NC", 545 "CAM0_DVDD_EN", 546 "PM_GPIO13_GREEN_U4_LED", 547 "DIV_CLK2", 548 "NC", 549 "NC", 550 "NC", 551 "SMB_STAT", 552 "NC", 553 "NC", 554 "ADC_IN2", 555 "OPTION1", 556 "WCSS_PWR_REQ", 557 "PM845_GPIO24", 558 "OPTION2", 559 "PM845_SLB"; 560 561 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { 562 pins = "gpio12"; 563 function = "normal"; 564 565 bias-pull-up; 566 drive-push-pull; 567 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 568 }; 569 570 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { 571 pins = "gpio10"; 572 function = "normal"; 573 574 bias-pull-up; 575 drive-push-pull; 576 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 577 }; 578 579 vol_up_pin_a: vol-up-active { 580 pins = "gpio6"; 581 function = "normal"; 582 input-enable; 583 bias-pull-up; 584 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 585 }; 586}; 587 588&pm8998_pon { 589 resin { 590 compatible = "qcom,pm8941-resin"; 591 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 592 debounce = <15625>; 593 bias-pull-up; 594 linux,code = <KEY_VOLUMEDOWN>; 595 }; 596}; 597 598/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 599&q6afedai { 600 qi2s@22 { 601 reg = <22>; 602 qcom,sd-lines = <0 1 2 3>; 603 }; 604}; 605 606&q6asmdai { 607 dai@0 { 608 reg = <0>; 609 }; 610 611 dai@1 { 612 reg = <1>; 613 }; 614 615 dai@2 { 616 reg = <2>; 617 }; 618 619 dai@3 { 620 reg = <3>; 621 direction = <2>; 622 is-compress-dai; 623 }; 624}; 625 626&qupv3_id_0 { 627 status = "okay"; 628}; 629 630&qupv3_id_1 { 631 status = "okay"; 632}; 633 634&sdhc_2 { 635 status = "okay"; 636 637 pinctrl-names = "default"; 638 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 639 640 vmmc-supply = <&vreg_l21a_2p95>; 641 vqmmc-supply = <&vreg_l13a_2p95>; 642 643 bus-width = <4>; 644 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 645}; 646 647&sound { 648 compatible = "qcom,db845c-sndcard"; 649 pinctrl-0 = <&quat_mi2s_active 650 &quat_mi2s_sd0_active 651 &quat_mi2s_sd1_active 652 &quat_mi2s_sd2_active 653 &quat_mi2s_sd3_active>; 654 pinctrl-names = "default"; 655 model = "DB845c"; 656 audio-routing = 657 "RX_BIAS", "MCLK", 658 "AMIC1", "MIC BIAS1", 659 "AMIC2", "MIC BIAS2", 660 "DMIC0", "MIC BIAS1", 661 "DMIC1", "MIC BIAS1", 662 "DMIC2", "MIC BIAS3", 663 "DMIC3", "MIC BIAS3", 664 "SpkrLeft IN", "SPK1 OUT", 665 "SpkrRight IN", "SPK2 OUT", 666 "MM_DL1", "MultiMedia1 Playback", 667 "MM_DL2", "MultiMedia2 Playback", 668 "MM_DL4", "MultiMedia4 Playback", 669 "MultiMedia3 Capture", "MM_UL3"; 670 671 mm1-dai-link { 672 link-name = "MultiMedia1"; 673 cpu { 674 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 675 }; 676 }; 677 678 mm2-dai-link { 679 link-name = "MultiMedia2"; 680 cpu { 681 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 682 }; 683 }; 684 685 mm3-dai-link { 686 link-name = "MultiMedia3"; 687 cpu { 688 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 689 }; 690 }; 691 692 mm4-dai-link { 693 link-name = "MultiMedia4"; 694 cpu { 695 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 696 }; 697 }; 698 699 hdmi-dai-link { 700 link-name = "HDMI Playback"; 701 cpu { 702 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 703 }; 704 705 platform { 706 sound-dai = <&q6routing>; 707 }; 708 709 codec { 710 sound-dai = <<9611_codec 0>; 711 }; 712 }; 713 714 slim-dai-link { 715 link-name = "SLIM Playback"; 716 cpu { 717 sound-dai = <&q6afedai SLIMBUS_0_RX>; 718 }; 719 720 platform { 721 sound-dai = <&q6routing>; 722 }; 723 724 codec { 725 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 726 }; 727 }; 728 729 slimcap-dai-link { 730 link-name = "SLIM Capture"; 731 cpu { 732 sound-dai = <&q6afedai SLIMBUS_0_TX>; 733 }; 734 735 platform { 736 sound-dai = <&q6routing>; 737 }; 738 739 codec { 740 sound-dai = <&wcd9340 1>; 741 }; 742 }; 743}; 744 745&spi2 { 746 /* On Low speed expansion */ 747 label = "LS-SPI0"; 748 status = "okay"; 749}; 750 751&tlmm { 752 cam0_default: cam0_default { 753 rst { 754 pins = "gpio9"; 755 function = "gpio"; 756 757 drive-strength = <16>; 758 bias-disable; 759 }; 760 761 mclk0 { 762 pins = "gpio13"; 763 function = "cam_mclk"; 764 765 drive-strength = <16>; 766 bias-disable; 767 }; 768 }; 769 770 cam3_default: cam3_default { 771 rst { 772 function = "gpio"; 773 pins = "gpio21"; 774 775 drive-strength = <16>; 776 bias-disable; 777 }; 778 779 mclk3 { 780 function = "cam_mclk"; 781 pins = "gpio16"; 782 783 drive-strength = <16>; 784 bias-disable; 785 }; 786 }; 787 788 dsi_sw_sel: dsi-sw-sel { 789 pins = "gpio120"; 790 function = "gpio"; 791 792 drive-strength = <2>; 793 bias-disable; 794 output-high; 795 }; 796 797 lt9611_irq_pin: lt9611-irq { 798 pins = "gpio84"; 799 function = "gpio"; 800 bias-disable; 801 }; 802 803 pcie0_default_state: pcie0-default { 804 clkreq { 805 pins = "gpio36"; 806 function = "pci_e0"; 807 bias-pull-up; 808 }; 809 810 reset-n { 811 pins = "gpio35"; 812 function = "gpio"; 813 814 drive-strength = <2>; 815 output-low; 816 bias-pull-down; 817 }; 818 819 wake-n { 820 pins = "gpio37"; 821 function = "gpio"; 822 823 drive-strength = <2>; 824 bias-pull-up; 825 }; 826 }; 827 828 pcie0_pwren_state: pcie0-pwren { 829 pins = "gpio90"; 830 function = "gpio"; 831 832 drive-strength = <2>; 833 bias-disable; 834 }; 835 836 pcie1_default_state: pcie1-default { 837 perst-n { 838 pins = "gpio102"; 839 function = "gpio"; 840 841 drive-strength = <16>; 842 bias-disable; 843 }; 844 845 clkreq { 846 pins = "gpio103"; 847 function = "pci_e1"; 848 bias-pull-up; 849 }; 850 851 wake-n { 852 pins = "gpio11"; 853 function = "gpio"; 854 855 drive-strength = <2>; 856 bias-pull-up; 857 }; 858 859 reset-n { 860 pins = "gpio75"; 861 function = "gpio"; 862 863 drive-strength = <16>; 864 bias-pull-up; 865 output-high; 866 }; 867 }; 868 869 sdc2_default_state: sdc2-default { 870 clk { 871 pins = "sdc2_clk"; 872 bias-disable; 873 874 /* 875 * It seems that mmc_test reports errors if drive 876 * strength is not 16 on clk, cmd, and data pins. 877 */ 878 drive-strength = <16>; 879 }; 880 881 cmd { 882 pins = "sdc2_cmd"; 883 bias-pull-up; 884 drive-strength = <10>; 885 }; 886 887 data { 888 pins = "sdc2_data"; 889 bias-pull-up; 890 drive-strength = <10>; 891 }; 892 }; 893 894 sdc2_card_det_n: sd-card-det-n { 895 pins = "gpio126"; 896 function = "gpio"; 897 bias-pull-up; 898 }; 899 900 wcd_intr_default: wcd_intr_default { 901 pins = <54>; 902 function = "gpio"; 903 904 input-enable; 905 bias-pull-down; 906 drive-strength = <2>; 907 }; 908}; 909 910&uart3 { 911 label = "LS-UART0"; 912 status = "disabled"; 913}; 914 915&uart6 { 916 status = "okay"; 917 918 bluetooth { 919 compatible = "qcom,wcn3990-bt"; 920 921 vddio-supply = <&vreg_s4a_1p8>; 922 vddxo-supply = <&vreg_l7a_1p8>; 923 vddrf-supply = <&vreg_l17a_1p3>; 924 vddch0-supply = <&vreg_l25a_3p3>; 925 max-speed = <3200000>; 926 }; 927}; 928 929&uart9 { 930 label = "LS-UART1"; 931 status = "okay"; 932}; 933 934&usb_1 { 935 status = "okay"; 936}; 937 938&usb_1_dwc3 { 939 dr_mode = "peripheral"; 940}; 941 942&usb_1_hsphy { 943 status = "okay"; 944 945 vdd-supply = <&vreg_l1a_0p875>; 946 vdda-pll-supply = <&vreg_l12a_1p8>; 947 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 948 949 qcom,imp-res-offset-value = <8>; 950 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 951 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 952 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 953}; 954 955&usb_1_qmpphy { 956 status = "okay"; 957 958 vdda-phy-supply = <&vreg_l26a_1p2>; 959 vdda-pll-supply = <&vreg_l1a_0p875>; 960}; 961 962&usb_2 { 963 status = "okay"; 964}; 965 966&usb_2_dwc3 { 967 dr_mode = "host"; 968}; 969 970&usb_2_hsphy { 971 status = "okay"; 972 973 vdd-supply = <&vreg_l1a_0p875>; 974 vdda-pll-supply = <&vreg_l12a_1p8>; 975 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 976 977 qcom,imp-res-offset-value = <8>; 978 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 979}; 980 981&usb_2_qmpphy { 982 status = "okay"; 983 984 vdda-phy-supply = <&vreg_l26a_1p2>; 985 vdda-pll-supply = <&vreg_l1a_0p875>; 986}; 987 988&ufs_mem_hc { 989 status = "okay"; 990 991 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 992 993 vcc-supply = <&vreg_l20a_2p95>; 994 vcc-max-microamp = <800000>; 995}; 996 997&ufs_mem_phy { 998 status = "okay"; 999 1000 vdda-phy-supply = <&vreg_l1a_0p875>; 1001 vdda-pll-supply = <&vreg_l26a_1p2>; 1002}; 1003 1004&venus { 1005 status = "okay"; 1006}; 1007 1008&wcd9340{ 1009 pinctrl-0 = <&wcd_intr_default>; 1010 pinctrl-names = "default"; 1011 clock-names = "extclk"; 1012 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 1013 reset-gpios = <&tlmm 64 0>; 1014 vdd-buck-supply = <&vreg_s4a_1p8>; 1015 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1016 vdd-tx-supply = <&vreg_s4a_1p8>; 1017 vdd-rx-supply = <&vreg_s4a_1p8>; 1018 vdd-io-supply = <&vreg_s4a_1p8>; 1019 1020 swm: swm@c85 { 1021 left_spkr: wsa8810-left{ 1022 compatible = "sdw10217201000"; 1023 reg = <0 1>; 1024 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1025 #thermal-sensor-cells = <0>; 1026 sound-name-prefix = "SpkrLeft"; 1027 #sound-dai-cells = <0>; 1028 }; 1029 1030 right_spkr: wsa8810-right{ 1031 compatible = "sdw10217201000"; 1032 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1033 reg = <0 2>; 1034 #thermal-sensor-cells = <0>; 1035 sound-name-prefix = "SpkrRight"; 1036 #sound-dai-cells = <0>; 1037 }; 1038 }; 1039}; 1040 1041&wifi { 1042 status = "okay"; 1043 1044 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1045 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1046 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1047 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1048 1049 qcom,snoc-host-cap-8bit-quirk; 1050}; 1051 1052/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1053&qup_spi2_default { 1054 drive-strength = <16>; 1055}; 1056 1057&qup_uart3_default{ 1058 pinmux { 1059 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 1060 function = "qup3"; 1061 }; 1062}; 1063 1064&qup_i2c10_default { 1065 pinconf { 1066 pins = "gpio55", "gpio56"; 1067 drive-strength = <2>; 1068 bias-disable; 1069 }; 1070}; 1071 1072&qup_uart6_default { 1073 pinmux { 1074 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 1075 function = "qup6"; 1076 }; 1077 1078 cts { 1079 pins = "gpio45"; 1080 bias-disable; 1081 }; 1082 1083 rts-tx { 1084 pins = "gpio46", "gpio47"; 1085 drive-strength = <2>; 1086 bias-disable; 1087 }; 1088 1089 rx { 1090 pins = "gpio48"; 1091 bias-pull-up; 1092 }; 1093}; 1094 1095&qup_uart9_default { 1096 pinconf-tx { 1097 pins = "gpio4"; 1098 drive-strength = <2>; 1099 bias-disable; 1100 }; 1101 1102 pinconf-rx { 1103 pins = "gpio5"; 1104 drive-strength = <2>; 1105 bias-pull-up; 1106 }; 1107}; 1108 1109&pm8998_gpio { 1110 1111}; 1112 1113&cci { 1114 status = "okay"; 1115}; 1116 1117&camss { 1118 vdda-supply = <&vreg_l1a_0p875>; 1119 1120 status = "ok"; 1121 1122 ports { 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 port@0 { 1126 reg = <0>; 1127 csiphy0_ep: endpoint { 1128 clock-lanes = <7>; 1129 data-lanes = <0 1 2 3>; 1130 remote-endpoint = <&ov8856_ep>; 1131 }; 1132 }; 1133 }; 1134}; 1135 1136&cci_i2c0 { 1137 camera@10 { 1138 compatible = "ovti,ov8856"; 1139 reg = <0x10>; 1140 1141 // CAM0_RST_N 1142 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; 1143 pinctrl-names = "default"; 1144 pinctrl-0 = <&cam0_default>; 1145 gpios = <&tlmm 13 0>, 1146 <&tlmm 9 GPIO_ACTIVE_LOW>; 1147 1148 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 1149 clock-names = "xvclk"; 1150 clock-frequency = <19200000>; 1151 1152 /* The &vreg_s4a_1p8 trace is powered on as a, 1153 * so it is represented by a fixed regulator. 1154 * 1155 * The 2.8V vdda-supply and 1.2V vddd-supply regulators 1156 * both have to be enabled through the power management 1157 * gpios. 1158 */ 1159 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1160 1161 dovdd-supply = <&vreg_lvs1a_1p8>; 1162 avdd-supply = <&cam0_avdd_2v8>; 1163 dvdd-supply = <&cam0_dvdd_1v2>; 1164 1165 status = "ok"; 1166 1167 port { 1168 ov8856_ep: endpoint { 1169 clock-lanes = <1>; 1170 link-frequencies = /bits/ 64 1171 <360000000 180000000>; 1172 data-lanes = <1 2 3 4>; 1173 remote-endpoint = <&csiphy0_ep>; 1174 }; 1175 }; 1176 }; 1177}; 1178 1179&cci_i2c1 { 1180 camera@60 { 1181 compatible = "ovti,ov7251"; 1182 1183 // I2C address as per ov7251.txt linux documentation 1184 reg = <0x60>; 1185 1186 // CAM3_RST_N 1187 enable-gpios = <&tlmm 21 0>; 1188 pinctrl-names = "default"; 1189 pinctrl-0 = <&cam3_default>; 1190 gpios = <&tlmm 16 0>, 1191 <&tlmm 21 0>; 1192 1193 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; 1194 clock-names = "xclk"; 1195 clock-frequency = <24000000>; 1196 1197 /* The &vreg_s4a_1p8 trace always powered on. 1198 * 1199 * The 2.8V vdda-supply regulator is enabled when the 1200 * vreg_s4a_1p8 trace is pulled high. 1201 * It too is represented by a fixed regulator. 1202 * 1203 * No 1.2V vddd-supply regulator is used. 1204 */ 1205 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1206 1207 vdddo-supply = <&vreg_lvs1a_1p8>; 1208 vdda-supply = <&cam3_avdd_2v8>; 1209 1210 status = "disable"; 1211 1212 port { 1213 ov7251_ep: endpoint { 1214 clock-lanes = <1>; 1215 data-lanes = <0 1>; 1216// remote-endpoint = <&csiphy3_ep>; 1217 }; 1218 }; 1219 }; 1220}; 1221