179e7739fSRob Clark// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
279e7739fSRob Clark/*
379e7739fSRob Clark * Google Cheza board device tree source
479e7739fSRob Clark *
579e7739fSRob Clark * Copyright 2018 Google LLC.
679e7739fSRob Clark */
779e7739fSRob Clark
879e7739fSRob Clark/dts-v1/;
979e7739fSRob Clark
1079e7739fSRob Clark#include "sdm845-cheza.dtsi"
1179e7739fSRob Clark
1279e7739fSRob Clark/ {
1379e7739fSRob Clark	model = "Google Cheza (rev2)";
1479e7739fSRob Clark	compatible = "google,cheza-rev2", "qcom,sdm845";
1579e7739fSRob Clark
1679e7739fSRob Clark	/*
1779e7739fSRob Clark	 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children
1879e7739fSRob Clark	 */
1979e7739fSRob Clark
2079e7739fSRob Clark	/*
2179e7739fSRob Clark	 * NOTE: Technically pp3500_a is not the exact same signal as
2279e7739fSRob Clark	 * pp3500_a_vbob (there's a load switch between them and the EC can
2379e7739fSRob Clark	 * control pp3500_a via "en_pp3300_a"), but from the AP's point of
2479e7739fSRob Clark	 * view they are the same.
2579e7739fSRob Clark	 */
2679e7739fSRob Clark	pp3500_a:
2779e7739fSRob Clark	pp3500_a_vbob: pp3500-a-vbob-regulator {
2879e7739fSRob Clark		compatible = "regulator-fixed";
2979e7739fSRob Clark		regulator-name = "vreg_bob";
3079e7739fSRob Clark
3179e7739fSRob Clark		/*
3279e7739fSRob Clark		 * Comes on automatically when pp5000_ldo comes on, which
3379e7739fSRob Clark		 * comes on automatically when ppvar_sys comes on
3479e7739fSRob Clark		 */
3579e7739fSRob Clark		regulator-always-on;
3679e7739fSRob Clark		regulator-boot-on;
3779e7739fSRob Clark		regulator-min-microvolt = <3500000>;
3879e7739fSRob Clark		regulator-max-microvolt = <3500000>;
3979e7739fSRob Clark
4079e7739fSRob Clark		vin-supply = <&ppvar_sys>;
4179e7739fSRob Clark	};
4279e7739fSRob Clark
4379e7739fSRob Clark	pp3300_dx_edp: pp3300-dx-edp-regulator {
4479e7739fSRob Clark		/* Yes, it's really 3.5 despite the name of the signal */
4579e7739fSRob Clark		regulator-min-microvolt = <3500000>;
4679e7739fSRob Clark		regulator-max-microvolt = <3500000>;
4779e7739fSRob Clark
4879e7739fSRob Clark		vin-supply = <&pp3500_a>;
4979e7739fSRob Clark	};
5079e7739fSRob Clark};
5179e7739fSRob Clark
5279e7739fSRob Clark/* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */
5379e7739fSRob Clark
5479e7739fSRob Clark/*
5579e7739fSRob Clark * L19 and L28 technically go to 3.3V, but most boards have old AOP firmware
5679e7739fSRob Clark * that limits them to 3.0, and trying to run at 3.3V with that old firmware
5779e7739fSRob Clark * prevents the system from booting.
5879e7739fSRob Clark */
5979e7739fSRob Clark&src_pp3000_l19a {
6079e7739fSRob Clark	regulator-min-microvolt = <3008000>;
6179e7739fSRob Clark	regulator-max-microvolt = <3008000>;
6279e7739fSRob Clark};
6379e7739fSRob Clark
6479e7739fSRob Clark&src_pp3300_l22a {
6579e7739fSRob Clark	/delete-property/regulator-boot-on;
6679e7739fSRob Clark	/delete-property/regulator-always-on;
6779e7739fSRob Clark};
6879e7739fSRob Clark
6979e7739fSRob Clark&src_pp3300_l28a {
7079e7739fSRob Clark	regulator-min-microvolt = <3008000>;
7179e7739fSRob Clark	regulator-max-microvolt = <3008000>;
7279e7739fSRob Clark};
7379e7739fSRob Clark
7479e7739fSRob Clark&src_vreg_bob {
7579e7739fSRob Clark	regulator-min-microvolt = <3500000>;
7679e7739fSRob Clark	regulator-max-microvolt = <3500000>;
7779e7739fSRob Clark	vin-supply = <&pp3500_a_vbob>;
7879e7739fSRob Clark};
7979e7739fSRob Clark
8079e7739fSRob Clark/*
8179e7739fSRob Clark * NON-REGULATOR OVERRIDES
8279e7739fSRob Clark * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label
8379e7739fSRob Clark */
8479e7739fSRob Clark
8579e7739fSRob Clark/* PINCTRL - board-specific pinctrl */
8679e7739fSRob Clark
8779e7739fSRob Clark&tlmm {
8879e7739fSRob Clark	gpio-line-names = "AP_SPI_FP_MISO",
8979e7739fSRob Clark			  "AP_SPI_FP_MOSI",
9079e7739fSRob Clark			  "AP_SPI_FP_CLK",
9179e7739fSRob Clark			  "AP_SPI_FP_CS_L",
9279e7739fSRob Clark			  "UART_AP_TX_DBG_RX",
9379e7739fSRob Clark			  "UART_DBG_TX_AP_RX",
9479e7739fSRob Clark			  "BRIJ_SUSPEND",
9579e7739fSRob Clark			  "FP_RST_L",
9679e7739fSRob Clark			  "FCAM_EN",
9779e7739fSRob Clark			  "",
9879e7739fSRob Clark			  "EDP_BRIJ_IRQ",
9979e7739fSRob Clark			  "EC_IN_RW_ODL",
10079e7739fSRob Clark			  "",
10179e7739fSRob Clark			  "RCAM_MCLK",
10279e7739fSRob Clark			  "FCAM_MCLK",
10379e7739fSRob Clark			  "",
10479e7739fSRob Clark			  "RCAM_EN",
10579e7739fSRob Clark			  "CCI0_SDA",
10679e7739fSRob Clark			  "CCI0_SCL",
10779e7739fSRob Clark			  "CCI1_SDA",
10879e7739fSRob Clark			  "CCI1_SCL",
10979e7739fSRob Clark			  "FCAM_RST_L",
11079e7739fSRob Clark			  "FPMCU_BOOT0",
11179e7739fSRob Clark			  "PEN_RST_L",
11279e7739fSRob Clark			  "PEN_IRQ_L",
11379e7739fSRob Clark			  "FPMCU_SEL_OD",
11479e7739fSRob Clark			  "RCAM_VSYNC",
11579e7739fSRob Clark			  "ESIM_MISO",
11679e7739fSRob Clark			  "ESIM_MOSI",
11779e7739fSRob Clark			  "ESIM_CLK",
11879e7739fSRob Clark			  "ESIM_CS_L",
11979e7739fSRob Clark			  "AP_PEN_1V8_SDA",
12079e7739fSRob Clark			  "AP_PEN_1V8_SCL",
12179e7739fSRob Clark			  "AP_TS_I2C_SDA",
12279e7739fSRob Clark			  "AP_TS_I2C_SCL",
12379e7739fSRob Clark			  "RCAM_RST_L",
12479e7739fSRob Clark			  "",
12579e7739fSRob Clark			  "AP_EDP_BKLTEN",
12679e7739fSRob Clark			  "AP_BRD_ID1",
12779e7739fSRob Clark			  "BOOT_CONFIG_4",
12879e7739fSRob Clark			  "AMP_IRQ_L",
12979e7739fSRob Clark			  "EDP_BRIJ_I2C_SDA",
13079e7739fSRob Clark			  "EDP_BRIJ_I2C_SCL",
13179e7739fSRob Clark			  "EN_PP3300_DX_EDP",
13279e7739fSRob Clark			  "SD_CD_ODL",
13379e7739fSRob Clark			  "BT_UART_RTS",
13479e7739fSRob Clark			  "BT_UART_CTS",
13579e7739fSRob Clark			  "BT_UART_RXD",
13679e7739fSRob Clark			  "BT_UART_TXD",
13779e7739fSRob Clark			  "AMP_I2C_SDA",
13879e7739fSRob Clark			  "AMP_I2C_SCL",
13979e7739fSRob Clark			  "AP_BRD_ID3",
14079e7739fSRob Clark			  "",
14179e7739fSRob Clark			  "AP_EC_SPI_CLK",
14279e7739fSRob Clark			  "AP_EC_SPI_CS_L",
14379e7739fSRob Clark			  "AP_EC_SPI_MISO",
14479e7739fSRob Clark			  "AP_EC_SPI_MOSI",
14579e7739fSRob Clark			  "FORCED_USB_BOOT",
14679e7739fSRob Clark			  "AMP_BCLK",
14779e7739fSRob Clark			  "AMP_LRCLK",
14879e7739fSRob Clark			  "AMP_DOUT",
14979e7739fSRob Clark			  "AMP_DIN",
15079e7739fSRob Clark			  "AP_BRD_ID2",
15179e7739fSRob Clark			  "PEN_PDCT_L",
15279e7739fSRob Clark			  "HP_MCLK",
15379e7739fSRob Clark			  "HP_BCLK",
15479e7739fSRob Clark			  "HP_LRCLK",
15579e7739fSRob Clark			  "HP_DOUT",
15679e7739fSRob Clark			  "HP_DIN",
15779e7739fSRob Clark			  "",
15879e7739fSRob Clark			  "",
15979e7739fSRob Clark			  "",
16079e7739fSRob Clark			  "",
16179e7739fSRob Clark			  "BT_SLIMBUS_DATA",
16279e7739fSRob Clark			  "BT_SLIMBUS_CLK",
16379e7739fSRob Clark			  "AMP_RESET_L",
16479e7739fSRob Clark			  "",
16579e7739fSRob Clark			  "FCAM_VSYNC",
16679e7739fSRob Clark			  "",
16779e7739fSRob Clark			  "AP_SKU_ID1",
16879e7739fSRob Clark			  "EC_WOV_BCLK",
16979e7739fSRob Clark			  "EC_WOV_LRCLK",
17079e7739fSRob Clark			  "EC_WOV_DOUT",
17179e7739fSRob Clark			  "",
17279e7739fSRob Clark			  "",
17379e7739fSRob Clark			  "AP_H1_SPI_MISO",
17479e7739fSRob Clark			  "AP_H1_SPI_MOSI",
17579e7739fSRob Clark			  "AP_H1_SPI_CLK",
17679e7739fSRob Clark			  "AP_H1_SPI_CS_L",
17779e7739fSRob Clark			  "",
17879e7739fSRob Clark			  "AP_SPI_CS0_L",
17979e7739fSRob Clark			  "AP_SPI_MOSI",
18079e7739fSRob Clark			  "AP_SPI_MISO",
18179e7739fSRob Clark			  "",
18279e7739fSRob Clark			  "",
18379e7739fSRob Clark			  "AP_SPI_CLK",
18479e7739fSRob Clark			  "",
18579e7739fSRob Clark			  "RFFE6_CLK",
18679e7739fSRob Clark			  "RFFE6_DATA",
18779e7739fSRob Clark			  "BOOT_CONFIG_1",
18879e7739fSRob Clark			  "BOOT_CONFIG_2",
18979e7739fSRob Clark			  "BOOT_CONFIG_0",
19079e7739fSRob Clark			  "EDP_BRIJ_EN",
19179e7739fSRob Clark			  "",
19279e7739fSRob Clark			  "USB_HS_TX_EN",
19379e7739fSRob Clark			  "UIM2_DATA",
19479e7739fSRob Clark			  "UIM2_CLK",
19579e7739fSRob Clark			  "UIM2_RST",
19679e7739fSRob Clark			  "UIM2_PRESENT",
19779e7739fSRob Clark			  "UIM1_DATA",
19879e7739fSRob Clark			  "UIM1_CLK",
19979e7739fSRob Clark			  "UIM1_RST",
20079e7739fSRob Clark			  "",
20179e7739fSRob Clark			  "AP_SKU_ID2",
20279e7739fSRob Clark			  "SDM_GRFC_8",
20379e7739fSRob Clark			  "SDM_GRFC_9",
20479e7739fSRob Clark			  "AP_RST_REQ",
20579e7739fSRob Clark			  "HP_IRQ",
20679e7739fSRob Clark			  "TS_RESET_L",
20779e7739fSRob Clark			  "PEN_EJECT_ODL",
20879e7739fSRob Clark			  "HUB_RST_L",
20979e7739fSRob Clark			  "FP_TO_AP_IRQ",
21079e7739fSRob Clark			  "AP_EC_INT_L",
21179e7739fSRob Clark			  "",
21279e7739fSRob Clark			  "",
21379e7739fSRob Clark			  "TS_INT_L",
21479e7739fSRob Clark			  "AP_SUSPEND_L",
21579e7739fSRob Clark			  "SDM_GRFC_3",
21679e7739fSRob Clark			  "",
21779e7739fSRob Clark			  "H1_AP_INT_ODL",
21879e7739fSRob Clark			  "QLINK_REQ",
21979e7739fSRob Clark			  "QLINK_EN",
22079e7739fSRob Clark			  "SDM_GRFC_2",
22179e7739fSRob Clark			  "BOOT_CONFIG_3",
22279e7739fSRob Clark			  "WMSS_RESET_L",
22379e7739fSRob Clark			  "SDM_GRFC_0",
22479e7739fSRob Clark			  "SDM_GRFC_1",
22579e7739fSRob Clark			  "RFFE3_DATA",
22679e7739fSRob Clark			  "RFFE3_CLK",
22779e7739fSRob Clark			  "RFFE4_DATA",
22879e7739fSRob Clark			  "RFFE4_CLK",
22979e7739fSRob Clark			  "RFFE5_DATA",
23079e7739fSRob Clark			  "RFFE5_CLK",
23179e7739fSRob Clark			  "GNSS_EN",
23279e7739fSRob Clark			  "WCI2_LTE_COEX_RXD",
23379e7739fSRob Clark			  "WCI2_LTE_COEX_TXD",
23479e7739fSRob Clark			  "AP_RAM_ID1",
23579e7739fSRob Clark			  "AP_RAM_ID2",
23679e7739fSRob Clark			  "RFFE1_DATA",
23779e7739fSRob Clark			  "RFFE1_CLK";
23879e7739fSRob Clark};
239