1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "sc8280xp.dtsi"
13#include "sc8280xp-pmics.dtsi"
14
15/ {
16	model = "Qualcomm SC8280XP CRD";
17	compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
18
19	aliases {
20		serial0 = &qup2_uart17;
21	};
22
23	backlight {
24		compatible = "pwm-backlight";
25		pwms = <&pmc8280c_lpg 3 1000000>;
26		enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
27		power-supply = <&vreg_edp_bl>;
28
29		pinctrl-names = "default";
30		pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
31	};
32
33	chosen {
34		stdout-path = "serial0:115200n8";
35	};
36
37	vreg_edp_bl: regulator-edp-bl {
38		compatible = "regulator-fixed";
39
40		regulator-name = "VBL9";
41		regulator-min-microvolt = <3600000>;
42		regulator-max-microvolt = <3600000>;
43
44		gpio = <&pmc8280_1_gpios 9 GPIO_ACTIVE_HIGH>;
45		enable-active-high;
46
47		pinctrl-names = "default";
48		pinctrl-0 = <&edp_bl_reg_en>;
49
50		regulator-boot-on;
51	};
52
53	vreg_nvme: regulator-nvme {
54		compatible = "regulator-fixed";
55
56		regulator-name = "VCC3_SSD";
57		regulator-min-microvolt = <3300000>;
58		regulator-max-microvolt = <3300000>;
59
60		gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>;
61		enable-active-high;
62
63		pinctrl-names = "default";
64		pinctrl-0 = <&nvme_reg_en>;
65	};
66
67	vreg_misc_3p3: regulator-misc-3p3 {
68		compatible = "regulator-fixed";
69
70		regulator-name = "VCC3B";
71		regulator-min-microvolt = <3300000>;
72		regulator-max-microvolt = <3300000>;
73
74		gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>;
75		enable-active-high;
76
77		pinctrl-names = "default";
78		pinctrl-0 = <&misc_3p3_reg_en>;
79
80		regulator-boot-on;
81		regulator-always-on;
82	};
83
84	vreg_wlan: regulator-wlan {
85		compatible = "regulator-fixed";
86
87		regulator-name = "VCC_WLAN_3R9";
88		regulator-min-microvolt = <3900000>;
89		regulator-max-microvolt = <3900000>;
90
91		gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>;
92		enable-active-high;
93
94		pinctrl-names = "default";
95		pinctrl-0 = <&hastings_reg_en>;
96
97		regulator-boot-on;
98	};
99
100	vreg_wwan: regulator-wwan {
101		compatible = "regulator-fixed";
102
103		regulator-name = "VCC3B_WAN";
104		regulator-min-microvolt = <3300000>;
105		regulator-max-microvolt = <3300000>;
106
107		gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>;
108		enable-active-high;
109
110		pinctrl-names = "default";
111		pinctrl-0 = <&wwan_sw_en>;
112
113		regulator-boot-on;
114	};
115};
116
117&apps_rsc {
118	pmc8280-1-rpmh-regulators {
119		compatible = "qcom,pm8350-rpmh-regulators";
120		qcom,pmic-id = "b";
121
122		vdd-l3-l5-supply = <&vreg_s11b>;
123
124		vreg_s11b: smps11 {
125			regulator-name = "vreg_s11b";
126			regulator-min-microvolt = <1272000>;
127			regulator-max-microvolt = <1272000>;
128			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
129		};
130
131		vreg_l3b: ldo3 {
132			regulator-name = "vreg_l3b";
133			regulator-min-microvolt = <1200000>;
134			regulator-max-microvolt = <1200000>;
135			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
136			regulator-boot-on;
137			regulator-always-on;
138		};
139
140		vreg_l4b: ldo4 {
141			regulator-name = "vreg_l4b";
142			regulator-min-microvolt = <912000>;
143			regulator-max-microvolt = <912000>;
144			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145		};
146
147		vreg_l6b: ldo6 {
148			regulator-name = "vreg_l6b";
149			regulator-min-microvolt = <880000>;
150			regulator-max-microvolt = <880000>;
151			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
152			regulator-boot-on;
153		};
154	};
155
156	pmc8280c-rpmh-regulators {
157		compatible = "qcom,pm8350c-rpmh-regulators";
158		qcom,pmic-id = "c";
159
160		vreg_l1c: ldo1 {
161			regulator-name = "vreg_l1c";
162			regulator-min-microvolt = <1800000>;
163			regulator-max-microvolt = <1800000>;
164			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165		};
166
167		vreg_l7c: ldo7 {
168			regulator-name = "vreg_l7c";
169			regulator-min-microvolt = <2504000>;
170			regulator-max-microvolt = <2504000>;
171			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
172			regulator-allow-set-load;
173			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
174						   RPMH_REGULATOR_MODE_HPM>;
175		};
176
177		vreg_l13c: ldo13 {
178			regulator-name = "vreg_l13c";
179			regulator-min-microvolt = <3072000>;
180			regulator-max-microvolt = <3072000>;
181			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
182		};
183	};
184
185	pmc8280-2-rpmh-regulators {
186		compatible = "qcom,pm8350-rpmh-regulators";
187		qcom,pmic-id = "d";
188
189		vdd-l1-l4-supply = <&vreg_s11b>;
190
191		vreg_l3d: ldo3 {
192			regulator-name = "vreg_l3d";
193			regulator-min-microvolt = <1200000>;
194			regulator-max-microvolt = <1200000>;
195			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
196			regulator-allow-set-load;
197			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
198						   RPMH_REGULATOR_MODE_HPM>;
199		};
200
201		vreg_l4d: ldo4 {
202			regulator-name = "vreg_l4d";
203			regulator-min-microvolt = <1200000>;
204			regulator-max-microvolt = <1200000>;
205			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206		};
207
208		vreg_l6d: ldo6 {
209			regulator-name = "vreg_l6d";
210			regulator-min-microvolt = <880000>;
211			regulator-max-microvolt = <880000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213		};
214
215		vreg_l7d: ldo7 {
216			regulator-name = "vreg_l7d";
217			regulator-min-microvolt = <3072000>;
218			regulator-max-microvolt = <3072000>;
219			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
220		};
221
222		vreg_l9d: ldo9 {
223			regulator-name = "vreg_l9d";
224			regulator-min-microvolt = <912000>;
225			regulator-max-microvolt = <912000>;
226			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
227		};
228	};
229};
230
231&pcie2a {
232	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
233	wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
234
235	vddpe-3v3-supply = <&vreg_nvme>;
236
237	pinctrl-names = "default";
238	pinctrl-0 = <&pcie2a_default>;
239
240	status = "okay";
241};
242
243&pcie2a_phy {
244	vdda-phy-supply = <&vreg_l6d>;
245	vdda-pll-supply = <&vreg_l4d>;
246
247	status = "okay";
248};
249
250&pcie3a {
251	perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
252	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
253
254	vddpe-3v3-supply = <&vreg_wwan>;
255
256	pinctrl-names = "default";
257	pinctrl-0 = <&pcie3a_default>;
258
259	status = "okay";
260};
261
262&pcie3a_phy {
263	vdda-phy-supply = <&vreg_l6d>;
264	vdda-pll-supply = <&vreg_l4d>;
265
266	status = "okay";
267};
268
269&pcie4 {
270	perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
271	wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
272
273	vddpe-3v3-supply = <&vreg_wlan>;
274
275	pinctrl-names = "default";
276	pinctrl-0 = <&pcie4_default>;
277
278	status = "okay";
279};
280
281&pcie4_phy {
282	vdda-phy-supply = <&vreg_l6d>;
283	vdda-pll-supply = <&vreg_l4d>;
284
285	status = "okay";
286};
287
288&pmc8280c_lpg {
289	status = "okay";
290};
291
292&pmk8280_pon_pwrkey {
293	status = "okay";
294};
295
296&qup0 {
297	status = "okay";
298};
299
300&qup0_i2c4 {
301	clock-frequency = <400000>;
302
303	pinctrl-names = "default";
304	pinctrl-0 = <&qup0_i2c4_default>;
305
306	status = "okay";
307
308	touchscreen@10 {
309		compatible = "hid-over-i2c";
310		reg = <0x10>;
311
312		hid-descr-addr = <0x1>;
313		interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
314		vdd-supply = <&vreg_misc_3p3>;
315
316		pinctrl-names = "default";
317		pinctrl-0 = <&ts0_default>;
318	};
319};
320
321&qup1 {
322	status = "okay";
323};
324
325&qup2 {
326	status = "okay";
327};
328
329&qup2_i2c5 {
330	clock-frequency = <400000>;
331
332	pinctrl-names = "default";
333	pinctrl-0 = <&qup2_i2c5_default>;
334
335	status = "okay";
336
337	touchpad@15 {
338		compatible = "hid-over-i2c";
339		reg = <0x15>;
340
341		hid-descr-addr = <0x1>;
342		interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
343		vdd-supply = <&vreg_misc_3p3>;
344
345		pinctrl-names = "default";
346		pinctrl-0 = <&tpad_default>;
347
348		wakeup-source;
349	};
350
351	keyboard@68 {
352		compatible = "hid-over-i2c";
353		reg = <0x68>;
354
355		hid-descr-addr = <0x1>;
356		interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
357		vdd-supply = <&vreg_misc_3p3>;
358
359		pinctrl-names = "default";
360		pinctrl-0 = <&kybd_default>;
361
362		wakeup-source;
363	};
364};
365
366&qup2_uart17 {
367	compatible = "qcom,geni-debug-uart";
368
369	status = "okay";
370};
371
372&remoteproc_adsp {
373	firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
374
375	status = "okay";
376};
377
378&remoteproc_nsp0 {
379	firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
380
381	status = "okay";
382};
383
384&ufs_mem_hc {
385	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
386
387	vcc-supply = <&vreg_l7c>;
388	vcc-max-microamp = <800000>;
389	vccq-supply = <&vreg_l3d>;
390	vccq-max-microamp = <900000>;
391
392	status = "okay";
393};
394
395&ufs_mem_phy {
396	vdda-phy-supply = <&vreg_l6b>;
397	vdda-pll-supply = <&vreg_l3b>;
398
399	status = "okay";
400};
401
402&usb_0 {
403	status = "okay";
404};
405
406&usb_0_dwc3 {
407	/* TODO: Define USB-C connector properly */
408	dr_mode = "host";
409};
410
411&usb_0_hsphy {
412	vdda-pll-supply = <&vreg_l9d>;
413	vdda18-supply = <&vreg_l1c>;
414	vdda33-supply = <&vreg_l7d>;
415
416	status = "okay";
417};
418
419&usb_0_qmpphy {
420	vdda-phy-supply = <&vreg_l9d>;
421	vdda-pll-supply = <&vreg_l4d>;
422
423	status = "okay";
424};
425
426&usb_1 {
427	status = "okay";
428};
429
430&usb_1_dwc3 {
431	/* TODO: Define USB-C connector properly */
432	dr_mode = "host";
433};
434
435&usb_1_hsphy {
436	vdda-pll-supply = <&vreg_l4b>;
437	vdda18-supply = <&vreg_l1c>;
438	vdda33-supply = <&vreg_l13c>;
439
440	status = "okay";
441};
442
443&usb_1_qmpphy {
444	vdda-phy-supply = <&vreg_l4b>;
445	vdda-pll-supply = <&vreg_l3b>;
446
447	status = "okay";
448};
449
450&xo_board_clk {
451	clock-frequency = <38400000>;
452};
453
454/* PINCTRL - additions to nodes defined in sc8280xp.dtsi */
455
456&pmc8280_1_gpios {
457	edp_bl_en: edp-bl-en-state {
458		pins = "gpio8";
459		function = "normal";
460	};
461
462	edp_bl_reg_en: edp-bl-reg-en-state {
463		pins = "gpio9";
464		function = "normal";
465	};
466
467	misc_3p3_reg_en: misc-3p3-reg-en-state {
468		pins = "gpio1";
469		function = "normal";
470	};
471};
472
473&pmc8280_2_gpios {
474	wwan_sw_en: wwan-sw-en-state {
475		pins = "gpio1";
476		function = "normal";
477	};
478};
479
480&pmc8280c_gpios {
481	edp_bl_pwm: edp-bl-pwm-state {
482		pins = "gpio8";
483		function = "func1";
484	};
485};
486
487&pmr735a_gpios {
488	hastings_reg_en: hastings-reg-en-state {
489		pins = "gpio1";
490		function = "normal";
491	};
492};
493
494&tlmm {
495	gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
496
497	kybd_default: kybd-default-state {
498		disable-pins {
499			pins = "gpio102";
500			function = "gpio";
501			output-low;
502		};
503
504		int-n-pins {
505			pins = "gpio104";
506			function = "gpio";
507			bias-disable;
508		};
509
510		reset-pins {
511			pins = "gpio105";
512			function = "gpio";
513			bias-disable;
514		};
515	};
516
517	nvme_reg_en: nvme-reg-en-state {
518		pins = "gpio135";
519		function = "gpio";
520		drive-strength = <2>;
521		bias-disable;
522	};
523
524	pcie2a_default: pcie2a-default-state {
525		clkreq-n-pins {
526			pins = "gpio142";
527			function = "pcie2a_clkreq";
528			drive-strength = <2>;
529			bias-pull-up;
530		};
531
532		perst-n-pins {
533			pins = "gpio143";
534			function = "gpio";
535			drive-strength = <2>;
536			bias-pull-down;
537		};
538
539		wake-n-pins {
540		       pins = "gpio145";
541		       function = "gpio";
542		       drive-strength = <2>;
543		       bias-pull-up;
544	       };
545	};
546
547	pcie3a_default: pcie3a-default-state {
548		clkreq-n-pins {
549			pins = "gpio150";
550			function = "pcie3a_clkreq";
551			drive-strength = <2>;
552			bias-pull-up;
553		};
554
555		perst-n-pins {
556			pins = "gpio151";
557			function = "gpio";
558			drive-strength = <2>;
559			bias-pull-down;
560		};
561
562		wake-n-pins {
563			pins = "gpio148";
564			function = "gpio";
565			drive-strength = <2>;
566			bias-pull-up;
567		};
568	};
569
570	pcie4_default: pcie4-default-state {
571		clkreq-n-pins {
572			pins = "gpio140";
573			function = "pcie4_clkreq";
574			drive-strength = <2>;
575			bias-pull-up;
576		};
577
578		perst-n-pins {
579			pins = "gpio141";
580			function = "gpio";
581			drive-strength = <2>;
582			bias-pull-down;
583		};
584
585		wake-n-pins {
586			pins = "gpio139";
587			function = "gpio";
588			drive-strength = <2>;
589			bias-pull-up;
590		};
591	};
592
593	qup0_i2c4_default: qup0-i2c4-default-state {
594		pins = "gpio171", "gpio172";
595		function = "qup4";
596
597		bias-disable;
598		drive-strength = <16>;
599	};
600
601	qup2_i2c5_default: qup2-i2c5-default-state {
602		pins = "gpio81", "gpio82";
603		function = "qup21";
604
605		bias-disable;
606		drive-strength = <16>;
607	};
608
609	tpad_default: tpad-default-state {
610		int-n-pins {
611			pins = "gpio182";
612			function = "gpio";
613			bias-disable;
614		};
615	};
616
617	ts0_default: ts0-default-state {
618		int-n-pins {
619			pins = "gpio175";
620			function = "gpio";
621			bias-disable;
622		};
623
624		reset-n-pins {
625			pins = "gpio99";
626			function = "gpio";
627			output-high;
628			drive-strength = <16>;
629		};
630	};
631};
632