1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * sc7280 Qcard device tree source 4 * 5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if 6 * stuffed) on it. This device tree tries to encapsulate all the things that 7 * all boards using Qcard will have in common. Given that there are stuffing 8 * options, some things may be left with status "disabled" and enabled in 9 * the actual board device tree files. 10 * 11 * Copyright 2022 Google LLC. 12 */ 13 14#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 15#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 16#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 18 19#include "sc7280.dtsi" 20 21/* PMICs depend on spmi_bus label and so must come after SoC */ 22#include "pm7325.dtsi" 23#include "pm8350c.dtsi" 24#include "pmk8350.dtsi" 25 26/ { 27 aliases { 28 bluetooth0 = &bluetooth; 29 serial0 = &uart5; 30 serial1 = &uart7; 31 }; 32}; 33 34&apps_rsc { 35 /* 36 * Regulators are given labels corresponding to the various names 37 * they are referred to on schematics. They are also given labels 38 * corresponding to named voltage inputs on the SoC or components 39 * bundled with the SoC (like radio companion chips). We totally 40 * ignore it when one regulator is the input to another regulator. 41 * That's handled automatically by the initial config given to 42 * RPMH by the firmware. 43 * 44 * Regulators that the HLOS (High Level OS) doesn't touch at all 45 * are left out of here since they are managed elsewhere. 46 */ 47 48 pm7325-regulators { 49 compatible = "qcom,pm7325-rpmh-regulators"; 50 qcom,pmic-id = "b"; 51 52 vdd19_pmu_pcie_i: 53 vdd19_pmu_rfa_i: 54 vreg_s1b_1p856: smps1 { 55 regulator-min-microvolt = <1856000>; 56 regulator-max-microvolt = <2040000>; 57 }; 58 59 vdd_pmu_aon_i: 60 vdd09_pmu_rfa_i: 61 vdd095_mx_pmu: 62 vdd095_pmu: 63 vreg_s7b_0p952: smps7 { 64 regulator-min-microvolt = <535000>; 65 regulator-max-microvolt = <1120000>; 66 }; 67 68 vdd13_pmu_rfa_i: 69 vdd13_pmu_pcie_i: 70 vreg_s8b_1p256: smps8 { 71 regulator-min-microvolt = <1256000>; 72 regulator-max-microvolt = <1500000>; 73 }; 74 75 vdd_a_usbssdp_0_core: 76 vreg_l1b_0p912: ldo1 { 77 regulator-min-microvolt = <825000>; 78 regulator-max-microvolt = <925000>; 79 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 80 }; 81 82 vdd_a_usbhs_3p1: 83 vreg_l2b_3p072: ldo2 { 84 regulator-min-microvolt = <2700000>; 85 regulator-max-microvolt = <3544000>; 86 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 87 }; 88 89 vdd_a_csi_0_1_1p2: 90 vdd_a_csi_2_3_1p2: 91 vdd_a_csi_4_1p2: 92 vdd_a_dsi_0_1p2: 93 vdd_a_edp_0_1p2: 94 vdd_a_qlink_0_1p2: 95 vdd_a_qlink_1_1p2: 96 vdd_a_pcie_0_1p2: 97 vdd_a_pcie_1_1p2: 98 vdd_a_ufs_0_1p2: 99 vdd_a_usbssdp_0_1p2: 100 vreg_l6b_1p2: ldo6 { 101 regulator-min-microvolt = <1140000>; 102 regulator-max-microvolt = <1260000>; 103 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 104 }; 105 106 /* 107 * Despite the fact that this is named to be 2.5V on the 108 * schematic, it powers eMMC which doesn't accept 2.5V 109 */ 110 vreg_l7b_2p5: ldo7 { 111 regulator-min-microvolt = <2960000>; 112 regulator-max-microvolt = <2960000>; 113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 114 }; 115 116 vdd_px_wcd9385: 117 vdd_txrx: 118 vddpx_0: 119 vddpx_3: 120 vddpx_7: 121 vreg_l18b_1p8: ldo18 { 122 regulator-min-microvolt = <1800000>; 123 regulator-max-microvolt = <2000000>; 124 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 125 }; 126 127 vdd_1p8: 128 vdd_px_sdr735: 129 vdd_pxm: 130 vdd18_io: 131 vddio_px_1: 132 vddio_px_2: 133 vddio_px_3: 134 vddpx_ts: 135 vddpx_wl4otp: 136 vreg_l19b_1p8: ldo19 { 137 regulator-min-microvolt = <1800000>; 138 regulator-max-microvolt = <1800000>; 139 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 140 }; 141 }; 142 143 pm8350c-regulators { 144 compatible = "qcom,pm8350c-rpmh-regulators"; 145 qcom,pmic-id = "c"; 146 147 vdd22_wlbtpa_ch0: 148 vdd22_wlbtpa_ch1: 149 vdd22_wlbtppa_ch0: 150 vdd22_wlbtppa_ch1: 151 vdd22_wlpa5g_ch0: 152 vdd22_wlpa5g_ch1: 153 vdd22_wlppa5g_ch0: 154 vdd22_wlppa5g_ch1: 155 vreg_s1c_2p2: smps1 { 156 regulator-min-microvolt = <2190000>; 157 regulator-max-microvolt = <2210000>; 158 }; 159 160 lp4_vdd2_1p052: 161 vreg_s9c_0p676: smps9 { 162 regulator-min-microvolt = <1010000>; 163 regulator-max-microvolt = <1170000>; 164 }; 165 166 vdda_apc_cs_1p8: 167 vdda_gfx_cs_1p8: 168 vdda_turing_q6_cs_1p8: 169 vdd_a_cxo_1p8: 170 vdd_a_qrefs_1p8: 171 vdd_a_usbhs_1p8: 172 vdd_qfprom: 173 vreg_l1c_1p8: ldo1 { 174 regulator-min-microvolt = <1800000>; 175 regulator-max-microvolt = <1980000>; 176 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 177 }; 178 179 vreg_l2c_1p8: ldo2 { 180 regulator-min-microvolt = <1620000>; 181 regulator-max-microvolt = <1980000>; 182 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 183 }; 184 185 vreg_l3c_3p0: ldo3 { 186 regulator-min-microvolt = <2800000>; 187 regulator-max-microvolt = <3540000>; 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 189 }; 190 191 vddpx_5: 192 vreg_l4c_1p8_3p0: ldo4 { 193 regulator-min-microvolt = <1620000>; 194 regulator-max-microvolt = <3300000>; 195 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 196 }; 197 198 vddpx_6: 199 vreg_l5c_1p8_3p0: ldo5 { 200 regulator-min-microvolt = <1620000>; 201 regulator-max-microvolt = <3300000>; 202 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 203 }; 204 205 vddpx_2: 206 vreg_l6c_2p96: ldo6 { 207 regulator-min-microvolt = <1800000>; 208 regulator-max-microvolt = <2950000>; 209 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 210 }; 211 212 vreg_l7c_3p0: ldo7 { 213 regulator-min-microvolt = <3000000>; 214 regulator-max-microvolt = <3544000>; 215 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 216 }; 217 218 vreg_l8c_1p8: ldo8 { 219 regulator-min-microvolt = <1620000>; 220 regulator-max-microvolt = <2000000>; 221 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 222 }; 223 224 vreg_l9c_2p96: ldo9 { 225 regulator-min-microvolt = <2960000>; 226 regulator-max-microvolt = <2960000>; 227 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 228 }; 229 230 vdd_a_csi_0_1_0p9: 231 vdd_a_csi_2_3_0p9: 232 vdd_a_csi_4_0p9: 233 vdd_a_dsi_0_0p9: 234 vdd_a_dsi_0_pll_0p9: 235 vdd_a_edp_0_0p9: 236 vdd_a_gnss_0p9: 237 vdd_a_pcie_0_core: 238 vdd_a_pcie_1_core: 239 vdd_a_qlink_0_0p9: 240 vdd_a_qlink_0_0p9_ck: 241 vdd_a_qlink_1_0p9: 242 vdd_a_qlink_1_0p9_ck: 243 vdd_a_qrefs_0p875_0: 244 vdd_a_qrefs_0p875_1: 245 vdd_a_qrefs_0p875_2: 246 vdd_a_qrefs_0p875_3: 247 vdd_a_qrefs_0p875_4_5: 248 vdd_a_qrefs_0p875_6: 249 vdd_a_qrefs_0p875_7: 250 vdd_a_qrefs_0p875_8: 251 vdd_a_qrefs_0p875_9: 252 vdd_a_ufs_0_core: 253 vdd_a_usbhs_core: 254 vreg_l10c_0p88: ldo10 { 255 regulator-min-microvolt = <720000>; 256 regulator-max-microvolt = <1050000>; 257 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 258 }; 259 260 vreg_l11c_2p8: ldo11 { 261 regulator-min-microvolt = <2800000>; 262 regulator-max-microvolt = <3544000>; 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 264 }; 265 266 vreg_l12c_1p8: ldo12 { 267 regulator-min-microvolt = <1650000>; 268 regulator-max-microvolt = <2000000>; 269 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 270 }; 271 272 vreg_l13c_3p0: ldo13 { 273 regulator-min-microvolt = <2700000>; 274 regulator-max-microvolt = <3544000>; 275 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 276 }; 277 278 vdd_flash: 279 vdd_iris_rgb: 280 vdd_mic_bias: 281 vreg_bob: bob { 282 regulator-min-microvolt = <3008000>; 283 regulator-max-microvolt = <3960000>; 284 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 285 }; 286 }; 287}; 288 289/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 290 291&ipa { 292 status = "okay"; 293 modem-init; 294}; 295 296&pcie1_phy { 297 vdda-phy-supply = <&vreg_l10c_0p88>; 298 vdda-pll-supply = <&vreg_l6b_1p2>; 299}; 300 301&pmk8350_vadc { 302 pmk8350-die-temp@3 { 303 reg = <PMK8350_ADC7_DIE_TEMP>; 304 label = "pmk8350_die_temp"; 305 qcom,pre-scaling = <1 1>; 306 }; 307 308 pmr735a-die-temp@403 { 309 reg = <PMR735A_ADC7_DIE_TEMP>; 310 label = "pmr735a_die_temp"; 311 qcom,pre-scaling = <1 1>; 312 }; 313}; 314 315&qfprom { 316 vcc-supply = <&vdd_qfprom>; 317}; 318 319/* For eMMC. NOTE: not all Qcards have eMMC stuffed */ 320&sdhc_1 { 321 vmmc-supply = <&vreg_l7b_2p5>; 322 vqmmc-supply = <&vreg_l19b_1p8>; 323 324 non-removable; 325 no-sd; 326 no-sdio; 327}; 328 329uart_dbg: &uart5 { 330 compatible = "qcom,geni-debug-uart"; 331 status = "okay"; 332}; 333 334mos_bt_uart: &uart7 { 335 status = "okay"; 336 337 /delete-property/ interrupts; 338 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, 339 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; 340 pinctrl-names = "default", "sleep"; 341 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; 342 343 bluetooth: bluetooth { 344 compatible = "qcom,wcn6750-bt"; 345 pinctrl-names = "default"; 346 pinctrl-0 = <&mos_bt_en>; 347 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; 348 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; 349 vddaon-supply = <&vreg_s7b_0p952>; 350 vddbtcxmx-supply = <&vreg_s7b_0p952>; 351 vddrfacmn-supply = <&vreg_s7b_0p952>; 352 vddrfa0p8-supply = <&vreg_s7b_0p952>; 353 vddrfa1p7-supply = <&vdd19_pmu_rfa_i>; 354 vddrfa1p2-supply = <&vdd13_pmu_rfa_i>; 355 vddrfa2p2-supply = <&vreg_s1c_2p2>; 356 vddasd-supply = <&vreg_l11c_2p8>; 357 vddio-supply = <&vreg_l18b_1p8>; 358 max-speed = <3200000>; 359 }; 360}; 361 362&usb_1_hsphy { 363 vdda-pll-supply = <&vdd_a_usbhs_core>; 364 vdda33-supply = <&vdd_a_usbhs_3p1>; 365 vdda18-supply = <&vdd_a_usbhs_1p8>; 366}; 367 368&usb_1_qmpphy { 369 vdda-phy-supply = <&vdd_a_usbssdp_0_1p2>; 370 vdda-pll-supply = <&vdd_a_usbssdp_0_core>; 371}; 372 373&usb_2_hsphy { 374 vdda-pll-supply = <&vdd_a_usbhs_core>; 375 vdda33-supply = <&vdd_a_usbhs_3p1>; 376 vdda18-supply = <&vdd_a_usbhs_1p8>; 377}; 378 379/* 380 * PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES 381 * 382 * NOTE: In general if pins leave the Qcard then the pinctrl goes in the 383 * baseboard or board device tree, not here. 384 */ 385 386/* 387 * For ts_i2c 388 * 389 * Technically this i2c bus actually leaves the Qcard, but it leaves directly 390 * via the eDP connector (it doesn't hit the baseboard). The external pulls 391 * are on Qcard. 392 */ 393&qup_i2c13_data_clk { 394 /* Has external pull */ 395 bias-disable; 396 drive-strength = <2>; 397}; 398 399/* For mos_bt_uart */ 400&qup_uart7_cts { 401 /* Configure a pull-down on CTS to match the pull of the Bluetooth module. */ 402 bias-pull-down; 403}; 404 405/* For mos_bt_uart */ 406&qup_uart7_rts { 407 /* We'll drive RTS, so no pull */ 408 bias-disable; 409 drive-strength = <2>; 410}; 411 412/* For mos_bt_uart */ 413&qup_uart7_tx { 414 /* We'll drive TX, so no pull */ 415 bias-disable; 416 drive-strength = <2>; 417}; 418 419/* For mos_bt_uart */ 420&qup_uart7_rx { 421 /* 422 * Configure a pull-up on RX. This is needed to avoid 423 * garbage data when the TX pin of the Bluetooth module is 424 * in tri-state (module powered off or not driving the 425 * signal yet). 426 */ 427 bias-pull-up; 428}; 429 430/* eMMC, if stuffed, is straight on the Qcard */ 431&sdc1_clk { 432 bias-disable; 433 drive-strength = <16>; 434}; 435 436&sdc1_cmd { 437 bias-pull-up; 438 drive-strength = <10>; 439}; 440 441&sdc1_data { 442 bias-pull-up; 443 drive-strength = <10>; 444}; 445 446&sdc1_rclk { 447 bias-pull-down; 448}; 449 450/* 451 * PINCTRL - QCARD 452 * 453 * This has entries that are defined by Qcard even if they go to the main 454 * board. In cases where the pulls may be board dependent we defer those 455 * settings to the board device tree. Drive strengths tend to be assinged here 456 * but could conceivably be overwridden by board device trees. 457 */ 458 459&pm8350c_gpios { 460 pmic_edp_bl_en: pmic-edp-bl-en { 461 pins = "gpio7"; 462 function = "normal"; 463 bias-disable; 464 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 465 466 /* Force backlight to be disabled to match state at boot. */ 467 output-low; 468 }; 469 470 pmic_edp_bl_pwm: pmic-edp-bl-pwm { 471 pins = "gpio8"; 472 function = "func1"; 473 bias-disable; 474 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 475 output-low; 476 power-source = <0>; 477 }; 478}; 479 480&tlmm { 481 mos_bt_en: mos-bt-en { 482 pins = "gpio85"; 483 function = "gpio"; 484 drive-strength = <2>; 485 output-low; 486 }; 487 488 /* For mos_bt_uart */ 489 qup_uart7_sleep_cts: qup-uart7-sleep-cts { 490 pins = "gpio28"; 491 function = "gpio"; 492 /* 493 * Configure a pull-down on CTS to match the pull of 494 * the Bluetooth module. 495 */ 496 bias-pull-down; 497 }; 498 499 /* For mos_bt_uart */ 500 qup_uart7_sleep_rts: qup-uart7-sleep-rts { 501 pins = "gpio29"; 502 function = "gpio"; 503 /* 504 * Configure pull-down on RTS. As RTS is active low 505 * signal, pull it low to indicate the BT SoC that it 506 * can wakeup the system anytime from suspend state by 507 * pulling RX low (by sending wakeup bytes). 508 */ 509 bias-pull-down; 510 }; 511 512 /* For mos_bt_uart */ 513 qup_uart7_sleep_rx: qup-uart7-sleep-rx { 514 pins = "gpio31"; 515 function = "gpio"; 516 /* 517 * Configure a pull-up on RX. This is needed to avoid 518 * garbage data when the TX pin of the Bluetooth module 519 * is floating which may cause spurious wakeups. 520 */ 521 bias-pull-up; 522 }; 523 524 /* For mos_bt_uart */ 525 qup_uart7_sleep_tx: qup-uart7-sleep-tx { 526 pins = "gpio30"; 527 function = "gpio"; 528 /* 529 * Configure pull-up on TX when it isn't actively driven 530 * to prevent BT SoC from receiving garbage during sleep. 531 */ 532 bias-pull-up; 533 }; 534 535 ts_int_conn: ts-int-conn { 536 pins = "gpio55"; 537 function = "gpio"; 538 bias-pull-up; 539 }; 540 541 ts_rst_conn: ts-rst-conn { 542 pins = "gpio54"; 543 function = "gpio"; 544 bias-pull-up; 545 drive-strength = <2>; 546 }; 547}; 548