1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * sc7280 Qcard device tree source
4 *
5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if
6 * stuffed) on it. This device tree tries to encapsulate all the things that
7 * all boards using Qcard will have in common. Given that there are stuffing
8 * options, some things may be left with status "disabled" and enabled in
9 * the actual board device tree files.
10 *
11 * Copyright 2022 Google LLC.
12 */
13
14#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18
19#include "sc7280.dtsi"
20
21/* PMICs depend on spmi_bus label and so must come after SoC */
22#include "pm7325.dtsi"
23#include "pm8350c.dtsi"
24#include "pmk8350.dtsi"
25
26/ {
27	aliases {
28		bluetooth0 = &bluetooth;
29		serial0 = &uart5;
30		serial1 = &uart7;
31		wifi0 = &wifi;
32	};
33
34	wcd9385: audio-codec-1 {
35		compatible = "qcom,wcd9385-codec";
36		pinctrl-names = "default", "sleep";
37		pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38		pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
39
40		reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
41		us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
42
43		qcom,rx-device = <&wcd_rx>;
44		qcom,tx-device = <&wcd_tx>;
45
46		vdd-rxtx-supply = <&vreg_l18b_1p8>;
47		vdd-io-supply = <&vreg_l18b_1p8>;
48		vdd-buck-supply = <&vreg_l17b_1p8>;
49		vdd-mic-bias-supply = <&vreg_bob>;
50
51		qcom,micbias1-microvolt = <1800000>;
52		qcom,micbias2-microvolt = <1800000>;
53		qcom,micbias3-microvolt = <1800000>;
54		qcom,micbias4-microvolt = <1800000>;
55
56		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
57							  500000 500000 500000>;
58		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
59		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
60		#sound-dai-cells = <1>;
61
62		status = "disabled";
63	};
64
65	pm8350c_pwm_backlight: backlight {
66		compatible = "pwm-backlight";
67		status = "disabled";
68
69		enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
70		pinctrl-names = "default";
71		pinctrl-0 = <&pmic_edp_bl_en>;
72		pwms = <&pm8350c_pwm 3 65535>;
73	};
74};
75
76&apps_rsc {
77	/*
78	 * Regulators are given labels corresponding to the various names
79	 * they are referred to on schematics. They are also given labels
80	 * corresponding to named voltage inputs on the SoC or components
81	 * bundled with the SoC (like radio companion chips). We totally
82	 * ignore it when one regulator is the input to another regulator.
83	 * That's handled automatically by the initial config given to
84	 * RPMH by the firmware.
85	 *
86	 * Regulators that the HLOS (High Level OS) doesn't touch at all
87	 * are left out of here since they are managed elsewhere.
88	 */
89
90	pm7325-regulators {
91		compatible = "qcom,pm7325-rpmh-regulators";
92		qcom,pmic-id = "b";
93
94		vdd19_pmu_pcie_i:
95		vdd19_pmu_rfa_i:
96		vreg_s1b_1p856: smps1 {
97			regulator-min-microvolt = <1856000>;
98			regulator-max-microvolt = <2040000>;
99		};
100
101		vdd_pmu_aon_i:
102		vdd09_pmu_rfa_i:
103		vdd095_mx_pmu:
104		vdd095_pmu:
105		vreg_s7b_0p952: smps7 {
106			regulator-min-microvolt = <535000>;
107			regulator-max-microvolt = <1120000>;
108		};
109
110		vdd13_pmu_rfa_i:
111		vdd13_pmu_pcie_i:
112		vreg_s8b_1p256: smps8 {
113			regulator-min-microvolt = <1256000>;
114			regulator-max-microvolt = <1500000>;
115		};
116
117		vdd_a_usbssdp_0_core:
118		vreg_l1b_0p912: ldo1 {
119			regulator-min-microvolt = <825000>;
120			regulator-max-microvolt = <925000>;
121			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
122		};
123
124		vdd_a_usbhs_3p1:
125		vreg_l2b_3p072: ldo2 {
126			regulator-min-microvolt = <2700000>;
127			regulator-max-microvolt = <3544000>;
128			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
129		};
130
131		vdd_a_csi_0_1_1p2:
132		vdd_a_csi_2_3_1p2:
133		vdd_a_csi_4_1p2:
134		vdd_a_dsi_0_1p2:
135		vdd_a_edp_0_1p2:
136		vdd_a_qlink_0_1p2:
137		vdd_a_qlink_1_1p2:
138		vdd_a_pcie_0_1p2:
139		vdd_a_pcie_1_1p2:
140		vdd_a_ufs_0_1p2:
141		vdd_a_usbssdp_0_1p2:
142		vreg_l6b_1p2: ldo6 {
143			regulator-min-microvolt = <1140000>;
144			regulator-max-microvolt = <1260000>;
145			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
146		};
147
148		/*
149		 * Despite the fact that this is named to be 2.5V on the
150		 * schematic, it powers eMMC which doesn't accept 2.5V
151		 */
152		vreg_l7b_2p5: ldo7 {
153			regulator-min-microvolt = <2960000>;
154			regulator-max-microvolt = <2960000>;
155			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
156		};
157
158		vreg_l17b_1p8: ldo17 {
159			regulator-min-microvolt = <1700000>;
160			regulator-max-microvolt = <1900000>;
161			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
162		};
163
164		vdd_px_wcd9385:
165		vdd_txrx:
166		vddpx_0:
167		vddpx_3:
168		vddpx_7:
169		vreg_l18b_1p8: ldo18 {
170			regulator-min-microvolt = <1800000>;
171			regulator-max-microvolt = <2000000>;
172			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173		};
174
175		vdd_1p8:
176		vdd_px_sdr735:
177		vdd_pxm:
178		vdd18_io:
179		vddio_px_1:
180		vddio_px_2:
181		vddio_px_3:
182		vddpx_ts:
183		vddpx_wl4otp:
184		vreg_l19b_1p8: ldo19 {
185			regulator-min-microvolt = <1800000>;
186			regulator-max-microvolt = <1800000>;
187			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188		};
189	};
190
191	pm8350c-regulators {
192		compatible = "qcom,pm8350c-rpmh-regulators";
193		qcom,pmic-id = "c";
194
195		vdd22_wlbtpa_ch0:
196		vdd22_wlbtpa_ch1:
197		vdd22_wlbtppa_ch0:
198		vdd22_wlbtppa_ch1:
199		vdd22_wlpa5g_ch0:
200		vdd22_wlpa5g_ch1:
201		vdd22_wlppa5g_ch0:
202		vdd22_wlppa5g_ch1:
203		vreg_s1c_2p2: smps1 {
204			regulator-min-microvolt = <2190000>;
205			regulator-max-microvolt = <2210000>;
206		};
207
208		lp4_vdd2_1p052:
209		vreg_s9c_0p676: smps9 {
210			regulator-min-microvolt = <1010000>;
211			regulator-max-microvolt = <1170000>;
212		};
213
214		vdda_apc_cs_1p8:
215		vdda_gfx_cs_1p8:
216		vdda_turing_q6_cs_1p8:
217		vdd_a_cxo_1p8:
218		vdd_a_qrefs_1p8:
219		vdd_a_usbhs_1p8:
220		vdd_qfprom:
221		vreg_l1c_1p8: ldo1 {
222			regulator-min-microvolt = <1800000>;
223			regulator-max-microvolt = <1980000>;
224			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225		};
226
227		vreg_l2c_1p8: ldo2 {
228			regulator-min-microvolt = <1620000>;
229			regulator-max-microvolt = <1980000>;
230			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231		};
232
233		vreg_l3c_3p0: ldo3 {
234			regulator-min-microvolt = <2800000>;
235			regulator-max-microvolt = <3540000>;
236			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237		};
238
239		vddpx_5:
240		vreg_l4c_1p8_3p0: ldo4 {
241			regulator-min-microvolt = <1620000>;
242			regulator-max-microvolt = <3300000>;
243			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
244		};
245
246		vddpx_6:
247		vreg_l5c_1p8_3p0: ldo5 {
248			regulator-min-microvolt = <1620000>;
249			regulator-max-microvolt = <3300000>;
250			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
251		};
252
253		vddpx_2:
254		vreg_l6c_2p96: ldo6 {
255			regulator-min-microvolt = <1800000>;
256			regulator-max-microvolt = <2950000>;
257			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
258		};
259
260		vreg_l7c_3p0: ldo7 {
261			regulator-min-microvolt = <3000000>;
262			regulator-max-microvolt = <3544000>;
263			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
264		};
265
266		vreg_l8c_1p8: ldo8 {
267			regulator-min-microvolt = <1620000>;
268			regulator-max-microvolt = <2000000>;
269			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
270		};
271
272		vreg_l9c_2p96: ldo9 {
273			regulator-min-microvolt = <2960000>;
274			regulator-max-microvolt = <2960000>;
275			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276		};
277
278		vdd_a_csi_0_1_0p9:
279		vdd_a_csi_2_3_0p9:
280		vdd_a_csi_4_0p9:
281		vdd_a_dsi_0_0p9:
282		vdd_a_dsi_0_pll_0p9:
283		vdd_a_edp_0_0p9:
284		vdd_a_gnss_0p9:
285		vdd_a_pcie_0_core:
286		vdd_a_pcie_1_core:
287		vdd_a_qlink_0_0p9:
288		vdd_a_qlink_0_0p9_ck:
289		vdd_a_qlink_1_0p9:
290		vdd_a_qlink_1_0p9_ck:
291		vdd_a_qrefs_0p875_0:
292		vdd_a_qrefs_0p875_1:
293		vdd_a_qrefs_0p875_2:
294		vdd_a_qrefs_0p875_3:
295		vdd_a_qrefs_0p875_4_5:
296		vdd_a_qrefs_0p875_6:
297		vdd_a_qrefs_0p875_7:
298		vdd_a_qrefs_0p875_8:
299		vdd_a_qrefs_0p875_9:
300		vdd_a_ufs_0_core:
301		vdd_a_usbhs_core:
302		vreg_l10c_0p88: ldo10 {
303			regulator-min-microvolt = <720000>;
304			regulator-max-microvolt = <1050000>;
305			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
306		};
307
308		vreg_l11c_2p8: ldo11 {
309			regulator-min-microvolt = <2800000>;
310			regulator-max-microvolt = <3544000>;
311			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
312		};
313
314		vreg_l12c_1p8: ldo12 {
315			regulator-min-microvolt = <1650000>;
316			regulator-max-microvolt = <2000000>;
317			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
318		};
319
320		vreg_l13c_3p0: ldo13 {
321			regulator-min-microvolt = <2700000>;
322			regulator-max-microvolt = <3544000>;
323			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
324		};
325
326		vdd_flash:
327		vdd_iris_rgb:
328		vdd_mic_bias:
329		vreg_bob: bob {
330			regulator-min-microvolt = <3008000>;
331			regulator-max-microvolt = <3960000>;
332			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
333		};
334	};
335};
336
337/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
338
339&ipa {
340	status = "okay";
341	modem-init;
342};
343
344&lpass_va_macro {
345	vdd-micb-supply = <&vreg_bob>;
346};
347
348/* NOTE: Not all Qcards have eDP connector stuffed */
349&mdss_edp {
350	aux-bus {
351		edp_panel: panel {
352			compatible = "edp-panel";
353
354			backlight = <&pm8350c_pwm_backlight>;
355
356			ports {
357				#address-cells = <1>;
358				#size-cells = <0>;
359				port@0 {
360					reg = <0>;
361					edp_panel_in: endpoint {
362						remote-endpoint = <&mdss_edp_out>;
363					};
364				};
365			};
366		};
367	};
368};
369
370&mdss_edp_out {
371	remote-endpoint = <&edp_panel_in>;
372};
373
374&mdss_edp_phy {
375	vdda-pll-supply = <&vdd_a_edp_0_0p9>;
376	vdda-phy-supply = <&vdd_a_edp_0_1p2>;
377};
378
379&pcie1_phy {
380	vdda-phy-supply = <&vreg_l10c_0p88>;
381	vdda-pll-supply = <&vreg_l6b_1p2>;
382};
383
384&pm8350c_pwm {
385	pinctrl-names = "default";
386	pinctrl-0 = <&pmic_edp_bl_pwm>;
387};
388
389&pmk8350_vadc {
390	pmk8350-die-temp@3 {
391		reg = <PMK8350_ADC7_DIE_TEMP>;
392		label = "pmk8350_die_temp";
393		qcom,pre-scaling = <1 1>;
394	};
395
396	pmr735a-die-temp@403 {
397		reg = <PMR735A_ADC7_DIE_TEMP>;
398		label = "pmr735a_die_temp";
399		qcom,pre-scaling = <1 1>;
400	};
401};
402
403&qfprom {
404	vcc-supply = <&vdd_qfprom>;
405};
406
407/* For eMMC. NOTE: not all Qcards have eMMC stuffed */
408&sdhc_1 {
409	vmmc-supply = <&vreg_l7b_2p5>;
410	vqmmc-supply = <&vreg_l19b_1p8>;
411
412	non-removable;
413	no-sd;
414	no-sdio;
415};
416
417&swr0 {
418	wcd_rx: codec@0,4 {
419		compatible = "sdw20217010d00";
420		reg = <0 4>;
421		#sound-dai-cells = <1>;
422		qcom,rx-port-mapping = <1 2 3 4 5>;
423	};
424};
425
426&swr1 {
427	wcd_tx: codec@0,3 {
428		compatible = "sdw20217010d00";
429		reg = <0 3>;
430		#sound-dai-cells = <1>;
431		qcom,tx-port-mapping = <1 2 3 4>;
432	};
433};
434
435uart_dbg: &uart5 {
436	compatible = "qcom,geni-debug-uart";
437	status = "okay";
438};
439
440mos_bt_uart: &uart7 {
441	status = "okay";
442
443	/delete-property/ interrupts;
444	interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
445				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
446	pinctrl-names = "default", "sleep";
447	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
448
449	bluetooth: bluetooth {
450		compatible = "qcom,wcn6750-bt";
451		pinctrl-names = "default";
452		pinctrl-0 = <&mos_bt_en>;
453		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
454		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
455		vddaon-supply = <&vreg_s7b_0p952>;
456		vddbtcxmx-supply = <&vreg_s7b_0p952>;
457		vddrfacmn-supply = <&vreg_s7b_0p952>;
458		vddrfa0p8-supply = <&vreg_s7b_0p952>;
459		vddrfa1p7-supply = <&vdd19_pmu_rfa_i>;
460		vddrfa1p2-supply = <&vdd13_pmu_rfa_i>;
461		vddrfa2p2-supply = <&vreg_s1c_2p2>;
462		vddasd-supply = <&vreg_l11c_2p8>;
463		vddio-supply = <&vreg_l18b_1p8>;
464		max-speed = <3200000>;
465	};
466};
467
468&usb_1_hsphy {
469	vdda-pll-supply = <&vdd_a_usbhs_core>;
470	vdda33-supply = <&vdd_a_usbhs_3p1>;
471	vdda18-supply = <&vdd_a_usbhs_1p8>;
472};
473
474&usb_1_qmpphy {
475	vdda-phy-supply = <&vdd_a_usbssdp_0_1p2>;
476	vdda-pll-supply = <&vdd_a_usbssdp_0_core>;
477};
478
479&usb_2_hsphy {
480	vdda-pll-supply = <&vdd_a_usbhs_core>;
481	vdda33-supply = <&vdd_a_usbhs_3p1>;
482	vdda18-supply = <&vdd_a_usbhs_1p8>;
483};
484
485/*
486 * PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES
487 *
488 * NOTE: In general if pins leave the Qcard then the pinctrl goes in the
489 * baseboard or board device tree, not here.
490 */
491
492/* No external pull for eDP HPD, so set the internal one. */
493&edp_hot_plug_det {
494	bias-pull-down;
495};
496
497/*
498 * For ts_i2c
499 *
500 * Technically this i2c bus actually leaves the Qcard, but it leaves directly
501 * via the eDP connector (it doesn't hit the baseboard). The external pulls
502 * are on Qcard.
503 */
504&qup_i2c13_data_clk {
505	/* Has external pull */
506	bias-disable;
507	drive-strength = <2>;
508};
509
510/* For mos_bt_uart */
511&qup_uart7_cts {
512	/*
513	 * Configure a bias-bus-hold on CTS to lower power
514	 * usage when Bluetooth is turned off. Bus hold will
515	 * maintain a low power state regardless of whether
516	 * the Bluetooth module drives the pin in either
517	 * direction or leaves the pin fully unpowered.
518	 */
519	bias-bus-hold;
520};
521
522/* For mos_bt_uart */
523&qup_uart7_rts {
524	/* We'll drive RTS, so no pull */
525	bias-disable;
526	drive-strength = <2>;
527};
528
529/* For mos_bt_uart */
530&qup_uart7_tx {
531	/* We'll drive TX, so no pull */
532	bias-disable;
533	drive-strength = <2>;
534};
535
536/* For mos_bt_uart */
537&qup_uart7_rx {
538	/*
539	 * Configure a pull-up on RX. This is needed to avoid
540	 * garbage data when the TX pin of the Bluetooth module is
541	 * in tri-state (module powered off or not driving the
542	 * signal yet).
543	 */
544	bias-pull-up;
545};
546
547/* eMMC, if stuffed, is straight on the Qcard */
548&sdc1_clk {
549	bias-disable;
550	drive-strength = <16>;
551};
552
553&sdc1_cmd {
554	bias-pull-up;
555	drive-strength = <10>;
556};
557
558&sdc1_data {
559	bias-pull-up;
560	drive-strength = <10>;
561};
562
563&sdc1_rclk {
564	bias-pull-down;
565};
566
567/*
568 * PINCTRL - QCARD
569 *
570 * This has entries that are defined by Qcard even if they go to the main
571 * board. In cases where the pulls may be board dependent we defer those
572 * settings to the board device tree. Drive strengths tend to be assinged here
573 * but could conceivably be overwridden by board device trees.
574 */
575
576&pm8350c_gpios {
577	pmic_edp_bl_en: pmic-edp-bl-en-state {
578		pins = "gpio7";
579		function = "normal";
580		bias-disable;
581		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
582
583		/* Force backlight to be disabled to match state at boot. */
584		output-low;
585	};
586
587	pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
588		pins = "gpio8";
589		function = "func1";
590		bias-disable;
591		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
592		output-low;
593		power-source = <0>;
594	};
595};
596
597&tlmm {
598	mos_bt_en: mos-bt-en-pins {
599		pins = "gpio85";
600		function = "gpio";
601		drive-strength = <2>;
602		output-low;
603	};
604
605	/* For mos_bt_uart */
606	qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
607		pins = "gpio28";
608		function = "gpio";
609		/*
610		 * Configure a bias-bus-hold on CTS to lower power
611		 * usage when Bluetooth is turned off. Bus hold will
612		 * maintain a low power state regardless of whether
613		 * the Bluetooth module drives the pin in either
614		 * direction or leaves the pin fully unpowered.
615		 */
616		bias-bus-hold;
617	};
618
619	/* For mos_bt_uart */
620	qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
621		pins = "gpio29";
622		function = "gpio";
623		/*
624		 * Configure pull-down on RTS. As RTS is active low
625		 * signal, pull it low to indicate the BT SoC that it
626		 * can wakeup the system anytime from suspend state by
627		 * pulling RX low (by sending wakeup bytes).
628		 */
629		bias-pull-down;
630	};
631
632	/* For mos_bt_uart */
633	qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
634		pins = "gpio31";
635		function = "gpio";
636		/*
637		 * Configure a pull-up on RX. This is needed to avoid
638		 * garbage data when the TX pin of the Bluetooth module
639		 * is floating which may cause spurious wakeups.
640		 */
641		bias-pull-up;
642	};
643
644	/* For mos_bt_uart */
645	qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
646		pins = "gpio30";
647		function = "gpio";
648		/*
649		 * Configure pull-up on TX when it isn't actively driven
650		 * to prevent BT SoC from receiving garbage during sleep.
651		 */
652		bias-pull-up;
653	};
654
655	ts_int_conn: ts-int-conn-pins {
656		pins = "gpio55";
657		function = "gpio";
658		bias-pull-up;
659	};
660
661	ts_rst_conn: ts-rst-conn-pins {
662		pins = "gpio54";
663		function = "gpio";
664		drive-strength = <2>;
665	};
666
667	us_euro_hs_sel: us-euro-hs-sel {
668		pins = "gpio81";
669		function = "gpio";
670		bias-pull-down;
671		drive-strength = <2>;
672	};
673
674	wcd_reset_n: wcd-reset-n {
675		pins = "gpio83";
676		function = "gpio";
677		drive-strength = <8>;
678	};
679
680	wcd_reset_n_sleep: wcd-reset-n-sleep {
681		pins = "gpio83";
682		function = "gpio";
683		drive-strength = <8>;
684		bias-disable;
685	};
686};
687