1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * sc7280 Qcard device tree source 4 * 5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if 6 * stuffed) on it. This device tree tries to encapsulate all the things that 7 * all boards using Qcard will have in common. Given that there are stuffing 8 * options, some things may be left with status "disabled" and enabled in 9 * the actual board device tree files. 10 * 11 * Copyright 2022 Google LLC. 12 */ 13 14#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 15#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 16#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 18 19#include "sc7280.dtsi" 20 21/* PMICs depend on spmi_bus label and so must come after SoC */ 22#include "pm7325.dtsi" 23#include "pm8350c.dtsi" 24#include "pmk8350.dtsi" 25 26/ { 27 aliases { 28 bluetooth0 = &bluetooth; 29 serial0 = &uart5; 30 serial1 = &uart7; 31 wifi0 = &wifi; 32 }; 33 34 wcd9385: audio-codec-1 { 35 compatible = "qcom,wcd9385-codec"; 36 pinctrl-names = "default", "sleep"; 37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>; 38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>; 39 40 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; 41 us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 42 43 qcom,rx-device = <&wcd_rx>; 44 qcom,tx-device = <&wcd_tx>; 45 46 vdd-rxtx-supply = <&vreg_l18b_1p8>; 47 vdd-io-supply = <&vreg_l18b_1p8>; 48 vdd-buck-supply = <&vreg_l17b_1p8>; 49 vdd-mic-bias-supply = <&vreg_bob>; 50 51 qcom,micbias1-microvolt = <1800000>; 52 qcom,micbias2-microvolt = <1800000>; 53 qcom,micbias3-microvolt = <1800000>; 54 qcom,micbias4-microvolt = <1800000>; 55 56 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 57 500000 500000 500000>; 58 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 59 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 60 #sound-dai-cells = <1>; 61 62 status = "disabled"; 63 }; 64 65 pm8350c_pwm_backlight: backlight { 66 compatible = "pwm-backlight"; 67 status = "disabled"; 68 69 enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pmic_edp_bl_en>; 72 pwms = <&pm8350c_pwm 3 65535>; 73 }; 74}; 75 76&apps_rsc { 77 /* 78 * Regulators are given labels corresponding to the various names 79 * they are referred to on schematics. They are also given labels 80 * corresponding to named voltage inputs on the SoC or components 81 * bundled with the SoC (like radio companion chips). We totally 82 * ignore it when one regulator is the input to another regulator. 83 * That's handled automatically by the initial config given to 84 * RPMH by the firmware. 85 * 86 * Regulators that the HLOS (High Level OS) doesn't touch at all 87 * are left out of here since they are managed elsewhere. 88 */ 89 90 pm7325-regulators { 91 compatible = "qcom,pm7325-rpmh-regulators"; 92 qcom,pmic-id = "b"; 93 94 vdd19_pmu_pcie_i: 95 vdd19_pmu_rfa_i: 96 vreg_s1b_1p856: smps1 { 97 regulator-min-microvolt = <1856000>; 98 regulator-max-microvolt = <2040000>; 99 }; 100 101 vdd_pmu_aon_i: 102 vdd09_pmu_rfa_i: 103 vdd095_mx_pmu: 104 vdd095_pmu: 105 vreg_s7b_0p952: smps7 { 106 regulator-min-microvolt = <535000>; 107 regulator-max-microvolt = <1120000>; 108 }; 109 110 vdd13_pmu_rfa_i: 111 vdd13_pmu_pcie_i: 112 vreg_s8b_1p256: smps8 { 113 regulator-min-microvolt = <1256000>; 114 regulator-max-microvolt = <1500000>; 115 }; 116 117 vdd_a_usbssdp_0_core: 118 vreg_l1b_0p912: ldo1 { 119 regulator-min-microvolt = <825000>; 120 regulator-max-microvolt = <925000>; 121 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 122 }; 123 124 vdd_a_usbhs_3p1: 125 vreg_l2b_3p072: ldo2 { 126 regulator-min-microvolt = <2700000>; 127 regulator-max-microvolt = <3544000>; 128 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 129 }; 130 131 vdd_a_csi_0_1_1p2: 132 vdd_a_csi_2_3_1p2: 133 vdd_a_csi_4_1p2: 134 vdd_a_dsi_0_1p2: 135 vdd_a_edp_0_1p2: 136 vdd_a_qlink_0_1p2: 137 vdd_a_qlink_1_1p2: 138 vdd_a_pcie_0_1p2: 139 vdd_a_pcie_1_1p2: 140 vdd_a_ufs_0_1p2: 141 vdd_a_usbssdp_0_1p2: 142 vreg_l6b_1p2: ldo6 { 143 regulator-min-microvolt = <1140000>; 144 regulator-max-microvolt = <1260000>; 145 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 146 }; 147 148 /* 149 * Despite the fact that this is named to be 2.5V on the 150 * schematic, it powers eMMC which doesn't accept 2.5V 151 */ 152 vreg_l7b_2p5: ldo7 { 153 regulator-min-microvolt = <2960000>; 154 regulator-max-microvolt = <2960000>; 155 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 156 }; 157 158 vreg_l17b_1p8: ldo17 { 159 regulator-min-microvolt = <1700000>; 160 regulator-max-microvolt = <1900000>; 161 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 162 }; 163 164 vdd_px_wcd9385: 165 vdd_txrx: 166 vddpx_0: 167 vddpx_3: 168 vddpx_7: 169 vreg_l18b_1p8: ldo18 { 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <2000000>; 172 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 173 }; 174 175 vdd_1p8: 176 vdd_px_sdr735: 177 vdd_pxm: 178 vdd18_io: 179 vddio_px_1: 180 vddio_px_2: 181 vddio_px_3: 182 vddpx_ts: 183 vddpx_wl4otp: 184 vreg_l19b_1p8: ldo19 { 185 regulator-min-microvolt = <1800000>; 186 regulator-max-microvolt = <1800000>; 187 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 188 }; 189 }; 190 191 pm8350c-regulators { 192 compatible = "qcom,pm8350c-rpmh-regulators"; 193 qcom,pmic-id = "c"; 194 195 vdd22_wlbtpa_ch0: 196 vdd22_wlbtpa_ch1: 197 vdd22_wlbtppa_ch0: 198 vdd22_wlbtppa_ch1: 199 vdd22_wlpa5g_ch0: 200 vdd22_wlpa5g_ch1: 201 vdd22_wlppa5g_ch0: 202 vdd22_wlppa5g_ch1: 203 vreg_s1c_2p2: smps1 { 204 regulator-min-microvolt = <2190000>; 205 regulator-max-microvolt = <2210000>; 206 }; 207 208 lp4_vdd2_1p052: 209 vreg_s9c_0p676: smps9 { 210 regulator-min-microvolt = <1010000>; 211 regulator-max-microvolt = <1170000>; 212 }; 213 214 vdda_apc_cs_1p8: 215 vdda_gfx_cs_1p8: 216 vdda_turing_q6_cs_1p8: 217 vdd_a_cxo_1p8: 218 vdd_a_qrefs_1p8: 219 vdd_a_usbhs_1p8: 220 vdd_qfprom: 221 vreg_l1c_1p8: ldo1 { 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1980000>; 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 }; 226 227 vreg_l2c_1p8: ldo2 { 228 regulator-min-microvolt = <1620000>; 229 regulator-max-microvolt = <1980000>; 230 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 231 }; 232 233 vreg_l3c_3p0: ldo3 { 234 regulator-min-microvolt = <2800000>; 235 regulator-max-microvolt = <3540000>; 236 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 237 }; 238 239 vddpx_5: 240 vreg_l4c_1p8_3p0: ldo4 { 241 regulator-min-microvolt = <1620000>; 242 regulator-max-microvolt = <3300000>; 243 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 244 }; 245 246 vddpx_6: 247 vreg_l5c_1p8_3p0: ldo5 { 248 regulator-min-microvolt = <1620000>; 249 regulator-max-microvolt = <3300000>; 250 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 251 }; 252 253 vddpx_2: 254 vreg_l6c_2p96: ldo6 { 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <2950000>; 257 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 258 }; 259 260 vreg_l7c_3p0: ldo7 { 261 regulator-min-microvolt = <3000000>; 262 regulator-max-microvolt = <3544000>; 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 264 }; 265 266 vreg_l8c_1p8: ldo8 { 267 regulator-min-microvolt = <1620000>; 268 regulator-max-microvolt = <2000000>; 269 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 270 }; 271 272 vreg_l9c_2p96: ldo9 { 273 regulator-min-microvolt = <2960000>; 274 regulator-max-microvolt = <2960000>; 275 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 276 }; 277 278 vdd_a_csi_0_1_0p9: 279 vdd_a_csi_2_3_0p9: 280 vdd_a_csi_4_0p9: 281 vdd_a_dsi_0_0p9: 282 vdd_a_dsi_0_pll_0p9: 283 vdd_a_edp_0_0p9: 284 vdd_a_gnss_0p9: 285 vdd_a_pcie_0_core: 286 vdd_a_pcie_1_core: 287 vdd_a_qlink_0_0p9: 288 vdd_a_qlink_0_0p9_ck: 289 vdd_a_qlink_1_0p9: 290 vdd_a_qlink_1_0p9_ck: 291 vdd_a_qrefs_0p875_0: 292 vdd_a_qrefs_0p875_1: 293 vdd_a_qrefs_0p875_2: 294 vdd_a_qrefs_0p875_3: 295 vdd_a_qrefs_0p875_4_5: 296 vdd_a_qrefs_0p875_6: 297 vdd_a_qrefs_0p875_7: 298 vdd_a_qrefs_0p875_8: 299 vdd_a_qrefs_0p875_9: 300 vdd_a_ufs_0_core: 301 vdd_a_usbhs_core: 302 vreg_l10c_0p88: ldo10 { 303 regulator-min-microvolt = <720000>; 304 regulator-max-microvolt = <1050000>; 305 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 306 }; 307 308 vreg_l11c_2p8: ldo11 { 309 regulator-min-microvolt = <2800000>; 310 regulator-max-microvolt = <3544000>; 311 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 312 }; 313 314 vreg_l12c_1p8: ldo12 { 315 regulator-min-microvolt = <1650000>; 316 regulator-max-microvolt = <2000000>; 317 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 318 }; 319 320 vreg_l13c_3p0: ldo13 { 321 regulator-min-microvolt = <2700000>; 322 regulator-max-microvolt = <3544000>; 323 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 324 }; 325 326 vdd_flash: 327 vdd_iris_rgb: 328 vdd_mic_bias: 329 vreg_bob: bob { 330 regulator-min-microvolt = <3008000>; 331 regulator-max-microvolt = <3960000>; 332 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 333 }; 334 }; 335}; 336 337/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 338 339&lpass_va_macro { 340 vdd-micb-supply = <&vreg_bob>; 341}; 342 343/* NOTE: Not all Qcards have eDP connector stuffed */ 344&mdss_edp { 345 aux-bus { 346 edp_panel: panel { 347 compatible = "edp-panel"; 348 349 backlight = <&pm8350c_pwm_backlight>; 350 351 ports { 352 #address-cells = <1>; 353 #size-cells = <0>; 354 port@0 { 355 reg = <0>; 356 edp_panel_in: endpoint { 357 remote-endpoint = <&mdss_edp_out>; 358 }; 359 }; 360 }; 361 }; 362 }; 363}; 364 365&mdss_edp_out { 366 remote-endpoint = <&edp_panel_in>; 367}; 368 369&mdss_edp_phy { 370 vdda-pll-supply = <&vdd_a_edp_0_0p9>; 371 vdda-phy-supply = <&vdd_a_edp_0_1p2>; 372}; 373 374&pcie1_phy { 375 vdda-phy-supply = <&vreg_l10c_0p88>; 376 vdda-pll-supply = <&vreg_l6b_1p2>; 377}; 378 379&pm8350c_pwm { 380 pinctrl-names = "default"; 381 pinctrl-0 = <&pmic_edp_bl_pwm>; 382}; 383 384&pmk8350_vadc { 385 pmk8350-die-temp@3 { 386 reg = <PMK8350_ADC7_DIE_TEMP>; 387 label = "pmk8350_die_temp"; 388 qcom,pre-scaling = <1 1>; 389 }; 390 391 pmr735a-die-temp@403 { 392 reg = <PMR735A_ADC7_DIE_TEMP>; 393 label = "pmr735a_die_temp"; 394 qcom,pre-scaling = <1 1>; 395 }; 396}; 397 398&qfprom { 399 vcc-supply = <&vdd_qfprom>; 400}; 401 402/* For eMMC. NOTE: not all Qcards have eMMC stuffed */ 403&sdhc_1 { 404 vmmc-supply = <&vreg_l7b_2p5>; 405 vqmmc-supply = <&vreg_l19b_1p8>; 406 407 non-removable; 408 no-sd; 409 no-sdio; 410}; 411 412&swr0 { 413 wcd_rx: codec@0,4 { 414 compatible = "sdw20217010d00"; 415 reg = <0 4>; 416 #sound-dai-cells = <1>; 417 qcom,rx-port-mapping = <1 2 3 4 5>; 418 }; 419}; 420 421&swr1 { 422 wcd_tx: codec@0,3 { 423 compatible = "sdw20217010d00"; 424 reg = <0 3>; 425 #sound-dai-cells = <1>; 426 qcom,tx-port-mapping = <1 2 3 4>; 427 }; 428}; 429 430uart_dbg: &uart5 { 431 compatible = "qcom,geni-debug-uart"; 432 status = "okay"; 433}; 434 435mos_bt_uart: &uart7 { 436 status = "okay"; 437 438 /delete-property/ interrupts; 439 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, 440 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; 441 pinctrl-names = "default", "sleep"; 442 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; 443 444 bluetooth: bluetooth { 445 compatible = "qcom,wcn6750-bt"; 446 pinctrl-names = "default"; 447 pinctrl-0 = <&mos_bt_en>; 448 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; 449 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; 450 vddaon-supply = <&vreg_s7b_0p952>; 451 vddbtcxmx-supply = <&vreg_s7b_0p952>; 452 vddrfacmn-supply = <&vreg_s7b_0p952>; 453 vddrfa0p8-supply = <&vreg_s7b_0p952>; 454 vddrfa1p7-supply = <&vdd19_pmu_rfa_i>; 455 vddrfa1p2-supply = <&vdd13_pmu_rfa_i>; 456 vddrfa2p2-supply = <&vreg_s1c_2p2>; 457 vddasd-supply = <&vreg_l11c_2p8>; 458 vddio-supply = <&vreg_l18b_1p8>; 459 max-speed = <3200000>; 460 }; 461}; 462 463&usb_1_hsphy { 464 vdda-pll-supply = <&vdd_a_usbhs_core>; 465 vdda33-supply = <&vdd_a_usbhs_3p1>; 466 vdda18-supply = <&vdd_a_usbhs_1p8>; 467}; 468 469&usb_1_qmpphy { 470 vdda-phy-supply = <&vdd_a_usbssdp_0_1p2>; 471 vdda-pll-supply = <&vdd_a_usbssdp_0_core>; 472}; 473 474&usb_2_hsphy { 475 vdda-pll-supply = <&vdd_a_usbhs_core>; 476 vdda33-supply = <&vdd_a_usbhs_3p1>; 477 vdda18-supply = <&vdd_a_usbhs_1p8>; 478}; 479 480/* 481 * PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES 482 * 483 * NOTE: In general if pins leave the Qcard then the pinctrl goes in the 484 * baseboard or board device tree, not here. 485 */ 486 487/* No external pull for eDP HPD, so set the internal one. */ 488&edp_hot_plug_det { 489 bias-pull-down; 490}; 491 492/* 493 * For ts_i2c 494 * 495 * Technically this i2c bus actually leaves the Qcard, but it leaves directly 496 * via the eDP connector (it doesn't hit the baseboard). The external pulls 497 * are on Qcard. 498 */ 499&qup_i2c13_data_clk { 500 /* Has external pull */ 501 bias-disable; 502 drive-strength = <2>; 503}; 504 505/* For mos_bt_uart */ 506&qup_uart7_cts { 507 /* 508 * Configure a bias-bus-hold on CTS to lower power 509 * usage when Bluetooth is turned off. Bus hold will 510 * maintain a low power state regardless of whether 511 * the Bluetooth module drives the pin in either 512 * direction or leaves the pin fully unpowered. 513 */ 514 bias-bus-hold; 515}; 516 517/* For mos_bt_uart */ 518&qup_uart7_rts { 519 /* We'll drive RTS, so no pull */ 520 bias-disable; 521 drive-strength = <2>; 522}; 523 524/* For mos_bt_uart */ 525&qup_uart7_tx { 526 /* We'll drive TX, so no pull */ 527 bias-disable; 528 drive-strength = <2>; 529}; 530 531/* For mos_bt_uart */ 532&qup_uart7_rx { 533 /* 534 * Configure a pull-up on RX. This is needed to avoid 535 * garbage data when the TX pin of the Bluetooth module is 536 * in tri-state (module powered off or not driving the 537 * signal yet). 538 */ 539 bias-pull-up; 540}; 541 542/* eMMC, if stuffed, is straight on the Qcard */ 543&sdc1_clk { 544 bias-disable; 545 drive-strength = <16>; 546}; 547 548&sdc1_cmd { 549 bias-pull-up; 550 drive-strength = <10>; 551}; 552 553&sdc1_data { 554 bias-pull-up; 555 drive-strength = <10>; 556}; 557 558&sdc1_rclk { 559 bias-pull-down; 560}; 561 562/* 563 * PINCTRL - QCARD 564 * 565 * This has entries that are defined by Qcard even if they go to the main 566 * board. In cases where the pulls may be board dependent we defer those 567 * settings to the board device tree. Drive strengths tend to be assinged here 568 * but could conceivably be overwridden by board device trees. 569 */ 570 571&pm8350c_gpios { 572 pmic_edp_bl_en: pmic-edp-bl-en-state { 573 pins = "gpio7"; 574 function = "normal"; 575 bias-disable; 576 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 577 578 /* Force backlight to be disabled to match state at boot. */ 579 output-low; 580 }; 581 582 pmic_edp_bl_pwm: pmic-edp-bl-pwm-state { 583 pins = "gpio8"; 584 function = "func1"; 585 bias-disable; 586 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 587 output-low; 588 power-source = <0>; 589 }; 590}; 591 592&tlmm { 593 mos_bt_en: mos-bt-en-state { 594 pins = "gpio85"; 595 function = "gpio"; 596 drive-strength = <2>; 597 output-low; 598 }; 599 600 /* For mos_bt_uart */ 601 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { 602 pins = "gpio28"; 603 function = "gpio"; 604 /* 605 * Configure a bias-bus-hold on CTS to lower power 606 * usage when Bluetooth is turned off. Bus hold will 607 * maintain a low power state regardless of whether 608 * the Bluetooth module drives the pin in either 609 * direction or leaves the pin fully unpowered. 610 */ 611 bias-bus-hold; 612 }; 613 614 /* For mos_bt_uart */ 615 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { 616 pins = "gpio29"; 617 function = "gpio"; 618 /* 619 * Configure pull-down on RTS. As RTS is active low 620 * signal, pull it low to indicate the BT SoC that it 621 * can wakeup the system anytime from suspend state by 622 * pulling RX low (by sending wakeup bytes). 623 */ 624 bias-pull-down; 625 }; 626 627 /* For mos_bt_uart */ 628 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { 629 pins = "gpio31"; 630 function = "gpio"; 631 /* 632 * Configure a pull-up on RX. This is needed to avoid 633 * garbage data when the TX pin of the Bluetooth module 634 * is floating which may cause spurious wakeups. 635 */ 636 bias-pull-up; 637 }; 638 639 /* For mos_bt_uart */ 640 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { 641 pins = "gpio30"; 642 function = "gpio"; 643 /* 644 * Configure pull-up on TX when it isn't actively driven 645 * to prevent BT SoC from receiving garbage during sleep. 646 */ 647 bias-pull-up; 648 }; 649 650 ts_int_conn: ts-int-conn-state { 651 pins = "gpio55"; 652 function = "gpio"; 653 bias-pull-up; 654 }; 655 656 ts_rst_conn: ts-rst-conn-state { 657 pins = "gpio54"; 658 function = "gpio"; 659 drive-strength = <2>; 660 }; 661 662 us_euro_hs_sel: us-euro-hs-sel-state { 663 pins = "gpio81"; 664 function = "gpio"; 665 bias-pull-down; 666 drive-strength = <2>; 667 }; 668 669 wcd_reset_n: wcd-reset-n-state { 670 pins = "gpio83"; 671 function = "gpio"; 672 drive-strength = <8>; 673 }; 674 675 wcd_reset_n_sleep: wcd-reset-n-sleep-state { 676 pins = "gpio83"; 677 function = "gpio"; 678 drive-strength = <8>; 679 bias-disable; 680 }; 681}; 682