xref: /openbmc/linux/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi (revision 36a7b63f069630e854beb305e99c151cddd3b8e5)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * sc7280 Qcard device tree source
4 *
5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if
6 * stuffed) on it. This device tree tries to encapsulate all the things that
7 * all boards using Qcard will have in common. Given that there are stuffing
8 * options, some things may be left with status "disabled" and enabled in
9 * the actual board device tree files.
10 *
11 * Copyright 2022 Google LLC.
12 */
13
14#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18
19#include "sc7280.dtsi"
20
21/* PMICs depend on spmi_bus label and so must come after SoC */
22#include "pm7325.dtsi"
23#include "pm8350c.dtsi"
24#include "pmk8350.dtsi"
25
26/ {
27	aliases {
28		bluetooth0 = &bluetooth;
29		serial0 = &uart5;
30		serial1 = &uart7;
31	};
32
33	pm8350c_pwm_backlight: backlight {
34		compatible = "pwm-backlight";
35		status = "disabled";
36
37		enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
38		pinctrl-names = "default";
39		pinctrl-0 = <&pmic_edp_bl_en>;
40		pwms = <&pm8350c_pwm 3 65535>;
41	};
42};
43
44&apps_rsc {
45	/*
46	 * Regulators are given labels corresponding to the various names
47	 * they are referred to on schematics. They are also given labels
48	 * corresponding to named voltage inputs on the SoC or components
49	 * bundled with the SoC (like radio companion chips). We totally
50	 * ignore it when one regulator is the input to another regulator.
51	 * That's handled automatically by the initial config given to
52	 * RPMH by the firmware.
53	 *
54	 * Regulators that the HLOS (High Level OS) doesn't touch at all
55	 * are left out of here since they are managed elsewhere.
56	 */
57
58	pm7325-regulators {
59		compatible = "qcom,pm7325-rpmh-regulators";
60		qcom,pmic-id = "b";
61
62		vdd19_pmu_pcie_i:
63		vdd19_pmu_rfa_i:
64		vreg_s1b_1p856: smps1 {
65			regulator-min-microvolt = <1856000>;
66			regulator-max-microvolt = <2040000>;
67		};
68
69		vdd_pmu_aon_i:
70		vdd09_pmu_rfa_i:
71		vdd095_mx_pmu:
72		vdd095_pmu:
73		vreg_s7b_0p952: smps7 {
74			regulator-min-microvolt = <535000>;
75			regulator-max-microvolt = <1120000>;
76		};
77
78		vdd13_pmu_rfa_i:
79		vdd13_pmu_pcie_i:
80		vreg_s8b_1p256: smps8 {
81			regulator-min-microvolt = <1256000>;
82			regulator-max-microvolt = <1500000>;
83		};
84
85		vdd_a_usbssdp_0_core:
86		vreg_l1b_0p912: ldo1 {
87			regulator-min-microvolt = <825000>;
88			regulator-max-microvolt = <925000>;
89			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
90		};
91
92		vdd_a_usbhs_3p1:
93		vreg_l2b_3p072: ldo2 {
94			regulator-min-microvolt = <2700000>;
95			regulator-max-microvolt = <3544000>;
96			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
97		};
98
99		vdd_a_csi_0_1_1p2:
100		vdd_a_csi_2_3_1p2:
101		vdd_a_csi_4_1p2:
102		vdd_a_dsi_0_1p2:
103		vdd_a_edp_0_1p2:
104		vdd_a_qlink_0_1p2:
105		vdd_a_qlink_1_1p2:
106		vdd_a_pcie_0_1p2:
107		vdd_a_pcie_1_1p2:
108		vdd_a_ufs_0_1p2:
109		vdd_a_usbssdp_0_1p2:
110		vreg_l6b_1p2: ldo6 {
111			regulator-min-microvolt = <1140000>;
112			regulator-max-microvolt = <1260000>;
113			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
114		};
115
116		/*
117		 * Despite the fact that this is named to be 2.5V on the
118		 * schematic, it powers eMMC which doesn't accept 2.5V
119		 */
120		vreg_l7b_2p5: ldo7 {
121			regulator-min-microvolt = <2960000>;
122			regulator-max-microvolt = <2960000>;
123			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
124		};
125
126		vreg_l17b_1p8: ldo17 {
127			regulator-min-microvolt = <1700000>;
128			regulator-max-microvolt = <1900000>;
129			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
130		};
131
132		vdd_px_wcd9385:
133		vdd_txrx:
134		vddpx_0:
135		vddpx_3:
136		vddpx_7:
137		vreg_l18b_1p8: ldo18 {
138			regulator-min-microvolt = <1800000>;
139			regulator-max-microvolt = <2000000>;
140			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
141		};
142
143		vdd_1p8:
144		vdd_px_sdr735:
145		vdd_pxm:
146		vdd18_io:
147		vddio_px_1:
148		vddio_px_2:
149		vddio_px_3:
150		vddpx_ts:
151		vddpx_wl4otp:
152		vreg_l19b_1p8: ldo19 {
153			regulator-min-microvolt = <1800000>;
154			regulator-max-microvolt = <1800000>;
155			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
156		};
157	};
158
159	pm8350c-regulators {
160		compatible = "qcom,pm8350c-rpmh-regulators";
161		qcom,pmic-id = "c";
162
163		vdd22_wlbtpa_ch0:
164		vdd22_wlbtpa_ch1:
165		vdd22_wlbtppa_ch0:
166		vdd22_wlbtppa_ch1:
167		vdd22_wlpa5g_ch0:
168		vdd22_wlpa5g_ch1:
169		vdd22_wlppa5g_ch0:
170		vdd22_wlppa5g_ch1:
171		vreg_s1c_2p2: smps1 {
172			regulator-min-microvolt = <2190000>;
173			regulator-max-microvolt = <2210000>;
174		};
175
176		lp4_vdd2_1p052:
177		vreg_s9c_0p676: smps9 {
178			regulator-min-microvolt = <1010000>;
179			regulator-max-microvolt = <1170000>;
180		};
181
182		vdda_apc_cs_1p8:
183		vdda_gfx_cs_1p8:
184		vdda_turing_q6_cs_1p8:
185		vdd_a_cxo_1p8:
186		vdd_a_qrefs_1p8:
187		vdd_a_usbhs_1p8:
188		vdd_qfprom:
189		vreg_l1c_1p8: ldo1 {
190			regulator-min-microvolt = <1800000>;
191			regulator-max-microvolt = <1980000>;
192			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
193		};
194
195		vreg_l2c_1p8: ldo2 {
196			regulator-min-microvolt = <1620000>;
197			regulator-max-microvolt = <1980000>;
198			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199		};
200
201		vreg_l3c_3p0: ldo3 {
202			regulator-min-microvolt = <2800000>;
203			regulator-max-microvolt = <3540000>;
204			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205		};
206
207		vddpx_5:
208		vreg_l4c_1p8_3p0: ldo4 {
209			regulator-min-microvolt = <1620000>;
210			regulator-max-microvolt = <3300000>;
211			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212		};
213
214		vddpx_6:
215		vreg_l5c_1p8_3p0: ldo5 {
216			regulator-min-microvolt = <1620000>;
217			regulator-max-microvolt = <3300000>;
218			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219		};
220
221		vddpx_2:
222		vreg_l6c_2p96: ldo6 {
223			regulator-min-microvolt = <1800000>;
224			regulator-max-microvolt = <2950000>;
225			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
226		};
227
228		vreg_l7c_3p0: ldo7 {
229			regulator-min-microvolt = <3000000>;
230			regulator-max-microvolt = <3544000>;
231			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
232		};
233
234		vreg_l8c_1p8: ldo8 {
235			regulator-min-microvolt = <1620000>;
236			regulator-max-microvolt = <2000000>;
237			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
238		};
239
240		vreg_l9c_2p96: ldo9 {
241			regulator-min-microvolt = <2960000>;
242			regulator-max-microvolt = <2960000>;
243			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
244		};
245
246		vdd_a_csi_0_1_0p9:
247		vdd_a_csi_2_3_0p9:
248		vdd_a_csi_4_0p9:
249		vdd_a_dsi_0_0p9:
250		vdd_a_dsi_0_pll_0p9:
251		vdd_a_edp_0_0p9:
252		vdd_a_gnss_0p9:
253		vdd_a_pcie_0_core:
254		vdd_a_pcie_1_core:
255		vdd_a_qlink_0_0p9:
256		vdd_a_qlink_0_0p9_ck:
257		vdd_a_qlink_1_0p9:
258		vdd_a_qlink_1_0p9_ck:
259		vdd_a_qrefs_0p875_0:
260		vdd_a_qrefs_0p875_1:
261		vdd_a_qrefs_0p875_2:
262		vdd_a_qrefs_0p875_3:
263		vdd_a_qrefs_0p875_4_5:
264		vdd_a_qrefs_0p875_6:
265		vdd_a_qrefs_0p875_7:
266		vdd_a_qrefs_0p875_8:
267		vdd_a_qrefs_0p875_9:
268		vdd_a_ufs_0_core:
269		vdd_a_usbhs_core:
270		vreg_l10c_0p88: ldo10 {
271			regulator-min-microvolt = <720000>;
272			regulator-max-microvolt = <1050000>;
273			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274		};
275
276		vreg_l11c_2p8: ldo11 {
277			regulator-min-microvolt = <2800000>;
278			regulator-max-microvolt = <3544000>;
279			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280		};
281
282		vreg_l12c_1p8: ldo12 {
283			regulator-min-microvolt = <1650000>;
284			regulator-max-microvolt = <2000000>;
285			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
286		};
287
288		vreg_l13c_3p0: ldo13 {
289			regulator-min-microvolt = <2700000>;
290			regulator-max-microvolt = <3544000>;
291			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292		};
293
294		vdd_flash:
295		vdd_iris_rgb:
296		vdd_mic_bias:
297		vreg_bob: bob {
298			regulator-min-microvolt = <3008000>;
299			regulator-max-microvolt = <3960000>;
300			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
301		};
302	};
303};
304
305/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
306
307&ipa {
308	status = "okay";
309	modem-init;
310};
311
312/* NOTE: Not all Qcards have eDP connector stuffed */
313&mdss_edp {
314	vdda-0p9-supply = <&vdd_a_edp_0_0p9>;
315	vdda-1p2-supply = <&vdd_a_edp_0_1p2>;
316
317	aux-bus {
318		edp_panel: panel {
319			compatible = "edp-panel";
320
321			backlight = <&pm8350c_pwm_backlight>;
322
323			ports {
324				#address-cells = <1>;
325				#size-cells = <0>;
326				port@0 {
327					reg = <0>;
328					edp_panel_in: endpoint {
329						remote-endpoint = <&mdss_edp_out>;
330					};
331				};
332			};
333		};
334	};
335};
336
337&mdss_edp_out {
338	remote-endpoint = <&edp_panel_in>;
339};
340
341&mdss_edp_phy {
342	vdda-pll-supply = <&vdd_a_edp_0_0p9>;
343	vdda-phy-supply = <&vdd_a_edp_0_1p2>;
344};
345
346&pcie1_phy {
347	vdda-phy-supply = <&vreg_l10c_0p88>;
348	vdda-pll-supply = <&vreg_l6b_1p2>;
349};
350
351&pm8350c_pwm {
352	pinctrl-names = "default";
353	pinctrl-0 = <&pmic_edp_bl_pwm>;
354};
355
356&pmk8350_vadc {
357	pmk8350-die-temp@3 {
358		reg = <PMK8350_ADC7_DIE_TEMP>;
359		label = "pmk8350_die_temp";
360		qcom,pre-scaling = <1 1>;
361	};
362
363	pmr735a-die-temp@403 {
364		reg = <PMR735A_ADC7_DIE_TEMP>;
365		label = "pmr735a_die_temp";
366		qcom,pre-scaling = <1 1>;
367	};
368};
369
370&qfprom {
371	vcc-supply = <&vdd_qfprom>;
372};
373
374/* For eMMC. NOTE: not all Qcards have eMMC stuffed */
375&sdhc_1 {
376	vmmc-supply = <&vreg_l7b_2p5>;
377	vqmmc-supply = <&vreg_l19b_1p8>;
378
379	non-removable;
380	no-sd;
381	no-sdio;
382};
383
384uart_dbg: &uart5 {
385	compatible = "qcom,geni-debug-uart";
386	status = "okay";
387};
388
389mos_bt_uart: &uart7 {
390	status = "okay";
391
392	/delete-property/ interrupts;
393	interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
394				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
395	pinctrl-names = "default", "sleep";
396	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
397
398	bluetooth: bluetooth {
399		compatible = "qcom,wcn6750-bt";
400		pinctrl-names = "default";
401		pinctrl-0 = <&mos_bt_en>;
402		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
403		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
404		vddaon-supply = <&vreg_s7b_0p952>;
405		vddbtcxmx-supply = <&vreg_s7b_0p952>;
406		vddrfacmn-supply = <&vreg_s7b_0p952>;
407		vddrfa0p8-supply = <&vreg_s7b_0p952>;
408		vddrfa1p7-supply = <&vdd19_pmu_rfa_i>;
409		vddrfa1p2-supply = <&vdd13_pmu_rfa_i>;
410		vddrfa2p2-supply = <&vreg_s1c_2p2>;
411		vddasd-supply = <&vreg_l11c_2p8>;
412		vddio-supply = <&vreg_l18b_1p8>;
413		max-speed = <3200000>;
414	};
415};
416
417&usb_1_hsphy {
418	vdda-pll-supply = <&vdd_a_usbhs_core>;
419	vdda33-supply = <&vdd_a_usbhs_3p1>;
420	vdda18-supply = <&vdd_a_usbhs_1p8>;
421};
422
423&usb_1_qmpphy {
424	vdda-phy-supply = <&vdd_a_usbssdp_0_1p2>;
425	vdda-pll-supply = <&vdd_a_usbssdp_0_core>;
426};
427
428&usb_2_hsphy {
429	vdda-pll-supply = <&vdd_a_usbhs_core>;
430	vdda33-supply = <&vdd_a_usbhs_3p1>;
431	vdda18-supply = <&vdd_a_usbhs_1p8>;
432};
433
434/*
435 * PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES
436 *
437 * NOTE: In general if pins leave the Qcard then the pinctrl goes in the
438 * baseboard or board device tree, not here.
439 */
440
441/* No external pull for eDP HPD, so set the internal one. */
442&edp_hot_plug_det {
443	bias-pull-down;
444};
445
446/*
447 * For ts_i2c
448 *
449 * Technically this i2c bus actually leaves the Qcard, but it leaves directly
450 * via the eDP connector (it doesn't hit the baseboard). The external pulls
451 * are on Qcard.
452 */
453&qup_i2c13_data_clk {
454	/* Has external pull */
455	bias-disable;
456	drive-strength = <2>;
457};
458
459/* For mos_bt_uart */
460&qup_uart7_cts {
461	/*
462	 * Configure a bias-bus-hold on CTS to lower power
463	 * usage when Bluetooth is turned off. Bus hold will
464	 * maintain a low power state regardless of whether
465	 * the Bluetooth module drives the pin in either
466	 * direction or leaves the pin fully unpowered.
467	 */
468	bias-bus-hold;
469};
470
471/* For mos_bt_uart */
472&qup_uart7_rts {
473	/* We'll drive RTS, so no pull */
474	bias-disable;
475	drive-strength = <2>;
476};
477
478/* For mos_bt_uart */
479&qup_uart7_tx {
480	/* We'll drive TX, so no pull */
481	bias-disable;
482	drive-strength = <2>;
483};
484
485/* For mos_bt_uart */
486&qup_uart7_rx {
487	/*
488	 * Configure a pull-up on RX. This is needed to avoid
489	 * garbage data when the TX pin of the Bluetooth module is
490	 * in tri-state (module powered off or not driving the
491	 * signal yet).
492	 */
493	bias-pull-up;
494};
495
496/* eMMC, if stuffed, is straight on the Qcard */
497&sdc1_clk {
498	bias-disable;
499	drive-strength = <16>;
500};
501
502&sdc1_cmd {
503	bias-pull-up;
504	drive-strength = <10>;
505};
506
507&sdc1_data {
508	bias-pull-up;
509	drive-strength = <10>;
510};
511
512&sdc1_rclk {
513	bias-pull-down;
514};
515
516/*
517 * PINCTRL - QCARD
518 *
519 * This has entries that are defined by Qcard even if they go to the main
520 * board. In cases where the pulls may be board dependent we defer those
521 * settings to the board device tree. Drive strengths tend to be assinged here
522 * but could conceivably be overwridden by board device trees.
523 */
524
525&pm8350c_gpios {
526	pmic_edp_bl_en: pmic-edp-bl-en-state {
527		pins = "gpio7";
528		function = "normal";
529		bias-disable;
530		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
531
532		/* Force backlight to be disabled to match state at boot. */
533		output-low;
534	};
535
536	pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
537		pins = "gpio8";
538		function = "func1";
539		bias-disable;
540		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
541		output-low;
542		power-source = <0>;
543	};
544};
545
546&tlmm {
547	mos_bt_en: mos-bt-en {
548		pins = "gpio85";
549		function = "gpio";
550		drive-strength = <2>;
551		output-low;
552	};
553
554	/* For mos_bt_uart */
555	qup_uart7_sleep_cts: qup-uart7-sleep-cts {
556		pins = "gpio28";
557		function = "gpio";
558		/*
559		 * Configure a bias-bus-hold on CTS to lower power
560		 * usage when Bluetooth is turned off. Bus hold will
561		 * maintain a low power state regardless of whether
562		 * the Bluetooth module drives the pin in either
563		 * direction or leaves the pin fully unpowered.
564		 */
565		bias-bus-hold;
566	};
567
568	/* For mos_bt_uart */
569	qup_uart7_sleep_rts: qup-uart7-sleep-rts {
570		pins = "gpio29";
571		function = "gpio";
572		/*
573		 * Configure pull-down on RTS. As RTS is active low
574		 * signal, pull it low to indicate the BT SoC that it
575		 * can wakeup the system anytime from suspend state by
576		 * pulling RX low (by sending wakeup bytes).
577		 */
578		bias-pull-down;
579	};
580
581	/* For mos_bt_uart */
582	qup_uart7_sleep_rx: qup-uart7-sleep-rx {
583		pins = "gpio31";
584		function = "gpio";
585		/*
586		 * Configure a pull-up on RX. This is needed to avoid
587		 * garbage data when the TX pin of the Bluetooth module
588		 * is floating which may cause spurious wakeups.
589		 */
590		bias-pull-up;
591	};
592
593	/* For mos_bt_uart */
594	qup_uart7_sleep_tx: qup-uart7-sleep-tx {
595		pins = "gpio30";
596		function = "gpio";
597		/*
598		 * Configure pull-up on TX when it isn't actively driven
599		 * to prevent BT SoC from receiving garbage during sleep.
600		 */
601		bias-pull-up;
602	};
603
604	ts_int_conn: ts-int-conn {
605		pins = "gpio55";
606		function = "gpio";
607		bias-pull-up;
608	};
609
610	ts_rst_conn: ts-rst-conn {
611		pins = "gpio54";
612		function = "gpio";
613		drive-strength = <2>;
614	};
615};
616