1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * sc7280 IDP board device tree source (common between SKU1 and SKU2) 4 * 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 6 */ 7 8#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9#include <dt-bindings/input/linux-event-codes.h> 10#include "sc7280.dtsi" 11#include "pm7325.dtsi" 12#include "pm8350c.dtsi" 13#include "pmk8350.dtsi" 14 15#include "sc7280-chrome-common.dtsi" 16#include "sc7280-herobrine-lte-sku.dtsi" 17 18/ { 19 aliases { 20 bluetooth0 = &bluetooth; 21 serial1 = &uart7; 22 wifi0 = &wifi; 23 }; 24 25 max98360a: audio-codec-0 { 26 compatible = "maxim,max98360a"; 27 pinctrl-names = "default"; 28 pinctrl-0 = <&_en>; 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 30 #sound-dai-cells = <0>; 31 }; 32 33 wcd9385: audio-codec-1 { 34 compatible = "qcom,wcd9385-codec"; 35 pinctrl-names = "default", "sleep"; 36 pinctrl-0 = <&wcd_reset_n>; 37 pinctrl-1 = <&wcd_reset_n_sleep>; 38 39 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; 40 41 qcom,rx-device = <&wcd_rx>; 42 qcom,tx-device = <&wcd_tx>; 43 44 vdd-rxtx-supply = <&vreg_l18b_1p8>; 45 vdd-io-supply = <&vreg_l18b_1p8>; 46 vdd-buck-supply = <&vreg_l17b_1p8>; 47 vdd-mic-bias-supply = <&vreg_bob>; 48 49 qcom,micbias1-microvolt = <1800000>; 50 qcom,micbias2-microvolt = <1800000>; 51 qcom,micbias3-microvolt = <1800000>; 52 qcom,micbias4-microvolt = <1800000>; 53 54 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 55 500000 500000 500000>; 56 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 57 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 58 #sound-dai-cells = <1>; 59 }; 60 61 gpio-keys { 62 compatible = "gpio-keys"; 63 label = "gpio-keys"; 64 65 pinctrl-names = "default"; 66 pinctrl-0 = <&key_vol_up_default>; 67 68 key-volume-up { 69 label = "volume_up"; 70 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; 71 linux,input-type = <1>; 72 linux,code = <KEY_VOLUMEUP>; 73 gpio-key,wakeup; 74 debounce-interval = <15>; 75 linux,can-disable; 76 }; 77 }; 78 79 nvme_3v3_regulator: nvme-3v3-regulator { 80 compatible = "regulator-fixed"; 81 regulator-name = "VLDO_3V3"; 82 83 regulator-min-microvolt = <3300000>; 84 regulator-max-microvolt = <3300000>; 85 86 enable-active-high; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&nvme_pwren>; 89 }; 90 91 sound: sound { 92 compatible = "google,sc7280-herobrine"; 93 model = "sc7280-wcd938x-max98360a-1mic"; 94 95 audio-routing = 96 "IN1_HPHL", "HPHL_OUT", 97 "IN2_HPHR", "HPHR_OUT", 98 "AMIC1", "MIC BIAS1", 99 "AMIC2", "MIC BIAS2", 100 "VA DMIC0", "MIC BIAS3", 101 "VA DMIC1", "MIC BIAS3", 102 "VA DMIC2", "MIC BIAS1", 103 "VA DMIC3", "MIC BIAS1", 104 "TX SWR_ADC0", "ADC1_OUTPUT", 105 "TX SWR_ADC1", "ADC2_OUTPUT", 106 "TX SWR_ADC2", "ADC3_OUTPUT", 107 "TX SWR_DMIC0", "DMIC1_OUTPUT", 108 "TX SWR_DMIC1", "DMIC2_OUTPUT", 109 "TX SWR_DMIC2", "DMIC3_OUTPUT", 110 "TX SWR_DMIC3", "DMIC4_OUTPUT", 111 "TX SWR_DMIC4", "DMIC5_OUTPUT", 112 "TX SWR_DMIC5", "DMIC6_OUTPUT", 113 "TX SWR_DMIC6", "DMIC7_OUTPUT", 114 "TX SWR_DMIC7", "DMIC8_OUTPUT"; 115 116 qcom,msm-mbhc-hphl-swh = <1>; 117 qcom,msm-mbhc-gnd-swh = <1>; 118 119 #address-cells = <1>; 120 #size-cells = <0>; 121 #sound-dai-cells = <0>; 122 123 dai-link@0 { 124 link-name = "MAX98360A"; 125 reg = <0>; 126 127 cpu { 128 sound-dai = <&lpass_cpu MI2S_SECONDARY>; 129 }; 130 131 codec { 132 sound-dai = <&max98360a>; 133 }; 134 }; 135 136 dai-link@1 { 137 link-name = "DisplayPort"; 138 reg = <1>; 139 140 cpu { 141 sound-dai = <&lpass_cpu LPASS_DP_RX>; 142 }; 143 144 codec { 145 sound-dai = <&mdss_dp>; 146 }; 147 }; 148 149 dai-link@2 { 150 link-name = "WCD9385 Playback"; 151 reg = <2>; 152 153 cpu { 154 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>; 155 }; 156 157 codec { 158 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; 159 }; 160 }; 161 162 dai-link@3 { 163 link-name = "WCD9385 Capture"; 164 reg = <3>; 165 166 cpu { 167 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>; 168 }; 169 170 codec { 171 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; 172 }; 173 }; 174 175 dai-link@4 { 176 link-name = "DMIC"; 177 reg = <4>; 178 179 cpu { 180 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; 181 }; 182 183 codec { 184 sound-dai = <&lpass_va_macro 0>; 185 }; 186 }; 187 }; 188}; 189 190&apps_rsc { 191 pm7325-regulators { 192 compatible = "qcom,pm7325-rpmh-regulators"; 193 qcom,pmic-id = "b"; 194 195 vreg_s1b_1p8: smps1 { 196 regulator-min-microvolt = <1856000>; 197 regulator-max-microvolt = <2040000>; 198 }; 199 200 vreg_s7b_0p9: smps7 { 201 regulator-min-microvolt = <535000>; 202 regulator-max-microvolt = <1120000>; 203 }; 204 205 vreg_s8b_1p2: smps8 { 206 regulator-min-microvolt = <1256000>; 207 regulator-max-microvolt = <1500000>; 208 }; 209 210 vreg_l1b_0p8: ldo1 { 211 regulator-min-microvolt = <825000>; 212 regulator-max-microvolt = <925000>; 213 }; 214 215 vreg_l2b_3p0: ldo2 { 216 regulator-min-microvolt = <2700000>; 217 regulator-max-microvolt = <3544000>; 218 }; 219 220 vreg_l6b_1p2: ldo6 { 221 regulator-min-microvolt = <1140000>; 222 regulator-max-microvolt = <1260000>; 223 }; 224 225 vreg_l7b_2p9: ldo7 { 226 regulator-min-microvolt = <2960000>; 227 regulator-max-microvolt = <2960000>; 228 }; 229 230 vreg_l8b_0p9: ldo8 { 231 regulator-min-microvolt = <870000>; 232 regulator-max-microvolt = <970000>; 233 }; 234 235 vreg_l9b_1p2: ldo9 { 236 regulator-min-microvolt = <1080000>; 237 regulator-max-microvolt = <1304000>; 238 }; 239 240 vreg_l11b_1p7: ldo11 { 241 regulator-min-microvolt = <1504000>; 242 regulator-max-microvolt = <2000000>; 243 }; 244 245 vreg_l12b_0p8: ldo12 { 246 regulator-min-microvolt = <751000>; 247 regulator-max-microvolt = <824000>; 248 }; 249 250 vreg_l13b_0p8: ldo13 { 251 regulator-min-microvolt = <530000>; 252 regulator-max-microvolt = <824000>; 253 }; 254 255 vreg_l14b_1p2: ldo14 { 256 regulator-min-microvolt = <1080000>; 257 regulator-max-microvolt = <1304000>; 258 }; 259 260 vreg_l15b_0p8: ldo15 { 261 regulator-min-microvolt = <765000>; 262 regulator-max-microvolt = <1020000>; 263 }; 264 265 vreg_l16b_1p2: ldo16 { 266 regulator-min-microvolt = <1100000>; 267 regulator-max-microvolt = <1300000>; 268 }; 269 270 vreg_l17b_1p8: ldo17 { 271 regulator-min-microvolt = <1700000>; 272 regulator-max-microvolt = <1900000>; 273 }; 274 275 vreg_l18b_1p8: ldo18 { 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <2000000>; 278 }; 279 280 vreg_l19b_1p8: ldo19 { 281 regulator-min-microvolt = <1800000>; 282 regulator-max-microvolt = <1800000>; 283 }; 284 }; 285 286 pm8350c-regulators { 287 compatible = "qcom,pm8350c-rpmh-regulators"; 288 qcom,pmic-id = "c"; 289 290 vreg_s1c_2p2: smps1 { 291 regulator-min-microvolt = <2190000>; 292 regulator-max-microvolt = <2210000>; 293 }; 294 295 vreg_s9c_1p0: smps9 { 296 regulator-min-microvolt = <1010000>; 297 regulator-max-microvolt = <1170000>; 298 }; 299 300 vreg_l1c_1p8: ldo1 { 301 regulator-min-microvolt = <1800000>; 302 regulator-max-microvolt = <1980000>; 303 }; 304 305 vreg_l2c_1p8: ldo2 { 306 regulator-min-microvolt = <1620000>; 307 regulator-max-microvolt = <1980000>; 308 }; 309 310 vreg_l3c_3p0: ldo3 { 311 regulator-min-microvolt = <2800000>; 312 regulator-max-microvolt = <3540000>; 313 }; 314 315 vreg_l4c_1p8: ldo4 { 316 regulator-min-microvolt = <1620000>; 317 regulator-max-microvolt = <3300000>; 318 }; 319 320 vreg_l5c_1p8: ldo5 { 321 regulator-min-microvolt = <1620000>; 322 regulator-max-microvolt = <3300000>; 323 }; 324 325 vreg_l6c_2p9: ldo6 { 326 regulator-min-microvolt = <1800000>; 327 regulator-max-microvolt = <2950000>; 328 }; 329 330 vreg_l7c_3p0: ldo7 { 331 regulator-min-microvolt = <3000000>; 332 regulator-max-microvolt = <3544000>; 333 }; 334 335 vreg_l8c_1p8: ldo8 { 336 regulator-min-microvolt = <1620000>; 337 regulator-max-microvolt = <2000000>; 338 }; 339 340 vreg_l9c_2p9: ldo9 { 341 regulator-min-microvolt = <2960000>; 342 regulator-max-microvolt = <2960000>; 343 }; 344 345 vreg_l10c_0p8: ldo10 { 346 regulator-min-microvolt = <720000>; 347 regulator-max-microvolt = <1050000>; 348 }; 349 350 vreg_l11c_2p8: ldo11 { 351 regulator-min-microvolt = <2800000>; 352 regulator-max-microvolt = <3544000>; 353 }; 354 355 vreg_l12c_1p8: ldo12 { 356 regulator-min-microvolt = <1650000>; 357 regulator-max-microvolt = <2000000>; 358 }; 359 360 vreg_l13c_3p0: ldo13 { 361 regulator-min-microvolt = <2700000>; 362 regulator-max-microvolt = <3544000>; 363 }; 364 365 vreg_bob: bob { 366 regulator-min-microvolt = <3008000>; 367 regulator-max-microvolt = <3960000>; 368 }; 369 }; 370}; 371 372&gpi_dma0 { 373 status = "okay"; 374}; 375 376&gpi_dma1 { 377 status = "okay"; 378}; 379 380&lpass_cpu { 381 status = "okay"; 382 383 pinctrl-names = "default"; 384 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; 385 386 dai-link@1 { 387 reg = <MI2S_SECONDARY>; 388 qcom,playback-sd-lines = <0>; 389 }; 390 391 dai-link@5 { 392 reg = <LPASS_DP_RX>; 393 }; 394 395 dai-link@6 { 396 reg = <LPASS_CDC_DMA_RX0>; 397 }; 398 399 dai-link@19 { 400 reg = <LPASS_CDC_DMA_TX3>; 401 }; 402 403 dai-link@25 { 404 reg = <LPASS_CDC_DMA_VA_TX0>; 405 }; 406}; 407 408&lpass_rx_macro { 409 status = "okay"; 410}; 411 412&lpass_tx_macro { 413 status = "okay"; 414}; 415 416&lpass_va_macro { 417 status = "okay"; 418 vdd-micb-supply = <&vreg_bob>; 419}; 420 421&pcie1 { 422 status = "okay"; 423 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 424 425 vddpe-3v3-supply = <&nvme_3v3_regulator>; 426 427 pinctrl-names = "default"; 428 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>; 429}; 430 431&pcie1_phy { 432 status = "okay"; 433 434 vdda-phy-supply = <&vreg_l10c_0p8>; 435 vdda-pll-supply = <&vreg_l6b_1p2>; 436}; 437 438&pmk8350_vadc { 439 pmk8350-die-temp@3 { 440 reg = <PMK8350_ADC7_DIE_TEMP>; 441 label = "pmk8350_die_temp"; 442 qcom,pre-scaling = <1 1>; 443 }; 444}; 445 446&qfprom { 447 vcc-supply = <&vreg_l1c_1p8>; 448}; 449 450&qupv3_id_0 { 451 status = "okay"; 452}; 453 454&qupv3_id_1 { 455 status = "okay"; 456}; 457 458&sdhc_1 { 459 status = "okay"; 460 461 non-removable; 462 no-sd; 463 no-sdio; 464 465 vmmc-supply = <&vreg_l7b_2p9>; 466 vqmmc-supply = <&vreg_l19b_1p8>; 467}; 468 469&sdhc_2 { 470 status = "okay"; 471 472 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; 473 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; 474 475 vmmc-supply = <&vreg_l9c_2p9>; 476 vqmmc-supply = <&vreg_l6c_2p9>; 477 478 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 479}; 480 481&swr0 { 482 status = "okay"; 483 484 wcd_rx: codec@0,4 { 485 compatible = "sdw20217010d00"; 486 reg = <0 4>; 487 #sound-dai-cells = <1>; 488 qcom,rx-port-mapping = <1 2 3 4 5>; 489 }; 490}; 491 492&swr1 { 493 status = "okay"; 494 495 wcd_tx: codec@0,3 { 496 compatible = "sdw20217010d00"; 497 reg = <0 3>; 498 #sound-dai-cells = <1>; 499 qcom,tx-port-mapping = <1 2 3 4>; 500 }; 501}; 502 503&uart5 { 504 compatible = "qcom,geni-debug-uart"; 505 status = "okay"; 506}; 507 508&usb_1 { 509 status = "okay"; 510}; 511 512&usb_1_dwc3 { 513 dr_mode = "host"; 514}; 515 516&usb_1_hsphy { 517 status = "okay"; 518 519 vdda-pll-supply = <&vreg_l10c_0p8>; 520 vdda33-supply = <&vreg_l2b_3p0>; 521 vdda18-supply = <&vreg_l1c_1p8>; 522 qcom,hs-rise-fall-time-bp = <0>; 523 qcom,squelch-detector-bp = <(-2090)>; 524 qcom,hs-disconnect-bp = <1743>; 525 qcom,hs-amplitude-bp = <1780>; 526 qcom,hs-crossover-voltage-microvolt = <(-31000)>; 527 qcom,hs-output-impedance-micro-ohms = <2600000>; 528}; 529 530&usb_1_qmpphy { 531 status = "okay"; 532 533 vdda-phy-supply = <&vreg_l6b_1p2>; 534 vdda-pll-supply = <&vreg_l1b_0p8>; 535}; 536 537&uart7 { 538 status = "okay"; 539 540 /delete-property/interrupts; 541 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, 542 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; 543 pinctrl-names = "default", "sleep"; 544 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; 545 546 bluetooth: bluetooth { 547 compatible = "qcom,wcn6750-bt"; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&bt_en>, <&sw_ctrl>; 550 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; 551 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; 552 vddaon-supply = <&vreg_s7b_0p9>; 553 vddbtcxmx-supply = <&vreg_s7b_0p9>; 554 vddrfacmn-supply = <&vreg_s7b_0p9>; 555 vddrfa0p8-supply = <&vreg_s7b_0p9>; 556 vddrfa1p7-supply = <&vreg_s1b_1p8>; 557 vddrfa1p2-supply = <&vreg_s8b_1p2>; 558 vddrfa2p2-supply = <&vreg_s1c_2p2>; 559 vddasd-supply = <&vreg_l11c_2p8>; 560 max-speed = <3200000>; 561 }; 562}; 563 564/* PINCTRL - additions to nodes defined in sc7280.dtsi */ 565 566&dp_hot_plug_det { 567 bias-disable; 568}; 569 570&lpass_dmic01_clk { 571 drive-strength = <8>; 572 bias-disable; 573}; 574 575&lpass_dmic01_data { 576 bias-pull-down; 577}; 578 579&lpass_dmic23_clk { 580 drive-strength = <8>; 581 bias-disable; 582}; 583 584&lpass_dmic23_data { 585 bias-pull-down; 586}; 587 588&lpass_rx_swr_clk { 589 drive-strength = <2>; 590 slew-rate = <1>; 591 bias-disable; 592}; 593 594&lpass_rx_swr_data { 595 drive-strength = <2>; 596 slew-rate = <1>; 597 bias-bus-hold; 598}; 599 600&lpass_tx_swr_clk { 601 drive-strength = <2>; 602 slew-rate = <1>; 603 bias-disable; 604}; 605 606&lpass_tx_swr_data { 607 drive-strength = <2>; 608 slew-rate = <1>; 609 bias-bus-hold; 610}; 611 612&mi2s1_data0 { 613 drive-strength = <6>; 614 bias-disable; 615}; 616 617&mi2s1_sclk { 618 drive-strength = <6>; 619 bias-disable; 620}; 621 622&mi2s1_ws { 623 drive-strength = <6>; 624}; 625 626&pm7325_gpios { 627 key_vol_up_default: key-vol-up-state { 628 pins = "gpio6"; 629 function = "normal"; 630 input-enable; 631 bias-pull-up; 632 power-source = <0>; 633 qcom,drive-strength = <3>; 634 }; 635}; 636 637&pcie1_clkreq_n { 638 bias-pull-up; 639 drive-strength = <2>; 640}; 641 642&qspi_cs0 { 643 bias-disable; 644}; 645 646&qspi_clk { 647 bias-disable; 648}; 649 650&qspi_data01 { 651 /* High-Z when no transfers; nice to park the lines */ 652 bias-pull-up; 653}; 654 655&qup_uart5_tx { 656 drive-strength = <2>; 657 bias-disable; 658}; 659 660&qup_uart5_rx { 661 drive-strength = <2>; 662 bias-pull-up; 663}; 664 665&qup_uart7_cts { 666 /* 667 * Configure a bias-bus-hold on CTS to lower power 668 * usage when Bluetooth is turned off. Bus hold will 669 * maintain a low power state regardless of whether 670 * the Bluetooth module drives the pin in either 671 * direction or leaves the pin fully unpowered. 672 */ 673 bias-bus-hold; 674}; 675 676&qup_uart7_rts { 677 /* We'll drive RTS, so no pull */ 678 drive-strength = <2>; 679 bias-disable; 680}; 681 682&qup_uart7_tx { 683 /* We'll drive TX, so no pull */ 684 drive-strength = <2>; 685 bias-disable; 686}; 687 688&qup_uart7_rx { 689 /* 690 * Configure a pull-up on RX. This is needed to avoid 691 * garbage data when the TX pin of the Bluetooth module is 692 * in tri-state (module powered off or not driving the 693 * signal yet). 694 */ 695 bias-pull-up; 696}; 697 698&sdc1_clk { 699 bias-disable; 700 drive-strength = <16>; 701}; 702 703&sdc1_cmd { 704 bias-pull-up; 705 drive-strength = <10>; 706}; 707 708&sdc1_data { 709 bias-pull-up; 710 drive-strength = <10>; 711}; 712 713&sdc1_rclk { 714 bias-pull-down; 715}; 716 717&sdc2_clk { 718 bias-disable; 719 drive-strength = <16>; 720}; 721 722&sdc2_cmd { 723 bias-pull-up; 724 drive-strength = <10>; 725}; 726 727&sdc2_data { 728 bias-pull-up; 729 drive-strength = <10>; 730}; 731 732&tlmm { 733 amp_en: amp-en-state { 734 pins = "gpio63"; 735 function = "gpio"; 736 bias-pull-down; 737 drive-strength = <2>; 738 }; 739 740 bt_en: bt-en-state { 741 pins = "gpio85"; 742 function = "gpio"; 743 output-low; 744 bias-disable; 745 }; 746 747 nvme_pwren: nvme-pwren-state { 748 function = "gpio"; 749 }; 750 751 pcie1_reset_n: pcie1-reset-n-state { 752 pins = "gpio2"; 753 function = "gpio"; 754 755 drive-strength = <16>; 756 output-low; 757 bias-disable; 758 }; 759 760 pcie1_wake_n: pcie1-wake-n-state { 761 pins = "gpio3"; 762 function = "gpio"; 763 764 drive-strength = <2>; 765 bias-pull-up; 766 }; 767 768 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { 769 pins = "gpio28"; 770 function = "gpio"; 771 /* 772 * Configure a bias-bus-hold on CTS to lower power 773 * usage when Bluetooth is turned off. Bus hold will 774 * maintain a low power state regardless of whether 775 * the Bluetooth module drives the pin in either 776 * direction or leaves the pin fully unpowered. 777 */ 778 bias-bus-hold; 779 }; 780 781 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { 782 pins = "gpio29"; 783 function = "gpio"; 784 /* 785 * Configure pull-down on RTS. As RTS is active low 786 * signal, pull it low to indicate the BT SoC that it 787 * can wakeup the system anytime from suspend state by 788 * pulling RX low (by sending wakeup bytes). 789 */ 790 bias-pull-down; 791 }; 792 793 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { 794 pins = "gpio30"; 795 function = "gpio"; 796 /* 797 * Configure pull-up on TX when it isn't actively driven 798 * to prevent BT SoC from receiving garbage during sleep. 799 */ 800 bias-pull-up; 801 }; 802 803 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { 804 pins = "gpio31"; 805 function = "gpio"; 806 /* 807 * Configure a pull-up on RX. This is needed to avoid 808 * garbage data when the TX pin of the Bluetooth module 809 * is floating which may cause spurious wakeups. 810 */ 811 bias-pull-up; 812 }; 813 814 sd_cd: sd-cd-state { 815 pins = "gpio91"; 816 function = "gpio"; 817 bias-pull-up; 818 }; 819 820 sw_ctrl: sw-ctrl-state { 821 pins = "gpio86"; 822 function = "gpio"; 823 bias-pull-down; 824 }; 825 826 wcd_reset_n: wcd-reset-n-state { 827 pins = "gpio83"; 828 function = "gpio"; 829 drive-strength = <8>; 830 }; 831 832 wcd_reset_n_sleep: wcd-reset-n-sleep-state { 833 pins = "gpio83"; 834 function = "gpio"; 835 drive-strength = <8>; 836 bias-disable; 837 }; 838}; 839