1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Herobrine board device tree source 4 * 5 * Copyright 2021 Google LLC. 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 12#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 13#include <dt-bindings/input/gpio-keys.h> 14#include <dt-bindings/input/input.h> 15#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 17 18#include "sc7280.dtsi" 19 20/* PMICs depend on spmi_bus label and so must come after SoC */ 21#include "pm7325.dtsi" 22#include "pm8350c.dtsi" 23#include "pmk8350.dtsi" 24 25/* 26 * Reserved memory changes 27 * 28 * Delete all unused memory nodes and define the peripheral memory regions 29 * required by the board dts. 30 * 31 */ 32 33/delete-node/ &hyp_mem; 34/delete-node/ &xbl_mem; 35/delete-node/ &sec_apps_mem; 36 37/* Increase the size from 2MB to 8MB */ 38&rmtfs_mem { 39 reg = <0x0 0x83600000 0x0 0x800000>; 40}; 41 42/ { 43 reserved-memory { 44 adsp_mem: memory@86700000 { 45 reg = <0x0 0x86700000 0x0 0x2800000>; 46 no-map; 47 }; 48 49 camera_mem: memory@8ad00000 { 50 reg = <0x0 0x8ad00000 0x0 0x500000>; 51 no-map; 52 }; 53 54 venus_mem: memory@8b200000 { 55 reg = <0x0 0x8b200000 0x0 0x500000>; 56 no-map; 57 }; 58 59 mpss_mem: memory@8b800000 { 60 reg = <0x0 0x8b800000 0x0 0xf600000>; 61 no-map; 62 }; 63 64 wpss_mem: memory@9ae00000 { 65 reg = <0x0 0x9ae00000 0x0 0x1900000>; 66 no-map; 67 }; 68 69 mba_mem: memory@9c700000 { 70 reg = <0x0 0x9c700000 0x0 0x200000>; 71 no-map; 72 }; 73 }; 74 75 aliases { 76 serial0 = &uart5; 77 serial1 = &uart7; 78 }; 79 80 chosen { 81 stdout-path = "serial0:115200n8"; 82 }; 83 84 /* FIXED REGULATORS - parents above children */ 85 86 /* This is the top level supply and variable voltage */ 87 ppvar_sys: ppvar-sys-regulator { 88 compatible = "regulator-fixed"; 89 regulator-name = "ppvar_sys"; 90 regulator-always-on; 91 regulator-boot-on; 92 }; 93 94 /* This divides ppvar_sys by 2, so voltage is variable */ 95 src_vph_pwr: src-vph-pwr-regulator { 96 compatible = "regulator-fixed"; 97 regulator-name = "src_vph_pwr"; 98 99 /* EC turns on with switchcap_on; always on for AP */ 100 regulator-always-on; 101 regulator-boot-on; 102 103 vin-supply = <&ppvar_sys>; 104 }; 105 106 pp5000_s3: pp5000-s3-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "pp5000_s3"; 109 110 /* EC turns on with en_pp5000_s3; always on for AP */ 111 regulator-always-on; 112 regulator-boot-on; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 116 vin-supply = <&ppvar_sys>; 117 }; 118 119 pp3300_z1: pp3300-z1-regulator { 120 compatible = "regulator-fixed"; 121 regulator-name = "pp3300_z1"; 122 123 /* EC turns on with en_pp3300_z1; always on for AP */ 124 regulator-always-on; 125 regulator-boot-on; 126 regulator-min-microvolt = <3300000>; 127 regulator-max-microvolt = <3300000>; 128 129 vin-supply = <&ppvar_sys>; 130 }; 131 132 pp3300_audio: 133 pp3300_codec: pp3300-codec-regulator { 134 compatible = "regulator-fixed"; 135 regulator-name = "pp3300_codec"; 136 137 regulator-min-microvolt = <3300000>; 138 regulator-max-microvolt = <3300000>; 139 140 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>; 141 enable-active-high; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&en_pp3300_codec>; 144 145 vin-supply = <&pp3300_z1>; 146 }; 147 148 pp3300_cam: 149 pp3300_edp: 150 pp3300_ts: pp3300-edp-regulator { 151 compatible = "regulator-fixed"; 152 regulator-name = "pp3300_edp"; 153 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 157 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>; 158 enable-active-high; 159 pinctrl-names = "default"; 160 pinctrl-0 = <&en_pp3300_dx_edp>; 161 162 vin-supply = <&pp3300_z1>; 163 }; 164 165 pp3300_fp: 166 pp3300_fp_ls: 167 pp3300_mcu: pp3300-fp-regulator { 168 compatible = "regulator-fixed"; 169 regulator-name = "pp3300_fp"; 170 171 regulator-min-microvolt = <3300000>; 172 regulator-max-microvolt = <3300000>; 173 174 regulator-boot-on; 175 regulator-always-on; 176 177 /* 178 * WARNING: it is intentional that GPIO 42 isn't listed here. 179 * The userspace script for updating the fingerprint firmware 180 * needs to control the FP regulators during a FW update, 181 * hence the signal can't be owned by the kernel regulator. 182 */ 183 184 pinctrl-names = "default"; 185 pinctrl-0 = <&en_fp_rails>; 186 187 vin-supply = <&pp3300_z1>; 188 }; 189 190 pp3300_hub: pp3300-hub-regulator { 191 compatible = "regulator-fixed"; 192 regulator-name = "pp3300_hub"; 193 194 regulator-min-microvolt = <3300000>; 195 regulator-max-microvolt = <3300000>; 196 197 regulator-boot-on; 198 regulator-always-on; 199 200 gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>; 201 enable-active-high; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&en_pp3300_hub>; 204 205 vin-supply = <&pp3300_z1>; 206 }; 207 208 pp3300_tp: pp3300-tp-regulator { 209 compatible = "regulator-fixed"; 210 regulator-name = "pp3300_tp"; 211 212 regulator-min-microvolt = <3300000>; 213 regulator-max-microvolt = <3300000>; 214 215 /* AP turns on with PP1800_L18B_S0; always on for AP */ 216 regulator-always-on; 217 regulator-boot-on; 218 219 vin-supply = <&pp3300_z1>; 220 }; 221 222 pp2850_uf_cam: pp2850-uf-cam { 223 compatible = "regulator-fixed"; 224 regulator-name = "pp2850_uf_cam"; 225 226 regulator-min-microvolt = <2850000>; 227 regulator-max-microvolt = <2850000>; 228 229 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>; 230 enable-active-high; 231 pinctrl-names = "default"; 232 pinctrl-0 = <&uf_cam_en>; 233 234 vin-supply = <&pp3300_cam>; 235 }; 236 237 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam { 238 compatible = "regulator-fixed"; 239 regulator-name = "pp2850_vcm_wf_cam"; 240 241 regulator-min-microvolt = <2850000>; 242 regulator-max-microvolt = <2850000>; 243 244 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>; 245 enable-active-high; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&wf_cam_en>; 248 249 vin-supply = <&pp3300_cam>; 250 }; 251 252 pp2850_wf_cam: pp2850-wf-cam { 253 compatible = "regulator-fixed"; 254 regulator-name = "pp2850_wf_cam"; 255 256 regulator-min-microvolt = <2850000>; 257 regulator-max-microvolt = <2850000>; 258 259 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>; 260 enable-active-high; 261 /* 262 * The pinconf can only be referenced once so we put it on the 263 * first regulator and comment it out here. 264 * 265 * pinctrl-names = "default"; 266 * pinctrl-0 = <&wf_cam_en>; 267 */ 268 269 vin-supply = <&pp3300_cam>; 270 }; 271 272 pp1800_fp: pp1800-fp-regulator { 273 compatible = "regulator-fixed"; 274 regulator-name = "pp1800_fp"; 275 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <1800000>; 278 279 regulator-boot-on; 280 regulator-always-on; 281 282 /* 283 * WARNING: it is intentional that GPIO 42 isn't listed here. 284 * The userspace script for updating the fingerprint firmware 285 * needs to control the FP regulators during a FW update, 286 * hence the signal can't be owned by the kernel regulator. 287 */ 288 289 pinctrl-names = "default"; 290 pinctrl-0 = <&en_fp_rails>; 291 292 vin-supply = <&pp1800_l18b_s0>; 293 status = "disabled"; 294 }; 295 296 pp1800_uf_cam: pp1800-uf-cam { 297 compatible = "regulator-fixed"; 298 regulator-name = "pp1800_uf_cam"; 299 300 regulator-min-microvolt = <1800000>; 301 regulator-max-microvolt = <1800000>; 302 303 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>; 304 enable-active-high; 305 /* 306 * The pinconf can only be referenced once so we put it on the 307 * first regulator and comment it out here. 308 * 309 * pinctrl-names = "default"; 310 * pinctrl-0 = <&uf_cam_en>; 311 */ 312 313 vin-supply = <&pp1800_l19b>; 314 }; 315 316 pp1800_wf_cam: pp1800-wf-cam { 317 compatible = "regulator-fixed"; 318 regulator-name = "pp1800_wf_cam"; 319 320 regulator-min-microvolt = <1800000>; 321 regulator-max-microvolt = <1800000>; 322 323 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>; 324 enable-active-high; 325 /* 326 * The pinconf can only be referenced once so we put it on the 327 * first regulator and comment it out here. 328 * 329 * pinctrl-names = "default"; 330 * pinctrl-0 = <&wf_cam_en>; 331 */ 332 333 vin-supply = <&pp1800_l19b>; 334 }; 335 336 pp1200_wf_cam: pp1200-wf-cam { 337 compatible = "regulator-fixed"; 338 regulator-name = "pp1200_wf_cam"; 339 340 regulator-min-microvolt = <1200000>; 341 regulator-max-microvolt = <1200000>; 342 343 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>; 344 enable-active-high; 345 /* 346 * The pinconf can only be referenced once so we put it on the 347 * first regulator and comment it out here. 348 * 349 * pinctrl-names = "default"; 350 * pinctrl-0 = <&wf_cam_en>; 351 */ 352 353 vin-supply = <&pp1200_l6b>; 354 }; 355 356 /* BOARD-SPECIFIC TOP LEVEL NODES */ 357 358 gpio_keys: gpio-keys { 359 compatible = "gpio-keys"; 360 status = "disabled"; 361 pinctrl-names = "default"; 362 pinctrl-0 = <&pen_pdct_l>; 363 364 pen_insert: pen-insert { 365 label = "Pen Insert"; 366 367 /* Insert = low, eject = high */ 368 gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; 369 linux,code = <SW_PEN_INSERTED>; 370 linux,input-type = <EV_SW>; 371 wakeup-event-action = <EV_ACT_DEASSERTED>; 372 wakeup-source; 373 }; 374 }; 375 376 pwmleds { 377 compatible = "pwm-leds"; 378 status = "disabled"; 379 keyboard_backlight: keyboard-backlight { 380 status = "disabled"; 381 label = "cros_ec::kbd_backlight"; 382 pwms = <&cros_ec_pwm 0>; 383 max-brightness = <1023>; 384 }; 385 }; 386}; 387 388&apps_rsc { 389 pm7325-regulators { 390 compatible = "qcom,pm7325-rpmh-regulators"; 391 qcom,pmic-id = "b"; 392 393 vdd19_pmu_pcie_i: 394 vdd19_pmu_rfa_i: 395 vreg_s1b_wlan: 396 vreg_s1b: smps1 { 397 regulator-min-microvolt = <1856000>; 398 regulator-max-microvolt = <2040000>; 399 }; 400 401 vdd_pmu_aon_i: 402 vreg_s7b_wlan: 403 vreg_s7b: smps7 { 404 regulator-min-microvolt = <535000>; 405 regulator-max-microvolt = <1120000>; 406 }; 407 408 vdd13_pmu_pcie_i: 409 vdd13_pmu_rfa_i: 410 vreg_s8b_wlan: 411 vreg_s8b: smps8 { 412 regulator-min-microvolt = <1256000>; 413 regulator-max-microvolt = <1500000>; 414 }; 415 416 vdda_usb_ss_dp_core: 417 vreg_l1b: ldo1 { 418 regulator-min-microvolt = <825000>; 419 regulator-max-microvolt = <925000>; 420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 421 }; 422 423 vdda_usb_hs0_3p1: 424 vreg_l2b: ldo2 { 425 regulator-min-microvolt = <2700000>; 426 regulator-max-microvolt = <3544000>; 427 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 428 }; 429 430 pp1200_l6b: 431 vdd_ufs_1p2: 432 vdd_vref: 433 vdda_csi01_1p2: 434 vdda_csi23_1p2: 435 vdda_csi4_1p2: 436 vdda_dsi0_1p2: 437 vdda_pcie0_1p2: 438 vdda_pcie1_1p2: 439 vdda_usb_ss_dp_1p2: 440 vdda_qlink0_1p2_ck: 441 vdda_qlink1_1p2_ck: 442 vreg_l6b_1p2: 443 vreg_l6b: ldo6 { 444 regulator-min-microvolt = <1120000>; 445 regulator-max-microvolt = <1408000>; 446 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 447 }; 448 449 pp2950_l7b: 450 vreg_l7b: ldo7 { 451 regulator-min-microvolt = <2960000>; 452 regulator-max-microvolt = <2960000>; 453 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 454 }; 455 456 codec_vcc: 457 pp1800_l18b_s0: 458 pp1800_ts: 459 vdd1: 460 vddpx_0: 461 vddpx_3: 462 vddpx_7: 463 vreg_l18b: ldo18 { 464 regulator-min-microvolt = <1800000>; 465 regulator-max-microvolt = <2000000>; 466 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 467 }; 468 469 pp1800_l19b: 470 vddpx_ts: 471 vddpx_wl4otp: 472 vreg_l19b: ldo19 { 473 regulator-min-microvolt = <1800000>; 474 regulator-max-microvolt = <1800000>; 475 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 476 }; 477 }; 478 479 pm8350c-regulators { 480 compatible = "qcom,pm8350c-rpmh-regulators"; 481 qcom,pmic-id = "c"; 482 483 vreg_s1c: smps1 { 484 regulator-min-microvolt = <2190000>; 485 regulator-max-microvolt = <2210000>; 486 }; 487 488 vddpx_1: 489 vreg_s9c: smps9 { 490 regulator-min-microvolt = <1010000>; 491 regulator-max-microvolt = <1170000>; 492 }; 493 494 pp1800_l1c: 495 pp1800_pen: 496 vdd_a_gfx_cs_1p1: 497 vdd_a_cxo_1p8: 498 vdd_qfprom: 499 vdda_apc_cs_1p8: 500 vdda_qrefs_1p8: 501 vdda_turing_q6_cs_1p8: 502 vdda_usb_hs0_1p8: 503 vreg_l1c: ldo1 { 504 regulator-min-microvolt = <1800000>; 505 regulator-max-microvolt = <1980000>; 506 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 507 }; 508 509 dmic_vdd: 510 pp1800_alc5682: 511 pp1800_l2c: 512 pp1800_vreg_alc5682: 513 vreg_l2c: ldo2 { 514 regulator-min-microvolt = <1620000>; 515 regulator-max-microvolt = <1980000>; 516 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 517 }; 518 519 pp3300_sar: 520 pp3300_sensor: 521 vreg_l3c: ldo3 { 522 regulator-min-microvolt = <2800000>; 523 regulator-max-microvolt = <3540000>; 524 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 525 }; 526 527 ppvar_uim1: 528 vddpx_5: 529 vreg_l4c: ldo4 { 530 regulator-min-microvolt = <1620000>; 531 regulator-max-microvolt = <3300000>; 532 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 533 }; 534 535 pp2950_l5c: 536 uim_vcc: 537 vddpx_6: 538 vreg_l5c: ldo5 { 539 regulator-min-microvolt = <1620000>; 540 regulator-max-microvolt = <3300000>; 541 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 542 }; 543 544 ppvar_l6c: 545 vddpx_2: 546 vreg_l6c: ldo6 { 547 regulator-min-microvolt = <1800000>; 548 regulator-max-microvolt = <2950000>; 549 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 550 }; 551 552 vreg_l7c: ldo7 { 553 regulator-min-microvolt = <3000000>; 554 regulator-max-microvolt = <3544000>; 555 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 556 }; 557 558 pp1800_prox: 559 pp1800_sar: 560 vreg_l8c: ldo8 { 561 regulator-min-microvolt = <1620000>; 562 regulator-max-microvolt = <2000000>; 563 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 564 }; 565 566 pp2950_l9c: 567 vreg_l9c: ldo9 { 568 regulator-min-microvolt = <2960000>; 569 regulator-max-microvolt = <2960000>; 570 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 571 }; 572 573 vdd_a_gnss_0p9: 574 vdd_ufs_core: 575 vdd_usb_hs0_core: 576 vdd_vref_0p9: 577 vdda_csi01_0p9: 578 vdda_csi23_0p9: 579 vdda_csi4_0p9: 580 vdda_dsi0_pll_0p9: 581 vdda_dsi0_0p9: 582 vdda_pcie0_core: 583 vdda_pcie1_core: 584 vdda_qlink0_0p9: 585 vdda_qlink1_0p9: 586 vdda_qlink0_0p9_ck: 587 vdda_qlink1_0p9_ck: 588 vdda_qrefs_0p875: 589 vreg_l10c_0p8: 590 vreg_l10c: ldo10 { 591 regulator-min-microvolt = <720000>; 592 regulator-max-microvolt = <1050000>; 593 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 594 }; 595 596 pp2800_l11c: 597 vreg_l11c: ldo11 { 598 regulator-min-microvolt = <2800000>; 599 regulator-max-microvolt = <3544000>; 600 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 601 }; 602 603 pp1800_l12c: 604 vreg_l12c: ldo12 { 605 regulator-min-microvolt = <1650000>; 606 regulator-max-microvolt = <2000000>; 607 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 608 }; 609 610 pp3300_l13c: 611 vreg_l13c: ldo13 { 612 regulator-min-microvolt = <2700000>; 613 regulator-max-microvolt = <3544000>; 614 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 615 }; 616 617 vreg_bob: bob { 618 regulator-min-microvolt = <3008000>; 619 regulator-max-microvolt = <3960000>; 620 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 621 }; 622 }; 623}; 624 625ap_tp_i2c: &i2c1 { 626 status = "okay"; 627 clock-frequency = <400000>; 628 629 trackpad: trackpad@15 { 630 compatible = "elan,ekth3000"; 631 reg = <0x15>; 632 pinctrl-names = "default"; 633 pinctrl-0 = <&tp_int_odl>; 634 635 interrupt-parent = <&tlmm>; 636 interrupts = <102 IRQ_TYPE_EDGE_FALLING>; 637 638 vcc-supply = <&pp3300_z1>; 639 640 wakeup-source; 641 }; 642}; 643 644ap_h1_i2c: &i2c12 { 645 status = "okay"; 646 clock-frequency = <400000>; 647 648 tpm@50 { 649 compatible = "google,cr50"; 650 reg = <0x50>; 651 652 pinctrl-names = "default"; 653 pinctrl-0 = <&h1_ap_int_odl>; 654 655 interrupt-parent = <&tlmm>; 656 interrupts = <54 IRQ_TYPE_EDGE_RISING>; 657 }; 658}; 659 660ap_ts_pen: &i2c13 { 661 status = "okay"; 662 clock-frequency = <400000>; 663 664 ap_ts: touchscreen@10 { 665 compatible = "hid-over-i2c"; 666 reg = <0x10>; 667 pinctrl-names = "default"; 668 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 669 670 interrupt-parent = <&tlmm>; 671 interrupts = <81 IRQ_TYPE_LEVEL_LOW>; 672 673 post-power-on-delay-ms = <20>; 674 hid-descr-addr = <0x0001>; 675 676 vdd-supply = <&pp3300_ts>; 677 }; 678}; 679 680&pm7325_gpios { 681 status = "disabled"; /* No GPIOs are connected */ 682}; 683 684&pmk8350_gpios { 685 status = "disabled"; /* No GPIOs are connected */ 686}; 687 688&pmk8350_pon { 689 status = "disabled"; 690}; 691 692&pmk8350_rtc { 693 status = "disabled"; 694}; 695 696&pmk8350_vadc { 697 pmk8350_die_temp { 698 reg = <PMK8350_ADC7_DIE_TEMP>; 699 label = "pmk8350_die_temp"; 700 qcom,pre-scaling = <1 1>; 701 }; 702 703 pmr735a_die_temp { 704 reg = <PMR735A_ADC7_DIE_TEMP>; 705 label = "pmr735a_die_temp"; 706 qcom,pre-scaling = <1 1>; 707 }; 708}; 709 710&qfprom { 711 vcc-supply = <&vdd_qfprom>; 712}; 713 714&qspi { 715 status = "okay"; 716 pinctrl-names = "default"; 717 pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>; 718 719 flash@0 { 720 compatible = "jedec,spi-nor"; 721 reg = <0>; 722 723 spi-max-frequency = <37500000>; 724 spi-tx-bus-width = <2>; 725 spi-rx-bus-width = <2>; 726 }; 727}; 728 729&qupv3_id_0 { 730 status = "okay"; 731}; 732 733&qupv3_id_1 { 734 status = "okay"; 735}; 736 737&sdhc_1 { 738 status = "okay"; 739 740 pinctrl-names = "default", "sleep"; 741 pinctrl-0 = <&sdc1_on>; 742 pinctrl-1 = <&sdc1_off>; 743 vmmc-supply = <&pp2950_l7b>; 744 vqmmc-supply = <&pp1800_l19b>; 745}; 746 747&sdhc_2 { 748 status = "okay"; 749 750 pinctrl-names = "default", "sleep"; 751 pinctrl-0 = <&sdc2_on>; 752 pinctrl-1 = <&sdc2_off>; 753 vmmc-supply = <&pp2950_l9c>; 754 vqmmc-supply = <&ppvar_l6c>; 755 756 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 757}; 758 759ap_ec_spi: &spi8 { 760 status = "okay"; 761 762 pinctrl-0 = <&qup_spi8_data_clk>, <&qup_spi8_cs_gpio_init_high>, <&qup_spi8_cs_gpio>; 763 cs-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; 764 765 cros_ec: ec@0 { 766 compatible = "google,cros-ec-spi"; 767 reg = <0>; 768 interrupt-parent = <&tlmm>; 769 interrupts = <142 IRQ_TYPE_LEVEL_LOW>; 770 pinctrl-names = "default"; 771 pinctrl-0 = <&ap_ec_int_l>; 772 spi-max-frequency = <3000000>; 773 774 cros_ec_pwm: ec-pwm { 775 compatible = "google,cros-ec-pwm"; 776 #pwm-cells = <1>; 777 }; 778 779 i2c_tunnel: i2c-tunnel { 780 compatible = "google,cros-ec-i2c-tunnel"; 781 google,remote-bus = <0>; 782 #address-cells = <1>; 783 #size-cells = <0>; 784 }; 785 786 typec { 787 compatible = "google,cros-ec-typec"; 788 #address-cells = <1>; 789 #size-cells = <0>; 790 791 usb_c0: connector@0 { 792 compatible = "usb-c-connector"; 793 reg = <0>; 794 label = "left"; 795 power-role = "dual"; 796 data-role = "host"; 797 try-power-role = "source"; 798 }; 799 800 usb_c1: connector@1 { 801 compatible = "usb-c-connector"; 802 reg = <1>; 803 label = "right"; 804 power-role = "dual"; 805 data-role = "host"; 806 try-power-role = "source"; 807 }; 808 }; 809 }; 810}; 811 812#include <arm/cros-ec-keyboard.dtsi> 813#include <arm/cros-ec-sbs.dtsi> 814 815&keyboard_controller { 816 function-row-physmap = < 817 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 818 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 819 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 820 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 821 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 822 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 823 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 824 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 825 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 826 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 827 >; 828 linux,keymap = < 829 MATRIX_KEY(0x00, 0x02, KEY_BACK) 830 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 831 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 832 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 833 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 834 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 835 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 836 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 837 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 838 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 839 840 CROS_STD_MAIN_KEYMAP 841 >; 842}; 843 844&uart5 { 845 compatible = "qcom,geni-debug-uart"; 846 status = "okay"; 847}; 848 849&uart7 { 850 status = "okay"; 851}; 852 853&usb_1 { 854 status = "okay"; 855}; 856 857&usb_1_dwc3 { 858 dr_mode = "host"; 859}; 860 861&usb_1_hsphy { 862 status = "okay"; 863 864 vdda-pll-supply = <&vdd_usb_hs0_core>; 865 vdda33-supply = <&vdda_usb_hs0_3p1>; 866 vdda18-supply = <&vdda_usb_hs0_1p8>; 867}; 868 869&usb_1_qmpphy { 870 status = "okay"; 871 872 vdda-phy-supply = <&vdda_usb_ss_dp_1p2>; 873 vdda-pll-supply = <&vdda_usb_ss_dp_core>; 874}; 875 876&usb_2 { 877 status = "okay"; 878}; 879 880&usb_2_dwc3 { 881 dr_mode = "host"; 882}; 883 884&usb_2_hsphy { 885 status = "okay"; 886 887 vdda-pll-supply = <&vdd_usb_hs0_core>; 888 vdda33-supply = <&vdda_usb_hs0_3p1>; 889 vdda18-supply = <&vdda_usb_hs0_1p8>; 890}; 891 892/* PINCTRL - additions to nodes defined in sc7280.dtsi */ 893 894&qspi_cs0 { 895 bias-disable; 896}; 897 898&qspi_clk { 899 bias-disable; 900}; 901 902&qspi_data01 { 903 /* High-Z when no transfers; nice to park the lines */ 904 bias-pull-up; 905}; 906 907&qup_uart5_rx { 908 drive-strength = <2>; 909 bias-pull-up; 910}; 911 912&qup_uart5_tx { 913 drive-strength = <2>; 914 bias-disable; 915}; 916 917&qup_uart7_cts { 918 /* 919 * Configure a pull-down on CTS to match the pull of 920 * the Bluetooth module. 921 */ 922 bias-pull-down; 923}; 924 925&qup_uart7_rts { 926 /* We'll drive RTS, so no pull */ 927 drive-strength = <2>; 928 bias-disable; 929}; 930 931&qup_uart7_tx { 932 /* We'll drive TX, so no pull */ 933 drive-strength = <2>; 934 bias-disable; 935}; 936 937&qup_uart7_rx { 938 /* 939 * Configure a pull-up on RX. This is needed to avoid 940 * garbage data when the TX pin of the Bluetooth module is 941 * in tri-state (module powered off or not driving the 942 * signal yet). 943 */ 944 bias-pull-up; 945}; 946 947&sdc1_on { 948 clk { 949 bias-disable; 950 drive-strength = <16>; 951 }; 952 953 cmd { 954 bias-pull-up; 955 drive-strength = <10>; 956 }; 957 958 data { 959 bias-pull-up; 960 drive-strength = <10>; 961 }; 962 963 rclk { 964 bias-pull-down; 965 }; 966}; 967 968&sdc2_on { 969 clk { 970 bias-disable; 971 drive-strength = <16>; 972 }; 973 974 cmd { 975 bias-pull-up; 976 drive-strength = <10>; 977 }; 978 979 data { 980 bias-pull-up; 981 drive-strength = <10>; 982 }; 983 984 sd-cd { 985 pins = "gpio91"; 986 bias-pull-up; 987 }; 988}; 989 990/* PINCTRL - board-specific pinctrl */ 991 992&pm8350c_gpios { 993 gpio-line-names = "AP_SUSPEND", 994 "", 995 "", 996 "AP_BL_EN", 997 "", 998 "SD_CD_ODL", 999 "", 1000 "", 1001 "AP_BL_PWM"; 1002 1003 ap_bl_en: ap-bl-en { 1004 pins = "gpio4"; 1005 function = "normal"; 1006 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 1007 bias-disable; 1008 1009 /* Force backlight to be disabled to match state at boot. */ 1010 output-low; 1011 }; 1012}; 1013 1014&tlmm { 1015 gpio-line-names = "HP_I2C_SDA", /* 0 */ 1016 "HP_I2C_SCL", 1017 "SSD_RST_L", 1018 "PE_WAKE_ODL", 1019 "AP_TP_I2C_SDA", 1020 "AP_TP_I2C_SCL", 1021 "UF_CAM_EN", 1022 "WF_CAM_EN", 1023 "AP_SAR_SENSOR_SDA", 1024 "AP_SAR_SENSOR_SCL", 1025 1026 "", /* 10 */ 1027 "", 1028 "AP_SPI_MOSI", 1029 "AP_SPI_MISO", 1030 "AP_SPI_CLK", 1031 "AP_SPI_CS0_L", 1032 "", 1033 "", 1034 "EDP_HPD", 1035 "", 1036 1037 "UF_CAM_RST_L", /* 20 */ 1038 "WF_CAM_RST_L", 1039 "UART_AP_TX_DBG_RX", 1040 "UART_DBG_TX_AP_RX", 1041 "EN_PP3300_HUB", 1042 "", 1043 "HOST2WLAN_SOL", 1044 "WLAN2HOST_SOL", 1045 "BT_UART_CTS", 1046 "BT_UART_RTS", 1047 1048 "BT_UART_TXD", /* 30 */ 1049 "BT_UART_RXD", 1050 "AP_EC_SPI_MISO", 1051 "AP_EC_SPI_MOSI", 1052 "AP_EC_SPI_CLK", 1053 "AP_EC_SPI_CS_L", 1054 "", 1055 "", 1056 "", 1057 "PEN_PDCT_L", 1058 1059 "IO_BRD_ID0", /* 40 */ 1060 "IO_BRD_ID1", 1061 "EN_FP_RAILS", 1062 "PEN_IRQ_L", 1063 "AP_SPI_FP_MISO", 1064 "AP_SPI_FP_MOSI", 1065 "AP_SPI_FP_CLK", 1066 "AP_SPI_FP_CS_L", 1067 "AP_H1_SPI_MISO", 1068 "AP_H1_SPI_MOSI", 1069 1070 "AP_H1_SPI_CLK", /* 50 */ 1071 "AP_H1_SPI_CS_L", 1072 "AP_TS_PEN_I2C_SDA", 1073 "AP_TS_PEN_I2C_SCL", 1074 "H1_AP_INT_ODL", 1075 "", 1076 "LCM_RST_1V8_L", 1077 "AMP_EN", 1078 "", 1079 "DP_HOT_PLUG_DET", 1080 1081 "HUB_RST_L", /* 60 */ 1082 "FP_TO_AP_IRQ_L", 1083 "", 1084 "", 1085 "UF_CAM_MCLK", 1086 "WF_CAM_MCLK", 1087 "IO_BRD_ID2", 1088 "EN_PP3300_CODEC", 1089 "EC_IN_RW_ODL", 1090 "UF_CAM_SDA", 1091 1092 "UF_CAM_SCL", /* 70 */ 1093 "WF_CAM_SDA", 1094 "WF_CAM_SCL", 1095 "AP_BRD_ID0", 1096 "AP_BRD_ID1", 1097 "AP_BRD_ID2", 1098 "", 1099 "FPMCU_BOOT0", 1100 "FP_RST_L", 1101 "PE_CLKREQ_ODL", 1102 1103 "EN_EDP_PP3300", /* 80 */ 1104 "TS_INT_L", 1105 "FORCE_USB_BOOT", 1106 "WCD_RST_L", 1107 "WLAN_EN", 1108 "BT_EN", 1109 "WLAN_SW_CTRL", 1110 "PCIE0_RESET_L", 1111 "PCIE0_CLK_REQ_L", 1112 "PCIE0_WAKE_L", 1113 1114 "AS_EN", /* 90 */ 1115 "SD_CD_ODL", 1116 "", 1117 /* 1118 * AP_FLASH_WP_L is crossystem ABI. Schematics 1119 * call it BIOS_FLASH_WP_L. 1120 */ 1121 "AP_FLASH_WP_L", 1122 "BT_WLAN_SB_CLK", 1123 "BT_WLAN_SB_DATA", 1124 "HP_MCLK", 1125 "HP_BCLK", 1126 "HP_DOUT", 1127 "HP_DIN", 1128 1129 "HP_LRCLK", /* 100 */ 1130 "HP_IRQ", 1131 "TP_INT_ODL", 1132 "", 1133 "IO_SKU_ID2", 1134 "TS_RESET_L", 1135 "AMP_BCLK", 1136 "AMP_DIN", 1137 "AMP_LRCLK", 1138 "UIM2_DATA", 1139 1140 "UIM2_CLK", /* 110 */ 1141 "UIM2_RST", 1142 "UIM2_PRESENT", 1143 "UIM1_DATA", 1144 "UIM1_CLK", 1145 "UIM1_RST", 1146 "", 1147 "RFFE0_CLK", 1148 "RFFE0_DATA/BOOT_CONFIG_0", 1149 "RFFE1_CLK", 1150 1151 "RFFE1_DATA/BOOT_CONFIG_1", /* 120 */ 1152 "RFFE2_CLK", 1153 "RFFE2_DATA/BOOT_CONFIG_2", 1154 "RFFE3_CLK", 1155 "RFFE3_DATA/BOOT_CONFIG_3", 1156 "RFFE4_CLK", 1157 "RFFE4_DATA", 1158 "WCI2_LTE_COEX_RXD", 1159 "WCI2_LTE_COEX_TXD", 1160 "IO_SKU_ID0", 1161 1162 "IO_SKU_ID1", /* 130 */ 1163 "", 1164 "", 1165 "QLINK0_REQ", 1166 "QLINK0_EN", 1167 "QLINK0_WMSS_RESET_L", 1168 "QLINK1_REQ", 1169 "QLINK1_EN", 1170 "QLINK1_WMSS_RESET_L", 1171 "FORCED_USB_BOOT_POL", 1172 1173 "", /* 140 */ 1174 "P_SENSOR_INT_L", 1175 "AP_EC_INT_L", 1176 "", 1177 "WCD_SWR_TX_CLK", 1178 "WCD_SWR_TX_DATA_0", 1179 "WCD_SWR_TX_DATA_1", 1180 "WCD_SWR_RX_CLK", 1181 "WCD_SWR_RX_DATA_0", 1182 "WCD_SWR_RX_DATA_1", 1183 1184 "", /* 150 */ 1185 "", 1186 "", 1187 "", 1188 "", 1189 "", 1190 "", 1191 "", 1192 "WCD_SWR_TX_DATA_2", 1193 "", 1194 1195 "", /* 160 */ 1196 "", 1197 "", 1198 "", 1199 "", 1200 "", 1201 "", 1202 "", 1203 "", 1204 "", 1205 1206 "", /* 170 */ 1207 "SENS_UART_TXD", 1208 "SENS_UART_RXD", 1209 "", 1210 "", 1211 ""; 1212 1213 /* 1214 * pinctrl settings for pins that have no real owners. 1215 */ 1216 pinctrl-names = "default"; 1217 pinctrl-0 = <&bios_flash_wp_l>; 1218 1219 amp_en: amp-en { 1220 pins = "gpio57"; 1221 function = "gpio"; 1222 bias-pull-down; 1223 }; 1224 1225 ap_ec_int_l: ap-ec-int-l { 1226 pins = "gpio142"; 1227 input-enable; 1228 bias-pull-up; 1229 }; 1230 1231 bios_flash_wp_l: bios-flash-wp-l { 1232 pins = "gpio93"; 1233 function = "gpio"; 1234 input-enable; 1235 bias-disable; 1236 }; 1237 1238 bt_en: bt-en { 1239 pins = "gpio85"; 1240 function = "gpio"; 1241 drive-strength = <2>; 1242 output-low; 1243 bias-pull-down; 1244 }; 1245 1246 en_fp_rails: en-fp-rails { 1247 pins = "gpio42"; 1248 drive-strength = <2>; 1249 output-high; 1250 bias-disable; 1251 }; 1252 1253 en_pp3300_codec: en-pp3300-codec { 1254 pins = "gpio67"; 1255 drive-strength = <2>; 1256 bias-disable; 1257 }; 1258 1259 en_pp3300_dx_edp: en-pp3300-dx-edp { 1260 pins = "gpio80"; 1261 function = "gpio"; 1262 drive-strength = <2>; 1263 /* Has external pulldown */ 1264 bias-disable; 1265 }; 1266 1267 en_pp3300_hub: en-pp3300-hub { 1268 pins = "gpio24"; 1269 function = "gpio"; 1270 drive-strength = <2>; 1271 /* Has external pulldown */ 1272 bias-disable; 1273 }; 1274 1275 fp_to_ap_irq_l: fp-to-ap-irq-l { 1276 pins = "gpio61"; 1277 function = "gpio"; 1278 input-enable; 1279 /* Has external pullup */ 1280 bias-disable; 1281 }; 1282 1283 h1_ap_int_odl: h1-ap-int-odl { 1284 pins = "gpio54"; 1285 function = "gpio"; 1286 input-enable; 1287 bias-pull-up; 1288 }; 1289 1290 hp_irq: hp-irq { 1291 pins = "gpio101"; 1292 function = "gpio"; 1293 bias-pull-up; 1294 }; 1295 1296 p_sensor_int_l: p-sensor-int-l { 1297 pins = "gpio141"; 1298 function = "gpio"; 1299 input-enable; 1300 bias-pull-up; 1301 }; 1302 1303 pen_irq_l: pen-irq-l { 1304 pins = "gpio43"; 1305 function = "gpio"; 1306 /* Has external pullup */ 1307 bias-disable; 1308 }; 1309 1310 pen_pdct_l: pen-pdct-l { 1311 pins = "gpio39"; 1312 function = "gpio"; 1313 /* Has external pullup */ 1314 bias-disable; 1315 }; 1316 1317 qup_spi8_cs_gpio_init_high: qup-spi8-cs-gpio-init-high { 1318 pins = "gpio35"; 1319 output-high; 1320 }; 1321 1322 qup_spi11_cs_gpio_init_high: qup-spi11-cs-gpio-init-high { 1323 pins = "gpio47"; 1324 output-high; 1325 }; 1326 1327 qup_spi12_cs_gpio_init_high: qup-spi12-cs-gpio-init-high { 1328 pins = "gpio51"; 1329 output-high; 1330 }; 1331 1332 qup_uart7_sleep_cts: qup-uart7-sleep-cts { 1333 pins = "gpio28"; 1334 function = "gpio"; 1335 /* 1336 * Configure a pull-down on CTS to match the pull of 1337 * the Bluetooth module. 1338 */ 1339 bias-pull-down; 1340 }; 1341 1342 qup_uart7_sleep_rts: qup-uart7-sleep-rts { 1343 pins = "gpio29"; 1344 function = "gpio"; 1345 /* 1346 * Configure pull-down on RTS. As RTS is active low 1347 * signal, pull it low to indicate the BT SoC that it 1348 * can wakeup the system anytime from suspend state by 1349 * pulling RX low (by sending wakeup bytes). 1350 */ 1351 bias-pull-down; 1352 }; 1353 1354 qup_uart7_sleep_rx: qup-uart7-sleep-rx { 1355 pins = "gpio31"; 1356 function = "gpio"; 1357 /* 1358 * Configure a pull-up on RX. This is needed to avoid 1359 * garbage data when the TX pin of the Bluetooth module 1360 * is floating which may cause spurious wakeups. 1361 */ 1362 bias-pull-up; 1363 }; 1364 1365 qup_uart7_sleep_tx: qup-uart7-sleep-tx { 1366 pins = "gpio30"; 1367 function = "gpio"; 1368 /* 1369 * Configure pull-up on TX when it isn't actively driven 1370 * to prevent BT SoC from receiving garbage during sleep. 1371 */ 1372 bias-pull-up; 1373 }; 1374 1375 tp_int_odl: tp-int-odl { 1376 pins = "gpio102"; 1377 function = "gpio"; 1378 /* Has external pullup */ 1379 bias-disable; 1380 }; 1381 1382 ts_int_l: ts-int-l { 1383 pins = "gpio81"; 1384 function = "gpio"; 1385 /* Has external pullup */ 1386 bias-pull-up; 1387 }; 1388 1389 ts_reset_l: ts-reset-l { 1390 pins = "gpio105"; 1391 function = "gpio"; 1392 /* Has external pullup */ 1393 bias-disable; 1394 drive-strength = <2>; 1395 }; 1396 1397 uf_cam_en: uf-cam-en { 1398 pins = "gpio6"; 1399 function = "gpio"; 1400 drive-strength = <2>; 1401 /* Has external pulldown */ 1402 bias-disable; 1403 }; 1404 1405 wf_cam_en: wf-cam-en { 1406 pins = "gpio7"; 1407 function = "gpio"; 1408 drive-strength = <2>; 1409 /* Has external pulldown */ 1410 bias-disable; 1411 }; 1412}; 1413