1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Herobrine baseboard device tree source
4 *
5 * The set of things in this file is a bit loosely defined. It's roughly
6 * defined as the set of things that the child boards happen to have in
7 * common. Since all of the child boards started from the same original
8 * design this is hopefully a large set of things but as more derivatives
9 * appear things may "bubble down" out of this file. For things that are
10 * part of the reference design but might not exist on child nodes we will
11 * follow the lead of the SoC dtsi files and leave their status as "disabled".
12 *
13 * Copyright 2022 Google LLC.
14 */
15
16#include <dt-bindings/input/gpio-keys.h>
17#include <dt-bindings/input/input.h>
18#include <dt-bindings/leds/common.h>
19
20#include "sc7280-qcard.dtsi"
21#include "sc7280-chrome-common.dtsi"
22
23/ {
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	/*
29	 * FIXED REGULATORS
30	 *
31	 * Sort order:
32	 * 1. parents above children.
33	 * 2. higher voltage above lower voltage.
34	 * 3. alphabetically by node name.
35	 */
36
37	/* This is the top level supply and variable voltage */
38	ppvar_sys: ppvar-sys-regulator {
39		compatible = "regulator-fixed";
40		regulator-name = "ppvar_sys";
41		regulator-always-on;
42		regulator-boot-on;
43	};
44
45	/* This divides ppvar_sys by 2, so voltage is variable */
46	src_vph_pwr: src-vph-pwr-regulator {
47		compatible = "regulator-fixed";
48		regulator-name = "src_vph_pwr";
49
50		/* EC turns on with switchcap_on; always on for AP */
51		regulator-always-on;
52		regulator-boot-on;
53
54		vin-supply = <&ppvar_sys>;
55	};
56
57	pp5000_s5: pp5000-s5-regulator {
58		compatible = "regulator-fixed";
59		regulator-name = "pp5000_s5";
60
61		/* EC turns on with en_pp5000_s5; always on for AP */
62		regulator-always-on;
63		regulator-boot-on;
64		regulator-min-microvolt = <5000000>;
65		regulator-max-microvolt = <5000000>;
66
67		vin-supply = <&ppvar_sys>;
68	};
69
70	pp3300_z1: pp3300-z1-regulator {
71		compatible = "regulator-fixed";
72		regulator-name = "pp3300_z1";
73
74		/* EC turns on with en_pp3300_z1; always on for AP */
75		regulator-always-on;
76		regulator-boot-on;
77		regulator-min-microvolt = <3300000>;
78		regulator-max-microvolt = <3300000>;
79
80		vin-supply = <&ppvar_sys>;
81	};
82
83	pp3300_codec: pp3300-codec-regulator {
84		compatible = "regulator-fixed";
85		regulator-name = "pp3300_codec";
86
87		regulator-min-microvolt = <3300000>;
88		regulator-max-microvolt = <3300000>;
89
90		gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
91		enable-active-high;
92		pinctrl-names = "default";
93		pinctrl-0 = <&en_pp3300_codec>;
94
95		vin-supply = <&pp3300_z1>;
96		status = "disabled";
97	};
98
99	pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
100		compatible = "regulator-fixed";
101		regulator-name = "pp3300_left_in_mlb";
102
103		regulator-min-microvolt = <3300000>;
104		regulator-max-microvolt = <3300000>;
105
106		gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
107		enable-active-high;
108		pinctrl-names = "default";
109		pinctrl-0 = <&en_pp3300_dx_edp>;
110
111		regulator-enable-ramp-delay = <3000>;
112
113		/*
114		 * eDP panel specs nearly always have a spec that says you
115		 * shouldn't turn them off an on again without waiting 500ms.
116		 * Add this as a board constraint since this rail is shared
117		 * between the panel and touchscreen.
118		 */
119		off-on-delay-us = <500000>;
120
121		/*
122		 * Stat the regulator on. This has the advantage of starting
123		 * the slow process of powering the panel on as soon as we
124		 * probe the regulator. It also avoids tripping the
125		 * off-on-delay immediately on every bootup.
126		 */
127		regulator-boot-on;
128
129		vin-supply = <&pp3300_z1>;
130	};
131
132	pp3300_mcu_fp:
133	pp3300_fp_ls:
134	pp3300_fp_mcu: pp3300-fp-regulator {
135		compatible = "regulator-fixed";
136		regulator-name = "pp3300_fp";
137
138		regulator-min-microvolt = <3300000>;
139		regulator-max-microvolt = <3300000>;
140
141		regulator-boot-on;
142		regulator-always-on;
143
144		/*
145		 * WARNING: it is intentional that GPIO 77 isn't listed here.
146		 * The userspace script for updating the fingerprint firmware
147		 * needs to control the FP regulators during a FW update,
148		 * hence the signal can't be owned by the kernel regulator.
149		 */
150
151		pinctrl-names = "default";
152		pinctrl-0 = <&en_fp_rails>;
153
154		vin-supply = <&pp3300_z1>;
155		status = "disabled";
156	};
157
158	pp3300_hub: pp3300-hub-regulator {
159		compatible = "regulator-fixed";
160		regulator-name = "pp3300_hub";
161
162		regulator-min-microvolt = <3300000>;
163		regulator-max-microvolt = <3300000>;
164
165		/* The BIOS leaves this regulator on */
166		regulator-boot-on;
167
168		gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
169		enable-active-high;
170		pinctrl-names = "default";
171		pinctrl-0 = <&hub_en>;
172
173		vin-supply = <&pp3300_z1>;
174	};
175
176	pp3300_tp: pp3300-tp-regulator {
177		compatible = "regulator-fixed";
178		regulator-name = "pp3300_tp";
179
180		regulator-min-microvolt = <3300000>;
181		regulator-max-microvolt = <3300000>;
182
183		/* AP turns on with PP1800_L18B_S0; always on for AP */
184		regulator-always-on;
185		regulator-boot-on;
186
187		vin-supply = <&pp3300_z1>;
188	};
189
190	pp3300_ssd: pp3300-ssd-regulator {
191		compatible = "regulator-fixed";
192		regulator-name = "pp3300_ssd";
193
194		regulator-min-microvolt = <3300000>;
195		regulator-max-microvolt = <3300000>;
196
197		gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
198		enable-active-high;
199		pinctrl-names = "default";
200		pinctrl-0 = <&ssd_en>;
201
202		/*
203		 * The bootloaer may have left PCIe configured. Powering this
204		 * off while the PCIe clocks are still running isn't great,
205		 * so it's better to default to this regulator being on.
206		 */
207		regulator-boot-on;
208
209		vin-supply = <&pp3300_z1>;
210	};
211
212	pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
213		compatible = "regulator-fixed";
214		regulator-name = "pp2850_vcm_wf_cam";
215
216		regulator-min-microvolt = <2850000>;
217		regulator-max-microvolt = <2850000>;
218
219		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
220		enable-active-high;
221		pinctrl-names = "default";
222		pinctrl-0 = <&wf_cam_en>;
223
224		vin-supply = <&pp3300_z1>;
225		status = "disabled";
226	};
227
228	pp2850_wf_cam: pp2850-wf-cam-regulator {
229		compatible = "regulator-fixed";
230		regulator-name = "pp2850_wf_cam";
231
232		regulator-min-microvolt = <2850000>;
233		regulator-max-microvolt = <2850000>;
234
235		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
236		enable-active-high;
237		/*
238		 * The pinconf can only be referenced once so we put it on the
239		 * first regulator and comment it out here.
240		 *
241		 * pinctrl-names = "default";
242		 * pinctrl-0 = <&wf_cam_en>;
243		 */
244
245		vin-supply = <&pp3300_z1>;
246		status = "disabled";
247	};
248
249	pp1800_fp: pp1800-fp-regulator {
250		compatible = "regulator-fixed";
251		regulator-name = "pp1800_fp";
252
253		regulator-min-microvolt = <1800000>;
254		regulator-max-microvolt = <1800000>;
255
256		regulator-boot-on;
257		regulator-always-on;
258
259		/*
260		 * WARNING: it is intentional that GPIO 77 isn't listed here.
261		 * The userspace script for updating the fingerprint firmware
262		 * needs to control the FP regulators during a FW update,
263		 * hence the signal can't be owned by the kernel regulator.
264		 */
265
266		pinctrl-names = "default";
267		pinctrl-0 = <&en_fp_rails>;
268
269		vin-supply = <&pp1800_l18b_s0>;
270		status = "disabled";
271	};
272
273	pp1800_wf_cam: pp1800-wf-cam-regulator {
274		compatible = "regulator-fixed";
275		regulator-name = "pp1800_wf_cam";
276
277		regulator-min-microvolt = <1800000>;
278		regulator-max-microvolt = <1800000>;
279
280		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
281		enable-active-high;
282		/*
283		 * The pinconf can only be referenced once so we put it on the
284		 * first regulator and comment it out here.
285		 *
286		 * pinctrl-names = "default";
287		 * pinctrl-0 = <&wf_cam_en>;
288		 */
289
290		vin-supply = <&vreg_l19b_s0>;
291		status = "disabled";
292	};
293
294	pp1200_wf_cam: pp1200-wf-cam-regulator {
295		compatible = "regulator-fixed";
296		regulator-name = "pp1200_wf_cam";
297
298		regulator-min-microvolt = <1200000>;
299		regulator-max-microvolt = <1200000>;
300
301		gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
302		enable-active-high;
303		/*
304		 * The pinconf can only be referenced once so we put it on the
305		 * first regulator and comment it out here.
306		 *
307		 * pinctrl-names = "default";
308		 * pinctrl-0 = <&wf_cam_en>;
309		 */
310
311		vin-supply = <&pp3300_z1>;
312		status = "disabled";
313	};
314
315	/* BOARD-SPECIFIC TOP LEVEL NODES */
316
317	max98360a: audio-codec-0 {
318		compatible = "maxim,max98360a";
319		pinctrl-names = "default";
320		pinctrl-0 = <&amp_en>;
321		sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
322		#sound-dai-cells = <0>;
323	};
324
325	pwmleds: pwmleds {
326		compatible = "pwm-leds";
327		status = "disabled";
328		keyboard_backlight: led-0 {
329			label = "cros_ec::kbd_backlight";
330			function = LED_FUNCTION_KBD_BACKLIGHT;
331			pwms = <&cros_ec_pwm 0>;
332			max-brightness = <1023>;
333		};
334	};
335};
336
337/*
338 * ADJUSTMENTS TO QCARD REGULATORS
339 *
340 * Mostly this is just board-local names for regulators that come from
341 * Qcard, but this also has some minor regulator overrides.
342 *
343 * Names are only listed here if regulators go somewhere other than a
344 * testpoint.
345 */
346
347/* From Qcard to our board; ordered by PMIC-ID / rail number */
348
349pp1256_s8b: &vreg_s8b_1p256 {};
350
351pp1800_l18b_s0: &vreg_l18b_1p8 {};
352pp1800_l18b:    &vreg_l18b_1p8 {};
353
354vreg_l19b_s0: &vreg_l19b_1p8 {};
355
356pp1800_alc5682: &vreg_l2c_1p8 {};
357pp1800_l2c:     &vreg_l2c_1p8 {};
358
359vreg_l4c: &vreg_l4c_1p8_3p0 {};
360
361ppvar_l6c: &vreg_l6c_2p96 {};
362
363pp3000_l7c: &vreg_l7c_3p0 {};
364
365pp1800_prox: &vreg_l8c_1p8 {};
366pp1800_l8c:  &vreg_l8c_1p8 {};
367
368pp2950_l9c: &vreg_l9c_2p96 {};
369
370pp1800_lcm:  &vreg_l12c_1p8 {};
371pp1800_mipi: &vreg_l12c_1p8 {};
372pp1800_l12c: &vreg_l12c_1p8 {};
373
374pp3300_lcm:  &vreg_l13c_3p0 {};
375pp3300_mipi: &vreg_l13c_3p0 {};
376pp3300_l13c: &vreg_l13c_3p0 {};
377
378/* From our board to Qcard; ordered same as node definition above */
379
380vreg_edp_bl: &ppvar_sys {};
381
382ts_avdd:      &pp3300_left_in_mlb {};
383vreg_edp_3p3: &pp3300_left_in_mlb {};
384
385/* Regulator overrides from Qcard */
386
387/*
388 * Herobrine boards only use l2c to power an external audio codec (like
389 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
390 */
391&vreg_l2c_1p8 {
392	regulator-min-microvolt = <1800000>;
393};
394
395/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
396
397&edp_panel {
398	/* Our board provides power to the qcard for the eDP panel. */
399	power-supply = <&vreg_edp_3p3>;
400};
401
402ap_sar_sensor_i2c: &i2c1 {
403	clock-frequency = <400000>;
404	status = "disabled";
405
406	ap_sar_sensor0: proximity@28 {
407		compatible = "semtech,sx9324";
408		reg = <0x28>;
409		#io-channel-cells = <1>;
410		pinctrl-names = "default";
411		pinctrl-0 = <&sar0_irq_odl>;
412
413		interrupt-parent = <&tlmm>;
414		interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
415
416		vdd-supply = <&pp1800_prox>;
417
418		label = "proximity-wifi_cellular-0";
419		status = "disabled";
420	};
421
422	ap_sar_sensor1: proximity@2c {
423		compatible = "semtech,sx9324";
424		reg = <0x2c>;
425		#io-channel-cells = <1>;
426		pinctrl-names = "default";
427		pinctrl-0 = <&sar1_irq_odl>;
428
429		interrupt-parent = <&tlmm>;
430		interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
431
432		vdd-supply = <&pp1800_prox>;
433
434		label = "proximity-wifi_cellular-1";
435		status = "disabled";
436	};
437};
438
439ap_i2c_tpm: &i2c14 {
440	status = "okay";
441	clock-frequency = <400000>;
442
443	tpm@50 {
444		compatible = "google,cr50";
445		reg = <0x50>;
446
447		pinctrl-names = "default";
448		pinctrl-0 = <&gsc_ap_int_odl>;
449
450		interrupt-parent = <&tlmm>;
451		interrupts = <104 IRQ_TYPE_EDGE_RISING>;
452	};
453};
454
455&mdss {
456	status = "okay";
457};
458
459&mdss_dp {
460	status = "okay";
461	pinctrl-names = "default";
462	pinctrl-0 = <&dp_hot_plug_det>;
463};
464
465&mdss_dp_out {
466	data-lanes = <0 1>;
467	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
468};
469
470&mdss_mdp {
471	status = "okay";
472};
473
474/* NVMe drive, enabled on a per-board basis */
475&pcie1 {
476	pinctrl-names = "default";
477	pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
478
479	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
480	vddpe-3v3-supply = <&pp3300_ssd>;
481};
482
483&pm8350c_pwm {
484	status = "okay";
485};
486
487&pm8350c_pwm_backlight {
488	status = "okay";
489
490	/* Our board provides power to the qcard for the backlight */
491	power-supply = <&vreg_edp_bl>;
492};
493
494&pmk8350_rtc {
495	status = "disabled";
496};
497
498&qupv3_id_0 {
499	status = "okay";
500};
501
502&qupv3_id_1 {
503	status = "okay";
504};
505
506/* SD Card, enabled on a per-board basis */
507&sdhc_2 {
508	pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
509	pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
510
511	vmmc-supply = <&pp2950_l9c>;
512	vqmmc-supply = <&ppvar_l6c>;
513
514	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
515};
516
517&spi_flash {
518	spi-max-frequency = <50000000>;
519};
520
521/* Fingerprint, enabled on a per-board basis */
522ap_spi_fp: &spi9 {
523	pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
524
525	cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
526
527	cros_ec_fp: ec@0 {
528		compatible = "google,cros-ec-fp", "google,cros-ec-spi";
529		reg = <0>;
530		interrupt-parent = <&tlmm>;
531		interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
532		pinctrl-names = "default";
533		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
534		boot0-gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
535		reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
536		spi-max-frequency = <3000000>;
537		vdd-supply = <&pp3300_fp_mcu>;
538	};
539};
540
541ap_ec_spi: &spi10 {
542	status = "okay";
543	pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
544
545	cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
546
547	cros_ec: ec@0 {
548		compatible = "google,cros-ec-spi";
549		reg = <0>;
550		interrupt-parent = <&tlmm>;
551		interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
552		pinctrl-names = "default";
553		pinctrl-0 = <&ap_ec_int_l>;
554		spi-max-frequency = <3000000>;
555
556		cros_ec_pwm: pwm {
557			compatible = "google,cros-ec-pwm";
558			#pwm-cells = <1>;
559		};
560
561		i2c_tunnel: i2c-tunnel {
562			compatible = "google,cros-ec-i2c-tunnel";
563			google,remote-bus = <0>;
564			#address-cells = <1>;
565			#size-cells = <0>;
566		};
567
568		typec {
569			compatible = "google,cros-ec-typec";
570			#address-cells = <1>;
571			#size-cells = <0>;
572
573			usb_c0: connector@0 {
574				compatible = "usb-c-connector";
575				reg = <0>;
576				label = "left";
577				power-role = "dual";
578				data-role = "host";
579				try-power-role = "source";
580			};
581
582			usb_c1: connector@1 {
583				compatible = "usb-c-connector";
584				reg = <1>;
585				label = "right";
586				power-role = "dual";
587				data-role = "host";
588				try-power-role = "source";
589			};
590		};
591	};
592};
593
594#include <arm/cros-ec-keyboard.dtsi>
595#include <arm/cros-ec-sbs.dtsi>
596
597&keyboard_controller {
598	function-row-physmap = <
599		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */
600		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */
601		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */
602		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */
603		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */
604		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */
605		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */
606		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */
607		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */
608		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */
609	>;
610	linux,keymap = <
611		MATRIX_KEY(0x00, 0x02, KEY_BACK)
612		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
613		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
614		MATRIX_KEY(0x01, 0x02, KEY_SCALE)
615		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
616		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
617		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
618		MATRIX_KEY(0x02, 0x09, KEY_MUTE)
619		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
620		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
621
622		CROS_STD_MAIN_KEYMAP
623	>;
624};
625
626&usb_1 {
627	status = "okay";
628};
629
630&usb_1_dwc3 {
631	dr_mode = "host";
632
633	#address-cells = <1>;
634	#size-cells = <0>;
635
636	/* 2.x hub on port 1 */
637	usb_hub_2_x: hub@1 {
638		compatible = "usbbda,5411";
639		reg = <1>;
640		vdd-supply = <&pp3300_hub>;
641		peer-hub = <&usb_hub_3_x>;
642	};
643
644	/* 3.x hub on port 2 */
645	usb_hub_3_x: hub@2 {
646		compatible = "usbbda,411";
647		reg = <2>;
648		vdd-supply = <&pp3300_hub>;
649		peer-hub = <&usb_hub_2_x>;
650	};
651};
652
653&usb_1_hsphy {
654	status = "okay";
655
656	qcom,hs-rise-fall-time-bp = <0>;
657	qcom,squelch-detector-bp = <(-2090)>;
658	qcom,hs-disconnect-bp = <1743>;
659	qcom,hs-amplitude-bp = <1780>;
660	qcom,hs-crossover-voltage-microvolt = <(-31000)>;
661	qcom,hs-output-impedance-micro-ohms = <2600000>;
662};
663
664&usb_1_qmpphy {
665	status = "okay";
666};
667
668/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
669
670&dp_hot_plug_det {
671	bias-disable;
672};
673
674&mi2s1_data0 {
675	drive-strength = <6>;
676	bias-disable;
677};
678
679&mi2s1_sclk {
680	drive-strength = <6>;
681	bias-disable;
682};
683
684&mi2s1_ws {
685	drive-strength = <6>;
686	bias-disable;
687};
688
689&pcie1_clkreq_n {
690	bias-pull-up;
691	drive-strength = <2>;
692};
693
694&qspi_cs0 {
695	bias-disable;
696	drive-strength = <8>;
697};
698
699&qspi_clk {
700	bias-disable;
701	drive-strength = <8>;
702};
703
704&qspi_data01 {
705	/* High-Z when no transfers; nice to park the lines */
706	bias-pull-up;
707	drive-strength = <8>;
708};
709
710/* For ap_tp_i2c */
711&qup_i2c0_data_clk {
712	/* Has external pull */
713	bias-disable;
714	drive-strength = <2>;
715};
716
717/* For ap_i2c_tpm */
718&qup_i2c14_data_clk {
719	/* Has external pull */
720	bias-disable;
721	drive-strength = <2>;
722};
723
724/* For ap_spi_fp */
725&qup_spi9_data_clk {
726	bias-disable;
727	drive-strength = <2>;
728};
729
730/* For ap_spi_fp */
731&qup_spi9_cs_gpio {
732	bias-disable;
733	drive-strength = <2>;
734};
735
736/* For ap_ec_spi */
737&qup_spi10_data_clk {
738	bias-disable;
739	drive-strength = <2>;
740};
741
742/* For ap_ec_spi */
743&qup_spi10_cs_gpio {
744	bias-disable;
745	drive-strength = <2>;
746};
747
748/* For uart_dbg */
749&qup_uart5_rx {
750	bias-pull-up;
751};
752
753/* For uart_dbg */
754&qup_uart5_tx {
755	bias-disable;
756	drive-strength = <2>;
757};
758
759&sdc2_clk {
760	bias-disable;
761	drive-strength = <16>;
762};
763
764&sdc2_cmd {
765	bias-pull-up;
766	drive-strength = <10>;
767};
768
769&sdc2_data {
770	bias-pull-up;
771	drive-strength = <10>;
772};
773
774/* PINCTRL - board-specific pinctrl */
775
776&pm7325_gpios {
777	/*
778	 * On a quick glance it might look like KYPD_VOL_UP_N is used, but
779	 * that only passes through to a debug connector and not to the actual
780	 * volume up key.
781	 */
782	status = "disabled"; /* No GPIOs are connected */
783};
784
785&pmk8350_gpios {
786	status = "disabled"; /* No GPIOs are connected */
787};
788
789&tlmm {
790	/* pinctrl settings for pins that have no real owners. */
791	pinctrl-names = "default";
792	pinctrl-0 = <&bios_flash_wp_od>;
793
794	amp_en: amp-en-state {
795		pins = "gpio63";
796		function = "gpio";
797		bias-disable;
798		drive-strength = <2>;
799	};
800
801	ap_ec_int_l: ap-ec-int-l-state {
802		pins = "gpio18";
803		function = "gpio";
804		bias-pull-up;
805	};
806
807	bios_flash_wp_od: bios-flash-wp-od-state {
808		pins = "gpio16";
809		function = "gpio";
810		/* Has external pull */
811		bias-disable;
812	};
813
814	en_fp_rails: en-fp-rails-state {
815		pins = "gpio77";
816		function = "gpio";
817		bias-disable;
818		drive-strength = <2>;
819		output-high;
820	};
821
822	en_pp3300_codec: en-pp3300-codec-state {
823		pins = "gpio105";
824		function = "gpio";
825		bias-disable;
826		drive-strength = <2>;
827	};
828
829	en_pp3300_dx_edp: en-pp3300-dx-edp-state {
830		pins = "gpio80";
831		function = "gpio";
832		bias-disable;
833		drive-strength = <2>;
834	};
835
836	fp_rst_l: fp-rst-l-state {
837		pins = "gpio78";
838		function = "gpio";
839		bias-disable;
840		drive-strength = <2>;
841	};
842
843	fp_to_ap_irq_l: fp-to-ap-irq-l-state {
844		pins = "gpio61";
845		function = "gpio";
846		/* Has external pullup */
847		bias-disable;
848	};
849
850	fpmcu_boot0: fpmcu-boot0-state {
851		pins = "gpio68";
852		function = "gpio";
853		bias-disable;
854	};
855
856	gsc_ap_int_odl: gsc-ap-int-odl-state {
857		pins = "gpio104";
858		function = "gpio";
859		bias-pull-up;
860	};
861
862	hp_irq: hp-irq-state {
863		pins = "gpio101";
864		function = "gpio";
865		bias-pull-up;
866	};
867
868	hub_en: hub-en-state {
869		pins = "gpio157";
870		function = "gpio";
871		bias-disable;
872		drive-strength = <2>;
873	};
874
875	pe_wake_odl: pe-wake-odl-state {
876		pins = "gpio3";
877		function = "gpio";
878		/* Has external pull */
879		bias-disable;
880		drive-strength = <2>;
881	};
882
883	/* For ap_spi_fp */
884	qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-state {
885		pins = "gpio39";
886		function = "gpio";
887		output-high;
888	};
889
890	/* For ap_ec_spi */
891	qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
892		pins = "gpio43";
893		function = "gpio";
894		output-high;
895	};
896
897	sar0_irq_odl: sar0-irq-odl-state {
898		pins = "gpio141";
899		function = "gpio";
900		bias-pull-up;
901	};
902
903	sar1_irq_odl: sar1-irq-odl-state {
904		pins = "gpio140";
905		function = "gpio";
906		bias-pull-up;
907	};
908
909	sd_cd_odl: sd-cd-odl-state {
910		pins = "gpio91";
911		function = "gpio";
912		bias-pull-up;
913	};
914
915	ssd_en: ssd-en-state {
916		pins = "gpio51";
917		function = "gpio";
918		bias-disable;
919		drive-strength = <2>;
920	};
921
922	ssd_rst_l: ssd-rst-l-state {
923		pins = "gpio2";
924		function = "gpio";
925		bias-disable;
926		drive-strength = <2>;
927		output-low;
928	};
929
930	tp_int_odl: tp-int-odl-state {
931		pins = "gpio7";
932		function = "gpio";
933		/* Has external pullup */
934		bias-disable;
935	};
936
937	wf_cam_en: wf-cam-en-state {
938		pins = "gpio119";
939		function = "gpio";
940		/* Has external pulldown */
941		bias-disable;
942		drive-strength = <2>;
943	};
944};
945