1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Herobrine baseboard device tree source 4 * 5 * The set of things in this file is a bit loosely defined. It's roughly 6 * defined as the set of things that the child boards happen to have in 7 * common. Since all of the child boards started from the same original 8 * design this is hopefully a large set of things but as more derivatives 9 * appear things may "bubble down" out of this file. For things that are 10 * part of the reference design but might not exist on child nodes we will 11 * follow the lead of the SoC dtsi files and leave their status as "disabled". 12 * 13 * Copyright 2022 Google LLC. 14 */ 15 16#include <dt-bindings/input/gpio-keys.h> 17#include <dt-bindings/input/input.h> 18#include <dt-bindings/leds/common.h> 19 20#include "sc7280-qcard.dtsi" 21#include "sc7280-chrome-common.dtsi" 22 23/ { 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 /* 29 * FIXED REGULATORS 30 * 31 * Sort order: 32 * 1. parents above children. 33 * 2. higher voltage above lower voltage. 34 * 3. alphabetically by node name. 35 */ 36 37 /* This is the top level supply and variable voltage */ 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; 41 regulator-always-on; 42 regulator-boot-on; 43 }; 44 45 /* This divides ppvar_sys by 2, so voltage is variable */ 46 src_vph_pwr: src-vph-pwr-regulator { 47 compatible = "regulator-fixed"; 48 regulator-name = "src_vph_pwr"; 49 50 /* EC turns on with switchcap_on; always on for AP */ 51 regulator-always-on; 52 regulator-boot-on; 53 54 vin-supply = <&ppvar_sys>; 55 }; 56 57 pp5000_s5: pp5000-s5-regulator { 58 compatible = "regulator-fixed"; 59 regulator-name = "pp5000_s5"; 60 61 /* EC turns on with en_pp5000_s5; always on for AP */ 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 67 vin-supply = <&ppvar_sys>; 68 }; 69 70 pp3300_z1: pp3300-z1-regulator { 71 compatible = "regulator-fixed"; 72 regulator-name = "pp3300_z1"; 73 74 /* EC turns on with en_pp3300_z1; always on for AP */ 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 80 vin-supply = <&ppvar_sys>; 81 }; 82 83 pp3300_codec: pp3300-codec-regulator { 84 compatible = "regulator-fixed"; 85 regulator-name = "pp3300_codec"; 86 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 90 gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&en_pp3300_codec>; 94 95 vin-supply = <&pp3300_z1>; 96 status = "disabled"; 97 }; 98 99 pp3300_left_in_mlb: pp3300-left-in-mlb-regulator { 100 compatible = "regulator-fixed"; 101 regulator-name = "pp3300_left_in_mlb"; 102 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 106 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>; 107 enable-active-high; 108 pinctrl-names = "default"; 109 pinctrl-0 = <&en_pp3300_dx_edp>; 110 111 vin-supply = <&pp3300_z1>; 112 }; 113 114 pp3300_mcu_fp: 115 pp3300_fp_ls: 116 pp3300_fp_mcu: pp3300-fp-regulator { 117 compatible = "regulator-fixed"; 118 regulator-name = "pp3300_fp"; 119 120 regulator-min-microvolt = <3300000>; 121 regulator-max-microvolt = <3300000>; 122 123 regulator-boot-on; 124 regulator-always-on; 125 126 /* 127 * WARNING: it is intentional that GPIO 77 isn't listed here. 128 * The userspace script for updating the fingerprint firmware 129 * needs to control the FP regulators during a FW update, 130 * hence the signal can't be owned by the kernel regulator. 131 */ 132 133 pinctrl-names = "default"; 134 pinctrl-0 = <&en_fp_rails>; 135 136 vin-supply = <&pp3300_z1>; 137 status = "disabled"; 138 }; 139 140 pp3300_hub: pp3300-hub-regulator { 141 compatible = "regulator-fixed"; 142 regulator-name = "pp3300_hub"; 143 144 regulator-min-microvolt = <3300000>; 145 regulator-max-microvolt = <3300000>; 146 147 /* The BIOS leaves this regulator on */ 148 regulator-boot-on; 149 150 gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>; 151 enable-active-high; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&hub_en>; 154 155 vin-supply = <&pp3300_z1>; 156 }; 157 158 pp3300_tp: pp3300-tp-regulator { 159 compatible = "regulator-fixed"; 160 regulator-name = "pp3300_tp"; 161 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 165 /* AP turns on with PP1800_L18B_S0; always on for AP */ 166 regulator-always-on; 167 regulator-boot-on; 168 169 vin-supply = <&pp3300_z1>; 170 }; 171 172 pp3300_ssd: pp3300-ssd-regulator { 173 compatible = "regulator-fixed"; 174 regulator-name = "pp3300_ssd"; 175 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 179 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; 180 enable-active-high; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&ssd_en>; 183 184 /* 185 * The bootloaer may have left PCIe configured. Powering this 186 * off while the PCIe clocks are still running isn't great, 187 * so it's better to default to this regulator being on. 188 */ 189 regulator-boot-on; 190 191 vin-supply = <&pp3300_z1>; 192 }; 193 194 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator { 195 compatible = "regulator-fixed"; 196 regulator-name = "pp2850_vcm_wf_cam"; 197 198 regulator-min-microvolt = <2850000>; 199 regulator-max-microvolt = <2850000>; 200 201 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 202 enable-active-high; 203 pinctrl-names = "default"; 204 pinctrl-0 = <&wf_cam_en>; 205 206 vin-supply = <&pp3300_z1>; 207 status = "disabled"; 208 }; 209 210 pp2850_wf_cam: pp2850-wf-cam-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "pp2850_wf_cam"; 213 214 regulator-min-microvolt = <2850000>; 215 regulator-max-microvolt = <2850000>; 216 217 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 218 enable-active-high; 219 /* 220 * The pinconf can only be referenced once so we put it on the 221 * first regulator and comment it out here. 222 * 223 * pinctrl-names = "default"; 224 * pinctrl-0 = <&wf_cam_en>; 225 */ 226 227 vin-supply = <&pp3300_z1>; 228 status = "disabled"; 229 }; 230 231 pp1800_fp: pp1800-fp-regulator { 232 compatible = "regulator-fixed"; 233 regulator-name = "pp1800_fp"; 234 235 regulator-min-microvolt = <1800000>; 236 regulator-max-microvolt = <1800000>; 237 238 regulator-boot-on; 239 regulator-always-on; 240 241 /* 242 * WARNING: it is intentional that GPIO 77 isn't listed here. 243 * The userspace script for updating the fingerprint firmware 244 * needs to control the FP regulators during a FW update, 245 * hence the signal can't be owned by the kernel regulator. 246 */ 247 248 pinctrl-names = "default"; 249 pinctrl-0 = <&en_fp_rails>; 250 251 vin-supply = <&pp1800_l18b_s0>; 252 status = "disabled"; 253 }; 254 255 pp1800_wf_cam: pp1800-wf-cam-regulator { 256 compatible = "regulator-fixed"; 257 regulator-name = "pp1800_wf_cam"; 258 259 regulator-min-microvolt = <1800000>; 260 regulator-max-microvolt = <1800000>; 261 262 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 263 enable-active-high; 264 /* 265 * The pinconf can only be referenced once so we put it on the 266 * first regulator and comment it out here. 267 * 268 * pinctrl-names = "default"; 269 * pinctrl-0 = <&wf_cam_en>; 270 */ 271 272 vin-supply = <&vreg_l19b_s0>; 273 status = "disabled"; 274 }; 275 276 pp1200_wf_cam: pp1200-wf-cam-regulator { 277 compatible = "regulator-fixed"; 278 regulator-name = "pp1200_wf_cam"; 279 280 regulator-min-microvolt = <1200000>; 281 regulator-max-microvolt = <1200000>; 282 283 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 284 enable-active-high; 285 /* 286 * The pinconf can only be referenced once so we put it on the 287 * first regulator and comment it out here. 288 * 289 * pinctrl-names = "default"; 290 * pinctrl-0 = <&wf_cam_en>; 291 */ 292 293 vin-supply = <&pp3300_z1>; 294 status = "disabled"; 295 }; 296 297 /* BOARD-SPECIFIC TOP LEVEL NODES */ 298 299 max98360a: audio-codec-0 { 300 compatible = "maxim,max98360a"; 301 pinctrl-names = "default"; 302 pinctrl-0 = <&_en>; 303 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 304 #sound-dai-cells = <0>; 305 }; 306 307 pwmleds: pwmleds { 308 compatible = "pwm-leds"; 309 status = "disabled"; 310 keyboard_backlight: led-0 { 311 label = "cros_ec::kbd_backlight"; 312 function = LED_FUNCTION_KBD_BACKLIGHT; 313 pwms = <&cros_ec_pwm 0>; 314 max-brightness = <1023>; 315 }; 316 }; 317}; 318 319/* 320 * ADJUSTMENTS TO QCARD REGULATORS 321 * 322 * Mostly this is just board-local names for regulators that come from 323 * Qcard, but this also has some minor regulator overrides. 324 * 325 * Names are only listed here if regulators go somewhere other than a 326 * testpoint. 327 */ 328 329/* From Qcard to our board; ordered by PMIC-ID / rail number */ 330 331pp1256_s8b: &vreg_s8b_1p256 {}; 332 333pp1800_l18b_s0: &vreg_l18b_1p8 {}; 334pp1800_l18b: &vreg_l18b_1p8 {}; 335 336vreg_l19b_s0: &vreg_l19b_1p8 {}; 337 338pp1800_alc5682: &vreg_l2c_1p8 {}; 339pp1800_l2c: &vreg_l2c_1p8 {}; 340 341vreg_l4c: &vreg_l4c_1p8_3p0 {}; 342 343ppvar_l6c: &vreg_l6c_2p96 {}; 344 345pp3000_l7c: &vreg_l7c_3p0 {}; 346 347pp1800_prox: &vreg_l8c_1p8 {}; 348pp1800_l8c: &vreg_l8c_1p8 {}; 349 350pp2950_l9c: &vreg_l9c_2p96 {}; 351 352pp1800_lcm: &vreg_l12c_1p8 {}; 353pp1800_mipi: &vreg_l12c_1p8 {}; 354pp1800_l12c: &vreg_l12c_1p8 {}; 355 356pp3300_lcm: &vreg_l13c_3p0 {}; 357pp3300_mipi: &vreg_l13c_3p0 {}; 358pp3300_l13c: &vreg_l13c_3p0 {}; 359 360/* From our board to Qcard; ordered same as node definition above */ 361 362vreg_edp_bl: &ppvar_sys {}; 363 364ts_avdd: &pp3300_left_in_mlb {}; 365vreg_edp_3p3: &pp3300_left_in_mlb {}; 366 367/* Regulator overrides from Qcard */ 368 369/* 370 * Herobrine boards only use l2c to power an external audio codec (like 371 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage. 372 */ 373&vreg_l2c_1p8 { 374 regulator-min-microvolt = <1800000>; 375}; 376 377/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 378 379&edp_panel { 380 /* Our board provides power to the qcard for the eDP panel. */ 381 power-supply = <&vreg_edp_3p3>; 382}; 383 384ap_sar_sensor_i2c: &i2c1 { 385 clock-frequency = <400000>; 386 status = "disabled"; 387 388 ap_sar_sensor0: proximity@28 { 389 compatible = "semtech,sx9324"; 390 reg = <0x28>; 391 #io-channel-cells = <1>; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&sar0_irq_odl>; 394 395 interrupt-parent = <&tlmm>; 396 interrupts = <141 IRQ_TYPE_LEVEL_LOW>; 397 398 vdd-supply = <&pp1800_prox>; 399 400 label = "proximity-wifi_cellular-0"; 401 status = "disabled"; 402 }; 403 404 ap_sar_sensor1: proximity@2c { 405 compatible = "semtech,sx9324"; 406 reg = <0x2c>; 407 #io-channel-cells = <1>; 408 pinctrl-names = "default"; 409 pinctrl-0 = <&sar1_irq_odl>; 410 411 interrupt-parent = <&tlmm>; 412 interrupts = <140 IRQ_TYPE_LEVEL_LOW>; 413 414 vdd-supply = <&pp1800_prox>; 415 416 label = "proximity-wifi_cellular-1"; 417 status = "disabled"; 418 }; 419}; 420 421ap_i2c_tpm: &i2c14 { 422 status = "okay"; 423 clock-frequency = <400000>; 424 425 tpm@50 { 426 compatible = "google,cr50"; 427 reg = <0x50>; 428 429 pinctrl-names = "default"; 430 pinctrl-0 = <&gsc_ap_int_odl>; 431 432 interrupt-parent = <&tlmm>; 433 interrupts = <104 IRQ_TYPE_EDGE_RISING>; 434 }; 435}; 436 437&mdss { 438 status = "okay"; 439}; 440 441&mdss_dp { 442 status = "okay"; 443 pinctrl-names = "default"; 444 pinctrl-0 = <&dp_hot_plug_det>; 445}; 446 447&mdss_dp_out { 448 data-lanes = <0 1>; 449 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 450}; 451 452&mdss_mdp { 453 status = "okay"; 454}; 455 456/* NVMe drive, enabled on a per-board basis */ 457&pcie1 { 458 pinctrl-names = "default"; 459 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>; 460 461 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 462 vddpe-3v3-supply = <&pp3300_ssd>; 463}; 464 465&pm8350c_pwm { 466 status = "okay"; 467}; 468 469&pm8350c_pwm_backlight { 470 status = "okay"; 471 472 /* Our board provides power to the qcard for the backlight */ 473 power-supply = <&vreg_edp_bl>; 474}; 475 476&pmk8350_rtc { 477 status = "disabled"; 478}; 479 480&qupv3_id_0 { 481 status = "okay"; 482}; 483 484&qupv3_id_1 { 485 status = "okay"; 486}; 487 488/* SD Card, enabled on a per-board basis */ 489&sdhc_2 { 490 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>; 491 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>; 492 493 vmmc-supply = <&pp2950_l9c>; 494 vqmmc-supply = <&ppvar_l6c>; 495 496 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 497}; 498 499&spi_flash { 500 spi-max-frequency = <50000000>; 501}; 502 503/* Fingerprint, enabled on a per-board basis */ 504ap_spi_fp: &spi9 { 505 pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>; 506 507 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; 508 509 cros_ec_fp: ec@0 { 510 compatible = "google,cros-ec-fp", "google,cros-ec-spi"; 511 reg = <0>; 512 interrupt-parent = <&tlmm>; 513 interrupts = <61 IRQ_TYPE_LEVEL_LOW>; 514 pinctrl-names = "default"; 515 pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>; 516 boot0-gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>; 517 reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>; 518 spi-max-frequency = <3000000>; 519 vdd-supply = <&pp3300_fp_mcu>; 520 }; 521}; 522 523ap_ec_spi: &spi10 { 524 status = "okay"; 525 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>; 526 527 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; 528 529 cros_ec: ec@0 { 530 compatible = "google,cros-ec-spi"; 531 reg = <0>; 532 interrupt-parent = <&tlmm>; 533 interrupts = <18 IRQ_TYPE_LEVEL_LOW>; 534 pinctrl-names = "default"; 535 pinctrl-0 = <&ap_ec_int_l>; 536 spi-max-frequency = <3000000>; 537 538 cros_ec_pwm: pwm { 539 compatible = "google,cros-ec-pwm"; 540 #pwm-cells = <1>; 541 }; 542 543 i2c_tunnel: i2c-tunnel { 544 compatible = "google,cros-ec-i2c-tunnel"; 545 google,remote-bus = <0>; 546 #address-cells = <1>; 547 #size-cells = <0>; 548 }; 549 550 typec { 551 compatible = "google,cros-ec-typec"; 552 #address-cells = <1>; 553 #size-cells = <0>; 554 555 usb_c0: connector@0 { 556 compatible = "usb-c-connector"; 557 reg = <0>; 558 label = "left"; 559 power-role = "dual"; 560 data-role = "host"; 561 try-power-role = "source"; 562 }; 563 564 usb_c1: connector@1 { 565 compatible = "usb-c-connector"; 566 reg = <1>; 567 label = "right"; 568 power-role = "dual"; 569 data-role = "host"; 570 try-power-role = "source"; 571 }; 572 }; 573 }; 574}; 575 576#include <arm/cros-ec-keyboard.dtsi> 577#include <arm/cros-ec-sbs.dtsi> 578 579&keyboard_controller { 580 function-row-physmap = < 581 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 582 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 583 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 584 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 585 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 586 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 587 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 588 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 589 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 590 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 591 >; 592 linux,keymap = < 593 MATRIX_KEY(0x00, 0x02, KEY_BACK) 594 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 595 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 596 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 597 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 598 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 599 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 600 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 601 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 602 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 603 604 CROS_STD_MAIN_KEYMAP 605 >; 606}; 607 608&usb_1 { 609 status = "okay"; 610}; 611 612&usb_1_dwc3 { 613 dr_mode = "host"; 614 615 #address-cells = <1>; 616 #size-cells = <0>; 617 618 /* 2.x hub on port 1 */ 619 usb_hub_2_x: hub@1 { 620 compatible = "usbbda,5411"; 621 reg = <1>; 622 vdd-supply = <&pp3300_hub>; 623 peer-hub = <&usb_hub_3_x>; 624 }; 625 626 /* 3.x hub on port 2 */ 627 usb_hub_3_x: hub@2 { 628 compatible = "usbbda,411"; 629 reg = <2>; 630 vdd-supply = <&pp3300_hub>; 631 peer-hub = <&usb_hub_2_x>; 632 }; 633}; 634 635&usb_1_hsphy { 636 status = "okay"; 637 638 qcom,hs-rise-fall-time-bp = <0>; 639 qcom,squelch-detector-bp = <(-2090)>; 640 qcom,hs-disconnect-bp = <1743>; 641 qcom,hs-amplitude-bp = <1780>; 642 qcom,hs-crossover-voltage-microvolt = <(-31000)>; 643 qcom,hs-output-impedance-micro-ohms = <2600000>; 644}; 645 646&usb_1_qmpphy { 647 status = "okay"; 648}; 649 650/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 651 652&dp_hot_plug_det { 653 bias-disable; 654}; 655 656&mi2s1_data0 { 657 drive-strength = <6>; 658 bias-disable; 659}; 660 661&mi2s1_sclk { 662 drive-strength = <6>; 663 bias-disable; 664}; 665 666&mi2s1_ws { 667 drive-strength = <6>; 668 bias-disable; 669}; 670 671&pcie1_clkreq_n { 672 bias-pull-up; 673 drive-strength = <2>; 674}; 675 676&qspi_cs0 { 677 bias-disable; 678 drive-strength = <8>; 679}; 680 681&qspi_clk { 682 bias-disable; 683 drive-strength = <8>; 684}; 685 686&qspi_data01 { 687 /* High-Z when no transfers; nice to park the lines */ 688 bias-pull-up; 689 drive-strength = <8>; 690}; 691 692/* For ap_tp_i2c */ 693&qup_i2c0_data_clk { 694 /* Has external pull */ 695 bias-disable; 696 drive-strength = <2>; 697}; 698 699/* For ap_i2c_tpm */ 700&qup_i2c14_data_clk { 701 /* Has external pull */ 702 bias-disable; 703 drive-strength = <2>; 704}; 705 706/* For ap_spi_fp */ 707&qup_spi9_data_clk { 708 bias-disable; 709 drive-strength = <2>; 710}; 711 712/* For ap_spi_fp */ 713&qup_spi9_cs_gpio { 714 bias-disable; 715 drive-strength = <2>; 716}; 717 718/* For ap_ec_spi */ 719&qup_spi10_data_clk { 720 bias-disable; 721 drive-strength = <2>; 722}; 723 724/* For ap_ec_spi */ 725&qup_spi10_cs_gpio { 726 bias-disable; 727 drive-strength = <2>; 728}; 729 730/* For uart_dbg */ 731&qup_uart5_rx { 732 bias-pull-up; 733}; 734 735/* For uart_dbg */ 736&qup_uart5_tx { 737 bias-disable; 738 drive-strength = <2>; 739}; 740 741&sdc2_clk { 742 bias-disable; 743 drive-strength = <16>; 744}; 745 746&sdc2_cmd { 747 bias-pull-up; 748 drive-strength = <10>; 749}; 750 751&sdc2_data { 752 bias-pull-up; 753 drive-strength = <10>; 754}; 755 756/* PINCTRL - board-specific pinctrl */ 757 758&pm7325_gpios { 759 /* 760 * On a quick glance it might look like KYPD_VOL_UP_N is used, but 761 * that only passes through to a debug connector and not to the actual 762 * volume up key. 763 */ 764 status = "disabled"; /* No GPIOs are connected */ 765}; 766 767&pmk8350_gpios { 768 status = "disabled"; /* No GPIOs are connected */ 769}; 770 771&tlmm { 772 /* pinctrl settings for pins that have no real owners. */ 773 pinctrl-names = "default"; 774 pinctrl-0 = <&bios_flash_wp_od>; 775 776 amp_en: amp-en-state { 777 pins = "gpio63"; 778 function = "gpio"; 779 bias-disable; 780 drive-strength = <2>; 781 }; 782 783 ap_ec_int_l: ap-ec-int-l-state { 784 pins = "gpio18"; 785 function = "gpio"; 786 bias-pull-up; 787 }; 788 789 bios_flash_wp_od: bios-flash-wp-od-state { 790 pins = "gpio16"; 791 function = "gpio"; 792 /* Has external pull */ 793 bias-disable; 794 }; 795 796 en_fp_rails: en-fp-rails-state { 797 pins = "gpio77"; 798 function = "gpio"; 799 bias-disable; 800 drive-strength = <2>; 801 output-high; 802 }; 803 804 en_pp3300_codec: en-pp3300-codec-state { 805 pins = "gpio105"; 806 function = "gpio"; 807 bias-disable; 808 drive-strength = <2>; 809 }; 810 811 en_pp3300_dx_edp: en-pp3300-dx-edp-state { 812 pins = "gpio80"; 813 function = "gpio"; 814 bias-disable; 815 drive-strength = <2>; 816 }; 817 818 fp_rst_l: fp-rst-l-state { 819 pins = "gpio78"; 820 function = "gpio"; 821 bias-disable; 822 drive-strength = <2>; 823 }; 824 825 fp_to_ap_irq_l: fp-to-ap-irq-l-state { 826 pins = "gpio61"; 827 function = "gpio"; 828 /* Has external pullup */ 829 bias-disable; 830 }; 831 832 fpmcu_boot0: fpmcu-boot0-state { 833 pins = "gpio68"; 834 function = "gpio"; 835 bias-disable; 836 }; 837 838 gsc_ap_int_odl: gsc-ap-int-odl-state { 839 pins = "gpio104"; 840 function = "gpio"; 841 bias-pull-up; 842 }; 843 844 hp_irq: hp-irq-state { 845 pins = "gpio101"; 846 function = "gpio"; 847 bias-pull-up; 848 }; 849 850 hub_en: hub-en-state { 851 pins = "gpio157"; 852 function = "gpio"; 853 bias-disable; 854 drive-strength = <2>; 855 }; 856 857 pe_wake_odl: pe-wake-odl-state { 858 pins = "gpio3"; 859 function = "gpio"; 860 /* Has external pull */ 861 bias-disable; 862 drive-strength = <2>; 863 }; 864 865 /* For ap_spi_fp */ 866 qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-state { 867 pins = "gpio39"; 868 function = "gpio"; 869 output-high; 870 }; 871 872 /* For ap_ec_spi */ 873 qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state { 874 pins = "gpio43"; 875 function = "gpio"; 876 output-high; 877 }; 878 879 sar0_irq_odl: sar0-irq-odl-state { 880 pins = "gpio141"; 881 function = "gpio"; 882 bias-pull-up; 883 }; 884 885 sar1_irq_odl: sar1-irq-odl-state { 886 pins = "gpio140"; 887 function = "gpio"; 888 bias-pull-up; 889 }; 890 891 sd_cd_odl: sd-cd-odl-state { 892 pins = "gpio91"; 893 function = "gpio"; 894 bias-pull-up; 895 }; 896 897 ssd_en: ssd-en-state { 898 pins = "gpio51"; 899 function = "gpio"; 900 bias-disable; 901 drive-strength = <2>; 902 }; 903 904 ssd_rst_l: ssd-rst-l-state { 905 pins = "gpio2"; 906 function = "gpio"; 907 bias-disable; 908 drive-strength = <2>; 909 output-low; 910 }; 911 912 tp_int_odl: tp-int-odl-state { 913 pins = "gpio7"; 914 function = "gpio"; 915 /* Has external pullup */ 916 bias-disable; 917 }; 918 919 wf_cam_en: wf-cam-en-state { 920 pins = "gpio119"; 921 function = "gpio"; 922 /* Has external pulldown */ 923 bias-disable; 924 drive-strength = <2>; 925 }; 926}; 927