1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Villager board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8#include "sc7280-herobrine.dtsi"
9
10/*
11 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
12 *
13 * Sort order matches the order in the parent files (parents before children).
14 */
15
16&pp3300_codec {
17	status = "okay";
18};
19
20/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
21
22ap_tp_i2c: &i2c0 {
23	status = "okay";
24	clock-frequency = <400000>;
25
26	trackpad: trackpad@2c {
27		compatible = "hid-over-i2c";
28		reg = <0x2c>;
29		pinctrl-names = "default";
30		pinctrl-0 = <&tp_int_odl>;
31
32		interrupt-parent = <&tlmm>;
33		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
34
35		hid-descr-addr = <0x20>;
36		vcc-supply = <&pp3300_z1>;
37
38		wakeup-source;
39	};
40};
41
42ts_i2c: &i2c13 {
43	status = "okay";
44	clock-frequency = <400000>;
45
46	ap_ts: touchscreen@10 {
47		compatible = "elan,ekth6915";
48		reg = <0x10>;
49		pinctrl-names = "default";
50		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
51
52		interrupt-parent = <&tlmm>;
53		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
54
55		reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
56
57		vcc33-supply = <&ts_avdd>;
58	};
59};
60
61&ap_sar_sensor_i2c {
62	status = "okay";
63};
64
65&ap_sar_sensor0 {
66	status = "okay";
67};
68
69&ap_sar_sensor1 {
70	status = "okay";
71};
72
73&mdss_edp {
74	status = "okay";
75};
76
77&mdss_edp_phy {
78	status = "okay";
79};
80
81&pwmleds {
82	status = "okay";
83};
84
85/* For eMMC */
86&sdhc_1 {
87	status = "okay";
88};
89
90/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
91
92&ts_rst_conn {
93	bias-disable;
94};
95
96/* PINCTRL - BOARD-SPECIFIC */
97
98/*
99 * Methodology for gpio-line-names:
100 * - If a pin goes to herobrine board and is named it gets that name.
101 * - If a pin goes to herobrine board and is not named, it gets no name.
102 * - If a pin is totally internal to Qcard then it gets Qcard name.
103 * - If a pin is not hooked up on Qcard, it gets no name.
104 */
105
106&pm8350c_gpios {
107	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
108			  "AP_SUSPEND",
109			  "PM8008_1_RST_N",
110			  "",
111			  "",
112			  "",
113			  "PMIC_EDP_BL_EN",
114			  "PMIC_EDP_BL_PWM",
115			  "";
116};
117
118&tlmm {
119	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
120			  "AP_TP_I2C_SCL",
121			  "SSD_RST_L",
122			  "PE_WAKE_ODL",
123			  "AP_SAR_SDA",
124			  "AP_SAR_SCL",
125			  "PRB_SC_GPIO_6",
126			  "TP_INT_ODL",
127			  "HP_I2C_SDA",
128			  "HP_I2C_SCL",
129
130			  "GNSS_L1_EN",			/* 10 */
131			  "GNSS_L5_EN",
132			  "SPI_AP_MOSI",
133			  "SPI_AP_MISO",
134			  "SPI_AP_CLK",
135			  "SPI_AP_CS0_L",
136			  /*
137			   * AP_FLASH_WP is crossystem ABI. Schematics
138			   * call it BIOS_FLASH_WP_OD.
139			   */
140			  "AP_FLASH_WP",
141			  "",
142			  "AP_EC_INT_L",
143			  "",
144
145			  "UF_CAM_RST_L",		/* 20 */
146			  "WF_CAM_RST_L",
147			  "UART_AP_TX_DBG_RX",
148			  "UART_DBG_TX_AP_RX",
149			  "",
150			  "PM8008_IRQ_1",
151			  "HOST2WLAN_SOL",
152			  "WLAN2HOST_SOL",
153			  "MOS_BT_UART_CTS",
154			  "MOS_BT_UART_RFR",
155
156			  "MOS_BT_UART_TX",		/* 30 */
157			  "MOS_BT_UART_RX",
158			  "PRB_SC_GPIO_32",
159			  "HUB_RST_L",
160			  "",
161			  "",
162			  "AP_SPI_FP_MISO",
163			  "AP_SPI_FP_MOSI",
164			  "AP_SPI_FP_CLK",
165			  "AP_SPI_FP_CS_L",
166
167			  "AP_EC_SPI_MISO",		/* 40 */
168			  "AP_EC_SPI_MOSI",
169			  "AP_EC_SPI_CLK",
170			  "AP_EC_SPI_CS_L",
171			  "LCM_RST_L",
172			  "EARLY_EUD_N",
173			  "",
174			  "DP_HOT_PLUG_DET",
175			  "IO_BRD_MLB_ID0",
176			  "IO_BRD_MLB_ID1",
177
178			  "IO_BRD_MLB_ID2",		/* 50 */
179			  "SSD_EN",
180			  "TS_I2C_SDA_CONN",
181			  "TS_I2C_CLK_CONN",
182			  "TS_RST_CONN",
183			  "TS_INT_CONN",
184			  "AP_I2C_TPM_SDA",
185			  "AP_I2C_TPM_SCL",
186			  "PRB_SC_GPIO_58",
187			  "PRB_SC_GPIO_59",
188
189			  "EDP_HOT_PLUG_DET_N",		/* 60 */
190			  "FP_TO_AP_IRQ_L",
191			  "",
192			  "AMP_EN",
193			  "CAM0_MCLK_GPIO_64",
194			  "CAM1_MCLK_GPIO_65",
195			  "WF_CAM_MCLK",
196			  "PRB_SC_GPIO_67",
197			  "FPMCU_BOOT0",
198			  "UF_CAM_SDA",
199
200			  "UF_CAM_SCL",			/* 70 */
201			  "",
202			  "",
203			  "WF_CAM_SDA",
204			  "WF_CAM_SCL",
205			  "",
206			  "",
207			  "EN_FP_RAILS",
208			  "FP_RST_L",
209			  "PCIE1_CLKREQ_ODL",
210
211			  "EN_PP3300_DX_EDP",		/* 80 */
212			  "SC_GPIO_81",
213			  "FORCED_USB_BOOT",
214			  "WCD_RESET_N",
215			  "MOS_WLAN_EN",
216			  "MOS_BT_EN",
217			  "MOS_SW_CTRL",
218			  "MOS_PCIE0_RST",
219			  "MOS_PCIE0_CLKREQ_N",
220			  "MOS_PCIE0_WAKE_N",
221
222			  "MOS_LAA_AS_EN",		/* 90 */
223			  "SD_CD_ODL",
224			  "",
225			  "",
226			  "MOS_BT_WLAN_SLIMBUS_CLK",
227			  "MOS_BT_WLAN_SLIMBUS_DAT0",
228			  "HP_MCLK",
229			  "HP_BCLK",
230			  "HP_DOUT",
231			  "HP_DIN",
232
233			  "HP_LRCLK",			/* 100 */
234			  "HP_IRQ",
235			  "",
236			  "",
237			  "GSC_AP_INT_ODL",
238			  "EN_PP3300_CODEC",
239			  "AMP_BCLK",
240			  "AMP_DIN",
241			  "AMP_LRCLK",
242			  "UIM1_DATA_GPIO_109",
243
244			  "UIM1_CLK_GPIO_110",		/* 110 */
245			  "UIM1_RESET_GPIO_111",
246			  "PRB_SC_GPIO_112",
247			  "UIM0_DATA",
248			  "UIM0_CLK",
249			  "UIM0_RST",
250			  "UIM0_PRESENT_ODL",
251			  "SDM_RFFE0_CLK",
252			  "SDM_RFFE0_DATA",
253			  "WF_CAM_EN",
254
255			  "FASTBOOT_SEL_0",		/* 120 */
256			  "SC_GPIO_121",
257			  "FASTBOOT_SEL_1",
258			  "SC_GPIO_123",
259			  "FASTBOOT_SEL_2",
260			  "SM_RFFE4_CLK_GRFC_8",
261			  "SM_RFFE4_DATA_GRFC_9",
262			  "WLAN_COEX_UART1_RX",
263			  "WLAN_COEX_UART1_TX",
264			  "PRB_SC_GPIO_129",
265
266			  "LCM_ID0",			/* 130 */
267			  "LCM_ID1",
268			  "",
269			  "SDR_QLINK_REQ",
270			  "SDR_QLINK_EN",
271			  "QLINK0_WMSS_RESET_N",
272			  "SMR526_QLINK1_REQ",
273			  "SMR526_QLINK1_EN",
274			  "SMR526_QLINK1_WMSS_RESET_N",
275			  "PRB_SC_GPIO_139",
276
277			  "SAR1_IRQ_ODL",		/* 140 */
278			  "SAR0_IRQ_ODL",
279			  "PRB_SC_GPIO_142",
280			  "",
281			  "WCD_SWR_TX_CLK",
282			  "WCD_SWR_TX_DATA0",
283			  "WCD_SWR_TX_DATA1",
284			  "WCD_SWR_RX_CLK",
285			  "WCD_SWR_RX_DATA0",
286			  "WCD_SWR_RX_DATA1",
287
288			  "DMIC01_CLK",			/* 150 */
289			  "DMIC01_DATA",
290			  "DMIC23_CLK",
291			  "DMIC23_DATA",
292			  "",
293			  "",
294			  "EC_IN_RW_ODL",
295			  "HUB_EN",
296			  "WCD_SWR_TX_DATA2",
297			  "",
298
299			  "",				/* 160 */
300			  "",
301			  "",
302			  "",
303			  "",
304			  "",
305			  "",
306			  "",
307			  "",
308			  "",
309
310			  "",				/* 170 */
311			  "MOS_BLE_UART_TX",
312			  "MOS_BLE_UART_RX",
313			  "",
314			  "";
315};
316