1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Villager board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8/dts-v1/;
9
10#include "sc7280-herobrine.dtsi"
11
12/ {
13	model = "Google Villager (rev0+)";
14	compatible = "google,villager", "qcom,sc7280";
15};
16
17/*
18 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
19 *
20 * Sort order matches the order in the parent files (parents before children).
21 */
22
23&pp3300_codec {
24	status = "okay";
25};
26
27/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
28
29ap_tp_i2c: &i2c0 {
30	status = "okay";
31	clock-frequency = <400000>;
32
33	trackpad: trackpad@2c {
34		compatible = "hid-over-i2c";
35		reg = <0x2c>;
36		pinctrl-names = "default";
37		pinctrl-0 = <&tp_int_odl>;
38
39		interrupt-parent = <&tlmm>;
40		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
41
42		hid-descr-addr = <0x20>;
43		vcc-supply = <&pp3300_z1>;
44
45		wakeup-source;
46	};
47};
48
49&ap_sar_sensor_i2c {
50	status = "okay";
51};
52
53&ap_sar_sensor0 {
54	status = "okay";
55};
56
57&ap_sar_sensor1 {
58	status = "okay";
59};
60
61&mdss_edp {
62	status = "okay";
63};
64
65&mdss_edp_phy {
66	status = "okay";
67};
68
69/* For nvme */
70&pcie1 {
71	status = "okay";
72};
73
74/* For nvme */
75&pcie1_phy {
76	status = "okay";
77};
78
79/* For eMMC */
80&sdhc_1 {
81	status = "okay";
82};
83
84/* PINCTRL - BOARD-SPECIFIC */
85
86/*
87 * Methodology for gpio-line-names:
88 * - If a pin goes to herobrine board and is named it gets that name.
89 * - If a pin goes to herobrine board and is not named, it gets no name.
90 * - If a pin is totally internal to Qcard then it gets Qcard name.
91 * - If a pin is not hooked up on Qcard, it gets no name.
92 */
93
94&pm8350c_gpios {
95	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
96			  "AP_SUSPEND",
97			  "PM8008_1_RST_N",
98			  "",
99			  "",
100			  "",
101			  "PMIC_EDP_BL_EN",
102			  "PMIC_EDP_BL_PWM",
103			  "";
104};
105
106&tlmm {
107	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
108			  "AP_TP_I2C_SCL",
109			  "SSD_RST_L",
110			  "PE_WAKE_ODL",
111			  "AP_SAR_SDA",
112			  "AP_SAR_SCL",
113			  "PRB_SC_GPIO_6",
114			  "TP_INT_ODL",
115			  "HP_I2C_SDA",
116			  "HP_I2C_SCL",
117
118			  "GNSS_L1_EN",			/* 10 */
119			  "GNSS_L5_EN",
120			  "SPI_AP_MOSI",
121			  "SPI_AP_MISO",
122			  "SPI_AP_CLK",
123			  "SPI_AP_CS0_L",
124			  /*
125			   * AP_FLASH_WP is crossystem ABI. Schematics
126			   * call it BIOS_FLASH_WP_OD.
127			   */
128			  "AP_FLASH_WP",
129			  "",
130			  "AP_EC_INT_L",
131			  "",
132
133			  "UF_CAM_RST_L",		/* 20 */
134			  "WF_CAM_RST_L",
135			  "UART_AP_TX_DBG_RX",
136			  "UART_DBG_TX_AP_RX",
137			  "",
138			  "PM8008_IRQ_1",
139			  "HOST2WLAN_SOL",
140			  "WLAN2HOST_SOL",
141			  "MOS_BT_UART_CTS",
142			  "MOS_BT_UART_RFR",
143
144			  "MOS_BT_UART_TX",		/* 30 */
145			  "MOS_BT_UART_RX",
146			  "PRB_SC_GPIO_32",
147			  "HUB_RST_L",
148			  "",
149			  "",
150			  "AP_SPI_FP_MISO",
151			  "AP_SPI_FP_MOSI",
152			  "AP_SPI_FP_CLK",
153			  "AP_SPI_FP_CS_L",
154
155			  "AP_EC_SPI_MISO",		/* 40 */
156			  "AP_EC_SPI_MOSI",
157			  "AP_EC_SPI_CLK",
158			  "AP_EC_SPI_CS_L",
159			  "LCM_RST_L",
160			  "EARLY_EUD_N",
161			  "",
162			  "DP_HOT_PLUG_DET",
163			  "IO_BRD_MLB_ID0",
164			  "IO_BRD_MLB_ID1",
165
166			  "IO_BRD_MLB_ID2",		/* 50 */
167			  "SSD_EN",
168			  "TS_I2C_SDA_CONN",
169			  "TS_I2C_CLK_CONN",
170			  "TS_RST_CONN",
171			  "TS_INT_CONN",
172			  "AP_I2C_TPM_SDA",
173			  "AP_I2C_TPM_SCL",
174			  "PRB_SC_GPIO_58",
175			  "PRB_SC_GPIO_59",
176
177			  "EDP_HOT_PLUG_DET_N",		/* 60 */
178			  "FP_TO_AP_IRQ_L",
179			  "",
180			  "AMP_EN",
181			  "CAM0_MCLK_GPIO_64",
182			  "CAM1_MCLK_GPIO_65",
183			  "WF_CAM_MCLK",
184			  "PRB_SC_GPIO_67",
185			  "FPMCU_BOOT0",
186			  "UF_CAM_SDA",
187
188			  "UF_CAM_SCL",			/* 70 */
189			  "",
190			  "",
191			  "WF_CAM_SDA",
192			  "WF_CAM_SCL",
193			  "",
194			  "",
195			  "EN_FP_RAILS",
196			  "FP_RST_L",
197			  "PCIE1_CLKREQ_ODL",
198
199			  "EN_PP3300_DX_EDP",		/* 80 */
200			  "SC_GPIO_81",
201			  "FORCED_USB_BOOT",
202			  "WCD_RESET_N",
203			  "MOS_WLAN_EN",
204			  "MOS_BT_EN",
205			  "MOS_SW_CTRL",
206			  "MOS_PCIE0_RST",
207			  "MOS_PCIE0_CLKREQ_N",
208			  "MOS_PCIE0_WAKE_N",
209
210			  "MOS_LAA_AS_EN",		/* 90 */
211			  "SD_CD_ODL",
212			  "",
213			  "",
214			  "MOS_BT_WLAN_SLIMBUS_CLK",
215			  "MOS_BT_WLAN_SLIMBUS_DAT0",
216			  "HP_MCLK",
217			  "HP_BCLK",
218			  "HP_DOUT",
219			  "HP_DIN",
220
221			  "HP_LRCLK",			/* 100 */
222			  "HP_IRQ",
223			  "",
224			  "",
225			  "GSC_AP_INT_ODL",
226			  "EN_PP3300_CODEC",
227			  "AMP_BCLK",
228			  "AMP_DIN",
229			  "AMP_LRCLK",
230			  "UIM1_DATA_GPIO_109",
231
232			  "UIM1_CLK_GPIO_110",		/* 110 */
233			  "UIM1_RESET_GPIO_111",
234			  "PRB_SC_GPIO_112",
235			  "UIM0_DATA",
236			  "UIM0_CLK",
237			  "UIM0_RST",
238			  "UIM0_PRESENT_ODL",
239			  "SDM_RFFE0_CLK",
240			  "SDM_RFFE0_DATA",
241			  "WF_CAM_EN",
242
243			  "FASTBOOT_SEL_0",		/* 120 */
244			  "SC_GPIO_121",
245			  "FASTBOOT_SEL_1",
246			  "SC_GPIO_123",
247			  "FASTBOOT_SEL_2",
248			  "SM_RFFE4_CLK_GRFC_8",
249			  "SM_RFFE4_DATA_GRFC_9",
250			  "WLAN_COEX_UART1_RX",
251			  "WLAN_COEX_UART1_TX",
252			  "PRB_SC_GPIO_129",
253
254			  "LCM_ID0",			/* 130 */
255			  "LCM_ID1",
256			  "",
257			  "SDR_QLINK_REQ",
258			  "SDR_QLINK_EN",
259			  "QLINK0_WMSS_RESET_N",
260			  "SMR526_QLINK1_REQ",
261			  "SMR526_QLINK1_EN",
262			  "SMR526_QLINK1_WMSS_RESET_N",
263			  "PRB_SC_GPIO_139",
264
265			  "SAR1_IRQ_ODL",		/* 140 */
266			  "SAR0_IRQ_ODL",
267			  "PRB_SC_GPIO_142",
268			  "",
269			  "WCD_SWR_TX_CLK",
270			  "WCD_SWR_TX_DATA0",
271			  "WCD_SWR_TX_DATA1",
272			  "WCD_SWR_RX_CLK",
273			  "WCD_SWR_RX_DATA0",
274			  "WCD_SWR_RX_DATA1",
275
276			  "DMIC01_CLK",			/* 150 */
277			  "DMIC01_DATA",
278			  "DMIC23_CLK",
279			  "DMIC23_DATA",
280			  "",
281			  "",
282			  "EC_IN_RW_ODL",
283			  "HUB_EN",
284			  "WCD_SWR_TX_DATA2",
285			  "",
286
287			  "",				/* 160 */
288			  "",
289			  "",
290			  "",
291			  "",
292			  "",
293			  "",
294			  "",
295			  "",
296			  "",
297
298			  "",				/* 170 */
299			  "MOS_BLE_UART_TX",
300			  "MOS_BLE_UART_RX",
301			  "",
302			  "",
303			  "";
304};
305