1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Evoker board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8#include "sc7280-herobrine.dtsi"
9
10/*
11 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
12 *
13 * Sort order matches the order in the parent files (parents before children).
14 */
15
16&pp3300_codec {
17	status = "okay";
18};
19
20/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
21
22ap_tp_i2c: &i2c0 {
23	status = "okay";
24	clock-frequency = <400000>;
25
26	trackpad: trackpad@15 {
27		compatible = "elan,ekth3000";
28		reg = <0x15>;
29		pinctrl-names = "default";
30		pinctrl-0 = <&tp_int_odl>;
31
32		interrupt-parent = <&tlmm>;
33		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
34
35		vcc-supply = <&pp3300_z1>;
36
37		wakeup-source;
38	};
39};
40
41ts_i2c: &i2c13 {
42	status = "okay";
43	clock-frequency = <400000>;
44
45	ap_ts: touchscreen@5d {
46		compatible = "goodix,gt7986u", "goodix,gt7375p";
47		reg = <0x5d>;
48		pinctrl-names = "default";
49		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
50
51		interrupt-parent = <&tlmm>;
52		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
53
54		reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
55
56		vdd-supply = <&ts_avdd>;
57	};
58};
59
60&ap_sar_sensor_i2c {
61	status = "okay";
62};
63
64&ap_sar_sensor0 {
65	status = "okay";
66};
67
68&ap_sar_sensor1 {
69	status = "okay";
70};
71
72&mdss_edp {
73	status = "okay";
74};
75
76&mdss_edp_phy {
77	status = "okay";
78};
79
80/* For nvme */
81&pcie1 {
82	status = "okay";
83};
84
85/* For nvme */
86&pcie1_phy {
87	status = "okay";
88};
89
90&pwmleds {
91	status = "okay";
92};
93
94/* For eMMC */
95&sdhc_1 {
96	status = "okay";
97};
98
99/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
100
101&ts_rst_conn {
102	bias-disable;
103};
104
105/* PINCTRL - BOARD-SPECIFIC */
106
107/*
108 * Methodology for gpio-line-names:
109 * - If a pin goes to herobrine board and is named it gets that name.
110 * - If a pin goes to herobrine board and is not named, it gets no name.
111 * - If a pin is totally internal to Qcard then it gets Qcard name.
112 * - If a pin is not hooked up on Qcard, it gets no name.
113 */
114
115&pm8350c_gpios {
116	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
117			  "AP_SUSPEND",
118			  "PM8008_1_RST_N",
119			  "",
120			  "",
121			  "",
122			  "PMIC_EDP_BL_EN",
123			  "PMIC_EDP_BL_PWM",
124			  "";
125};
126
127&tlmm {
128	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
129			  "AP_TP_I2C_SCL",
130			  "SSD_RST_L",
131			  "PE_WAKE_ODL",
132			  "AP_SAR_SDA",
133			  "AP_SAR_SCL",
134			  "PRB_SC_GPIO_6",
135			  "TP_INT_ODL",
136			  "HP_I2C_SDA",
137			  "HP_I2C_SCL",
138
139			  "GNSS_L1_EN",			/* 10 */
140			  "GNSS_L5_EN",
141			  "SPI_AP_MOSI",
142			  "SPI_AP_MISO",
143			  "SPI_AP_CLK",
144			  "SPI_AP_CS0_L",
145			  /*
146			   * AP_FLASH_WP is crossystem ABI. Schematics
147			   * call it BIOS_FLASH_WP_OD.
148			   */
149			  "AP_FLASH_WP",
150			  "",
151			  "AP_EC_INT_L",
152			  "",
153
154			  "UF_CAM_RST_L",		/* 20 */
155			  "WF_CAM_RST_L",
156			  "UART_AP_TX_DBG_RX",
157			  "UART_DBG_TX_AP_RX",
158			  "",
159			  "PM8008_IRQ_1",
160			  "HOST2WLAN_SOL",
161			  "WLAN2HOST_SOL",
162			  "MOS_BT_UART_CTS",
163			  "MOS_BT_UART_RFR",
164
165			  "MOS_BT_UART_TX",		/* 30 */
166			  "MOS_BT_UART_RX",
167			  "PRB_SC_GPIO_32",
168			  "HUB_RST_L",
169			  "",
170			  "",
171			  "AP_SPI_FP_MISO",
172			  "AP_SPI_FP_MOSI",
173			  "AP_SPI_FP_CLK",
174			  "AP_SPI_FP_CS_L",
175
176			  "AP_EC_SPI_MISO",		/* 40 */
177			  "AP_EC_SPI_MOSI",
178			  "AP_EC_SPI_CLK",
179			  "AP_EC_SPI_CS_L",
180			  "LCM_RST_L",
181			  "EARLY_EUD_N",
182			  "",
183			  "DP_HOT_PLUG_DET",
184			  "IO_BRD_MLB_ID0",
185			  "IO_BRD_MLB_ID1",
186
187			  "IO_BRD_MLB_ID2",		/* 50 */
188			  "SSD_EN",
189			  "TS_I2C_SDA_CONN",
190			  "TS_I2C_CLK_CONN",
191			  "TS_RST_CONN",
192			  "TS_INT_CONN",
193			  "AP_I2C_TPM_SDA",
194			  "AP_I2C_TPM_SCL",
195			  "PRB_SC_GPIO_58",
196			  "PRB_SC_GPIO_59",
197
198			  "EDP_HOT_PLUG_DET_N",		/* 60 */
199			  "FP_TO_AP_IRQ_L",
200			  "",
201			  "AMP_EN",
202			  "CAM0_MCLK_GPIO_64",
203			  "CAM1_MCLK_GPIO_65",
204			  "WF_CAM_MCLK",
205			  "PRB_SC_GPIO_67",
206			  "FPMCU_BOOT0",
207			  "UF_CAM_SDA",
208
209			  "UF_CAM_SCL",			/* 70 */
210			  "",
211			  "",
212			  "WF_CAM_SDA",
213			  "WF_CAM_SCL",
214			  "",
215			  "",
216			  "EN_FP_RAILS",
217			  "FP_RST_L",
218			  "PCIE1_CLKREQ_ODL",
219
220			  "EN_PP3300_DX_EDP",		/* 80 */
221			  "SC_GPIO_81",
222			  "FORCED_USB_BOOT",
223			  "WCD_RESET_N",
224			  "MOS_WLAN_EN",
225			  "MOS_BT_EN",
226			  "MOS_SW_CTRL",
227			  "MOS_PCIE0_RST",
228			  "MOS_PCIE0_CLKREQ_N",
229			  "MOS_PCIE0_WAKE_N",
230
231			  "MOS_LAA_AS_EN",		/* 90 */
232			  "SD_CD_ODL",
233			  "",
234			  "",
235			  "MOS_BT_WLAN_SLIMBUS_CLK",
236			  "MOS_BT_WLAN_SLIMBUS_DAT0",
237			  "HP_MCLK",
238			  "HP_BCLK",
239			  "HP_DOUT",
240			  "HP_DIN",
241
242			  "HP_LRCLK",			/* 100 */
243			  "HP_IRQ",
244			  "",
245			  "",
246			  "GSC_AP_INT_ODL",
247			  "EN_PP3300_CODEC",
248			  "AMP_BCLK",
249			  "AMP_DIN",
250			  "AMP_LRCLK",
251			  "UIM1_DATA_GPIO_109",
252
253			  "UIM1_CLK_GPIO_110",		/* 110 */
254			  "UIM1_RESET_GPIO_111",
255			  "PRB_SC_GPIO_112",
256			  "UIM0_DATA",
257			  "UIM0_CLK",
258			  "UIM0_RST",
259			  "UIM0_PRESENT_ODL",
260			  "SDM_RFFE0_CLK",
261			  "SDM_RFFE0_DATA",
262			  "WF_CAM_EN",
263
264			  "FASTBOOT_SEL_0",		/* 120 */
265			  "SC_GPIO_121",
266			  "FASTBOOT_SEL_1",
267			  "SC_GPIO_123",
268			  "FASTBOOT_SEL_2",
269			  "SM_RFFE4_CLK_GRFC_8",
270			  "SM_RFFE4_DATA_GRFC_9",
271			  "WLAN_COEX_UART1_RX",
272			  "WLAN_COEX_UART1_TX",
273			  "PRB_SC_GPIO_129",
274
275			  "LCM_ID0",			/* 130 */
276			  "LCM_ID1",
277			  "",
278			  "SDR_QLINK_REQ",
279			  "SDR_QLINK_EN",
280			  "QLINK0_WMSS_RESET_N",
281			  "SMR526_QLINK1_REQ",
282			  "SMR526_QLINK1_EN",
283			  "SMR526_QLINK1_WMSS_RESET_N",
284			  "PRB_SC_GPIO_139",
285
286			  "SAR1_IRQ_ODL",		/* 140 */
287			  "SAR0_IRQ_ODL",
288			  "PRB_SC_GPIO_142",
289			  "",
290			  "WCD_SWR_TX_CLK",
291			  "WCD_SWR_TX_DATA0",
292			  "WCD_SWR_TX_DATA1",
293			  "WCD_SWR_RX_CLK",
294			  "WCD_SWR_RX_DATA0",
295			  "WCD_SWR_RX_DATA1",
296
297			  "DMIC01_CLK",			/* 150 */
298			  "DMIC01_DATA",
299			  "DMIC23_CLK",
300			  "DMIC23_DATA",
301			  "",
302			  "",
303			  "EC_IN_RW_ODL",
304			  "HUB_EN",
305			  "WCD_SWR_TX_DATA2",
306			  "",
307
308			  "",				/* 160 */
309			  "",
310			  "",
311			  "",
312			  "",
313			  "",
314			  "",
315			  "",
316			  "",
317			  "",
318
319			  "",				/* 170 */
320			  "MOS_BLE_UART_TX",
321			  "MOS_BLE_UART_RX",
322			  "",
323			  "";
324};
325