1ef4fc701SSheng-Liang Pan// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2ef4fc701SSheng-Liang Pan/*
3ef4fc701SSheng-Liang Pan * Google Evoker board device tree source
4ef4fc701SSheng-Liang Pan *
5ef4fc701SSheng-Liang Pan * Copyright 2022 Google LLC.
6ef4fc701SSheng-Liang Pan */
7ef4fc701SSheng-Liang Pan
8ef4fc701SSheng-Liang Pan#include "sc7280-herobrine.dtsi"
9*87548e54SSibi Sankar#include "sc7280-herobrine-audio-rt5682-3mic.dtsi"
10ef4fc701SSheng-Liang Pan
11ef4fc701SSheng-Liang Pan/*
12ef4fc701SSheng-Liang Pan * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
13ef4fc701SSheng-Liang Pan *
14ef4fc701SSheng-Liang Pan * Sort order matches the order in the parent files (parents before children).
15ef4fc701SSheng-Liang Pan */
16ef4fc701SSheng-Liang Pan
17ef4fc701SSheng-Liang Pan&pp3300_codec {
18ef4fc701SSheng-Liang Pan	status = "okay";
19ef4fc701SSheng-Liang Pan};
20ef4fc701SSheng-Liang Pan
21ef4fc701SSheng-Liang Pan/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
22ef4fc701SSheng-Liang Pan
23ef4fc701SSheng-Liang Panap_tp_i2c: &i2c0 {
24ef4fc701SSheng-Liang Pan	status = "okay";
25ef4fc701SSheng-Liang Pan	clock-frequency = <400000>;
26ef4fc701SSheng-Liang Pan
27928263d1SSheng-Liang Pan	trackpad: trackpad@15 {
28928263d1SSheng-Liang Pan		compatible = "elan,ekth3000";
29928263d1SSheng-Liang Pan		reg = <0x15>;
30ef4fc701SSheng-Liang Pan		pinctrl-names = "default";
31ef4fc701SSheng-Liang Pan		pinctrl-0 = <&tp_int_odl>;
32ef4fc701SSheng-Liang Pan
33ef4fc701SSheng-Liang Pan		interrupt-parent = <&tlmm>;
34ef4fc701SSheng-Liang Pan		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
35ef4fc701SSheng-Liang Pan
36ef4fc701SSheng-Liang Pan		vcc-supply = <&pp3300_z1>;
37ef4fc701SSheng-Liang Pan
38ef4fc701SSheng-Liang Pan		wakeup-source;
39ef4fc701SSheng-Liang Pan	};
40ef4fc701SSheng-Liang Pan};
41ef4fc701SSheng-Liang Pan
42ef4fc701SSheng-Liang Pants_i2c: &i2c13 {
43ef4fc701SSheng-Liang Pan	status = "okay";
44ef4fc701SSheng-Liang Pan	clock-frequency = <400000>;
45ef4fc701SSheng-Liang Pan
46928263d1SSheng-Liang Pan	ap_ts: touchscreen@5d {
47928263d1SSheng-Liang Pan		compatible = "goodix,gt7986u", "goodix,gt7375p";
48928263d1SSheng-Liang Pan		reg = <0x5d>;
49ef4fc701SSheng-Liang Pan		pinctrl-names = "default";
50ef4fc701SSheng-Liang Pan		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
51ef4fc701SSheng-Liang Pan
52ef4fc701SSheng-Liang Pan		interrupt-parent = <&tlmm>;
53ef4fc701SSheng-Liang Pan		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
54ef4fc701SSheng-Liang Pan
55ef4fc701SSheng-Liang Pan		reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
56ef4fc701SSheng-Liang Pan
57928263d1SSheng-Liang Pan		vdd-supply = <&ts_avdd>;
58ef4fc701SSheng-Liang Pan	};
59ef4fc701SSheng-Liang Pan};
60ef4fc701SSheng-Liang Pan
61ef4fc701SSheng-Liang Pan&ap_sar_sensor_i2c {
62ef4fc701SSheng-Liang Pan	status = "okay";
63ef4fc701SSheng-Liang Pan};
64ef4fc701SSheng-Liang Pan
65ef4fc701SSheng-Liang Pan&ap_sar_sensor0 {
66ef4fc701SSheng-Liang Pan	status = "okay";
67ef4fc701SSheng-Liang Pan};
68ef4fc701SSheng-Liang Pan
69ef4fc701SSheng-Liang Pan&ap_sar_sensor1 {
70ef4fc701SSheng-Liang Pan	status = "okay";
71ef4fc701SSheng-Liang Pan};
72ef4fc701SSheng-Liang Pan
73ef4fc701SSheng-Liang Pan&mdss_edp {
74ef4fc701SSheng-Liang Pan	status = "okay";
75ef4fc701SSheng-Liang Pan};
76ef4fc701SSheng-Liang Pan
77ef4fc701SSheng-Liang Pan&mdss_edp_phy {
78ef4fc701SSheng-Liang Pan	status = "okay";
79ef4fc701SSheng-Liang Pan};
80ef4fc701SSheng-Liang Pan
81ef4fc701SSheng-Liang Pan/* For nvme */
82ef4fc701SSheng-Liang Pan&pcie1 {
83ef4fc701SSheng-Liang Pan	status = "okay";
84ef4fc701SSheng-Liang Pan};
85ef4fc701SSheng-Liang Pan
86ef4fc701SSheng-Liang Pan/* For nvme */
87ef4fc701SSheng-Liang Pan&pcie1_phy {
88ef4fc701SSheng-Liang Pan	status = "okay";
89ef4fc701SSheng-Liang Pan};
90ef4fc701SSheng-Liang Pan
91ef4fc701SSheng-Liang Pan&pwmleds {
92ef4fc701SSheng-Liang Pan	status = "okay";
93ef4fc701SSheng-Liang Pan};
94ef4fc701SSheng-Liang Pan
95ef4fc701SSheng-Liang Pan/* For eMMC */
96ef4fc701SSheng-Liang Pan&sdhc_1 {
97ef4fc701SSheng-Liang Pan	status = "okay";
98ef4fc701SSheng-Liang Pan};
99ef4fc701SSheng-Liang Pan
100ef4fc701SSheng-Liang Pan/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
101ef4fc701SSheng-Liang Pan
102ef4fc701SSheng-Liang Pan&ts_rst_conn {
103ef4fc701SSheng-Liang Pan	bias-disable;
104ef4fc701SSheng-Liang Pan};
105ef4fc701SSheng-Liang Pan
106ef4fc701SSheng-Liang Pan/* PINCTRL - BOARD-SPECIFIC */
107ef4fc701SSheng-Liang Pan
108ef4fc701SSheng-Liang Pan/*
109ef4fc701SSheng-Liang Pan * Methodology for gpio-line-names:
110ef4fc701SSheng-Liang Pan * - If a pin goes to herobrine board and is named it gets that name.
111ef4fc701SSheng-Liang Pan * - If a pin goes to herobrine board and is not named, it gets no name.
112ef4fc701SSheng-Liang Pan * - If a pin is totally internal to Qcard then it gets Qcard name.
113ef4fc701SSheng-Liang Pan * - If a pin is not hooked up on Qcard, it gets no name.
114ef4fc701SSheng-Liang Pan */
115ef4fc701SSheng-Liang Pan
116ef4fc701SSheng-Liang Pan&pm8350c_gpios {
117ef4fc701SSheng-Liang Pan	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
118ef4fc701SSheng-Liang Pan			  "AP_SUSPEND",
119ef4fc701SSheng-Liang Pan			  "PM8008_1_RST_N",
120ef4fc701SSheng-Liang Pan			  "",
121ef4fc701SSheng-Liang Pan			  "",
122ef4fc701SSheng-Liang Pan			  "",
123ef4fc701SSheng-Liang Pan			  "PMIC_EDP_BL_EN",
124ef4fc701SSheng-Liang Pan			  "PMIC_EDP_BL_PWM",
125ef4fc701SSheng-Liang Pan			  "";
126ef4fc701SSheng-Liang Pan};
127ef4fc701SSheng-Liang Pan
128ef4fc701SSheng-Liang Pan&tlmm {
129ef4fc701SSheng-Liang Pan	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
130ef4fc701SSheng-Liang Pan			  "AP_TP_I2C_SCL",
131ef4fc701SSheng-Liang Pan			  "SSD_RST_L",
132ef4fc701SSheng-Liang Pan			  "PE_WAKE_ODL",
133ef4fc701SSheng-Liang Pan			  "AP_SAR_SDA",
134ef4fc701SSheng-Liang Pan			  "AP_SAR_SCL",
135ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_6",
136ef4fc701SSheng-Liang Pan			  "TP_INT_ODL",
137ef4fc701SSheng-Liang Pan			  "HP_I2C_SDA",
138ef4fc701SSheng-Liang Pan			  "HP_I2C_SCL",
139ef4fc701SSheng-Liang Pan
140ef4fc701SSheng-Liang Pan			  "GNSS_L1_EN",			/* 10 */
141ef4fc701SSheng-Liang Pan			  "GNSS_L5_EN",
142ef4fc701SSheng-Liang Pan			  "SPI_AP_MOSI",
143ef4fc701SSheng-Liang Pan			  "SPI_AP_MISO",
144ef4fc701SSheng-Liang Pan			  "SPI_AP_CLK",
145ef4fc701SSheng-Liang Pan			  "SPI_AP_CS0_L",
146ef4fc701SSheng-Liang Pan			  /*
147ef4fc701SSheng-Liang Pan			   * AP_FLASH_WP is crossystem ABI. Schematics
148ef4fc701SSheng-Liang Pan			   * call it BIOS_FLASH_WP_OD.
149ef4fc701SSheng-Liang Pan			   */
150ef4fc701SSheng-Liang Pan			  "AP_FLASH_WP",
151ef4fc701SSheng-Liang Pan			  "",
152ef4fc701SSheng-Liang Pan			  "AP_EC_INT_L",
153ef4fc701SSheng-Liang Pan			  "",
154ef4fc701SSheng-Liang Pan
155ef4fc701SSheng-Liang Pan			  "UF_CAM_RST_L",		/* 20 */
156ef4fc701SSheng-Liang Pan			  "WF_CAM_RST_L",
157ef4fc701SSheng-Liang Pan			  "UART_AP_TX_DBG_RX",
158ef4fc701SSheng-Liang Pan			  "UART_DBG_TX_AP_RX",
159ef4fc701SSheng-Liang Pan			  "",
160ef4fc701SSheng-Liang Pan			  "PM8008_IRQ_1",
161ef4fc701SSheng-Liang Pan			  "HOST2WLAN_SOL",
162ef4fc701SSheng-Liang Pan			  "WLAN2HOST_SOL",
163ef4fc701SSheng-Liang Pan			  "MOS_BT_UART_CTS",
164ef4fc701SSheng-Liang Pan			  "MOS_BT_UART_RFR",
165ef4fc701SSheng-Liang Pan
166ef4fc701SSheng-Liang Pan			  "MOS_BT_UART_TX",		/* 30 */
167ef4fc701SSheng-Liang Pan			  "MOS_BT_UART_RX",
168ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_32",
169ef4fc701SSheng-Liang Pan			  "HUB_RST_L",
170ef4fc701SSheng-Liang Pan			  "",
171ef4fc701SSheng-Liang Pan			  "",
172ef4fc701SSheng-Liang Pan			  "AP_SPI_FP_MISO",
173ef4fc701SSheng-Liang Pan			  "AP_SPI_FP_MOSI",
174ef4fc701SSheng-Liang Pan			  "AP_SPI_FP_CLK",
175ef4fc701SSheng-Liang Pan			  "AP_SPI_FP_CS_L",
176ef4fc701SSheng-Liang Pan
177ef4fc701SSheng-Liang Pan			  "AP_EC_SPI_MISO",		/* 40 */
178ef4fc701SSheng-Liang Pan			  "AP_EC_SPI_MOSI",
179ef4fc701SSheng-Liang Pan			  "AP_EC_SPI_CLK",
180ef4fc701SSheng-Liang Pan			  "AP_EC_SPI_CS_L",
181ef4fc701SSheng-Liang Pan			  "LCM_RST_L",
182ef4fc701SSheng-Liang Pan			  "EARLY_EUD_N",
183ef4fc701SSheng-Liang Pan			  "",
184ef4fc701SSheng-Liang Pan			  "DP_HOT_PLUG_DET",
185ef4fc701SSheng-Liang Pan			  "IO_BRD_MLB_ID0",
186ef4fc701SSheng-Liang Pan			  "IO_BRD_MLB_ID1",
187ef4fc701SSheng-Liang Pan
188ef4fc701SSheng-Liang Pan			  "IO_BRD_MLB_ID2",		/* 50 */
189ef4fc701SSheng-Liang Pan			  "SSD_EN",
190ef4fc701SSheng-Liang Pan			  "TS_I2C_SDA_CONN",
191ef4fc701SSheng-Liang Pan			  "TS_I2C_CLK_CONN",
192ef4fc701SSheng-Liang Pan			  "TS_RST_CONN",
193ef4fc701SSheng-Liang Pan			  "TS_INT_CONN",
194ef4fc701SSheng-Liang Pan			  "AP_I2C_TPM_SDA",
195ef4fc701SSheng-Liang Pan			  "AP_I2C_TPM_SCL",
196ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_58",
197ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_59",
198ef4fc701SSheng-Liang Pan
199ef4fc701SSheng-Liang Pan			  "EDP_HOT_PLUG_DET_N",		/* 60 */
200ef4fc701SSheng-Liang Pan			  "FP_TO_AP_IRQ_L",
201ef4fc701SSheng-Liang Pan			  "",
202ef4fc701SSheng-Liang Pan			  "AMP_EN",
203ef4fc701SSheng-Liang Pan			  "CAM0_MCLK_GPIO_64",
204ef4fc701SSheng-Liang Pan			  "CAM1_MCLK_GPIO_65",
205ef4fc701SSheng-Liang Pan			  "WF_CAM_MCLK",
206ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_67",
207ef4fc701SSheng-Liang Pan			  "FPMCU_BOOT0",
208ef4fc701SSheng-Liang Pan			  "UF_CAM_SDA",
209ef4fc701SSheng-Liang Pan
210ef4fc701SSheng-Liang Pan			  "UF_CAM_SCL",			/* 70 */
211ef4fc701SSheng-Liang Pan			  "",
212ef4fc701SSheng-Liang Pan			  "",
213ef4fc701SSheng-Liang Pan			  "WF_CAM_SDA",
214ef4fc701SSheng-Liang Pan			  "WF_CAM_SCL",
215ef4fc701SSheng-Liang Pan			  "",
216ef4fc701SSheng-Liang Pan			  "",
217ef4fc701SSheng-Liang Pan			  "EN_FP_RAILS",
218ef4fc701SSheng-Liang Pan			  "FP_RST_L",
219ef4fc701SSheng-Liang Pan			  "PCIE1_CLKREQ_ODL",
220ef4fc701SSheng-Liang Pan
221ef4fc701SSheng-Liang Pan			  "EN_PP3300_DX_EDP",		/* 80 */
222ef4fc701SSheng-Liang Pan			  "SC_GPIO_81",
223ef4fc701SSheng-Liang Pan			  "FORCED_USB_BOOT",
224ef4fc701SSheng-Liang Pan			  "WCD_RESET_N",
225ef4fc701SSheng-Liang Pan			  "MOS_WLAN_EN",
226ef4fc701SSheng-Liang Pan			  "MOS_BT_EN",
227ef4fc701SSheng-Liang Pan			  "MOS_SW_CTRL",
228ef4fc701SSheng-Liang Pan			  "MOS_PCIE0_RST",
229ef4fc701SSheng-Liang Pan			  "MOS_PCIE0_CLKREQ_N",
230ef4fc701SSheng-Liang Pan			  "MOS_PCIE0_WAKE_N",
231ef4fc701SSheng-Liang Pan
232ef4fc701SSheng-Liang Pan			  "MOS_LAA_AS_EN",		/* 90 */
233ef4fc701SSheng-Liang Pan			  "SD_CD_ODL",
234ef4fc701SSheng-Liang Pan			  "",
235ef4fc701SSheng-Liang Pan			  "",
236ef4fc701SSheng-Liang Pan			  "MOS_BT_WLAN_SLIMBUS_CLK",
237ef4fc701SSheng-Liang Pan			  "MOS_BT_WLAN_SLIMBUS_DAT0",
238ef4fc701SSheng-Liang Pan			  "HP_MCLK",
239ef4fc701SSheng-Liang Pan			  "HP_BCLK",
240ef4fc701SSheng-Liang Pan			  "HP_DOUT",
241ef4fc701SSheng-Liang Pan			  "HP_DIN",
242ef4fc701SSheng-Liang Pan
243ef4fc701SSheng-Liang Pan			  "HP_LRCLK",			/* 100 */
244ef4fc701SSheng-Liang Pan			  "HP_IRQ",
245ef4fc701SSheng-Liang Pan			  "",
246ef4fc701SSheng-Liang Pan			  "",
247ef4fc701SSheng-Liang Pan			  "GSC_AP_INT_ODL",
248ef4fc701SSheng-Liang Pan			  "EN_PP3300_CODEC",
249ef4fc701SSheng-Liang Pan			  "AMP_BCLK",
250ef4fc701SSheng-Liang Pan			  "AMP_DIN",
251ef4fc701SSheng-Liang Pan			  "AMP_LRCLK",
252ef4fc701SSheng-Liang Pan			  "UIM1_DATA_GPIO_109",
253ef4fc701SSheng-Liang Pan
254ef4fc701SSheng-Liang Pan			  "UIM1_CLK_GPIO_110",		/* 110 */
255ef4fc701SSheng-Liang Pan			  "UIM1_RESET_GPIO_111",
256ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_112",
257ef4fc701SSheng-Liang Pan			  "UIM0_DATA",
258ef4fc701SSheng-Liang Pan			  "UIM0_CLK",
259ef4fc701SSheng-Liang Pan			  "UIM0_RST",
260ef4fc701SSheng-Liang Pan			  "UIM0_PRESENT_ODL",
261ef4fc701SSheng-Liang Pan			  "SDM_RFFE0_CLK",
262ef4fc701SSheng-Liang Pan			  "SDM_RFFE0_DATA",
263ef4fc701SSheng-Liang Pan			  "WF_CAM_EN",
264ef4fc701SSheng-Liang Pan
265ef4fc701SSheng-Liang Pan			  "FASTBOOT_SEL_0",		/* 120 */
266ef4fc701SSheng-Liang Pan			  "SC_GPIO_121",
267ef4fc701SSheng-Liang Pan			  "FASTBOOT_SEL_1",
268ef4fc701SSheng-Liang Pan			  "SC_GPIO_123",
269ef4fc701SSheng-Liang Pan			  "FASTBOOT_SEL_2",
270ef4fc701SSheng-Liang Pan			  "SM_RFFE4_CLK_GRFC_8",
271ef4fc701SSheng-Liang Pan			  "SM_RFFE4_DATA_GRFC_9",
272ef4fc701SSheng-Liang Pan			  "WLAN_COEX_UART1_RX",
273ef4fc701SSheng-Liang Pan			  "WLAN_COEX_UART1_TX",
274ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_129",
275ef4fc701SSheng-Liang Pan
276ef4fc701SSheng-Liang Pan			  "LCM_ID0",			/* 130 */
277ef4fc701SSheng-Liang Pan			  "LCM_ID1",
278ef4fc701SSheng-Liang Pan			  "",
279ef4fc701SSheng-Liang Pan			  "SDR_QLINK_REQ",
280ef4fc701SSheng-Liang Pan			  "SDR_QLINK_EN",
281ef4fc701SSheng-Liang Pan			  "QLINK0_WMSS_RESET_N",
282ef4fc701SSheng-Liang Pan			  "SMR526_QLINK1_REQ",
283ef4fc701SSheng-Liang Pan			  "SMR526_QLINK1_EN",
284ef4fc701SSheng-Liang Pan			  "SMR526_QLINK1_WMSS_RESET_N",
285ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_139",
286ef4fc701SSheng-Liang Pan
287ef4fc701SSheng-Liang Pan			  "SAR1_IRQ_ODL",		/* 140 */
288ef4fc701SSheng-Liang Pan			  "SAR0_IRQ_ODL",
289ef4fc701SSheng-Liang Pan			  "PRB_SC_GPIO_142",
290ef4fc701SSheng-Liang Pan			  "",
291ef4fc701SSheng-Liang Pan			  "WCD_SWR_TX_CLK",
292ef4fc701SSheng-Liang Pan			  "WCD_SWR_TX_DATA0",
293ef4fc701SSheng-Liang Pan			  "WCD_SWR_TX_DATA1",
294ef4fc701SSheng-Liang Pan			  "WCD_SWR_RX_CLK",
295ef4fc701SSheng-Liang Pan			  "WCD_SWR_RX_DATA0",
296ef4fc701SSheng-Liang Pan			  "WCD_SWR_RX_DATA1",
297ef4fc701SSheng-Liang Pan
298ef4fc701SSheng-Liang Pan			  "DMIC01_CLK",			/* 150 */
299ef4fc701SSheng-Liang Pan			  "DMIC01_DATA",
300ef4fc701SSheng-Liang Pan			  "DMIC23_CLK",
301ef4fc701SSheng-Liang Pan			  "DMIC23_DATA",
302ef4fc701SSheng-Liang Pan			  "",
303ef4fc701SSheng-Liang Pan			  "",
304ef4fc701SSheng-Liang Pan			  "EC_IN_RW_ODL",
305ef4fc701SSheng-Liang Pan			  "HUB_EN",
306ef4fc701SSheng-Liang Pan			  "WCD_SWR_TX_DATA2",
307ef4fc701SSheng-Liang Pan			  "",
308ef4fc701SSheng-Liang Pan
309ef4fc701SSheng-Liang Pan			  "",				/* 160 */
310ef4fc701SSheng-Liang Pan			  "",
311ef4fc701SSheng-Liang Pan			  "",
312ef4fc701SSheng-Liang Pan			  "",
313ef4fc701SSheng-Liang Pan			  "",
314ef4fc701SSheng-Liang Pan			  "",
315ef4fc701SSheng-Liang Pan			  "",
316ef4fc701SSheng-Liang Pan			  "",
317ef4fc701SSheng-Liang Pan			  "",
318ef4fc701SSheng-Liang Pan			  "",
319ef4fc701SSheng-Liang Pan
320ef4fc701SSheng-Liang Pan			  "",				/* 170 */
321ef4fc701SSheng-Liang Pan			  "MOS_BLE_UART_TX",
322ef4fc701SSheng-Liang Pan			  "MOS_BLE_UART_RX",
323ef4fc701SSheng-Liang Pan			  "",
324ef4fc701SSheng-Liang Pan			  "";
325ef4fc701SSheng-Liang Pan};
326