17ec3e673SRob Clark// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 27ec3e673SRob Clark/* 37ec3e673SRob Clark * Google Trogdor board device tree source 47ec3e673SRob Clark * 57ec3e673SRob Clark * Copyright 2020 Google LLC. 67ec3e673SRob Clark */ 77ec3e673SRob Clark 87ec3e673SRob Clark/dts-v1/; 97ec3e673SRob Clark 107ec3e673SRob Clark#include "sc7180.dtsi" 117ec3e673SRob Clark 127ec3e673SRob Clarkap_ec_spi: &spi6 {}; 137ec3e673SRob Clarkap_h1_spi: &spi0 {}; 147ec3e673SRob Clark 157ec3e673SRob Clark#include "sc7180-trogdor.dtsi" 167ec3e673SRob Clark 177ec3e673SRob Clark/ { 187ec3e673SRob Clark model = "Google Trogdor (rev1+)"; 197ec3e673SRob Clark compatible = "google,trogdor", "qcom,sc7180"; 207ec3e673SRob Clark 217ec3e673SRob Clark panel: panel { 227ec3e673SRob Clark compatible = "auo,b116xa01"; 237ec3e673SRob Clark power-supply = <&pp3300_dx_edp>; 247ec3e673SRob Clark backlight = <&backlight>; 257ec3e673SRob Clark hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; 267ec3e673SRob Clark 277ec3e673SRob Clark ports { 287ec3e673SRob Clark port { 297ec3e673SRob Clark panel_in_edp: endpoint { 307ec3e673SRob Clark remote-endpoint = <&sn65dsi86_out>; 317ec3e673SRob Clark }; 327ec3e673SRob Clark }; 337ec3e673SRob Clark }; 347ec3e673SRob Clark }; 357ec3e673SRob Clark}; 367ec3e673SRob Clark 377ec3e673SRob Clarkap_ts_pen_1v8: &i2c4 { 387ec3e673SRob Clark status = "okay"; 397ec3e673SRob Clark clock-frequency = <400000>; 407ec3e673SRob Clark 417ec3e673SRob Clark ap_ts: touchscreen@10 { 427ec3e673SRob Clark compatible = "elan,ekth3500"; 437ec3e673SRob Clark reg = <0x10>; 447ec3e673SRob Clark pinctrl-names = "default"; 457ec3e673SRob Clark pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 467ec3e673SRob Clark 477ec3e673SRob Clark interrupt-parent = <&tlmm>; 487ec3e673SRob Clark interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 497ec3e673SRob Clark 507ec3e673SRob Clark vcc33-supply = <&pp3300_ts>; 517ec3e673SRob Clark 527ec3e673SRob Clark reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 537ec3e673SRob Clark }; 547ec3e673SRob Clark}; 557ec3e673SRob Clark 56*066c2a94SMatthias Kaehlcke&pp3300_hub { 57*066c2a94SMatthias Kaehlcke /* pp3300_l7c is used to power the USB hub */ 58*066c2a94SMatthias Kaehlcke /delete-property/regulator-always-on; 59*066c2a94SMatthias Kaehlcke /delete-property/regulator-boot-on; 60*066c2a94SMatthias Kaehlcke}; 61*066c2a94SMatthias Kaehlcke 62*066c2a94SMatthias Kaehlcke&pp3300_l7c { 63*066c2a94SMatthias Kaehlcke regulator-always-on; 64*066c2a94SMatthias Kaehlcke regulator-boot-on; 65*066c2a94SMatthias Kaehlcke}; 66*066c2a94SMatthias Kaehlcke 677ec3e673SRob Clark&sdhc_2 { 687ec3e673SRob Clark status = "okay"; 697ec3e673SRob Clark}; 707ec3e673SRob Clark 717ec3e673SRob Clark/* PINCTRL - board-specific pinctrl */ 727ec3e673SRob Clark 737ec3e673SRob Clark&tlmm { 747ec3e673SRob Clark gpio-line-names = "ESIM_MISO", 757ec3e673SRob Clark "ESIM_MOSI", 767ec3e673SRob Clark "ESIM_CLK", 777ec3e673SRob Clark "ESIM_CS_L", 787ec3e673SRob Clark "FP_TO_AP_IRQ_L", 797ec3e673SRob Clark "FP_RST_L", 807ec3e673SRob Clark "AP_TP_I2C_SDA", 817ec3e673SRob Clark "AP_TP_I2C_SCL", 827ec3e673SRob Clark "TS_RESET_L", 837ec3e673SRob Clark "TS_INT_L", 847ec3e673SRob Clark "FPMCU_BOOT0", 857ec3e673SRob Clark "EDP_BRIJ_IRQ", 867ec3e673SRob Clark "AP_EDP_BKLTEN", 877ec3e673SRob Clark "", 887ec3e673SRob Clark "", 897ec3e673SRob Clark "EDP_BRIJ_I2C_SDA", 907ec3e673SRob Clark "EDP_BRIJ_I2C_SCL", 917ec3e673SRob Clark "HUB_RST_L", 927ec3e673SRob Clark "PEN_RST_ODL", 937ec3e673SRob Clark "AP_RAM_ID1", 947ec3e673SRob Clark "AP_RAM_ID2", 957ec3e673SRob Clark "PEN_IRQ_L", 967ec3e673SRob Clark "FPMCU_SEL", 977ec3e673SRob Clark "AMP_EN", 987ec3e673SRob Clark "P_SENSOR_INT_L", 997ec3e673SRob Clark "AP_SAR_SENSOR_SDA", 1007ec3e673SRob Clark "AP_SAR_SENSOR_SCL", 1017ec3e673SRob Clark "", 1027ec3e673SRob Clark "HP_IRQ", 1037ec3e673SRob Clark "AP_RAM_ID0", 1047ec3e673SRob Clark "EN_PP3300_DX_EDP", 1057ec3e673SRob Clark "AP_BRD_ID2", 1067ec3e673SRob Clark "BRIJ_SUSPEND", 1077ec3e673SRob Clark "AP_BRD_ID0", 1087ec3e673SRob Clark "AP_H1_SPI_MISO", 1097ec3e673SRob Clark "AP_H1_SPI_MOSI", 1107ec3e673SRob Clark "AP_H1_SPI_CLK", 1117ec3e673SRob Clark "AP_H1_SPI_CS_L", 1127ec3e673SRob Clark "", 1137ec3e673SRob Clark "", 1147ec3e673SRob Clark "", 1157ec3e673SRob Clark "", 1167ec3e673SRob Clark "H1_AP_INT_ODL", 1177ec3e673SRob Clark "", 1187ec3e673SRob Clark "UART_AP_TX_DBG_RX", 1197ec3e673SRob Clark "UART_DBG_TX_AP_RX", 1207ec3e673SRob Clark "HP_I2C_SDA", 1217ec3e673SRob Clark "HP_I2C_SCL", 1227ec3e673SRob Clark "FORCED_USB_BOOT", 1237ec3e673SRob Clark "", 1247ec3e673SRob Clark "", 1257ec3e673SRob Clark "AMP_DIN", 1267ec3e673SRob Clark "PEN_PDCT_L", 1277ec3e673SRob Clark "HP_BCLK", 1287ec3e673SRob Clark "HP_LRCLK", 1297ec3e673SRob Clark "HP_DOUT", 1307ec3e673SRob Clark "HP_DIN", 1317ec3e673SRob Clark "HP_MCLK", 1327ec3e673SRob Clark "TRACKPAD_INT_1V8_ODL", 1337ec3e673SRob Clark "AP_EC_SPI_MISO", 1347ec3e673SRob Clark "AP_EC_SPI_MOSI", 1357ec3e673SRob Clark "AP_EC_SPI_CLK", 1367ec3e673SRob Clark "AP_EC_SPI_CS_L", 1377ec3e673SRob Clark "AP_SPI_CLK", 1387ec3e673SRob Clark "AP_SPI_MOSI", 1397ec3e673SRob Clark "AP_SPI_MISO", 1407ec3e673SRob Clark /* 1417ec3e673SRob Clark * AP_FLASH_WP_L is crossystem ABI. Schematics 1427ec3e673SRob Clark * call it BIOS_FLASH_WP_L. 1437ec3e673SRob Clark */ 1447ec3e673SRob Clark "AP_FLASH_WP_L", 1457ec3e673SRob Clark "DBG_SPI_HOLD_L", 1467ec3e673SRob Clark "AP_SPI_CS0_L", 1477ec3e673SRob Clark "SD_CD_ODL", 1487ec3e673SRob Clark "", 1497ec3e673SRob Clark "", 1507ec3e673SRob Clark "", 1517ec3e673SRob Clark "", 1527ec3e673SRob Clark "", 1537ec3e673SRob Clark "UIM2_DATA", 1547ec3e673SRob Clark "UIM2_CLK", 1557ec3e673SRob Clark "UIM2_RST", 1567ec3e673SRob Clark "UIM2_PRESENT", 1577ec3e673SRob Clark "UIM1_DATA", 1587ec3e673SRob Clark "UIM1_CLK", 1597ec3e673SRob Clark "UIM1_RST", 1607ec3e673SRob Clark "", 1617ec3e673SRob Clark "EN_PP3300_CODEC", 1627ec3e673SRob Clark "EN_PP3300_HUB", 1637ec3e673SRob Clark "", 1647ec3e673SRob Clark "AP_SPI_FP_MISO", 1657ec3e673SRob Clark "AP_SPI_FP_MOSI", 1667ec3e673SRob Clark "AP_SPI_FP_CLK", 1677ec3e673SRob Clark "AP_SPI_FP_CS_L", 1687ec3e673SRob Clark "AP_SKU_ID1", 1697ec3e673SRob Clark "AP_RST_REQ", 1707ec3e673SRob Clark "", 1717ec3e673SRob Clark "AP_BRD_ID1", 1727ec3e673SRob Clark "AP_EC_INT_L", 1737ec3e673SRob Clark "", 1747ec3e673SRob Clark "", 1757ec3e673SRob Clark "", 1767ec3e673SRob Clark "", 1777ec3e673SRob Clark "", 1787ec3e673SRob Clark "", 1797ec3e673SRob Clark "", 1807ec3e673SRob Clark "", 1817ec3e673SRob Clark "", 1827ec3e673SRob Clark "EDP_BRIJ_EN", 1837ec3e673SRob Clark "AP_SKU_ID0", 1847ec3e673SRob Clark "", 1857ec3e673SRob Clark "", 1867ec3e673SRob Clark "", 1877ec3e673SRob Clark "", 1887ec3e673SRob Clark "", 1897ec3e673SRob Clark "", 1907ec3e673SRob Clark "", 1917ec3e673SRob Clark "", 1927ec3e673SRob Clark "", 1937ec3e673SRob Clark "AP_TS_PEN_I2C_SDA", 1947ec3e673SRob Clark "AP_TS_PEN_I2C_SCL", 1957ec3e673SRob Clark "DP_HOT_PLUG_DET", 1967ec3e673SRob Clark "EC_IN_RW_ODL"; 1977ec3e673SRob Clark}; 198