1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Lazor board device tree source
4 *
5 * Copyright 2020 Google LLC.
6 */
7
8#include "sc7180.dtsi"
9
10ap_ec_spi: &spi6 {};
11ap_h1_spi: &spi0 {};
12
13#include "sc7180-trogdor.dtsi"
14
15&ap_sar_sensor {
16	semtech,cs0-ground;
17	semtech,combined-sensors = <3>;
18	semtech,resolution = "fine";
19	semtech,startup-sensor = <0>;
20	semtech,proxraw-strength = <8>;
21	semtech,avg-pos-strength = <64>;
22};
23
24ap_ts_pen_1v8: &i2c4 {
25	status = "okay";
26	clock-frequency = <400000>;
27
28	ap_ts: touchscreen@10 {
29		compatible = "hid-over-i2c";
30		reg = <0x10>;
31		pinctrl-names = "default";
32		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
33
34		interrupt-parent = <&tlmm>;
35		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
36
37		post-power-on-delay-ms = <20>;
38		hid-descr-addr = <0x0001>;
39
40		vdd-supply = <&pp3300_ts>;
41	};
42};
43
44&panel {
45	compatible = "boe,nv133fhm-n62";
46};
47
48&trackpad {
49	interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
50};
51
52&wifi {
53	qcom,ath10k-calibration-variant = "GO_LAZOR";
54};
55
56/* PINCTRL - modifications to sc7180-trogdor.dtsi */
57
58&trackpad_int_1v8_odl {
59	pinmux {
60		pins = "gpio58";
61	};
62
63	pinconf {
64		pins = "gpio58";
65	};
66};
67
68&ts_reset_l {
69	pinconf {
70		/* This pin is not connected on -rev0, pull up to park. */
71		/delete-property/bias-disable;
72		bias-pull-up;
73	};
74};
75
76/* PINCTRL - board-specific pinctrl */
77
78&tlmm {
79	gpio-line-names = "ESIM_MISO",
80			  "ESIM_MOSI",
81			  "ESIM_CLK",
82			  "ESIM_CS_L",
83			  "",
84			  "",
85			  "AP_TP_I2C_SDA",
86			  "AP_TP_I2C_SCL",
87			  "TS_RESET_L",
88			  "TS_INT_L",
89			  "",
90			  "EDP_BRIJ_IRQ",
91			  "AP_EDP_BKLTEN",
92			  "AP_RAM_ID2",
93			  "",
94			  "EDP_BRIJ_I2C_SDA",
95			  "EDP_BRIJ_I2C_SCL",
96			  "HUB_RST_L",
97			  "",
98			  "AP_RAM_ID1",
99			  "AP_SKU_ID2",
100			  "",
101			  "",
102			  "AMP_EN",
103			  "P_SENSOR_INT_L",
104			  "AP_SAR_SENSOR_SDA",
105			  "AP_SAR_SENSOR_SCL",
106			  "",
107			  "HP_IRQ",
108			  "AP_RAM_ID0",
109			  "EN_PP3300_DX_EDP",
110			  "AP_BRD_ID2",
111			  "BRIJ_SUSPEND",
112			  "AP_BRD_ID0",
113			  "AP_H1_SPI_MISO",
114			  "AP_H1_SPI_MOSI",
115			  "AP_H1_SPI_CLK",
116			  "AP_H1_SPI_CS_L",
117			  "",
118			  "",
119			  "",
120			  "",
121			  "H1_AP_INT_ODL",
122			  "",
123			  "UART_AP_TX_DBG_RX",
124			  "UART_DBG_TX_AP_RX",
125			  "HP_I2C_SDA",
126			  "HP_I2C_SCL",
127			  "FORCED_USB_BOOT",
128			  "",
129			  "",
130			  "AMP_DIN",
131			  "",
132			  "HP_BCLK",
133			  "HP_LRCLK",
134			  "HP_DOUT",
135			  "HP_DIN",
136			  "HP_MCLK",
137			  "TRACKPAD_INT_1V8_ODL",
138			  "AP_EC_SPI_MISO",
139			  "AP_EC_SPI_MOSI",
140			  "AP_EC_SPI_CLK",
141			  "AP_EC_SPI_CS_L",
142			  "AP_SPI_CLK",
143			  "AP_SPI_MOSI",
144			  "AP_SPI_MISO",
145			  /*
146			   * AP_FLASH_WP_L is crossystem ABI. Schematics
147			   * call it BIOS_FLASH_WP_L.
148			   */
149			  "AP_FLASH_WP_L",
150			  "DBG_SPI_HOLD_L",
151			  "AP_SPI_CS0_L",
152			  "",
153			  "",
154			  "",
155			  "",
156			  "",
157			  "",
158			  "UIM2_DATA",
159			  "UIM2_CLK",
160			  "UIM2_RST",
161			  "UIM2_PRESENT",
162			  "UIM1_DATA",
163			  "UIM1_CLK",
164			  "UIM1_RST",
165			  "",
166			  "EN_PP3300_CODEC",
167			  "EN_PP3300_HUB",
168			  "",
169			  "",
170			  "",
171			  "",
172			  "",
173			  "AP_SKU_ID1",
174			  "AP_RST_REQ",
175			  "",
176			  "AP_BRD_ID1",
177			  "AP_EC_INT_L",
178			  "",
179			  "",
180			  "",
181			  "",
182			  "",
183			  "",
184			  "",
185			  "",
186			  "",
187			  "EDP_BRIJ_EN",
188			  "AP_SKU_ID0",
189			  "",
190			  "",
191			  "",
192			  "",
193			  "",
194			  "",
195			  "",
196			  "",
197			  "",
198			  "AP_TS_PEN_I2C_SDA",
199			  "AP_TS_PEN_I2C_SCL",
200			  "DP_HOT_PLUG_DET",
201			  "EC_IN_RW_ODL";
202};
203