1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google CoachZ board device tree source 4 * 5 * Copyright 2020 Google LLC. 6 */ 7 8#include "sc7180.dtsi" 9 10ap_ec_spi: &spi6 {}; 11ap_h1_spi: &spi0 {}; 12 13#include "sc7180-trogdor.dtsi" 14#include "sc7180-trogdor-ti-sn65dsi86.dtsi" 15 16/* Deleted nodes from trogdor.dtsi */ 17 18/delete-node/ &alc5682; 19/delete-node/ &pp3300_codec; 20 21/ { 22 /* BOARD-SPECIFIC TOP LEVEL NODES */ 23 24 adau7002: audio-codec-1 { 25 compatible = "adi,adau7002"; 26 IOVDD-supply = <&pp1800_l15a>; 27 wakeup-delay-ms = <80>; 28 #sound-dai-cells = <0>; 29 }; 30 31 thermal-zones { 32 skin_temp_thermal: skin-temp-thermal { 33 polling-delay-passive = <250>; 34 polling-delay = <0>; 35 36 thermal-sensors = <&pm6150_adc_tm 1>; 37 sustainable-power = <965>; 38 39 trips { 40 skin_temp_alert0: trip-point0 { 41 temperature = <42000>; 42 hysteresis = <1000>; 43 type = "passive"; 44 }; 45 46 skin_temp_alert1: trip-point1 { 47 temperature = <45000>; 48 hysteresis = <1000>; 49 type = "passive"; 50 }; 51 52 skin-temp-crit { 53 temperature = <60000>; 54 hysteresis = <1000>; 55 type = "critical"; 56 }; 57 }; 58 59 cooling-maps { 60 map0 { 61 trip = <&skin_temp_alert0>; 62 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 63 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 64 }; 65 66 map1 { 67 trip = <&skin_temp_alert1>; 68 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 69 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 70 }; 71 }; 72 }; 73 }; 74}; 75 76&ap_spi_fp { 77 status = "okay"; 78}; 79 80&backlight { 81 pwms = <&cros_ec_pwm 0>; 82}; 83 84&camcc { 85 status = "okay"; 86}; 87 88&cros_ec { 89 cros_ec_proximity: proximity { 90 compatible = "google,cros-ec-mkbp-proximity"; 91 label = "proximity-wifi"; 92 }; 93}; 94 95ap_ts_pen_1v8: &i2c4 { 96 status = "okay"; 97 clock-frequency = <400000>; 98 99 ap_ts: touchscreen@5d { 100 compatible = "goodix,gt7375p"; 101 reg = <0x5d>; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 104 105 interrupt-parent = <&tlmm>; 106 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 107 108 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 109 110 vdd-supply = <&pp3300_ts>; 111 }; 112}; 113 114&i2c7 { 115 status = "disabled"; 116}; 117 118&i2c9 { 119 status = "disabled"; 120}; 121 122&panel { 123 compatible = "boe,nv110wtm-n61"; 124}; 125 126&pm6150_adc { 127 skin-temp-thermistor@4e { 128 reg = <ADC5_AMUX_THM2_100K_PU>; 129 qcom,ratiometric; 130 qcom,hw-settle-time = <200>; 131 }; 132}; 133 134&pm6150_adc_tm { 135 status = "okay"; 136 137 skin-temp-thermistor@1 { 138 reg = <1>; 139 io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; 140 qcom,ratiometric; 141 qcom,hw-settle-time-us = <200>; 142 }; 143}; 144 145&pp1800_uf_cam { 146 status = "okay"; 147}; 148 149&pp1800_wf_cam { 150 status = "okay"; 151}; 152 153&pp2800_uf_cam { 154 status = "okay"; 155}; 156 157&pp2800_wf_cam { 158 status = "okay"; 159}; 160 161&pp3300_dx_edp { 162 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>; 163}; 164 165&sdhc_2 { 166 status = "okay"; 167}; 168 169&sn65dsi86_out { 170 data-lanes = <0 1 2 3>; 171}; 172 173&sound { 174 compatible = "google,sc7180-coachz"; 175 model = "sc7180-adau7002-max98357a"; 176 audio-routing = "PDM_DAT", "DMIC"; 177 178 pinctrl-names = "default"; 179 pinctrl-0 = <&dmic_clk_en>; 180}; 181 182&sound_multimedia0_codec { 183 sound-dai = <&adau7002>; 184}; 185 186/* PINCTRL - modifications to sc7180-trogdor.dtsi */ 187 188&en_pp3300_dx_edp { 189 pinmux { 190 pins = "gpio67"; 191 }; 192 193 pinconf { 194 pins = "gpio67"; 195 }; 196}; 197 198&ts_reset_l { 199 pinconf { 200 /* 201 * We want reset state by default and it will be up to the 202 * driver to disable this when it's ready. 203 */ 204 output-low; 205 }; 206}; 207 208/* PINCTRL - board-specific pinctrl */ 209 210&tlmm { 211 gpio-line-names = "HUB_RST_L", 212 "AP_RAM_ID0", 213 "AP_SKU_ID2", 214 "AP_RAM_ID1", 215 "FP_TO_AP_IRQ_L", 216 "AP_RAM_ID2", 217 "UF_CAM_EN", 218 "WF_CAM_EN", 219 "TS_RESET_L", 220 "TS_INT_L", 221 "FPMCU_BOOT0", 222 "EDP_BRIJ_IRQ", 223 "AP_EDP_BKLTEN", 224 "UF_CAM_MCLK", 225 "WF_CAM_CLK", 226 "EDP_BRIJ_I2C_SDA", 227 "EDP_BRIJ_I2C_SCL", 228 "UF_CAM_SDA", 229 "UF_CAM_SCL", 230 "WF_CAM_SDA", 231 "WF_CAM_SCL", 232 "WLC_IRQ", 233 "FP_RST_L", 234 "AMP_EN", 235 "WLC_NRST", 236 "AP_SAR_SENSOR_SDA", 237 "AP_SAR_SENSOR_SCL", 238 "", 239 "", 240 "WF_CAM_RST_L", 241 "UF_CAM_RST_L", 242 "AP_BRD_ID2", 243 "BRIJ_SUSPEND", 244 "AP_BRD_ID0", 245 "AP_H1_SPI_MISO", 246 "AP_H1_SPI_MOSI", 247 "AP_H1_SPI_CLK", 248 "AP_H1_SPI_CS_L", 249 "", 250 "", 251 "", 252 "", 253 "H1_AP_INT_ODL", 254 "", 255 "UART_AP_TX_DBG_RX", 256 "UART_DBG_TX_AP_RX", 257 "", 258 "", 259 "FORCED_USB_BOOT", 260 "AMP_BCLK", 261 "AMP_LRCLK", 262 "AMP_DIN", 263 "", 264 "HP_BCLK", 265 "HP_LRCLK", 266 "HP_DOUT", 267 "HP_DIN", 268 "HP_MCLK", 269 "AP_SKU_ID0", 270 "AP_EC_SPI_MISO", 271 "AP_EC_SPI_MOSI", 272 "AP_EC_SPI_CLK", 273 "AP_EC_SPI_CS_L", 274 "AP_SPI_CLK", 275 "AP_SPI_MOSI", 276 "AP_SPI_MISO", 277 /* 278 * AP_FLASH_WP_L is crossystem ABI. Schematics 279 * call it BIOS_FLASH_WP_L. 280 */ 281 "AP_FLASH_WP_L", 282 "EN_PP3300_DX_EDP", 283 "AP_SPI_CS0_L", 284 "SD_CD_ODL", 285 "", 286 "", 287 "", 288 "", 289 "EN_FP_RAILS", 290 "UIM2_DATA", 291 "UIM2_CLK", 292 "UIM2_RST", 293 "UIM2_PRESENT_L", 294 "UIM1_DATA", 295 "UIM1_CLK", 296 "UIM1_RST", 297 "", 298 "", 299 "HUB_EN", 300 "", 301 "AP_SPI_FP_MISO", 302 "AP_SPI_FP_MOSI", 303 "AP_SPI_FP_CLK", 304 "AP_SPI_FP_CS_L", 305 "AP_SKU_ID1", 306 "AP_RST_REQ", 307 "", 308 "AP_BRD_ID1", 309 "AP_EC_INT_L", 310 "", 311 "", 312 "", 313 "", 314 "", 315 "", 316 "", 317 "", 318 "", 319 "EDP_BRIJ_EN", 320 "", 321 "", 322 "", 323 "", 324 "", 325 "", 326 "", 327 "", 328 "", 329 "", 330 "AP_TS_PEN_I2C_SDA", 331 "AP_TS_PEN_I2C_SCL", 332 "DP_HOT_PLUG_DET", 333 "EC_IN_RW_ODL"; 334 335 dmic_clk_en: dmic_clk_en { 336 pinmux { 337 pins = "gpio83"; 338 function = "gpio"; 339 }; 340 341 pinconf { 342 pins = "gpio83"; 343 drive-strength = <8>; 344 bias-pull-up; 345 }; 346 }; 347}; 348