1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google CoachZ board device tree source 4 * 5 * Copyright 2020 Google LLC. 6 */ 7 8#include "sc7180.dtsi" 9 10ap_ec_spi: &spi6 {}; 11ap_h1_spi: &spi0 {}; 12 13#include "sc7180-trogdor.dtsi" 14 15/* Deleted nodes from trogdor.dtsi */ 16 17/delete-node/ &alc5682; 18/delete-node/ &pp3300_codec; 19 20/ { 21 /* BOARD-SPECIFIC TOP LEVEL NODES */ 22 23 adau7002: audio-codec-1 { 24 compatible = "adi,adau7002"; 25 IOVDD-supply = <&pp1800_l15a>; 26 #sound-dai-cells = <0>; 27 }; 28 29 thermal-zones { 30 skin_temp_thermal: skin-temp-thermal { 31 polling-delay-passive = <250>; 32 polling-delay = <0>; 33 34 thermal-sensors = <&pm6150_adc_tm 1>; 35 sustainable-power = <814>; 36 37 trips { 38 skin_temp_alert0: trip-point0 { 39 temperature = <42000>; 40 hysteresis = <1000>; 41 type = "passive"; 42 }; 43 44 skin_temp_alert1: trip-point1 { 45 temperature = <45000>; 46 hysteresis = <1000>; 47 type = "passive"; 48 }; 49 50 skin-temp-crit { 51 temperature = <60000>; 52 hysteresis = <1000>; 53 type = "critical"; 54 }; 55 }; 56 57 cooling-maps { 58 map0 { 59 trip = <&skin_temp_alert0>; 60 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 61 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 62 }; 63 64 map1 { 65 trip = <&skin_temp_alert1>; 66 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 67 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 68 }; 69 }; 70 }; 71 }; 72}; 73 74&ap_spi_fp { 75 status = "okay"; 76}; 77 78&backlight { 79 pwms = <&cros_ec_pwm 0>; 80}; 81 82&camcc { 83 status = "okay"; 84}; 85 86&cros_ec { 87 cros_ec_proximity: proximity { 88 compatible = "google,cros-ec-mkbp-proximity"; 89 label = "proximity-wifi"; 90 }; 91}; 92 93ap_ts_pen_1v8: &i2c4 { 94 status = "okay"; 95 clock-frequency = <400000>; 96 97 ap_ts: touchscreen@5d { 98 compatible = "goodix,gt7375p"; 99 reg = <0x5d>; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 102 103 interrupt-parent = <&tlmm>; 104 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 105 106 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 107 108 vdd-supply = <&pp3300_ts>; 109 }; 110}; 111 112&i2c7 { 113 status = "disabled"; 114}; 115 116&i2c9 { 117 status = "disabled"; 118}; 119 120&panel { 121 compatible = "boe,nv110wtm-n61"; 122}; 123 124&pm6150_adc { 125 skin-temp-thermistor@4e { 126 reg = <ADC5_AMUX_THM2_100K_PU>; 127 qcom,ratiometric; 128 qcom,hw-settle-time = <200>; 129 }; 130}; 131 132&pm6150_adc_tm { 133 status = "okay"; 134 135 skin-temp-thermistor@1 { 136 reg = <1>; 137 io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; 138 qcom,ratiometric; 139 qcom,hw-settle-time-us = <200>; 140 }; 141}; 142 143&pp3300_dx_edp { 144 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>; 145}; 146 147&sdhc_2 { 148 status = "okay"; 149}; 150 151&sn65dsi86_out { 152 data-lanes = <0 1 2 3>; 153}; 154 155&sound { 156 compatible = "google,sc7180-coachz"; 157 model = "sc7180-adau7002-max98357a"; 158 audio-routing = "PDM_DAT", "DMIC"; 159 160 pinctrl-names = "default"; 161 pinctrl-0 = <&dmic_clk_en>; 162}; 163 164&sound_multimedia0_codec { 165 sound-dai = <&adau7002>; 166}; 167 168/* PINCTRL - modifications to sc7180-trogdor.dtsi */ 169 170&en_pp3300_dx_edp { 171 pinmux { 172 pins = "gpio67"; 173 }; 174 175 pinconf { 176 pins = "gpio67"; 177 }; 178}; 179 180&ts_reset_l { 181 pinconf { 182 /* 183 * We want reset state by default and it will be up to the 184 * driver to disable this when it's ready. 185 */ 186 output-low; 187 }; 188}; 189 190/* PINCTRL - board-specific pinctrl */ 191 192&tlmm { 193 gpio-line-names = "HUB_RST_L", 194 "AP_RAM_ID0", 195 "AP_SKU_ID2", 196 "AP_RAM_ID1", 197 "FP_TO_AP_IRQ_L", 198 "AP_RAM_ID2", 199 "UF_CAM_EN", 200 "WF_CAM_EN", 201 "TS_RESET_L", 202 "TS_INT_L", 203 "FPMCU_BOOT0", 204 "EDP_BRIJ_IRQ", 205 "AP_EDP_BKLTEN", 206 "UF_CAM_MCLK", 207 "WF_CAM_CLK", 208 "EDP_BRIJ_I2C_SDA", 209 "EDP_BRIJ_I2C_SCL", 210 "UF_CAM_SDA", 211 "UF_CAM_SCL", 212 "WF_CAM_SDA", 213 "WF_CAM_SCL", 214 "WLC_IRQ", 215 "FP_RST_L", 216 "AMP_EN", 217 "WLC_NRST", 218 "AP_SAR_SENSOR_SDA", 219 "AP_SAR_SENSOR_SCL", 220 "", 221 "", 222 "WF_CAM_RST_L", 223 "UF_CAM_RST_L", 224 "AP_BRD_ID2", 225 "BRIJ_SUSPEND", 226 "AP_BRD_ID0", 227 "AP_H1_SPI_MISO", 228 "AP_H1_SPI_MOSI", 229 "AP_H1_SPI_CLK", 230 "AP_H1_SPI_CS_L", 231 "", 232 "", 233 "", 234 "", 235 "H1_AP_INT_ODL", 236 "", 237 "UART_AP_TX_DBG_RX", 238 "UART_DBG_TX_AP_RX", 239 "", 240 "", 241 "FORCED_USB_BOOT", 242 "AMP_BCLK", 243 "AMP_LRCLK", 244 "AMP_DIN", 245 "", 246 "HP_BCLK", 247 "HP_LRCLK", 248 "HP_DOUT", 249 "HP_DIN", 250 "HP_MCLK", 251 "AP_SKU_ID0", 252 "AP_EC_SPI_MISO", 253 "AP_EC_SPI_MOSI", 254 "AP_EC_SPI_CLK", 255 "AP_EC_SPI_CS_L", 256 "AP_SPI_CLK", 257 "AP_SPI_MOSI", 258 "AP_SPI_MISO", 259 /* 260 * AP_FLASH_WP_L is crossystem ABI. Schematics 261 * call it BIOS_FLASH_WP_L. 262 */ 263 "AP_FLASH_WP_L", 264 "EN_PP3300_DX_EDP", 265 "AP_SPI_CS0_L", 266 "SD_CD_ODL", 267 "", 268 "", 269 "", 270 "", 271 "EN_FP_RAILS", 272 "UIM2_DATA", 273 "UIM2_CLK", 274 "UIM2_RST", 275 "UIM2_PRESENT_L", 276 "UIM1_DATA", 277 "UIM1_CLK", 278 "UIM1_RST", 279 "", 280 "", 281 "HUB_EN", 282 "", 283 "AP_SPI_FP_MISO", 284 "AP_SPI_FP_MOSI", 285 "AP_SPI_FP_CLK", 286 "AP_SPI_FP_CS_L", 287 "AP_SKU_ID1", 288 "AP_RST_REQ", 289 "", 290 "AP_BRD_ID1", 291 "AP_EC_INT_L", 292 "", 293 "", 294 "", 295 "", 296 "", 297 "", 298 "", 299 "", 300 "", 301 "EDP_BRIJ_EN", 302 "", 303 "", 304 "", 305 "", 306 "", 307 "", 308 "", 309 "", 310 "", 311 "", 312 "AP_TS_PEN_I2C_SDA", 313 "AP_TS_PEN_I2C_SCL", 314 "DP_HOT_PLUG_DET", 315 "EC_IN_RW_ODL"; 316 317 dmic_clk_en: dmic_clk_en { 318 pinmux { 319 pins = "gpio83"; 320 function = "gpio"; 321 }; 322 323 pinconf { 324 pins = "gpio83"; 325 drive-strength = <8>; 326 bias-pull-up; 327 }; 328 }; 329}; 330