1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google CoachZ board device tree source 4 * 5 * Copyright 2020 Google LLC. 6 */ 7 8#include "sc7180.dtsi" 9 10ap_ec_spi: &spi6 {}; 11ap_h1_spi: &spi0 {}; 12 13#include "sc7180-trogdor.dtsi" 14 15/* Deleted nodes from trogdor.dtsi */ 16 17/delete-node/ &alc5682; 18/delete-node/ &pp3300_codec; 19 20/ { 21 /* BOARD-SPECIFIC TOP LEVEL NODES */ 22 23 adau7002: audio-codec-1 { 24 compatible = "adi,adau7002"; 25 IOVDD-supply = <&pp1800_l15a>; 26 wakeup-delay-ms = <80>; 27 #sound-dai-cells = <0>; 28 }; 29 30 thermal-zones { 31 skin_temp_thermal: skin-temp-thermal { 32 polling-delay-passive = <250>; 33 polling-delay = <0>; 34 35 thermal-sensors = <&pm6150_adc_tm 1>; 36 sustainable-power = <965>; 37 38 trips { 39 skin_temp_alert0: trip-point0 { 40 temperature = <42000>; 41 hysteresis = <1000>; 42 type = "passive"; 43 }; 44 45 skin_temp_alert1: trip-point1 { 46 temperature = <45000>; 47 hysteresis = <1000>; 48 type = "passive"; 49 }; 50 51 skin-temp-crit { 52 temperature = <60000>; 53 hysteresis = <1000>; 54 type = "critical"; 55 }; 56 }; 57 58 cooling-maps { 59 map0 { 60 trip = <&skin_temp_alert0>; 61 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 62 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 63 }; 64 65 map1 { 66 trip = <&skin_temp_alert1>; 67 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 68 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 69 }; 70 }; 71 }; 72 }; 73}; 74 75&ap_spi_fp { 76 status = "okay"; 77}; 78 79&backlight { 80 pwms = <&cros_ec_pwm 0>; 81}; 82 83&camcc { 84 status = "okay"; 85}; 86 87&cros_ec { 88 cros_ec_proximity: proximity { 89 compatible = "google,cros-ec-mkbp-proximity"; 90 label = "proximity-wifi"; 91 }; 92}; 93 94ap_ts_pen_1v8: &i2c4 { 95 status = "okay"; 96 clock-frequency = <400000>; 97 98 ap_ts: touchscreen@5d { 99 compatible = "goodix,gt7375p"; 100 reg = <0x5d>; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 103 104 interrupt-parent = <&tlmm>; 105 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 106 107 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 108 109 vdd-supply = <&pp3300_ts>; 110 }; 111}; 112 113&i2c7 { 114 status = "disabled"; 115}; 116 117&i2c9 { 118 status = "disabled"; 119}; 120 121&panel { 122 compatible = "boe,nv110wtm-n61"; 123}; 124 125&pm6150_adc { 126 skin-temp-thermistor@4e { 127 reg = <ADC5_AMUX_THM2_100K_PU>; 128 qcom,ratiometric; 129 qcom,hw-settle-time = <200>; 130 }; 131}; 132 133&pm6150_adc_tm { 134 status = "okay"; 135 136 skin-temp-thermistor@1 { 137 reg = <1>; 138 io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; 139 qcom,ratiometric; 140 qcom,hw-settle-time-us = <200>; 141 }; 142}; 143 144&pp3300_dx_edp { 145 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>; 146}; 147 148&sdhc_2 { 149 status = "okay"; 150}; 151 152&sn65dsi86_out { 153 data-lanes = <0 1 2 3>; 154}; 155 156&sound { 157 compatible = "google,sc7180-coachz"; 158 model = "sc7180-adau7002-max98357a"; 159 audio-routing = "PDM_DAT", "DMIC"; 160 161 pinctrl-names = "default"; 162 pinctrl-0 = <&dmic_clk_en>; 163}; 164 165&sound_multimedia0_codec { 166 sound-dai = <&adau7002>; 167}; 168 169/* PINCTRL - modifications to sc7180-trogdor.dtsi */ 170 171&en_pp3300_dx_edp { 172 pinmux { 173 pins = "gpio67"; 174 }; 175 176 pinconf { 177 pins = "gpio67"; 178 }; 179}; 180 181&ts_reset_l { 182 pinconf { 183 /* 184 * We want reset state by default and it will be up to the 185 * driver to disable this when it's ready. 186 */ 187 output-low; 188 }; 189}; 190 191/* PINCTRL - board-specific pinctrl */ 192 193&tlmm { 194 gpio-line-names = "HUB_RST_L", 195 "AP_RAM_ID0", 196 "AP_SKU_ID2", 197 "AP_RAM_ID1", 198 "FP_TO_AP_IRQ_L", 199 "AP_RAM_ID2", 200 "UF_CAM_EN", 201 "WF_CAM_EN", 202 "TS_RESET_L", 203 "TS_INT_L", 204 "FPMCU_BOOT0", 205 "EDP_BRIJ_IRQ", 206 "AP_EDP_BKLTEN", 207 "UF_CAM_MCLK", 208 "WF_CAM_CLK", 209 "EDP_BRIJ_I2C_SDA", 210 "EDP_BRIJ_I2C_SCL", 211 "UF_CAM_SDA", 212 "UF_CAM_SCL", 213 "WF_CAM_SDA", 214 "WF_CAM_SCL", 215 "WLC_IRQ", 216 "FP_RST_L", 217 "AMP_EN", 218 "WLC_NRST", 219 "AP_SAR_SENSOR_SDA", 220 "AP_SAR_SENSOR_SCL", 221 "", 222 "", 223 "WF_CAM_RST_L", 224 "UF_CAM_RST_L", 225 "AP_BRD_ID2", 226 "BRIJ_SUSPEND", 227 "AP_BRD_ID0", 228 "AP_H1_SPI_MISO", 229 "AP_H1_SPI_MOSI", 230 "AP_H1_SPI_CLK", 231 "AP_H1_SPI_CS_L", 232 "", 233 "", 234 "", 235 "", 236 "H1_AP_INT_ODL", 237 "", 238 "UART_AP_TX_DBG_RX", 239 "UART_DBG_TX_AP_RX", 240 "", 241 "", 242 "FORCED_USB_BOOT", 243 "AMP_BCLK", 244 "AMP_LRCLK", 245 "AMP_DIN", 246 "", 247 "HP_BCLK", 248 "HP_LRCLK", 249 "HP_DOUT", 250 "HP_DIN", 251 "HP_MCLK", 252 "AP_SKU_ID0", 253 "AP_EC_SPI_MISO", 254 "AP_EC_SPI_MOSI", 255 "AP_EC_SPI_CLK", 256 "AP_EC_SPI_CS_L", 257 "AP_SPI_CLK", 258 "AP_SPI_MOSI", 259 "AP_SPI_MISO", 260 /* 261 * AP_FLASH_WP_L is crossystem ABI. Schematics 262 * call it BIOS_FLASH_WP_L. 263 */ 264 "AP_FLASH_WP_L", 265 "EN_PP3300_DX_EDP", 266 "AP_SPI_CS0_L", 267 "SD_CD_ODL", 268 "", 269 "", 270 "", 271 "", 272 "EN_FP_RAILS", 273 "UIM2_DATA", 274 "UIM2_CLK", 275 "UIM2_RST", 276 "UIM2_PRESENT_L", 277 "UIM1_DATA", 278 "UIM1_CLK", 279 "UIM1_RST", 280 "", 281 "", 282 "HUB_EN", 283 "", 284 "AP_SPI_FP_MISO", 285 "AP_SPI_FP_MOSI", 286 "AP_SPI_FP_CLK", 287 "AP_SPI_FP_CS_L", 288 "AP_SKU_ID1", 289 "AP_RST_REQ", 290 "", 291 "AP_BRD_ID1", 292 "AP_EC_INT_L", 293 "", 294 "", 295 "", 296 "", 297 "", 298 "", 299 "", 300 "", 301 "", 302 "EDP_BRIJ_EN", 303 "", 304 "", 305 "", 306 "", 307 "", 308 "", 309 "", 310 "", 311 "", 312 "", 313 "AP_TS_PEN_I2C_SDA", 314 "AP_TS_PEN_I2C_SCL", 315 "DP_HOT_PLUG_DET", 316 "EC_IN_RW_ODL"; 317 318 dmic_clk_en: dmic_clk_en { 319 pinmux { 320 pins = "gpio83"; 321 function = "gpio"; 322 }; 323 324 pinconf { 325 pins = "gpio83"; 326 drive-strength = <8>; 327 bias-pull-up; 328 }; 329 }; 330}; 331