1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11#include <dt-bindings/spmi/spmi.h>
12
13#include "sa8540p.dtsi"
14
15/ {
16	model = "Qualcomm SA8295P ADP";
17	compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
18
19	aliases {
20		serial0 = &qup2_uart17;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26};
27
28&apps_rsc {
29	pmm8540-a-regulators {
30		compatible = "qcom,pm8150-rpmh-regulators";
31		qcom,pmic-id = "a";
32
33		vreg_l3a: ldo3 {
34			regulator-name = "vreg_l3a";
35			regulator-min-microvolt = <1200000>;
36			regulator-max-microvolt = <1208000>;
37			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
38		};
39
40		vreg_l5a: ldo5 {
41			regulator-name = "vreg_l5a";
42			regulator-min-microvolt = <912000>;
43			regulator-max-microvolt = <912000>;
44			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
45		};
46
47		vreg_l7a: ldo7 {
48			regulator-name = "vreg_l7a";
49			regulator-min-microvolt = <1800000>;
50			regulator-max-microvolt = <1800000>;
51			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
52		};
53
54		vreg_l13a: ldo13 {
55			regulator-name = "vreg_l13a";
56			regulator-min-microvolt = <3072000>;
57			regulator-max-microvolt = <3072000>;
58			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
59		};
60
61		vreg_l11a: ldo11 {
62			regulator-name = "vreg_l11a";
63			regulator-min-microvolt = <880000>;
64			regulator-max-microvolt = <880000>;
65			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
66		};
67	};
68
69	pmm8540-c-regulators {
70		compatible = "qcom,pm8150-rpmh-regulators";
71		qcom,pmic-id = "c";
72
73		vreg_l1c: ldo1 {
74			regulator-name = "vreg_l1c";
75			regulator-min-microvolt = <912000>;
76			regulator-max-microvolt = <912000>;
77			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
78		};
79
80		vreg_l2c: ldo2 {
81			regulator-name = "vreg_l2c";
82			regulator-min-microvolt = <3072000>;
83			regulator-max-microvolt = <3072000>;
84			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
85		};
86
87		vreg_l3c: ldo3 {
88			regulator-name = "vreg_l3c";
89			regulator-min-microvolt = <1200000>;
90			regulator-max-microvolt = <1200000>;
91			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
92			regulator-allow-set-load;
93			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
94						   RPMH_REGULATOR_MODE_HPM>;
95		};
96
97		vreg_l4c: ldo4 {
98			regulator-name = "vreg_l4c";
99			regulator-min-microvolt = <1200000>;
100			regulator-max-microvolt = <1208000>;
101			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
102		};
103
104		vreg_l6c: ldo6 {
105			regulator-name = "vreg_l6c";
106			regulator-min-microvolt = <1200000>;
107			regulator-max-microvolt = <1200000>;
108			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
109			regulator-allow-set-load;
110			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
111						   RPMH_REGULATOR_MODE_HPM>;
112		};
113
114		vreg_l7c: ldo7 {
115			regulator-name = "vreg_l7c";
116			regulator-min-microvolt = <1800000>;
117			regulator-max-microvolt = <1800000>;
118			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
119		};
120
121		vreg_l10c: ldo10 {
122			regulator-name = "vreg_l10c";
123			regulator-min-microvolt = <2504000>;
124			regulator-max-microvolt = <2504000>;
125			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
126			regulator-allow-set-load;
127			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
128						   RPMH_REGULATOR_MODE_HPM>;
129		};
130
131		vreg_l17c: ldo17 {
132			regulator-name = "vreg_l17c";
133			regulator-min-microvolt = <2504000>;
134			regulator-max-microvolt = <2504000>;
135			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
136			regulator-allow-set-load;
137			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
138						   RPMH_REGULATOR_MODE_HPM>;
139		};
140	};
141
142	pmm8540-g-regulators {
143		compatible = "qcom,pm8150-rpmh-regulators";
144		qcom,pmic-id = "g";
145
146		vreg_l3g: ldo3 {
147			regulator-name = "vreg_l3g";
148			regulator-min-microvolt = <1200000>;
149			regulator-max-microvolt = <1200000>;
150			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
151		};
152
153		vreg_l7g: ldo7 {
154			regulator-name = "vreg_l7g";
155			regulator-min-microvolt = <1800000>;
156			regulator-max-microvolt = <1800000>;
157			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
158		};
159
160		vreg_l8g: ldo8 {
161			regulator-name = "vreg_l8g";
162			regulator-min-microvolt = <880000>;
163			regulator-max-microvolt = <880000>;
164			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165		};
166	};
167};
168
169&pcie2a {
170	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
171	wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
172
173	pinctrl-names = "default";
174	pinctrl-0 = <&pcie2a_default>;
175
176	status = "okay";
177};
178
179&pcie2a_phy {
180	vdda-phy-supply = <&vreg_l11a>;
181	vdda-pll-supply = <&vreg_l3a>;
182
183	status = "okay";
184};
185
186&pcie3a {
187	num-lanes = <2>;
188
189	perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
190	wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>;
191
192	pinctrl-names = "default";
193	pinctrl-0 = <&pcie3a_default>;
194
195	status = "okay";
196};
197
198&pcie3a_phy {
199	vdda-phy-supply = <&vreg_l11a>;
200	vdda-pll-supply = <&vreg_l3a>;
201
202	status = "okay";
203};
204
205&pcie3b {
206	perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>;
207	wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
208
209	pinctrl-names = "default";
210	pinctrl-0 = <&pcie3b_default>;
211
212	status = "okay";
213};
214
215&pcie3b_phy {
216	vdda-phy-supply = <&vreg_l11a>;
217	vdda-pll-supply = <&vreg_l3a>;
218
219	status = "okay";
220};
221
222&pcie4 {
223	perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
224	wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
225
226	pinctrl-names = "default";
227	pinctrl-0 = <&pcie4_default>;
228
229	status = "okay";
230};
231
232&pcie4_phy {
233	vdda-phy-supply = <&vreg_l11a>;
234	vdda-pll-supply = <&vreg_l3a>;
235
236	status = "okay";
237};
238
239&qup2 {
240	status = "okay";
241};
242
243&qup2_uart17 {
244	compatible = "qcom,geni-debug-uart";
245	status = "okay";
246};
247
248&remoteproc_adsp {
249	firmware-name = "qcom/sa8540p/adsp.mbn";
250	status = "okay";
251};
252
253&remoteproc_nsp0 {
254	firmware-name = "qcom/sa8540p/cdsp.mbn";
255	status = "okay";
256};
257
258&remoteproc_nsp1 {
259	firmware-name = "qcom/sa8540p/cdsp1.mbn";
260	status = "okay";
261};
262
263&spmi_bus {
264	pm8450a: pmic@0 {
265		compatible = "qcom,pm8150", "qcom,spmi-pmic";
266		reg = <0x0 SPMI_USID>;
267		#address-cells = <1>;
268		#size-cells = <0>;
269
270		rtc@6000 {
271			compatible = "qcom,pm8941-rtc";
272			reg = <0x6000>;
273			reg-names = "rtc", "alarm";
274			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
275			wakeup-source;
276		};
277
278		pm8450a_gpios: gpio@c000 {
279			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
280			reg = <0xc000>;
281			gpio-controller;
282			gpio-ranges = <&pm8450a_gpios 0 0 10>;
283			#gpio-cells = <2>;
284			interrupt-controller;
285			#interrupt-cells = <2>;
286		};
287	};
288
289	pm8450c: pmic@4 {
290		compatible = "qcom,pm8150", "qcom,spmi-pmic";
291		reg = <0x4 SPMI_USID>;
292		#address-cells = <1>;
293		#size-cells = <0>;
294
295		pm8450c_gpios: gpio@c000 {
296			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
297			reg = <0xc000>;
298			gpio-controller;
299			gpio-ranges = <&pm8450c_gpios 0 0 10>;
300			#gpio-cells = <2>;
301			interrupt-controller;
302			#interrupt-cells = <2>;
303		};
304	};
305
306	pm8450e: pmic@8 {
307		compatible = "qcom,pm8150", "qcom,spmi-pmic";
308		reg = <0x8 SPMI_USID>;
309		#address-cells = <1>;
310		#size-cells = <0>;
311
312		pm8450e_gpios: gpio@c000 {
313			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
314			reg = <0xc000>;
315			gpio-controller;
316			gpio-ranges = <&pm8450e_gpios 0 0 10>;
317			#gpio-cells = <2>;
318			interrupt-controller;
319			#interrupt-cells = <2>;
320		};
321	};
322
323	pm8450g: pmic@c {
324		compatible = "qcom,pm8150", "qcom,spmi-pmic";
325		reg = <0xc SPMI_USID>;
326		#address-cells = <1>;
327		#size-cells = <0>;
328
329		pm8450g_gpios: gpio@c000 {
330			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
331			reg = <0xc000>;
332			gpio-controller;
333			gpio-ranges = <&pm8450g_gpios 0 0 10>;
334			#gpio-cells = <2>;
335			interrupt-controller;
336			#interrupt-cells = <2>;
337		};
338	};
339};
340
341&ufs_mem_hc {
342	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
343
344	vcc-supply = <&vreg_l17c>;
345	vcc-max-microamp = <800000>;
346	vccq-supply = <&vreg_l6c>;
347	vccq-max-microamp = <900000>;
348
349	status = "okay";
350};
351
352&ufs_mem_phy {
353	vdda-phy-supply = <&vreg_l8g>;
354	vdda-pll-supply = <&vreg_l3g>;
355
356	status = "okay";
357};
358
359&ufs_card_hc {
360	reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
361
362	vcc-supply = <&vreg_l10c>;
363	vcc-max-microamp = <800000>;
364	vccq-supply = <&vreg_l3c>;
365	vccq-max-microamp = <900000>;
366
367	status = "okay";
368};
369
370&ufs_card_phy {
371	vdda-phy-supply = <&vreg_l8g>;
372	vdda-pll-supply = <&vreg_l3g>;
373
374	status = "okay";
375};
376
377&usb_0 {
378	status = "okay";
379};
380
381&usb_0_dwc3 {
382	/* TODO: Define USB-C connector properly */
383	dr_mode = "peripheral";
384};
385
386&usb_0_hsphy {
387	vdda-pll-supply = <&vreg_l5a>;
388	vdda18-supply = <&vreg_l7a>;
389	vdda33-supply = <&vreg_l13a>;
390
391	status = "okay";
392};
393
394&usb_0_qmpphy {
395	vdda-phy-supply = <&vreg_l3a>;
396	vdda-pll-supply = <&vreg_l5a>;
397
398	status = "okay";
399};
400
401&usb_1 {
402	status = "okay";
403};
404
405&usb_1_dwc3 {
406	/* TODO: Define USB-C connector properly */
407	dr_mode = "host";
408};
409
410&usb_1_hsphy {
411	vdda-pll-supply = <&vreg_l1c>;
412	vdda18-supply = <&vreg_l7c>;
413	vdda33-supply = <&vreg_l2c>;
414
415	status = "okay";
416};
417
418&usb_1_qmpphy {
419	vdda-phy-supply = <&vreg_l4c>;
420	vdda-pll-supply = <&vreg_l1c>;
421
422	status = "okay";
423};
424
425&usb_2_hsphy0 {
426	vdda-pll-supply = <&vreg_l5a>;
427	vdda18-supply = <&vreg_l7g>;
428	vdda33-supply = <&vreg_l13a>;
429
430	status = "okay";
431};
432
433&usb_2_hsphy1 {
434	vdda-pll-supply = <&vreg_l5a>;
435	vdda18-supply = <&vreg_l7g>;
436	vdda33-supply = <&vreg_l13a>;
437
438	status = "okay";
439};
440
441&usb_2_hsphy2 {
442	vdda-pll-supply = <&vreg_l5a>;
443	vdda18-supply = <&vreg_l7g>;
444	vdda33-supply = <&vreg_l13a>;
445
446	status = "okay";
447};
448
449&usb_2_hsphy3 {
450	vdda-pll-supply = <&vreg_l5a>;
451	vdda18-supply = <&vreg_l7g>;
452	vdda33-supply = <&vreg_l13a>;
453
454	status = "okay";
455};
456
457&usb_2_qmpphy0 {
458	vdda-phy-supply = <&vreg_l3a>;
459	vdda-pll-supply = <&vreg_l5a>;
460
461	status = "okay";
462};
463
464&usb_2_qmpphy1 {
465	vdda-phy-supply = <&vreg_l3a>;
466	vdda-pll-supply = <&vreg_l5a>;
467
468	status = "okay";
469};
470
471&xo_board_clk {
472	clock-frequency = <38400000>;
473};
474
475/* PINCTRL */
476
477&tlmm {
478	pcie2a_default: pcie2a-default-state {
479		clkreq-n-pins {
480			pins = "gpio142";
481			function = "pcie2a_clkreq";
482			drive-strength = <2>;
483			bias-pull-up;
484		};
485
486		perst-n-pins {
487			pins = "gpio143";
488			function = "gpio";
489			drive-strength = <2>;
490			bias-pull-down;
491		};
492
493		wake-n-pins {
494			pins = "gpio145";
495			function = "gpio";
496			drive-strength = <2>;
497			bias-pull-up;
498		};
499	};
500
501	pcie3a_default: pcie3a-default-state {
502		clkreq-n-pins {
503			pins = "gpio150";
504			function = "pcie3a_clkreq";
505			drive-strength = <2>;
506			bias-pull-up;
507		};
508
509		perst-n-pins {
510			pins = "gpio151";
511			function = "gpio";
512			drive-strength = <2>;
513			bias-pull-down;
514		};
515
516		wake-n-pins {
517			pins = "gpio56";
518			function = "gpio";
519			drive-strength = <2>;
520			bias-pull-up;
521		};
522	};
523
524	pcie3b_default: pcie3b-default-state {
525		clkreq-n-pins {
526			pins = "gpio152";
527			function = "pcie3b_clkreq";
528			drive-strength = <2>;
529			bias-pull-up;
530		};
531
532		perst-n-pins {
533			pins = "gpio153";
534			function = "gpio";
535			drive-strength = <2>;
536			bias-pull-down;
537		};
538
539		wake-n-pins {
540			pins = "gpio130";
541			function = "gpio";
542			drive-strength = <2>;
543			bias-pull-up;
544		};
545	};
546
547	pcie4_default: pcie4-default-state {
548		clkreq-n-pins {
549			pins = "gpio140";
550			function = "pcie4_clkreq";
551			drive-strength = <2>;
552			bias-pull-up;
553		};
554
555		perst-n-pins {
556			pins = "gpio141";
557			function = "gpio";
558			drive-strength = <2>;
559			bias-pull-down;
560		};
561
562		wake-n-pins {
563			pins = "gpio139";
564			function = "gpio";
565			drive-strength = <2>;
566			bias-pull-up;
567		};
568	};
569};
570