1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi 4 * 5 * Copyright (c) 2022, The Linux Foundation. All rights reserved. 6 * Copyright (c) 2022, Degdag Mohamed <degdagmohamed@gmail.com> 7 * Copyright (c) 2022, Dzmitry Sankouski <dsankouski@gmail.com> 8 */ 9 10/dts-v1/; 11 12#include "msm8998.dtsi" 13#include "pm8005.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16#include <dt-bindings/input/input.h> 17#include <dt-bindings/leds/common.h> 18#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 19 20/* 21 * Delete following upstream (msm8998.dtsi) reserved 22 * memory mappings which are different in this device. 23 */ 24/delete-node/ &adsp_mem; 25/delete-node/ &mpss_mem; 26/delete-node/ &venus_mem; 27/delete-node/ &mba_mem; 28/delete-node/ &slpi_mem; 29/delete-node/ &ipa_fw_mem; 30/delete-node/ &ipa_gsi_mem; 31/delete-node/ &gpu_mem; 32/delete-node/ &wlan_msa_mem; 33 34/ { 35 model = "Xiaomi Mi 6"; 36 compatible = "xiaomi,sagit", "qcom,msm8998"; 37 chassis-type = "handset"; 38 /* Required for bootloader to select correct board */ 39 qcom,board-id = <30 0>; 40 41 reserved-memory { 42 /* 43 * Xiaomi's ADSP firmware requires 30 MiB in total, so increase the adsp_mem 44 * region by 4 MiB to account for this while relocating the other now 45 * conflicting memory nodes accordingly. 46 */ 47 adsp_mem: memory@8b200000 { 48 reg = <0x0 0x8b200000 0x0 0x1e00000>; 49 no-map; 50 }; 51 52 mpss_mem: memory@8d000000 { 53 reg = <0x0 0x8d000000 0x0 0x7000000>; 54 no-map; 55 }; 56 57 venus_mem: memory@94000000 { 58 reg = <0x0 0x94000000 0x0 0x500000>; 59 no-map; 60 }; 61 62 mba_mem: memory@94500000 { 63 reg = <0x0 0x94500000 0x0 0x200000>; 64 no-map; 65 }; 66 67 slpi_mem: memory@94700000 { 68 reg = <0x0 0x94700000 0x0 0xf00000>; 69 no-map; 70 }; 71 72 ipa_fw_mem: memory@95600000 { 73 reg = <0x0 0x95600000 0x0 0x10000>; 74 no-map; 75 }; 76 77 ipa_gsi_mem: memory@95610000 { 78 reg = <0x0 0x95610000 0x0 0x5000>; 79 no-map; 80 }; 81 82 gpu_mem: memory@95615000 { 83 reg = <0x0 0x95615000 0x0 0x100000>; 84 no-map; 85 }; 86 87 wlan_msa_mem: memory@95715000 { 88 reg = <0x0 0x95715000 0x0 0x100000>; 89 no-map; 90 }; 91 92 /* Bootloader display framebuffer region */ 93 cont_splash_mem: memory@9d400000 { 94 reg = <0x0 0x9d400000 0x0 0x2400000>; 95 no-map; 96 }; 97 98 /* For getting crash logs using Android downstream kernels */ 99 ramoops@ac000000 { 100 compatible = "ramoops"; 101 reg = <0x0 0xac000000 0x0 0x200000>; 102 console-size = <0x80000>; 103 pmsg-size = <0x40000>; 104 record-size = <0x8000>; 105 ftrace-size = <0x20000>; 106 }; 107 108 /* 109 * The following memory regions on downstream are "dynamically allocated" 110 * but given the same addresses every time. Hard code them as these addresses 111 * are where the Xiaomi signed firmware expects them to be. 112 */ 113 ipa_fws_region: memory@f7800000 { 114 compatible = "shared-dma-pool"; 115 reg = <0x0 0xf7800000 0x0 0x5000>; 116 no-map; 117 }; 118 119 zap_shader_region: memory@f7900000 { 120 compatible = "shared-dma-pool"; 121 reg = <0x0 0xf7900000 0x0 0x2000>; 122 no-map; 123 }; 124 }; 125 126 gpio-keys { 127 compatible = "gpio-keys"; 128 label = "Volume buttons"; 129 autorepeat; 130 131 pinctrl-names = "default"; 132 pinctrl-0 = <&vol_up_key_default>; 133 134 key-vol-up { 135 label = "Volume up"; 136 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 137 linux,code = <KEY_VOLUMEUP>; 138 debounce-interval = <15>; 139 wakeup-source; 140 }; 141 }; 142 143 gpio-hall-sensor { 144 compatible = "gpio-keys"; 145 label = "Hall effect sensor"; 146 147 pinctrl-names = "default"; 148 pinctrl-0 = <&hall_sensor_default_state>; 149 150 event-hall-sensor { 151 label = "Hall Effect Sensor"; 152 gpios = <&tlmm 124 GPIO_ACTIVE_LOW>; 153 linux,input-type = <EV_SW>; 154 linux,code = <SW_LID>; 155 linux,can-disable; 156 wakeup-source; 157 }; 158 }; 159 160 vph_pwr: vph-pwr-regulator { 161 compatible = "regulator-fixed"; 162 regulator-name = "vph_pwr"; 163 regulator-min-microvolt = <3700000>; 164 regulator-max-microvolt = <3700000>; 165 regulator-always-on; 166 regulator-boot-on; 167 }; 168 169 disp_vddts_vreg: disp-vddts-regulator { 170 compatible = "regulator-fixed"; 171 regulator-name = "disp-vddts-regulator"; 172 gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; 173 enable-active-high; 174 regulator-boot-on; 175 }; 176}; 177 178&blsp1_i2c5 { 179 pinctrl-names = "default", "sleep"; 180 status = "okay"; 181 182 touchscreen@20 { 183 compatible = "syna,rmi4-i2c"; 184 reg = <0x20>; 185 #address-cells = <1>; 186 #size-cells = <0>; 187 188 interrupt-parent = <&tlmm>; 189 interrupts = <125 IRQ_TYPE_EDGE_FALLING>; 190 191 pinctrl-names = "default", "sleep"; 192 pinctrl-0 = <&ts_active_state>; 193 pinctrl-1 = <&ts_int_suspend_state &ts_reset_suspend_state>; 194 195 vdd-supply = <&disp_vddts_vreg>; 196 vio-supply = <&vreg_l6a_1p8>; 197 198 syna,reset-delay-ms = <20>; 199 syna,startup-delay-ms = <20>; 200 201 rmi4-f01@1 { 202 reg = <0x01>; 203 syna,nosleep-mode = <1>; 204 }; 205 206 rmi4-f12@12 { 207 reg = <0x12>; 208 touchscreen-x-mm = <64>; 209 touchscreen-y-mm = <114>; 210 syna,sensor-type = <1>; 211 syna,rezero-wait-ms = <20>; 212 }; 213 214 rmi4-f1a@1a { 215 reg = <0x1a>; 216 syna,codes = <KEY_BACK KEY_APPSELECT>; 217 }; 218 }; 219}; 220 221&blsp1_i2c5_sleep { 222 /delete-property/ bias-pull-up; 223 bias-disable; 224}; 225 226&blsp1_uart3 { 227 status = "okay"; 228 229 bluetooth { 230 compatible = "qcom,wcn3990-bt"; 231 232 vddio-supply = <&vreg_s4a_1p8>; 233 vddxo-supply = <&vreg_l7a_1p8>; 234 vddrf-supply = <&vreg_l17a_1p3>; 235 vddch0-supply = <&vreg_l25a_3p3>; 236 max-speed = <3200000>; 237 }; 238}; 239 240&blsp1_uart3_on { 241 rx-pins { 242 /delete-property/ bias-disable; 243 /* 244 * Configure a pull-up on 46 (RX). This is needed to 245 * avoid garbage data when the TX pin of the Bluetooth 246 * module is in tri-state (module powered off or not 247 * driving the signal yet). 248 */ 249 bias-pull-up; 250 }; 251 252 cts-pins { 253 /delete-property/ bias-disable; 254 /* 255 * Configure a pull-down on 47 (CTS) to match the pull 256 * of the Bluetooth module. 257 */ 258 bias-pull-down; 259 }; 260}; 261 262&blsp2_uart1 { 263 status = "okay"; 264}; 265 266&pm8005_regulators { 267 compatible = "qcom,pm8005-regulators"; 268 269 vdd_s1-supply = <&vph_pwr>; 270 271 pm8005_s1: s1 { /* VDD_GFX supply */ 272 regulator-min-microvolt = <524000>; 273 regulator-max-microvolt = <1100000>; 274 regulator-enable-ramp-delay = <500>; 275 276 /* hack until we rig up the gpu consumer */ 277 regulator-always-on; 278 }; 279}; 280 281&pm8998_gpios { 282 vol_up_key_default: vol-up-key-default-state { 283 pins = "gpio6"; 284 function = "normal"; 285 bias-pull-up; 286 input-enable; 287 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 288 }; 289 290 audio_mclk_pin: audio-mclk-pin-active-state { 291 pins = "gpio13"; 292 function = "func2"; 293 power-source = <0>; 294 }; 295}; 296 297&qusb2phy { 298 vdd-supply = <&vreg_l1a_0p875>; 299 vdda-pll-supply = <&vreg_l12a_1p8>; 300 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 301 status = "okay"; 302}; 303 304&rpm_requests { 305 regulators-0 { 306 compatible = "qcom,rpm-pm8998-regulators"; 307 308 vdd_s1-supply = <&vph_pwr>; 309 vdd_s2-supply = <&vph_pwr>; 310 vdd_s3-supply = <&vph_pwr>; 311 vdd_s4-supply = <&vph_pwr>; 312 vdd_s5-supply = <&vph_pwr>; 313 vdd_s6-supply = <&vph_pwr>; 314 vdd_s7-supply = <&vph_pwr>; 315 vdd_s8-supply = <&vph_pwr>; 316 vdd_s9-supply = <&vph_pwr>; 317 vdd_s10-supply = <&vph_pwr>; 318 vdd_s11-supply = <&vph_pwr>; 319 vdd_s12-supply = <&vph_pwr>; 320 vdd_s13-supply = <&vph_pwr>; 321 vdd_l1_l27-supply = <&vreg_s7a_1p025>; 322 vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>; 323 vdd_l3_l11-supply = <&vreg_s7a_1p025>; 324 vdd_l4_l5-supply = <&vreg_s7a_1p025>; 325 vdd_l6-supply = <&vreg_s5a_2p04>; 326 vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>; 327 vdd_l9-supply = <&vreg_bob>; 328 vdd_l10_l23_l25-supply = <&vreg_bob>; 329 vdd_l13_l19_l21-supply = <&vreg_bob>; 330 vdd_l16_l28-supply = <&vreg_bob>; 331 vdd_l18_l22-supply = <&vreg_bob>; 332 vdd_l20_l24-supply = <&vreg_bob>; 333 vdd_l26-supply = <&vreg_s3a_1p35>; 334 vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>; 335 336 vreg_s3a_1p35: s3 { 337 regulator-min-microvolt = <1352000>; 338 regulator-max-microvolt = <1352000>; 339 }; 340 341 vreg_s4a_1p8: s4 { 342 regulator-min-microvolt = <1800000>; 343 regulator-max-microvolt = <1800000>; 344 regulator-allow-set-load; 345 }; 346 347 vreg_s5a_2p04: s5 { 348 regulator-min-microvolt = <1904000>; 349 regulator-max-microvolt = <2040000>; 350 }; 351 352 vreg_s7a_1p025: s7 { 353 regulator-min-microvolt = <900000>; 354 regulator-max-microvolt = <1028000>; 355 }; 356 357 vreg_l1a_0p875: l1 { 358 regulator-min-microvolt = <880000>; 359 regulator-max-microvolt = <880000>; 360 }; 361 362 vreg_l2a_1p2: l2 { 363 regulator-min-microvolt = <1200000>; 364 regulator-max-microvolt = <1200000>; 365 }; 366 367 vreg_l3a_1p0: l3 { 368 regulator-min-microvolt = <1000000>; 369 regulator-max-microvolt = <1000000>; 370 }; 371 372 vreg_l5a_0p8: l5 { 373 regulator-min-microvolt = <800000>; 374 regulator-max-microvolt = <800000>; 375 }; 376 377 vreg_l6a_1p8: l6 { 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 }; 381 382 vreg_l7a_1p8: l7 { 383 regulator-min-microvolt = <1800000>; 384 regulator-max-microvolt = <1800000>; 385 }; 386 387 vreg_l8a_1p2: l8 { 388 regulator-min-microvolt = <1200000>; 389 regulator-max-microvolt = <1200000>; 390 }; 391 392 vreg_l9a_1p8: l9 { 393 regulator-min-microvolt = <1808000>; 394 regulator-max-microvolt = <2960000>; 395 }; 396 397 vreg_l10a_1p8: l10 { 398 regulator-min-microvolt = <1808000>; 399 regulator-max-microvolt = <2960000>; 400 }; 401 402 vreg_l11a_1p0: l11 { 403 regulator-min-microvolt = <1000000>; 404 regulator-max-microvolt = <1000000>; 405 }; 406 407 vreg_l12a_1p8: l12 { 408 regulator-min-microvolt = <1800000>; 409 regulator-max-microvolt = <1800000>; 410 }; 411 412 vreg_l13a_2p95: l13 { 413 regulator-min-microvolt = <1808000>; 414 regulator-max-microvolt = <2960000>; 415 }; 416 417 vreg_l14a_1p8: l14 { 418 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <1800000>; 420 }; 421 422 vreg_l15a_1p8: l15 { 423 regulator-min-microvolt = <1800000>; 424 regulator-max-microvolt = <1800000>; 425 }; 426 427 vreg_l16a_2p7: l16 { 428 regulator-min-microvolt = <2704000>; 429 regulator-max-microvolt = <2704000>; 430 }; 431 432 vreg_l17a_1p3: l17 { 433 regulator-min-microvolt = <1304000>; 434 regulator-max-microvolt = <1304000>; 435 }; 436 437 vreg_l18a_2p7: l18 { 438 regulator-min-microvolt = <2704000>; 439 regulator-max-microvolt = <2704000>; 440 }; 441 442 vreg_l19a_3p0: l19 { 443 regulator-min-microvolt = <3008000>; 444 regulator-max-microvolt = <3008000>; 445 }; 446 447 vreg_l20a_2p95: l20 { 448 regulator-min-microvolt = <2960000>; 449 regulator-max-microvolt = <2960000>; 450 regulator-allow-set-load; 451 }; 452 453 vreg_l21a_2p95: l21 { 454 regulator-min-microvolt = <2960000>; 455 regulator-max-microvolt = <2960000>; 456 regulator-system-load = <800000>; 457 regulator-allow-set-load; 458 }; 459 460 vreg_l22a_2p85: l22 { 461 regulator-min-microvolt = <2864000>; 462 regulator-max-microvolt = <2864000>; 463 }; 464 465 vreg_l23a_3p3: l23 { 466 regulator-min-microvolt = <3312000>; 467 regulator-max-microvolt = <3312000>; 468 }; 469 470 vreg_l24a_3p075: l24 { 471 regulator-min-microvolt = <3088000>; 472 regulator-max-microvolt = <3088000>; 473 }; 474 475 vreg_l25a_3p3: l25 { 476 regulator-min-microvolt = <3104000>; 477 regulator-max-microvolt = <3312000>; 478 }; 479 480 vreg_l26a_1p2: l26 { 481 regulator-min-microvolt = <1200000>; 482 regulator-max-microvolt = <1200000>; 483 regulator-allow-set-load; 484 }; 485 486 vreg_l28_3p0: l28 { 487 regulator-min-microvolt = <3008000>; 488 regulator-max-microvolt = <3008000>; 489 }; 490 491 vreg_lvs1a_1p8: lvs1 { }; 492 493 vreg_lvs2a_1p8: lvs2 { }; 494 }; 495 496 regulators-1 { 497 compatible = "qcom,rpm-pmi8998-regulators"; 498 499 vdd_bob-supply = <&vph_pwr>; 500 501 vreg_bob: bob { 502 regulator-min-microvolt = <3312000>; 503 regulator-max-microvolt = <3600000>; 504 }; 505 }; 506}; 507 508&tlmm { 509 gpio-reserved-ranges = <0 4>, <81 4>; 510 511 cci1_default_state: cci1-default-state { 512 pins = "gpio19", "gpio20"; 513 function = "cci_i2c"; 514 bias-disable; 515 drive-strength = <2>; 516 }; 517 518 cdc_reset_n_state: cdc-reset-n-state { 519 pins = "gpio64"; 520 function = "gpio"; 521 bias-pull-down; 522 drive-strength = <16>; 523 output-high; 524 }; 525 526 hall_sensor_default_state: hall-sensor-default-state { 527 pins = "gpio124"; 528 function = "gpio"; 529 drive-strength = <2>; 530 bias-disable; 531 }; 532 533 mdss_dsi_active_state: mdss-dsi-active-state { 534 pins = "gpio94"; 535 function = "gpio"; 536 drive-strength = <8>; 537 bias-disable; 538 }; 539 540 mdss_dsi_suspend_state: mdss-dsi-suspend-state { 541 pins = "gpio94"; 542 function = "gpio"; 543 drive-strength = <2>; 544 bias-pull-down; 545 }; 546 547 mdss_te_active_state: mdss-te-active-state { 548 pins = "gpio10"; 549 function = "mdp_vsync_a"; 550 drive-strength = <2>; 551 bias-pull-down; 552 }; 553 554 mdss_te_suspend_state: mdss-te-suspend-state { 555 pins = "gpio10"; 556 function = "mdp_vsync_a"; 557 drive-strength = <2>; 558 bias-pull-down; 559 }; 560 561 msm_mclk0_active_state: msm-mclk0-active-state { 562 pins = "gpio13"; 563 function = "cam_mclk"; 564 drive-strength = <2>; 565 bias-disable; 566 }; 567 568 msm_mclk0_suspend_state: msm-mclk0-suspend-state { 569 pins = "gpio13"; 570 function = "cam_mclk"; 571 drive-strength = <2>; 572 bias-pull-down; 573 }; 574 575 msm_mclk1_active_state: msm-mclk1-active-state { 576 pins = "gpio14"; 577 function = "cam_mclk"; 578 drive-strength = <2>; 579 bias-disable; 580 }; 581 582 msm_mclk1_suspend_state: msm-mclk1-suspend-state { 583 pins = "gpio14"; 584 function = "cam_mclk"; 585 drive-strength = <2>; 586 bias-pull-down; 587 }; 588 589 nfc_int_active_state: nfc-int-active-state { 590 pins = "gpio92"; 591 function = "gpio"; 592 drive-strength = <6>; 593 bias-pull-up; 594 }; 595 596 nfc_int_suspend_state: nfc-int-suspend-state { 597 pins = "gpio92"; 598 function = "gpio"; 599 drive-strength = <6>; 600 bias-pull-up; 601 }; 602 603 nfc_enable_active_state: nfc-enable-active-state { 604 pins = "gpio12", "gpio116"; 605 function = "gpio"; 606 drive-strength = <6>; 607 bias-pull-up; 608 }; 609 610 nfc_enable_suspend_state: nfc-enable-suspend-state { 611 pins = "gpio12", "gpio116"; 612 function = "gpio"; 613 drive-strength = <6>; 614 bias-disable; 615 }; 616 617 ts_active_state: ts-active-state { 618 pins = "gpio89", "gpio125"; 619 function = "gpio"; 620 drive-strength = <16>; 621 bias-pull-up; 622 }; 623 624 ts_int_suspend_state: ts-int-suspend-state { 625 pins = "gpio125"; 626 function = "gpio"; 627 drive-strength = <2>; 628 bias-disable; 629 }; 630 631 ts_reset_suspend_state: ts-reset-suspend-state { 632 pins = "gpio89"; 633 function = "gpio"; 634 drive-strength = <2>; 635 bias-disable; 636 }; 637 638 wcd_int_n_state: wcd-int-n-state { 639 pins = "gpio54"; 640 function = "gpio"; 641 bias-pull-down; 642 drive-strength = <2>; 643 }; 644 645 wsa_leftspk_pwr_n_state: wsa-leftspk-pwr-n-state { 646 pins = "gpio65"; 647 function = "gpio"; 648 bias-disable; 649 drive-strength = <2>; 650 output-low; 651 }; 652 653 wsa_rightspk_pwr_n_state: wsa-rightspk-pwr-n-state { 654 pins = "gpio66"; 655 function = "gpio"; 656 bias-disable; 657 drive-strength = <2>; 658 output-low; 659 }; 660}; 661 662&pm8998_resin { 663 linux,code = <KEY_VOLUMEDOWN>; 664 status = "okay"; 665}; 666 667&ufshc { 668 vcc-supply = <&vreg_l20a_2p95>; 669 vccq-supply = <&vreg_l26a_1p2>; 670 vccq2-supply = <&vreg_s4a_1p8>; 671 vcc-max-microamp = <750000>; 672 vccq-max-microamp = <560000>; 673 vccq2-max-microamp = <750000>; 674 status = "okay"; 675}; 676 677&ufsphy { 678 vdda-phy-supply = <&vreg_l1a_0p875>; 679 vdda-pll-supply = <&vreg_l2a_1p2>; 680 vddp-ref-clk-supply = <&vreg_l26a_1p2>; 681 status = "okay"; 682}; 683 684&usb3 { 685 /* Disable USB3 clock requirement as the device only supports USB2 */ 686 qcom,select-utmi-as-pipe-clk; 687 status = "okay"; 688}; 689 690&usb3_dwc3 { 691 /* Drop the unused USB 3 PHY */ 692 phys = <&qusb2phy>; 693 phy-names = "usb2-phy"; 694 695 /* Fastest mode for USB 2 */ 696 maximum-speed = "high-speed"; 697 698 /* Force to peripheral until we can switch modes */ 699 dr_mode = "peripheral"; 700}; 701 702&wifi { 703 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 704 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 705 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 706 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 707 status = "okay"; 708}; 709