1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi
4 *
5 * Copyright (c) 2021, Jami Kettunen <jamipkettunen@gmail.com>
6 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13#include "msm8998.dtsi"
14#include "pm8998.dtsi"
15#include "pmi8998.dtsi"
16#include "pm8005.dtsi"
17
18/ {
19	/* Required for bootloader to select correct board */
20	qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */
21
22	chosen {
23		#address-cells = <2>;
24		#size-cells = <2>;
25		ranges;
26
27		/* Use display framebuffer setup by the UEFI XBL bootloader for simplefb */
28		framebuffer0: framebuffer@9d400000 {
29			compatible = "simple-framebuffer";
30			reg = <0x0 0x9d400000 0x0 0x2400000>;
31			width = <1080>;
32			height = <1920>;
33			stride = <(1080 * 4)>;
34			format = "a8r8g8b8";
35		};
36	};
37
38	reserved-memory {
39		/* Bootloader display framebuffer region */
40		cont_splash_mem: memory@9d400000 {
41			reg = <0x0 0x9d400000 0x0 0x2400000>;
42			no-map;
43		};
44
45		/* For getting crash logs using Android downstream kernels */
46		ramoops@ac000000 {
47			compatible = "ramoops";
48			reg = <0x0 0xac000000 0x0 0x200000>;
49			console-size = <0x80000>;
50			pmsg-size = <0x40000>;
51			record-size = <0x8000>;
52			ftrace-size = <0x20000>;
53		};
54
55		/*
56		 * The following memory regions on downstream are "dynamically allocated"
57		 * but given the same addresses every time. Hard code them as these addresses
58		 * are where the OnePlus signed firmware expects them to be.
59		 */
60		ipa_fws_region: ipa@f6800000 {
61			compatible = "shared-dma-pool";
62			reg = <0x0 0xf6800000 0x0 0x5000>;
63			no-map;
64		};
65		zap_shader_region: gpu@f6900000 {
66			compatible = "shared-dma-pool";
67			reg = <0x0 0xf6900000 0x0 0x2000>;
68			no-map;
69		};
70	};
71
72	gpio-keys {
73		compatible = "gpio-keys";
74		label = "Volume buttons";
75		autorepeat;
76
77		pinctrl-names = "default";
78		pinctrl-0 = <&vol_keys_default>;
79
80		vol-down {
81			label = "Volume down";
82			gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
83			linux,code = <KEY_VOLUMEDOWN>;
84			debounce-interval = <15>;
85			wakeup-source;
86		};
87
88		vol-up {
89			label = "Volume up";
90			gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
91			linux,code = <KEY_VOLUMEUP>;
92			debounce-interval = <15>;
93			wakeup-source;
94		};
95	};
96
97	gpio-hall-sensor {
98		compatible = "gpio-keys";
99		label = "Hall effect sensor";
100
101		pinctrl-names = "default";
102		pinctrl-0 = <&hall_sensor_default>;
103
104		hall-sensor {
105			label = "Hall Effect Sensor";
106			gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
107			linux,input-type = <EV_SW>;
108			linux,code = <SW_LID>;
109			linux,can-disable;
110			wakeup-source;
111		};
112	};
113
114	vph_pwr: vph-pwr-regulator {
115		compatible = "regulator-fixed";
116		regulator-name = "vph_pwr";
117		regulator-always-on;
118		regulator-boot-on;
119	};
120};
121
122/*
123 * OnePlus' ADSP firmware requires 30 MiB in total, so increase the adsp_mem
124 * region by 4 MiB to account for this while relocating the other now
125 * conflicting memory nodes accordingly.
126 */
127&adsp_mem {
128	reg = <0x0 0x8b200000 0x0 0x1e00000>;
129};
130&mpss_mem {
131	reg = <0x0 0x8d000000 0x0 0x7000000>;
132};
133&venus_mem {
134	reg = <0x0 0x94000000 0x0 0x500000>;
135};
136&mba_mem {
137	reg = <0x0 0x94500000 0x0 0x200000>;
138};
139&slpi_mem {
140	reg = <0x0 0x94700000 0x0 0xf00000>;
141};
142&ipa_fw_mem {
143	reg = <0x0 0x95600000 0x0 0x10000>;
144};
145&ipa_gsi_mem {
146	reg = <0x0 0x95610000 0x0 0x5000>;
147};
148&gpu_mem {
149	reg = <0x0 0x95615000 0x0 0x100000>;
150};
151&wlan_msa_mem {
152	reg = <0x0 0x95715000 0x0 0x100000>;
153};
154
155&blsp1_i2c5 {
156	status = "okay";
157
158	touchscreen@20 {
159		compatible = "syna,rmi4-i2c";
160		reg = <0x20>;
161		#address-cells = <1>;
162		#size-cells = <0>;
163
164		interrupt-parent = <&tlmm>;
165		interrupts = <125 IRQ_TYPE_EDGE_FALLING>;
166
167		pinctrl-names = "default";
168		pinctrl-0 = <&ts_int_active &ts_reset_active>;
169
170		vdd-supply = <&vreg_l28_3p0>;
171		vio-supply = <&vreg_l6a_1p8>;
172
173		syna,reset-delay-ms = <20>;
174		syna,startup-delay-ms = <20>;
175
176		rmi4-f01@1 {
177			reg = <0x01>;
178			syna,nosleep-mode = <1>;
179		};
180
181		rmi4_f12: rmi4-f12@12 {
182			reg = <0x12>;
183			syna,rezero-wait-ms = <20>;
184			syna,sensor-type = <1>;
185			touchscreen-x-mm = <68>;
186			touchscreen-y-mm = <122>;
187		};
188	};
189};
190
191&blsp1_uart3 {
192	status = "okay";
193
194	bluetooth {
195		compatible = "qcom,wcn3990-bt";
196
197		vddio-supply = <&vreg_s4a_1p8>;
198		vddxo-supply = <&vreg_l7a_1p8>;
199		vddrf-supply = <&vreg_l17a_1p3>;
200		vddch0-supply = <&vreg_l25a_3p3>;
201		max-speed = <3200000>;
202	};
203};
204
205&blsp1_uart3_on {
206	rx {
207		/delete-property/ bias-disable;
208		/*
209		 * Configure a pull-up on 46 (RX). This is needed to
210		 * avoid garbage data when the TX pin of the Bluetooth
211		 * module is in tri-state (module powered off or not
212		 * driving the signal yet).
213		 */
214		bias-pull-up;
215	};
216
217	cts {
218		/delete-property/ bias-disable;
219		/*
220		 * Configure a pull-down on 47 (CTS) to match the pull
221		 * of the Bluetooth module.
222		 */
223		bias-pull-down;
224	};
225};
226
227&blsp2_uart1 {
228	status = "okay";
229};
230
231&pm8005_lsid1 {
232	pm8005-regulators {
233		compatible = "qcom,pm8005-regulators";
234
235		vdd_s1-supply = <&vph_pwr>;
236
237		pm8005_s1: s1 { /* VDD_GFX supply */
238			regulator-min-microvolt = <524000>;
239			regulator-max-microvolt = <1100000>;
240			regulator-enable-ramp-delay = <500>;
241
242			/* hack until we rig up the gpu consumer */
243			regulator-always-on;
244		};
245	};
246};
247
248&pm8998_gpio {
249	vol_keys_default: vol-keys-default {
250		pinconf {
251			pins = "gpio5", "gpio6";
252			function = "normal";
253			bias-pull-up;
254			input-enable;
255			qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
256		};
257	};
258};
259
260&qusb2phy {
261	status = "okay";
262
263	vdd-supply = <&vreg_l1a_0p875>;
264	vdda-pll-supply = <&vreg_l12a_1p8>;
265	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
266};
267
268&rpm_requests {
269	pm8998-regulators {
270		compatible = "qcom,rpm-pm8998-regulators";
271
272		vdd_s1-supply = <&vph_pwr>;
273		vdd_s2-supply = <&vph_pwr>;
274		vdd_s3-supply = <&vph_pwr>;
275		vdd_s4-supply = <&vph_pwr>;
276		vdd_s5-supply = <&vph_pwr>;
277		vdd_s6-supply = <&vph_pwr>;
278		vdd_s7-supply = <&vph_pwr>;
279		vdd_s8-supply = <&vph_pwr>;
280		vdd_s9-supply = <&vph_pwr>;
281		vdd_s10-supply = <&vph_pwr>;
282		vdd_s11-supply = <&vph_pwr>;
283		vdd_s12-supply = <&vph_pwr>;
284		vdd_s13-supply = <&vph_pwr>;
285		vdd_l1_l27-supply = <&vreg_s7a_1p025>;
286		vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
287		vdd_l3_l11-supply = <&vreg_s7a_1p025>;
288		vdd_l4_l5-supply = <&vreg_s7a_1p025>;
289		vdd_l6-supply = <&vreg_s5a_2p04>;
290		vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
291		vdd_l9-supply = <&vreg_bob>;
292		vdd_l10_l23_l25-supply = <&vreg_bob>;
293		vdd_l13_l19_l21-supply = <&vreg_bob>;
294		vdd_l16_l28-supply = <&vreg_bob>;
295		vdd_l18_l22-supply = <&vreg_bob>;
296		vdd_l20_l24-supply = <&vreg_bob>;
297		vdd_l26-supply = <&vreg_s3a_1p35>;
298		vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
299
300		vreg_s3a_1p35: s3 {
301			regulator-min-microvolt = <1352000>;
302			regulator-max-microvolt = <1352000>;
303		};
304		vreg_s4a_1p8: s4 {
305			regulator-min-microvolt = <1800000>;
306			regulator-max-microvolt = <1800000>;
307			regulator-allow-set-load;
308		};
309		vreg_s5a_2p04: s5 {
310			regulator-min-microvolt = <1904000>;
311			regulator-max-microvolt = <2040000>;
312		};
313		vreg_s7a_1p025: s7 {
314			regulator-min-microvolt = <900000>;
315			regulator-max-microvolt = <1028000>;
316		};
317		vreg_l1a_0p875: l1 {
318			regulator-min-microvolt = <880000>;
319			regulator-max-microvolt = <880000>;
320		};
321		vreg_l2a_1p2: l2 {
322			regulator-min-microvolt = <1200000>;
323			regulator-max-microvolt = <1200000>;
324		};
325		vreg_l3a_1p0: l3 {
326			regulator-min-microvolt = <1000000>;
327			regulator-max-microvolt = <1000000>;
328		};
329		vreg_l5a_0p8: l5 {
330			regulator-min-microvolt = <800000>;
331			regulator-max-microvolt = <800000>;
332		};
333		vreg_l6a_1p8: l6 {
334			regulator-min-microvolt = <1808000>;
335			regulator-max-microvolt = <1808000>;
336		};
337		vreg_l7a_1p8: l7 {
338			regulator-min-microvolt = <1800000>;
339			regulator-max-microvolt = <1800000>;
340		};
341		vreg_l8a_1p2: l8 {
342			regulator-min-microvolt = <1200000>;
343			regulator-max-microvolt = <1200000>;
344		};
345		vreg_l9a_1p8: l9 {
346			regulator-min-microvolt = <1808000>;
347			regulator-max-microvolt = <2960000>;
348		};
349		vreg_l10a_1p8: l10 {
350			regulator-min-microvolt = <1808000>;
351			regulator-max-microvolt = <2960000>;
352		};
353		vreg_l11a_1p0: l11 {
354			regulator-min-microvolt = <1000000>;
355			regulator-max-microvolt = <1000000>;
356		};
357		vreg_l12a_1p8: l12 {
358			regulator-min-microvolt = <1800000>;
359			regulator-max-microvolt = <1800000>;
360		};
361		vreg_l13a_2p95: l13 {
362			regulator-min-microvolt = <1808000>;
363			regulator-max-microvolt = <2960000>;
364		};
365		vreg_l14a_1p88: l14 {
366			regulator-min-microvolt = <1880000>;
367			regulator-max-microvolt = <1880000>;
368		};
369		vreg_l15a_1p8: l15 {
370			regulator-min-microvolt = <1800000>;
371			regulator-max-microvolt = <1800000>;
372		};
373		vreg_l16a_2p7: l16 {
374			regulator-min-microvolt = <2704000>;
375			regulator-max-microvolt = <2704000>;
376		};
377		vreg_l17a_1p3: l17 {
378			regulator-min-microvolt = <1304000>;
379			regulator-max-microvolt = <1304000>;
380		};
381		vreg_l18a_2p7: l18 {
382			regulator-min-microvolt = <2704000>;
383			regulator-max-microvolt = <2704000>;
384		};
385		vreg_l19a_3p0: l19 {
386			regulator-min-microvolt = <3008000>;
387			regulator-max-microvolt = <3008000>;
388		};
389		vreg_l20a_2p95: l20 {
390			regulator-min-microvolt = <2960000>;
391			regulator-max-microvolt = <2960000>;
392			regulator-allow-set-load;
393		};
394		vreg_l21a_2p95: l21 {
395			regulator-min-microvolt = <2960000>;
396			regulator-max-microvolt = <2960000>;
397			regulator-allow-set-load;
398			regulator-system-load = <800000>;
399		};
400		vreg_l22a_2p85: l22 {
401			regulator-min-microvolt = <2864000>;
402			regulator-max-microvolt = <2864000>;
403		};
404		vreg_l23a_3p3: l23 {
405			regulator-min-microvolt = <3312000>;
406			regulator-max-microvolt = <3312000>;
407		};
408		vreg_l24a_3p075: l24 {
409			regulator-min-microvolt = <3088000>;
410			regulator-max-microvolt = <3088000>;
411		};
412		vreg_l25a_3p3: l25 {
413			regulator-min-microvolt = <3104000>;
414			regulator-max-microvolt = <3312000>;
415		};
416		vreg_l26a_1p2: l26 {
417			regulator-min-microvolt = <1200000>;
418			regulator-max-microvolt = <1200000>;
419			regulator-allow-set-load;
420		};
421		vreg_l28_3p0: l28 {
422			regulator-min-microvolt = <3008000>;
423			regulator-max-microvolt = <3008000>;
424		};
425		vreg_lvs1a_1p8: lvs1 { };
426		vreg_lvs2a_1p8: lvs2 { };
427	};
428
429	pmi8998-regulators {
430		compatible = "qcom,rpm-pmi8998-regulators";
431
432		vdd_bob-supply = <&vph_pwr>;
433
434		vreg_bob: bob {
435			regulator-min-microvolt = <3312000>;
436			regulator-max-microvolt = <3600000>;
437		};
438	};
439};
440
441&tlmm {
442	gpio-reserved-ranges = <0 4>, <81 4>;
443
444	hall_sensor_default: hall-sensor-default {
445		pins = "gpio124";
446		function = "gpio";
447		drive-strength = <2>;
448		bias-disable;
449		input-enable;
450	};
451
452	ts_int_active: ts-int-active {
453		pins = "gpio125";
454		function = "gpio";
455		drive-strength = <8>;
456		bias-pull-up;
457	};
458
459	ts_reset_active: ts-reset-active {
460		pins = "gpio89";
461		function = "gpio";
462		drive-strength = <8>;
463		bias-pull-up;
464	};
465};
466
467&ufshc {
468	status = "okay";
469
470	vcc-supply = <&vreg_l20a_2p95>;
471	vccq-supply = <&vreg_l26a_1p2>;
472	vccq2-supply = <&vreg_s4a_1p8>;
473	vcc-max-microamp = <750000>;
474	vccq-max-microamp = <560000>;
475	vccq2-max-microamp = <750000>;
476};
477
478&ufsphy {
479	status = "okay";
480
481	vdda-phy-supply = <&vreg_l1a_0p875>;
482	vdda-pll-supply = <&vreg_l2a_1p2>;
483	vddp-ref-clk-supply = <&vreg_l26a_1p2>;
484};
485
486&usb3 {
487	status = "okay";
488
489	/* Disable USB3 clock requirement as the device only supports USB2 */
490	qcom,select-utmi-as-pipe-clk;
491};
492
493&usb3_dwc3 {
494	/* Drop the unused USB 3 PHY */
495	phys = <&qusb2phy>;
496	phy-names = "usb2-phy";
497
498	/* Fastest mode for USB 2 */
499	maximum-speed = "high-speed";
500
501	/* Force to peripheral until we can switch modes */
502	dr_mode = "peripheral";
503};
504
505&wifi {
506	/* Leave disabled until MSS is functional */
507	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
508	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
509	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
510	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
511};
512