1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2020, Yassine Oudjana <y.oudjana@protonmail.com>
4 */
5
6#include "pm8994.dtsi"
7#include "pmi8994.dtsi"
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/leds/common.h>
11#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12
13/ {
14	divclk1_cdc: divclk1 {
15		compatible = "gpio-gate-clock";
16		clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
17		#clock-cells = <0>;
18		enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
19
20		pinctrl-names = "default";
21		pinctrl-0 = <&divclk1_default>;
22	};
23
24	divclk4: divclk4 {
25		compatible = "fixed-clock";
26		#clock-cells = <0>;
27		clock-frequency = <32768>;
28		clock-output-names = "divclk4";
29
30		pinctrl-names = "default";
31		pinctrl-0 = <&divclk4_pin_a>;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36
37		key-vol-up {
38			label = "Volume Up";
39			gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
40			linux,code = <KEY_VOLUMEUP>;
41			wakeup-source;
42			debounce-interval = <15>;
43		};
44
45		key-dome {
46			label = "Home";
47			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
48			linux,code = <KEY_HOME>;
49			wakeup-source;
50			debounce-interval = <15>;
51		};
52	};
53
54	irled {
55		compatible = "pwm-ir-tx";
56		pwms = <&pm8994_lpg 1 1000000>;
57
58		pinctrl-names = "default";
59		pinctrl-0 = <&irled_default>;
60	};
61
62	reserved-memory {
63		memory@88800000 {
64			reg = <0x0 0x88800000 0x0 0x1400000>;
65			no-map;
66		};
67
68		/* This platform has all PIL regions offset by 0x1400000 */
69		/delete-node/ mpss@88800000;
70		mpss_mem: mpss@89c00000 {
71			reg = <0x0 0x89c00000 0x0 0x6200000>;
72			no-map;
73		};
74
75		/delete-node/ adsp@8ea00000;
76		adsp_mem: adsp@8fe00000 {
77			reg = <0x0 0x8fe00000 0x0 0x1b00000>;
78			no-map;
79		};
80
81		/delete-node/ slpi@90500000;
82		slpi_mem: slpi@91900000 {
83			reg = <0x0 0x91900000 0x0 0xa00000>;
84			no-map;
85		};
86
87		/delete-node/ gpu@90f00000;
88		gpu_mem: gpu@92300000 {
89			compatible = "shared-dma-pool";
90			reg = <0x0 0x92300000 0x0 0x2000>;
91			no-map;
92		};
93
94		/delete-node/ venus@91000000;
95		venus_mem: venus@92400000 {
96			reg = <0x0 0x92400000 0x0 0x500000>;
97			no-map;
98		};
99
100		ramoops@92900000 {
101			compatible = "ramoops";
102			reg = <0x0 0x92900000 0x0 0x100000>;
103			no-map;
104
105			record-size = <0x8000>;
106			console-size = <0x80000>;
107			ftrace-size = <0x20000>;
108			pmsg-size = <0x40000>;
109		};
110
111		/delete-node/ rmtfs;
112		rmtfs@f6c00000 {
113			compatible = "qcom,rmtfs-mem";
114			reg = <0 0xf6c00000 0 0x200000>;
115			no-map;
116
117			qcom,client-id = <1>;
118			qcom,vmid = <15>;
119		};
120
121		/delete-node/ mba@91500000;
122		mba_mem: mba@f6f00000 {
123			reg = <0x0 0xf6f00000 0x0 0x100000>;
124			no-map;
125		};
126	};
127
128	vph_pwr: vph-pwr-regulator {
129		compatible = "regulator-fixed";
130		regulator-name = "vph_pwr";
131		regulator-min-microvolt = <3800000>;
132		regulator-max-microvolt = <3800000>;
133		regulator-always-on;
134		regulator-boot-on;
135	};
136
137	vdd_3v2_tp: vdd-3v2-tp {
138		compatible = "regulator-fixed";
139		regulator-name = "vdd_3v2_tp";
140		regulator-min-microvolt = <3200000>;
141		regulator-max-microvolt = <3200000>;
142		startup-delay-us = <4000>;
143		vin-supply = <&vph_pwr>;
144
145		gpio = <&tlmm 73 0>;
146		enable-active-high;
147	};
148
149	vdd_3v3: rome-vreg {
150		compatible = "regulator-fixed";
151		regulator-name = "vdd_3v3";
152		regulator-min-microvolt = <3300000>;
153		regulator-max-microvolt = <3300000>;
154		startup-delay-us = <4000>;
155		vin-supply = <&vph_pwr_bbyp>;
156
157		gpio = <&pm8994_gpios 9 0>;
158		enable-active-high;
159		pinctrl-names = "default";
160		pinctrl-0 = <&rome_enable_default>;
161
162		/* Required by QCA6174a - vddpe-3v3 */
163		regulator-always-on;
164	};
165
166	/* WL_EN pin defined as a fixed regulator */
167	wlan_en: wlan-en-1-8v {
168		compatible = "regulator-fixed";
169		regulator-name = "wlan-en-regulator";
170		regulator-min-microvolt = <1800000>;
171		regulator-max-microvolt = <1800000>;
172
173		gpio = <&pm8994_gpios 8 0>;
174		/* WLAN card specific delay */
175		startup-delay-us = <70000>;
176		enable-active-high;
177		pinctrl-names = "default";
178		pinctrl-0 = <&wlan_en_default>;
179	};
180};
181
182&adsp_pil {
183	status = "okay";
184};
185
186&blsp2_i2c2 {
187	status = "okay";
188	clock-frequency = <400000>;
189
190	nfc: nfc@28 {
191		compatible = "nxp,nxp-nci-i2c";
192
193		reg = <0x28>;
194
195		interrupt-parent = <&tlmm>;
196		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
197
198		enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
199		firmware-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
200
201		pinctrl-names = "default";
202		pinctrl-0 = <&nfc_default>;
203	};
204};
205
206&blsp2_i2c3 {
207	status = "okay";
208
209	typec: typec@47 {
210		compatible = "ti,tusb320l";
211		reg = <0x47>;
212		interrupt-parent = <&tlmm>;
213		interrupts = <63 IRQ_TYPE_EDGE_RISING>;
214	};
215};
216
217&blsp2_i2c6 {
218	status = "okay";
219	/* MSM_TS */
220};
221
222&blsp1_uart2 {
223	status = "okay";
224	label = "QCA_UART";
225
226	bluetooth: bluetooth {
227		compatible = "qcom,qca6174-bt";
228
229		enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
230		clocks = <&divclk4>;
231	};
232};
233
234&gpu {
235	status = "okay";
236};
237
238&mdss {
239	status = "okay";
240};
241
242&mdss_dsi0 {
243	status = "okay";
244
245	vdd-supply = <&vreg_l2a_1p25>;
246	vddio-supply = <&vreg_l14a_1p8>;
247
248	pinctrl-names = "default", "sleep";
249	pinctrl-0 = <&mdss_dsi_default &mdss_te_default>;
250	pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>;
251};
252
253&mdss_dsi0_out {
254	status = "okay";
255
256	data-lanes = <0 1 2 3>;
257};
258
259&mdss_dsi0_phy {
260	status = "okay";
261
262	vcca-supply = <&vreg_l28a_0p925>;
263};
264
265&mmcc {
266	vdd-gfx-supply = <&vdd_gfx>;
267};
268
269&mss_pil {
270	status = "okay";
271
272	pll-supply = <&vreg_l12a_1p8>;
273};
274
275&pcie0 {
276	status = "okay";
277
278	/* Supplied by vdd_3v3, but choose wlan_en to drive enable pin high */
279	vddpe-3v3-supply = <&wlan_en>;
280	vdda-supply = <&vreg_l28a_0p925>;
281
282	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
283	wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
284};
285
286&pcie_phy {
287	status = "okay";
288
289	vdda-phy-supply = <&vreg_l28a_0p925>;
290	vdda-pll-supply = <&vreg_l12a_1p8>;
291};
292
293&pm8994_resin {
294	status = "okay";
295
296	linux,code = <KEY_VOLUMEDOWN>;
297};
298
299&pm8994_lpg {
300	status = "okay";
301
302	qcom,power-source = <1>;
303};
304
305&pmi8994_lpg {
306	status = "okay";
307
308	qcom,power-source = <1>;
309
310	multi-led {
311		color = <LED_COLOR_ID_RGB>;
312		function = LED_FUNCTION_STATUS;
313
314		#address-cells = <1>;
315		#size-cells = <0>;
316
317		led@1 {
318			reg = <1>;
319			color = <LED_COLOR_ID_BLUE>;
320		};
321
322		led@2 {
323			reg = <2>;
324			color = <LED_COLOR_ID_GREEN>;
325		};
326
327		led@3 {
328			reg = <3>;
329			color = <LED_COLOR_ID_RED>;
330		};
331	};
332};
333
334&slim_msm {
335	status = "okay";
336
337	slim@1 {
338		reg = <1>;
339		#address-cells = <2>;
340		#size-cells = <0>;
341
342		tasha_ifd: tas-ifd@0,0 {
343			compatible = "slim217,1a0";
344			reg = <0 0>;
345		};
346
347		wcd9335: codec@1,0 {
348			compatible = "slim217,1a0";
349			reg = <1 0>;
350
351			clock-names = "mclk", "slimbus";
352			clocks = <&divclk1_cdc>,
353				 <&rpmcc RPM_SMD_BB_CLK1>;
354			interrupt-parent = <&tlmm>;
355			interrupts = <54 IRQ_TYPE_LEVEL_HIGH>,
356				     <53 IRQ_TYPE_LEVEL_HIGH>;
357			interrupt-names = "intr1", "intr2";
358			interrupt-controller;
359			#interrupt-cells = <1>;
360
361			pinctrl-0 = <&cdc_reset_active &wcd_intr_default>;
362			pinctrl-names = "default";
363
364			reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
365			slim-ifc-dev = <&tasha_ifd>;
366
367			#sound-dai-cells = <1>;
368
369			vdd-buck-supply = <&vreg_s4a_1p8>;
370			vdd-buck-sido-supply = <&vreg_s4a_1p8>;
371			vdd-rx-supply = <&vreg_s4a_1p8>;
372			vdd-tx-supply = <&vreg_s4a_1p8>;
373			vdd-vbat-supply = <&vph_pwr>;
374			vdd-micbias-supply = <&vph_pwr_bbyp>;
375			vdd-io-supply = <&vreg_s4a_1p8>;
376		};
377	};
378};
379
380&slpi_pil {
381	status = "okay";
382
383	px-supply = <&vreg_lvs2a_1p8>;
384};
385
386&usb3 {
387	status = "okay";
388	extcon = <&typec>;
389
390	qcom,select-utmi-as-pipe-clk;
391};
392
393&usb3_dwc3 {
394	extcon = <&typec>;
395
396	/* usb3-phy is not used on this device */
397	phys = <&hsusb_phy1>;
398	phy-names = "usb2-phy";
399
400	maximum-speed = "high-speed";
401	snps,is-utmi-l1-suspend;
402	snps,usb2-gadget-lpm-disable;
403	snps,hird-threshold = /bits/ 8 <0>;
404};
405
406&hsusb_phy1 {
407	status = "okay";
408
409	vdda-pll-supply = <&vreg_l12a_1p8>;
410	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
411};
412
413&ufshc {
414	status = "okay";
415
416	vcc-supply = <&vreg_l20a_2p95>;
417	vccq-supply = <&vreg_l25a_1p2>;
418	vccq2-supply = <&vreg_s4a_1p8>;
419
420	vcc-max-microamp = <600000>;
421	vccq-max-microamp = <450000>;
422	vccq2-max-microamp = <450000>;
423};
424
425&ufsphy {
426	status = "okay";
427
428	vdda-phy-supply = <&vreg_l28a_0p925>;
429	vdda-pll-supply = <&vreg_l12a_1p8>;
430	vddp-ref-clk-supply = <&vreg_l25a_1p2>;
431};
432
433&venus {
434	status = "okay";
435};
436
437&rpm_requests {
438	regulators-0 {
439		compatible = "qcom,rpm-pm8994-regulators";
440
441		vdd_s1-supply = <&vph_pwr>;
442		vdd_s2-supply = <&vph_pwr>;
443		vdd_s3-supply = <&vph_pwr>;
444		vdd_s4-supply = <&vph_pwr>;
445		vdd_s5-supply = <&vph_pwr>;
446		vdd_s6-supply = <&vph_pwr>;
447		vdd_s7-supply = <&vph_pwr>;
448		vdd_s8-supply = <&vph_pwr>;
449		vdd_s9-supply = <&vph_pwr>;
450		vdd_s10-supply = <&vph_pwr>;
451		vdd_s11-supply = <&vph_pwr>;
452		vdd_s12-supply = <&vph_pwr>;
453		vdd_l1-supply = <&vreg_s1b_1p025>;
454		vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>;
455		vdd_l3_l11-supply = <&vreg_s3a_1p3>;
456		vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>;
457		vdd_l5_l7-supply = <&vreg_s5a_2p15>;
458		vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>;
459		vdd_l8_l16_l30-supply = <&vph_pwr>;
460		vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>;
461		vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>;
462		vdd_l14_l15-supply = <&vreg_s5a_2p15>;
463		vdd_l17_l29-supply = <&vph_pwr_bbyp>;
464		vdd_l20_l21-supply = <&vph_pwr_bbyp>;
465		vdd_l25-supply = <&vreg_s3a_1p3>;
466		vdd_lvs1_2-supply = <&vreg_s4a_1p8>;
467
468		vreg_s3a_1p3: s3 {
469			regulator-name = "vreg_s3a_1p3";
470			regulator-min-microvolt = <1300000>;
471			regulator-max-microvolt = <1300000>;
472
473			/* Required by QCA6174a - vdd-core */
474			regulator-always-on;
475		};
476		vreg_s4a_1p8: s4 {
477			regulator-name = "vreg_s4a_1p8";
478			regulator-min-microvolt = <1800000>;
479			regulator-max-microvolt = <1800000>;
480			regulator-allow-set-load;
481
482			/* Required by QCA6174a - vddio */
483			regulator-always-on;
484		};
485		vreg_s5a_2p15: s5 {
486			regulator-name = "vreg_s5a_2p15";
487			regulator-min-microvolt = <2150000>;
488			regulator-max-microvolt = <2150000>;
489		};
490		vreg_s7a_0p8: s7 {
491			regulator-name = "vreg_s7a_0p8";
492			regulator-min-microvolt = <800000>;
493			regulator-max-microvolt = <800000>;
494		};
495		vreg_l1a_1p0: l1 {
496			regulator-name = "vreg_l1a_1p0";
497			regulator-min-microvolt = <1000000>;
498			regulator-max-microvolt = <1000000>;
499		};
500		vreg_l2a_1p25: l2 {
501			regulator-name = "vreg_l2a_1p25";
502			regulator-min-microvolt = <1250000>;
503			regulator-max-microvolt = <1250000>;
504		};
505		vreg_l4a_1p225: l4 {
506			regulator-name = "vreg_l4a_1p225";
507			regulator-min-microvolt = <1225000>;
508			regulator-max-microvolt = <1225000>;
509		};
510		vreg_l6a_1p8: l6 {
511			regulator-name = "vreg_l6a_1p8";
512			regulator-min-microvolt = <1800000>;
513			regulator-max-microvolt = <1800000>;
514		};
515		vreg_l8a_1p8: l8 {
516			regulator-name = "vreg_l8a_1p8";
517			regulator-min-microvolt = <1800000>;
518			regulator-max-microvolt = <1800000>;
519		};
520		vreg_l9a_1p8: l9 {
521			regulator-name = "vreg_l9a_1p8";
522			regulator-min-microvolt = <1800000>;
523			regulator-max-microvolt = <1800000>;
524		};
525		vreg_l10a_1p8: l10 {
526			regulator-name = "vreg_l10a_1p8";
527			regulator-min-microvolt = <1800000>;
528			regulator-max-microvolt = <1800000>;
529		};
530		vreg_l12a_1p8: l12 {
531			regulator-name = "vreg_l12a_1p8";
532			regulator-min-microvolt = <1800000>;
533			regulator-max-microvolt = <1800000>;
534			regulator-allow-set-load;
535		};
536		vreg_l13a_2p95: l13 {
537			regulator-name = "vreg_l13a_2p95";
538			regulator-min-microvolt = <1800000>;
539			regulator-max-microvolt = <2950000>;
540		};
541		vreg_l14a_1p8: l14 {
542			regulator-name = "vreg_l14a_1p8";
543			regulator-min-microvolt = <1800000>;
544			regulator-max-microvolt = <1800000>;
545		};
546		vreg_l15a_1p8: l15 {
547			regulator-name = "vreg_l15a_1p8";
548			regulator-min-microvolt = <1800000>;
549			regulator-max-microvolt = <1800000>;
550		};
551		vreg_l16a_2p7: l16 {
552			regulator-name = "vreg_l16a_2p7";
553			regulator-min-microvolt = <2700000>;
554			regulator-max-microvolt = <2700000>;
555		};
556		vreg_l19a_3p3: l19 {
557			regulator-name = "vreg_l19a_3p3";
558			regulator-min-microvolt = <3000000>;
559			regulator-max-microvolt = <3000000>;
560		};
561		vreg_l20a_2p95: l20 {
562			regulator-name = "vreg_l20a_2p95";
563			regulator-min-microvolt = <2950000>;
564			regulator-max-microvolt = <2950000>;
565			regulator-allow-set-load;
566		};
567		vreg_l21a_2p95: l21 {
568			regulator-name = "vreg_l21a_2p95";
569			regulator-min-microvolt = <3300000>;
570			regulator-max-microvolt = <3300000>;
571			regulator-always-on;
572		};
573		vreg_l23a_2p8: l23 {
574			regulator-name = "vreg_l23a_2p8";
575			regulator-min-microvolt = <2800000>;
576			regulator-max-microvolt = <2800000>;
577		};
578		vreg_l24a_3p075: l24 {
579			regulator-name = "vreg_l24a_3p075";
580			regulator-min-microvolt = <3075000>;
581			regulator-max-microvolt = <3075000>;
582		};
583		vreg_l25a_1p2: l25 {
584			regulator-name = "vreg_l25a_1p2";
585			regulator-min-microvolt = <1200000>;
586			regulator-max-microvolt = <1200000>;
587			regulator-allow-set-load;
588		};
589		vreg_l27a_1p2: l27 {
590			regulator-name = "vreg_l27a_1p2";
591			regulator-min-microvolt = <1200000>;
592			regulator-max-microvolt = <1200000>;
593		};
594		vreg_l28a_0p925: l28 {
595			regulator-name = "vreg_l28a_0p925";
596			regulator-min-microvolt = <925000>;
597			regulator-max-microvolt = <925000>;
598			regulator-allow-set-load;
599		};
600		vreg_l30a_1p8: l30 {
601			regulator-name = "vreg_l30a_1p8";
602			regulator-min-microvolt = <1800000>;
603			regulator-max-microvolt = <1800000>;
604
605			/* Required by QCA6174a - vddio-xtal */
606			regulator-always-on;
607		};
608		vreg_l32a_1p8: l32 {
609			regulator-name = "vreg_l32a_1p8";
610			regulator-min-microvolt = <1800000>;
611			regulator-max-microvolt = <1800000>;
612		};
613		vreg_lvs1a_1p8: lvs1 {
614			regulator-min-microvolt = <1800000>;
615			regulator-max-microvolt = <1800000>;
616		};
617		vreg_lvs2a_1p8: lvs2 {
618			regulator-min-microvolt = <1800000>;
619			regulator-max-microvolt = <1800000>;
620		};
621	};
622
623	regulators-1 {
624		compatible = "qcom,rpm-pmi8994-regulators";
625
626		vdd_s1-supply = <&vph_pwr>;
627		vdd_s2-supply = <&vph_pwr>;
628		vdd_s3-supply = <&vph_pwr>;
629		vdd_bst_byp-supply = <&vph_pwr>;
630
631		vreg_s1b_1p025: s1 {
632			regulator-name = "vreg_s1b_1p025";
633			regulator-min-microvolt = <1025000>;
634			regulator-max-microvolt = <1025000>;
635		};
636
637		vph_pwr_bbyp: boost-bypass {
638			regulator-name = "vph_pwr_bbyp";
639			regulator-min-microvolt = <3150000>;
640			regulator-max-microvolt = <3600000>;
641		};
642	};
643};
644
645&pm8994_spmi_regulators {
646	qcom,saw-reg = <&saw3>;
647	s8 {
648		qcom,saw-slave;
649	};
650	s9 {
651		qcom,saw-slave;
652	};
653	s10 {
654		qcom,saw-slave;
655	};
656	vreg_apc_0p8: s11 {
657		qcom,saw-leader;
658		regulator-name = "vreg_apc_0p8";
659		regulator-min-microvolt = <470000>;
660		regulator-max-microvolt = <1140000>;
661		regulator-max-step-microvolt = <150000>;
662		regulator-always-on;
663	};
664};
665
666&pmi8994_spmi_regulators {
667	vdd_gfx: s2 {
668		regulator-name = "vdd_gfx";
669		regulator-min-microvolt = <400000>;
670		regulator-max-microvolt = <1015000>;
671		regulator-enable-ramp-delay = <500>;
672	};
673};
674
675&pm8994_gpios {
676	irled_default: irled-default-state {
677		pins = "gpio5";
678		function = PMIC_GPIO_FUNC_FUNC1;
679		output-low;
680		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
681		power-source = <PM8994_GPIO_S4>;
682		bias-disable;
683	};
684
685	wlan_en_default: wlan-en-state {
686		pins = "gpio8";
687		function = PMIC_GPIO_FUNC_NORMAL;
688		output-low;
689		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
690		power-source = <PM8994_GPIO_S4>;
691		bias-disable;
692	};
693
694	rome_enable_default: rome-enable-state {
695		pins = "gpio9";
696		function = PMIC_GPIO_FUNC_NORMAL;
697		output-high;
698		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
699		power-source = <PM8994_GPIO_VPH>;
700	};
701
702	divclk1_default: divclk1-state {
703		pins = "gpio15";
704		function = PMIC_GPIO_FUNC_FUNC1;
705		bias-disable;
706		power-source = <PM8994_GPIO_S4>;
707		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
708	};
709
710	divclk4_pin_a: divclk4-state {
711		pins = "gpio18";
712		function = PMIC_GPIO_FUNC_FUNC2;
713		bias-disable;
714		power-source = <PM8994_GPIO_S4>;
715	};
716};
717
718&tlmm {
719	mdss_dsi_default: mdss-dsi-default-state {
720		pins = "gpio8";
721		function = "gpio";
722		drive-strength = <8>;
723		bias-disable;
724	};
725
726	mdss_dsi_sleep: mdss-dsi-sleep-state {
727		pins = "gpio8";
728		function = "gpio";
729		drive-strength = <2>;
730		bias-pull-down;
731	};
732
733	mdss_te_default: mdss-te-default-state {
734		pins = "gpio10";
735		function = "mdp_vsync";
736		drive-strength = <2>;
737		bias-pull-down;
738	};
739
740	mdss_te_sleep: mdss-te-sleep-state {
741		pins = "gpio10";
742		function = "mdp_vsync";
743		drive-strength = <2>;
744		bias-pull-down;
745	};
746
747	nfc_default: nfc-default-state {
748		pins = "gpio12", "gpio21";
749		function = "gpio";
750		drive-strength = <16>;
751		bias-pull-up;
752	};
753};
754