16a6d1978SJeremy McNicoll/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 26a6d1978SJeremy McNicoll * 36a6d1978SJeremy McNicoll * This program is free software; you can redistribute it and/or modify 46a6d1978SJeremy McNicoll * it under the terms of the GNU General Public License version 2 and 56a6d1978SJeremy McNicoll * only version 2 as published by the Free Software Foundation. 66a6d1978SJeremy McNicoll * 76a6d1978SJeremy McNicoll * This program is distributed in the hope that it will be useful, 86a6d1978SJeremy McNicoll * but WITHOUT ANY WARRANTY; without even the implied warranty of 96a6d1978SJeremy McNicoll * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 106a6d1978SJeremy McNicoll * GNU General Public License for more details. 116a6d1978SJeremy McNicoll */ 126a6d1978SJeremy McNicoll 136a6d1978SJeremy McNicoll#include <dt-bindings/interrupt-controller/arm-gic.h> 146a6d1978SJeremy McNicoll#include <dt-bindings/clock/qcom,gcc-msm8994.h> 156a6d1978SJeremy McNicoll 166a6d1978SJeremy McNicoll/ { 176a6d1978SJeremy McNicoll model = "Qualcomm Technologies, Inc. MSM 8992"; 186a6d1978SJeremy McNicoll compatible = "qcom,msm8992"; 196a6d1978SJeremy McNicoll // msm-id needed by bootloader for selecting correct blob 206a6d1978SJeremy McNicoll qcom,msm-id = <251 0>, <252 0>; 216a6d1978SJeremy McNicoll interrupt-parent = <&intc>; 226a6d1978SJeremy McNicoll 236a6d1978SJeremy McNicoll #address-cells = <2>; 246a6d1978SJeremy McNicoll #size-cells = <2>; 256a6d1978SJeremy McNicoll 266a6d1978SJeremy McNicoll chosen { }; 276a6d1978SJeremy McNicoll 286a6d1978SJeremy McNicoll cpus { 296a6d1978SJeremy McNicoll #address-cells = <2>; 306a6d1978SJeremy McNicoll #size-cells = <0>; 316a6d1978SJeremy McNicoll cpu-map { 326a6d1978SJeremy McNicoll cluster0 { 336a6d1978SJeremy McNicoll core0 { 346a6d1978SJeremy McNicoll cpu = <&CPU0>; 356a6d1978SJeremy McNicoll }; 366a6d1978SJeremy McNicoll }; 376a6d1978SJeremy McNicoll }; 386a6d1978SJeremy McNicoll 396a6d1978SJeremy McNicoll CPU0: cpu@0 { 406a6d1978SJeremy McNicoll device_type = "cpu"; 416a6d1978SJeremy McNicoll compatible = "arm,cortex-a53", "arm,armv8"; 426a6d1978SJeremy McNicoll reg = <0x0 0x0>; 436a6d1978SJeremy McNicoll next-level-cache = <&L2_0>; 446a6d1978SJeremy McNicoll L2_0: l2-cache { 456a6d1978SJeremy McNicoll compatible = "cache"; 466a6d1978SJeremy McNicoll cache-level = <2>; 476a6d1978SJeremy McNicoll }; 486a6d1978SJeremy McNicoll }; 496a6d1978SJeremy McNicoll }; 506a6d1978SJeremy McNicoll 516a6d1978SJeremy McNicoll timer { 526a6d1978SJeremy McNicoll compatible = "arm,armv8-timer"; 536a6d1978SJeremy McNicoll interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 546a6d1978SJeremy McNicoll <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 556a6d1978SJeremy McNicoll <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 566a6d1978SJeremy McNicoll <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 576a6d1978SJeremy McNicoll }; 586a6d1978SJeremy McNicoll 596a6d1978SJeremy McNicoll xo_board: xo_board { 606a6d1978SJeremy McNicoll compatible = "fixed-clock"; 616a6d1978SJeremy McNicoll #clock-cells = <0>; 626a6d1978SJeremy McNicoll clock-frequency = <19200000>; 636a6d1978SJeremy McNicoll }; 646a6d1978SJeremy McNicoll 656a6d1978SJeremy McNicoll sleep_clk: sleep_clk { 666a6d1978SJeremy McNicoll compatible = "fixed-clock"; 676a6d1978SJeremy McNicoll #clock-cells = <0>; 686a6d1978SJeremy McNicoll clock-frequency = <32768>; 696a6d1978SJeremy McNicoll }; 706a6d1978SJeremy McNicoll 716a6d1978SJeremy McNicoll soc { 726a6d1978SJeremy McNicoll #address-cells = <1>; 736a6d1978SJeremy McNicoll #size-cells = <1>; 746a6d1978SJeremy McNicoll ranges = <0 0 0 0xffffffff>; 756a6d1978SJeremy McNicoll compatible = "simple-bus"; 766a6d1978SJeremy McNicoll 776a6d1978SJeremy McNicoll intc: interrupt-controller@f9000000 { 786a6d1978SJeremy McNicoll compatible = "qcom,msm-qgic2"; 796a6d1978SJeremy McNicoll interrupt-controller; 806a6d1978SJeremy McNicoll #interrupt-cells = <3>; 816a6d1978SJeremy McNicoll reg = <0xf9000000 0x1000>, 826a6d1978SJeremy McNicoll <0xf9002000 0x1000>; 836a6d1978SJeremy McNicoll }; 846a6d1978SJeremy McNicoll 856a6d1978SJeremy McNicoll timer@f9020000 { 866a6d1978SJeremy McNicoll #address-cells = <1>; 876a6d1978SJeremy McNicoll #size-cells = <1>; 886a6d1978SJeremy McNicoll ranges; 896a6d1978SJeremy McNicoll compatible = "arm,armv7-timer-mem"; 906a6d1978SJeremy McNicoll reg = <0xf9020000 0x1000>; 916a6d1978SJeremy McNicoll 926a6d1978SJeremy McNicoll frame@f9021000 { 936a6d1978SJeremy McNicoll frame-number = <0>; 946a6d1978SJeremy McNicoll interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 956a6d1978SJeremy McNicoll <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 966a6d1978SJeremy McNicoll reg = <0xf9021000 0x1000>, 976a6d1978SJeremy McNicoll <0xf9022000 0x1000>; 986a6d1978SJeremy McNicoll }; 996a6d1978SJeremy McNicoll 1006a6d1978SJeremy McNicoll frame@f9023000 { 1016a6d1978SJeremy McNicoll frame-number = <1>; 1026a6d1978SJeremy McNicoll interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1036a6d1978SJeremy McNicoll reg = <0xf9023000 0x1000>; 1046a6d1978SJeremy McNicoll status = "disabled"; 1056a6d1978SJeremy McNicoll }; 1066a6d1978SJeremy McNicoll 1076a6d1978SJeremy McNicoll frame@f9024000 { 1086a6d1978SJeremy McNicoll frame-number = <2>; 1096a6d1978SJeremy McNicoll interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 1106a6d1978SJeremy McNicoll reg = <0xf9024000 0x1000>; 1116a6d1978SJeremy McNicoll status = "disabled"; 1126a6d1978SJeremy McNicoll }; 1136a6d1978SJeremy McNicoll 1146a6d1978SJeremy McNicoll frame@f9025000 { 1156a6d1978SJeremy McNicoll frame-number = <3>; 1166a6d1978SJeremy McNicoll interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1176a6d1978SJeremy McNicoll reg = <0xf9025000 0x1000>; 1186a6d1978SJeremy McNicoll status = "disabled"; 1196a6d1978SJeremy McNicoll }; 1206a6d1978SJeremy McNicoll 1216a6d1978SJeremy McNicoll frame@f9026000 { 1226a6d1978SJeremy McNicoll frame-number = <4>; 1236a6d1978SJeremy McNicoll interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1246a6d1978SJeremy McNicoll reg = <0xf9026000 0x1000>; 1256a6d1978SJeremy McNicoll status = "disabled"; 1266a6d1978SJeremy McNicoll }; 1276a6d1978SJeremy McNicoll 1286a6d1978SJeremy McNicoll frame@f9027000 { 1296a6d1978SJeremy McNicoll frame-number = <5>; 1306a6d1978SJeremy McNicoll interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1316a6d1978SJeremy McNicoll reg = <0xf9027000 0x1000>; 1326a6d1978SJeremy McNicoll status = "disabled"; 1336a6d1978SJeremy McNicoll }; 1346a6d1978SJeremy McNicoll 1356a6d1978SJeremy McNicoll frame@f9028000 { 1366a6d1978SJeremy McNicoll frame-number = <6>; 1376a6d1978SJeremy McNicoll interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1386a6d1978SJeremy McNicoll reg = <0xf9028000 0x1000>; 1396a6d1978SJeremy McNicoll status = "disabled"; 1406a6d1978SJeremy McNicoll }; 1416a6d1978SJeremy McNicoll }; 1426a6d1978SJeremy McNicoll 1436a6d1978SJeremy McNicoll restart@fc4ab000 { 1446a6d1978SJeremy McNicoll compatible = "qcom,pshold"; 1456a6d1978SJeremy McNicoll reg = <0xfc4ab000 0x4>; 1466a6d1978SJeremy McNicoll }; 1476a6d1978SJeremy McNicoll 1486a6d1978SJeremy McNicoll msmgpio: pinctrl@fd510000 { 1496a6d1978SJeremy McNicoll compatible = "qcom,msm8994-pinctrl"; 1506a6d1978SJeremy McNicoll reg = <0xfd510000 0x4000>; 1516a6d1978SJeremy McNicoll interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 1526a6d1978SJeremy McNicoll gpio-controller; 1536a6d1978SJeremy McNicoll #gpio-cells = <2>; 1546a6d1978SJeremy McNicoll interrupt-controller; 1556a6d1978SJeremy McNicoll #interrupt-cells = <2>; 1566a6d1978SJeremy McNicoll }; 1576a6d1978SJeremy McNicoll 1586a6d1978SJeremy McNicoll blsp1_uart2: serial@f991e000 { 1596a6d1978SJeremy McNicoll compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 1606a6d1978SJeremy McNicoll reg = <0xf991e000 0x1000>; 1616a6d1978SJeremy McNicoll interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>; 1626a6d1978SJeremy McNicoll status = "disabled"; 1636a6d1978SJeremy McNicoll clock-names = "core", "iface"; 1646a6d1978SJeremy McNicoll clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, 1656a6d1978SJeremy McNicoll <&clock_gcc GCC_BLSP1_AHB_CLK>; 1666a6d1978SJeremy McNicoll }; 1676a6d1978SJeremy McNicoll 1686a6d1978SJeremy McNicoll clock_gcc: clock-controller@fc400000 { 1696a6d1978SJeremy McNicoll compatible = "qcom,gcc-msm8994"; 1706a6d1978SJeremy McNicoll #clock-cells = <1>; 1716a6d1978SJeremy McNicoll #reset-cells = <1>; 1726a6d1978SJeremy McNicoll #power-domain-cells = <1>; 1736a6d1978SJeremy McNicoll reg = <0xfc400000 0x2000>; 1746a6d1978SJeremy McNicoll }; 1756a6d1978SJeremy McNicoll }; 1766a6d1978SJeremy McNicoll 1776a6d1978SJeremy McNicoll memory { 1786a6d1978SJeremy McNicoll device_type = "memory"; 1796a6d1978SJeremy McNicoll reg = <0 0 0 0>; // bootloader will update 1806a6d1978SJeremy McNicoll }; 1816a6d1978SJeremy McNicoll}; 1826a6d1978SJeremy McNicoll 1836a6d1978SJeremy McNicoll 1846a6d1978SJeremy McNicoll#include "msm8992-pins.dtsi" 185