1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * IPQ9574 RDP433 board device tree source 4 * 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 7 */ 8 9/dts-v1/; 10 11#include "ipq9574.dtsi" 12 13/ { 14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; 15 compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; 16 17 aliases { 18 serial0 = &blsp1_uart2; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24}; 25 26&blsp1_uart2 { 27 pinctrl-0 = <&uart2_pins>; 28 pinctrl-names = "default"; 29 status = "okay"; 30}; 31 32&rpm_requests { 33 regulators { 34 compatible = "qcom,rpm-mp5496-regulators"; 35 36 ipq9574_s1: s1 { 37 /* 38 * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. 39 * During regulator registration, kernel not knowing the initial voltage, 40 * considers it as zero and brings up the regulators with minimum supported voltage. 41 * Update the regulator-min-microvolt with SVS voltage of 725mV so that 42 * the regulators are brought up with 725mV which is sufficient for all the 43 * corner parts to operate at 800MHz 44 */ 45 regulator-min-microvolt = <725000>; 46 regulator-max-microvolt = <1075000>; 47 }; 48 }; 49}; 50 51&sdhc_1 { 52 pinctrl-0 = <&sdc_default_state>; 53 pinctrl-names = "default"; 54 mmc-ddr-1_8v; 55 mmc-hs200-1_8v; 56 mmc-hs400-1_8v; 57 mmc-hs400-enhanced-strobe; 58 max-frequency = <384000000>; 59 bus-width = <8>; 60 status = "okay"; 61}; 62 63&sleep_clk { 64 clock-frequency = <32000>; 65}; 66 67&tlmm { 68 sdc_default_state: sdc-default-state { 69 clk-pins { 70 pins = "gpio5"; 71 function = "sdc_clk"; 72 drive-strength = <8>; 73 bias-disable; 74 }; 75 76 cmd-pins { 77 pins = "gpio4"; 78 function = "sdc_cmd"; 79 drive-strength = <8>; 80 bias-pull-up; 81 }; 82 83 data-pins { 84 pins = "gpio0", "gpio1", "gpio2", 85 "gpio3", "gpio6", "gpio7", 86 "gpio8", "gpio9"; 87 function = "sdc_data"; 88 drive-strength = <8>; 89 bias-pull-up; 90 }; 91 92 rclk-pins { 93 pins = "gpio10"; 94 function = "sdc_rclk"; 95 drive-strength = <8>; 96 bias-pull-down; 97 }; 98 }; 99}; 100 101&xo_board_clk { 102 clock-frequency = <24000000>; 103}; 104