1*57000675SSricharan Ramabadhran// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 2*57000675SSricharan Ramabadhran/* 3*57000675SSricharan Ramabadhran * IPQ5018 MP03.1-C2 board device tree source 4*57000675SSricharan Ramabadhran * 5*57000675SSricharan Ramabadhran * Copyright (c) 2023 The Linux Foundation. All rights reserved. 6*57000675SSricharan Ramabadhran */ 7*57000675SSricharan Ramabadhran 8*57000675SSricharan Ramabadhran/dts-v1/; 9*57000675SSricharan Ramabadhran 10*57000675SSricharan Ramabadhran#include "ipq5018.dtsi" 11*57000675SSricharan Ramabadhran 12*57000675SSricharan Ramabadhran/ { 13*57000675SSricharan Ramabadhran model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2"; 14*57000675SSricharan Ramabadhran compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018"; 15*57000675SSricharan Ramabadhran 16*57000675SSricharan Ramabadhran aliases { 17*57000675SSricharan Ramabadhran serial0 = &blsp1_uart1; 18*57000675SSricharan Ramabadhran }; 19*57000675SSricharan Ramabadhran 20*57000675SSricharan Ramabadhran chosen { 21*57000675SSricharan Ramabadhran stdout-path = "serial0:115200n8"; 22*57000675SSricharan Ramabadhran }; 23*57000675SSricharan Ramabadhran}; 24*57000675SSricharan Ramabadhran 25*57000675SSricharan Ramabadhran&blsp1_uart1 { 26*57000675SSricharan Ramabadhran pinctrl-0 = <&uart1_pins>; 27*57000675SSricharan Ramabadhran pinctrl-names = "default"; 28*57000675SSricharan Ramabadhran status = "okay"; 29*57000675SSricharan Ramabadhran}; 30*57000675SSricharan Ramabadhran 31*57000675SSricharan Ramabadhran&sdhc_1 { 32*57000675SSricharan Ramabadhran pinctrl-0 = <&sdc_default_state>; 33*57000675SSricharan Ramabadhran pinctrl-names = "default"; 34*57000675SSricharan Ramabadhran mmc-ddr-1_8v; 35*57000675SSricharan Ramabadhran mmc-hs200-1_8v; 36*57000675SSricharan Ramabadhran max-frequency = <192000000>; 37*57000675SSricharan Ramabadhran bus-width = <4>; 38*57000675SSricharan Ramabadhran status = "okay"; 39*57000675SSricharan Ramabadhran}; 40*57000675SSricharan Ramabadhran 41*57000675SSricharan Ramabadhran&sleep_clk { 42*57000675SSricharan Ramabadhran clock-frequency = <32000>; 43*57000675SSricharan Ramabadhran}; 44*57000675SSricharan Ramabadhran 45*57000675SSricharan Ramabadhran&tlmm { 46*57000675SSricharan Ramabadhran sdc_default_state: sdc-default-state { 47*57000675SSricharan Ramabadhran clk-pins { 48*57000675SSricharan Ramabadhran pins = "gpio9"; 49*57000675SSricharan Ramabadhran function = "sdc1_clk"; 50*57000675SSricharan Ramabadhran drive-strength = <8>; 51*57000675SSricharan Ramabadhran bias-disable; 52*57000675SSricharan Ramabadhran }; 53*57000675SSricharan Ramabadhran 54*57000675SSricharan Ramabadhran cmd-pins { 55*57000675SSricharan Ramabadhran pins = "gpio8"; 56*57000675SSricharan Ramabadhran function = "sdc1_cmd"; 57*57000675SSricharan Ramabadhran drive-strength = <8>; 58*57000675SSricharan Ramabadhran bias-pull-up; 59*57000675SSricharan Ramabadhran }; 60*57000675SSricharan Ramabadhran 61*57000675SSricharan Ramabadhran data-pins { 62*57000675SSricharan Ramabadhran pins = "gpio4", "gpio5", "gpio6", "gpio7"; 63*57000675SSricharan Ramabadhran function = "sdc1_data"; 64*57000675SSricharan Ramabadhran drive-strength = <8>; 65*57000675SSricharan Ramabadhran bias-disable; 66*57000675SSricharan Ramabadhran }; 67*57000675SSricharan Ramabadhran }; 68*57000675SSricharan Ramabadhran}; 69*57000675SSricharan Ramabadhran 70*57000675SSricharan Ramabadhran&xo_board_clk { 71*57000675SSricharan Ramabadhran clock-frequency = <24000000>; 72*57000675SSricharan Ramabadhran}; 73