1*c95711d7SShubhi Garg// SPDX-License-Identifier: GPL-2.0 2*c95711d7SShubhi Garg/dts-v1/; 3*c95711d7SShubhi Garg 4*c95711d7SShubhi Garg#include <dt-bindings/input/linux-event-codes.h> 5*c95711d7SShubhi Garg#include <dt-bindings/input/gpio-keys.h> 6*c95711d7SShubhi Garg#include "tegra234-p3701-0008.dtsi" 7*c95711d7SShubhi Garg#include "tegra234-p3740-0002.dtsi" 8*c95711d7SShubhi Garg 9*c95711d7SShubhi Garg/ { 10*c95711d7SShubhi Garg model = "NVIDIA IGX Orin Development Kit"; 11*c95711d7SShubhi Garg compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234"; 12*c95711d7SShubhi Garg 13*c95711d7SShubhi Garg aliases { 14*c95711d7SShubhi Garg serial0 = &tcu; 15*c95711d7SShubhi Garg }; 16*c95711d7SShubhi Garg 17*c95711d7SShubhi Garg chosen { 18*c95711d7SShubhi Garg stdout-path = "serial0:115200n8"; 19*c95711d7SShubhi Garg }; 20*c95711d7SShubhi Garg 21*c95711d7SShubhi Garg bus@0 { 22*c95711d7SShubhi Garg host1x@13e00000 { 23*c95711d7SShubhi Garg nvdec@15480000 { 24*c95711d7SShubhi Garg status = "okay"; 25*c95711d7SShubhi Garg }; 26*c95711d7SShubhi Garg }; 27*c95711d7SShubhi Garg 28*c95711d7SShubhi Garg pcie@140e0000 { 29*c95711d7SShubhi Garg status = "okay"; 30*c95711d7SShubhi Garg vddio-pex-ctl-supply = <&vdd_1v8_ls>; 31*c95711d7SShubhi Garg phys = <&p2u_gbe_4>, <&p2u_gbe_5>; 32*c95711d7SShubhi Garg phy-names = "p2u-0", "p2u-1"; 33*c95711d7SShubhi Garg }; 34*c95711d7SShubhi Garg 35*c95711d7SShubhi Garg pcie@14100000 { 36*c95711d7SShubhi Garg status = "okay"; 37*c95711d7SShubhi Garg vddio-pex-ctl-supply = <&vdd_1v8_ao>; 38*c95711d7SShubhi Garg phys = <&p2u_hsio_3>; 39*c95711d7SShubhi Garg phy-names = "p2u-0"; 40*c95711d7SShubhi Garg }; 41*c95711d7SShubhi Garg 42*c95711d7SShubhi Garg pcie@14160000 { 43*c95711d7SShubhi Garg status = "okay"; 44*c95711d7SShubhi Garg vddio-pex-ctl-supply = <&vdd_1v8_ao>; 45*c95711d7SShubhi Garg phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>, 46*c95711d7SShubhi Garg <&p2u_hsio_4>; 47*c95711d7SShubhi Garg phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; 48*c95711d7SShubhi Garg }; 49*c95711d7SShubhi Garg 50*c95711d7SShubhi Garg pcie@141a0000 { 51*c95711d7SShubhi Garg status = "okay"; 52*c95711d7SShubhi Garg vddio-pex-ctl-supply = <&vdd_1v8_ls>; 53*c95711d7SShubhi Garg phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 54*c95711d7SShubhi Garg <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 55*c95711d7SShubhi Garg <&p2u_nvhs_6>, <&p2u_nvhs_7>; 56*c95711d7SShubhi Garg phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 57*c95711d7SShubhi Garg "p2u-5", "p2u-6", "p2u-7"; 58*c95711d7SShubhi Garg }; 59*c95711d7SShubhi Garg 60*c95711d7SShubhi Garg pcie@141e0000 { 61*c95711d7SShubhi Garg status = "okay"; 62*c95711d7SShubhi Garg vddio-pex-ctl-supply = <&vdd_1v8_ls>; 63*c95711d7SShubhi Garg phys = <&p2u_gbe_0>, <&p2u_gbe_1>; 64*c95711d7SShubhi Garg phy-names = "p2u-0", "p2u-1"; 65*c95711d7SShubhi Garg }; 66*c95711d7SShubhi Garg 67*c95711d7SShubhi Garg aconnect@2900000 { 68*c95711d7SShubhi Garg status = "okay"; 69*c95711d7SShubhi Garg }; 70*c95711d7SShubhi Garg 71*c95711d7SShubhi Garg serial@3100000 { 72*c95711d7SShubhi Garg compatible = "nvidia,tegra194-hsuart"; 73*c95711d7SShubhi Garg status = "okay"; 74*c95711d7SShubhi Garg }; 75*c95711d7SShubhi Garg 76*c95711d7SShubhi Garg i2c@3160000 { 77*c95711d7SShubhi Garg status = "okay"; 78*c95711d7SShubhi Garg }; 79*c95711d7SShubhi Garg 80*c95711d7SShubhi Garg i2c@3180000 { 81*c95711d7SShubhi Garg status = "okay"; 82*c95711d7SShubhi Garg }; 83*c95711d7SShubhi Garg 84*c95711d7SShubhi Garg i2c@3190000 { 85*c95711d7SShubhi Garg status = "okay"; 86*c95711d7SShubhi Garg }; 87*c95711d7SShubhi Garg 88*c95711d7SShubhi Garg i2c@31b0000 { 89*c95711d7SShubhi Garg status = "okay"; 90*c95711d7SShubhi Garg }; 91*c95711d7SShubhi Garg 92*c95711d7SShubhi Garg i2c@31c0000 { 93*c95711d7SShubhi Garg status = "okay"; 94*c95711d7SShubhi Garg 95*c95711d7SShubhi Garg }; 96*c95711d7SShubhi Garg 97*c95711d7SShubhi Garg i2c@31e0000 { 98*c95711d7SShubhi Garg status = "okay"; 99*c95711d7SShubhi Garg }; 100*c95711d7SShubhi Garg 101*c95711d7SShubhi Garg spi@3270000 { 102*c95711d7SShubhi Garg status = "okay"; 103*c95711d7SShubhi Garg }; 104*c95711d7SShubhi Garg 105*c95711d7SShubhi Garg hda@3510000 { 106*c95711d7SShubhi Garg nvidia,model = "NVIDIA IGX HDA"; 107*c95711d7SShubhi Garg status = "okay"; 108*c95711d7SShubhi Garg }; 109*c95711d7SShubhi Garg 110*c95711d7SShubhi Garg fuse@3810000 { 111*c95711d7SShubhi Garg status = "okay"; 112*c95711d7SShubhi Garg }; 113*c95711d7SShubhi Garg 114*c95711d7SShubhi Garg i2c@c240000 { 115*c95711d7SShubhi Garg status = "okay"; 116*c95711d7SShubhi Garg }; 117*c95711d7SShubhi Garg 118*c95711d7SShubhi Garg i2c@c250000 { 119*c95711d7SShubhi Garg status = "okay"; 120*c95711d7SShubhi Garg }; 121*c95711d7SShubhi Garg }; 122*c95711d7SShubhi Garg 123*c95711d7SShubhi Garg gpio-keys { 124*c95711d7SShubhi Garg compatible = "gpio-keys"; 125*c95711d7SShubhi Garg status = "okay"; 126*c95711d7SShubhi Garg 127*c95711d7SShubhi Garg key-force-recovery { 128*c95711d7SShubhi Garg label = "Force Recovery"; 129*c95711d7SShubhi Garg gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>; 130*c95711d7SShubhi Garg linux,input-type = <EV_KEY>; 131*c95711d7SShubhi Garg linux,code = <BTN_1>; 132*c95711d7SShubhi Garg }; 133*c95711d7SShubhi Garg 134*c95711d7SShubhi Garg key-power { 135*c95711d7SShubhi Garg label = "Power"; 136*c95711d7SShubhi Garg gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>; 137*c95711d7SShubhi Garg linux,input-type = <EV_KEY>; 138*c95711d7SShubhi Garg linux,code = <KEY_POWER>; 139*c95711d7SShubhi Garg wakeup-event-action = <EV_ACT_ASSERTED>; 140*c95711d7SShubhi Garg wakeup-source; 141*c95711d7SShubhi Garg }; 142*c95711d7SShubhi Garg 143*c95711d7SShubhi Garg key-suspend { 144*c95711d7SShubhi Garg label = "Suspend"; 145*c95711d7SShubhi Garg gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>; 146*c95711d7SShubhi Garg linux,input-type = <EV_KEY>; 147*c95711d7SShubhi Garg linux,code = <KEY_SLEEP>; 148*c95711d7SShubhi Garg }; 149*c95711d7SShubhi Garg }; 150*c95711d7SShubhi Garg 151*c95711d7SShubhi Garg serial { 152*c95711d7SShubhi Garg status = "okay"; 153*c95711d7SShubhi Garg }; 154*c95711d7SShubhi Garg}; 155