1c95711d7SShubhi Garg// SPDX-License-Identifier: GPL-2.0
2c95711d7SShubhi Garg/dts-v1/;
3c95711d7SShubhi Garg
4c95711d7SShubhi Garg#include <dt-bindings/input/linux-event-codes.h>
5c95711d7SShubhi Garg#include <dt-bindings/input/gpio-keys.h>
6c95711d7SShubhi Garg#include "tegra234-p3701-0008.dtsi"
7c95711d7SShubhi Garg#include "tegra234-p3740-0002.dtsi"
8c95711d7SShubhi Garg
9c95711d7SShubhi Garg/ {
10c95711d7SShubhi Garg	model = "NVIDIA IGX Orin Development Kit";
11c95711d7SShubhi Garg	compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
12c95711d7SShubhi Garg
13c95711d7SShubhi Garg	aliases {
14c95711d7SShubhi Garg		serial0 = &tcu;
15d97966dfSJon Hunter		serial1 = &uarta;
16c95711d7SShubhi Garg	};
17c95711d7SShubhi Garg
18c95711d7SShubhi Garg	chosen {
19c95711d7SShubhi Garg		stdout-path = "serial0:115200n8";
20c95711d7SShubhi Garg	};
21c95711d7SShubhi Garg
22c95711d7SShubhi Garg	bus@0 {
23c95711d7SShubhi Garg		host1x@13e00000 {
24c95711d7SShubhi Garg			nvdec@15480000 {
25c95711d7SShubhi Garg				status = "okay";
26c95711d7SShubhi Garg			};
27c95711d7SShubhi Garg		};
28c95711d7SShubhi Garg
29c95711d7SShubhi Garg		pcie@140e0000 {
30c95711d7SShubhi Garg			status = "okay";
31c95711d7SShubhi Garg			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
32c95711d7SShubhi Garg			phys = <&p2u_gbe_4>, <&p2u_gbe_5>;
33c95711d7SShubhi Garg			phy-names = "p2u-0", "p2u-1";
34c95711d7SShubhi Garg		};
35c95711d7SShubhi Garg
36c95711d7SShubhi Garg		pcie@14100000 {
37c95711d7SShubhi Garg			status = "okay";
38c95711d7SShubhi Garg			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
39c95711d7SShubhi Garg			phys = <&p2u_hsio_3>;
40c95711d7SShubhi Garg			phy-names = "p2u-0";
41c95711d7SShubhi Garg		};
42c95711d7SShubhi Garg
43c95711d7SShubhi Garg		pcie@14160000 {
44c95711d7SShubhi Garg			status = "okay";
45c95711d7SShubhi Garg			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
46c95711d7SShubhi Garg			phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,
47c95711d7SShubhi Garg			       <&p2u_hsio_4>;
48c95711d7SShubhi Garg			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
49c95711d7SShubhi Garg		};
50c95711d7SShubhi Garg
51c95711d7SShubhi Garg		pcie@141a0000 {
52c95711d7SShubhi Garg			status = "okay";
53c95711d7SShubhi Garg			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
54c95711d7SShubhi Garg			phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
55c95711d7SShubhi Garg				<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
56c95711d7SShubhi Garg				<&p2u_nvhs_6>, <&p2u_nvhs_7>;
57c95711d7SShubhi Garg			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
58c95711d7SShubhi Garg				    "p2u-5", "p2u-6", "p2u-7";
59c95711d7SShubhi Garg		};
60c95711d7SShubhi Garg
61c95711d7SShubhi Garg		pcie@141e0000 {
62c95711d7SShubhi Garg			status = "okay";
63c95711d7SShubhi Garg			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
64c95711d7SShubhi Garg			phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
65c95711d7SShubhi Garg			phy-names = "p2u-0", "p2u-1";
66c95711d7SShubhi Garg		};
67c95711d7SShubhi Garg
68c95711d7SShubhi Garg		serial@3100000 {
69c95711d7SShubhi Garg			compatible = "nvidia,tegra194-hsuart";
70c95711d7SShubhi Garg			status = "okay";
71c95711d7SShubhi Garg		};
72c95711d7SShubhi Garg
73c95711d7SShubhi Garg		i2c@3160000 {
74c95711d7SShubhi Garg			status = "okay";
75c95711d7SShubhi Garg		};
76c95711d7SShubhi Garg
77c95711d7SShubhi Garg		i2c@3180000 {
78c95711d7SShubhi Garg			status = "okay";
79c95711d7SShubhi Garg		};
80c95711d7SShubhi Garg
81c95711d7SShubhi Garg		i2c@3190000 {
82c95711d7SShubhi Garg			status = "okay";
83c95711d7SShubhi Garg		};
84c95711d7SShubhi Garg
85c95711d7SShubhi Garg		i2c@31b0000 {
86c95711d7SShubhi Garg			status = "okay";
87c95711d7SShubhi Garg		};
88c95711d7SShubhi Garg
89c95711d7SShubhi Garg		i2c@31c0000 {
90c95711d7SShubhi Garg			status = "okay";
91c95711d7SShubhi Garg
92c95711d7SShubhi Garg		};
93c95711d7SShubhi Garg
94c95711d7SShubhi Garg		i2c@31e0000 {
95c95711d7SShubhi Garg			status = "okay";
96c95711d7SShubhi Garg		};
97c95711d7SShubhi Garg
98c95711d7SShubhi Garg		spi@3270000 {
99c95711d7SShubhi Garg			status = "okay";
100c95711d7SShubhi Garg		};
101c95711d7SShubhi Garg
102c95711d7SShubhi Garg		hda@3510000 {
103*5862ae43SMohan Kumar			nvidia,model = "NVIDIA IGX Orin HDA";
104c95711d7SShubhi Garg			status = "okay";
105c95711d7SShubhi Garg		};
106c95711d7SShubhi Garg
107c95711d7SShubhi Garg		fuse@3810000 {
108c95711d7SShubhi Garg			status = "okay";
109c95711d7SShubhi Garg		};
110c95711d7SShubhi Garg
111c95711d7SShubhi Garg		i2c@c240000 {
112c95711d7SShubhi Garg			status = "okay";
113c95711d7SShubhi Garg		};
114c95711d7SShubhi Garg
115c95711d7SShubhi Garg		i2c@c250000 {
116c95711d7SShubhi Garg			status = "okay";
117c95711d7SShubhi Garg		};
118c95711d7SShubhi Garg	};
119c95711d7SShubhi Garg
120c95711d7SShubhi Garg	gpio-keys {
121c95711d7SShubhi Garg		compatible = "gpio-keys";
122c95711d7SShubhi Garg		status = "okay";
123c95711d7SShubhi Garg
124c95711d7SShubhi Garg		key-force-recovery {
125c95711d7SShubhi Garg			label = "Force Recovery";
126c95711d7SShubhi Garg			gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>;
127c95711d7SShubhi Garg			linux,input-type = <EV_KEY>;
128c95711d7SShubhi Garg			linux,code = <BTN_1>;
129c95711d7SShubhi Garg		};
130c95711d7SShubhi Garg
131c95711d7SShubhi Garg		key-power {
132c95711d7SShubhi Garg			label = "Power";
133c95711d7SShubhi Garg			gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
134c95711d7SShubhi Garg			linux,input-type = <EV_KEY>;
135c95711d7SShubhi Garg			linux,code = <KEY_POWER>;
136c95711d7SShubhi Garg			wakeup-event-action = <EV_ACT_ASSERTED>;
137c95711d7SShubhi Garg			wakeup-source;
138c95711d7SShubhi Garg		};
139c95711d7SShubhi Garg
140c95711d7SShubhi Garg		key-suspend {
141c95711d7SShubhi Garg			label = "Suspend";
142c95711d7SShubhi Garg			gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>;
143c95711d7SShubhi Garg			linux,input-type = <EV_KEY>;
144c95711d7SShubhi Garg			linux,code = <KEY_SLEEP>;
145c95711d7SShubhi Garg		};
146c95711d7SShubhi Garg	};
147c95711d7SShubhi Garg
148c95711d7SShubhi Garg	serial {
149c95711d7SShubhi Garg		status = "okay";
150c95711d7SShubhi Garg	};
151*5862ae43SMohan Kumar
152*5862ae43SMohan Kumar	sound {
153*5862ae43SMohan Kumar		status = "okay";
154*5862ae43SMohan Kumar
155*5862ae43SMohan Kumar		compatible = "nvidia,tegra186-audio-graph-card";
156*5862ae43SMohan Kumar
157*5862ae43SMohan Kumar		dais = /* ADMAIF (FE) Ports */
158*5862ae43SMohan Kumar		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
159*5862ae43SMohan Kumar		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
160*5862ae43SMohan Kumar		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
161*5862ae43SMohan Kumar		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
162*5862ae43SMohan Kumar		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
163*5862ae43SMohan Kumar		       /* XBAR Ports */
164*5862ae43SMohan Kumar		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
165*5862ae43SMohan Kumar		       <&xbar_i2s6_port>, <&xbar_dmic3_port>,
166*5862ae43SMohan Kumar		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
167*5862ae43SMohan Kumar		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
168*5862ae43SMohan Kumar		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
169*5862ae43SMohan Kumar		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
170*5862ae43SMohan Kumar		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
171*5862ae43SMohan Kumar		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
172*5862ae43SMohan Kumar		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
173*5862ae43SMohan Kumar		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
174*5862ae43SMohan Kumar		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
175*5862ae43SMohan Kumar		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
176*5862ae43SMohan Kumar		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
177*5862ae43SMohan Kumar		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
178*5862ae43SMohan Kumar		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
179*5862ae43SMohan Kumar		       <&xbar_mix_in1_port>, <&xbar_mix_in2_port>,
180*5862ae43SMohan Kumar		       <&xbar_mix_in3_port>, <&xbar_mix_in4_port>,
181*5862ae43SMohan Kumar		       <&xbar_mix_in5_port>, <&xbar_mix_in6_port>,
182*5862ae43SMohan Kumar		       <&xbar_mix_in7_port>, <&xbar_mix_in8_port>,
183*5862ae43SMohan Kumar		       <&xbar_mix_in9_port>, <&xbar_mix_in10_port>,
184*5862ae43SMohan Kumar		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
185*5862ae43SMohan Kumar		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
186*5862ae43SMohan Kumar		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
187*5862ae43SMohan Kumar		       <&xbar_asrc_in7_port>,
188*5862ae43SMohan Kumar		       <&xbar_ope1_in_port>,
189*5862ae43SMohan Kumar		       /* HW accelerators */
190*5862ae43SMohan Kumar		       <&sfc1_out_port>, <&sfc2_out_port>,
191*5862ae43SMohan Kumar		       <&sfc3_out_port>, <&sfc4_out_port>,
192*5862ae43SMohan Kumar		       <&mvc1_out_port>, <&mvc2_out_port>,
193*5862ae43SMohan Kumar		       <&amx1_out_port>, <&amx2_out_port>,
194*5862ae43SMohan Kumar		       <&amx3_out_port>, <&amx4_out_port>,
195*5862ae43SMohan Kumar		       <&adx1_out1_port>, <&adx1_out2_port>,
196*5862ae43SMohan Kumar		       <&adx1_out3_port>, <&adx1_out4_port>,
197*5862ae43SMohan Kumar		       <&adx2_out1_port>, <&adx2_out2_port>,
198*5862ae43SMohan Kumar		       <&adx2_out3_port>, <&adx2_out4_port>,
199*5862ae43SMohan Kumar		       <&adx3_out1_port>, <&adx3_out2_port>,
200*5862ae43SMohan Kumar		       <&adx3_out3_port>, <&adx3_out4_port>,
201*5862ae43SMohan Kumar		       <&adx4_out1_port>, <&adx4_out2_port>,
202*5862ae43SMohan Kumar		       <&adx4_out3_port>, <&adx4_out4_port>,
203*5862ae43SMohan Kumar		       <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>,
204*5862ae43SMohan Kumar		       <&mix_out4_port>, <&mix_out5_port>,
205*5862ae43SMohan Kumar		       <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
206*5862ae43SMohan Kumar		       <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
207*5862ae43SMohan Kumar		       <&ope1_out_port>,
208*5862ae43SMohan Kumar		       /* BE I/O Ports */
209*5862ae43SMohan Kumar		       <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
210*5862ae43SMohan Kumar		       <&dmic3_port>;
211*5862ae43SMohan Kumar
212*5862ae43SMohan Kumar		label = "NVIDIA IGX Orin APE";
213*5862ae43SMohan Kumar
214*5862ae43SMohan Kumar		widgets = "Microphone",	"CVB-RT MIC Jack",
215*5862ae43SMohan Kumar			  "Microphone",	"CVB-RT MIC",
216*5862ae43SMohan Kumar			  "Headphone",	"CVB-RT HP Jack",
217*5862ae43SMohan Kumar			  "Speaker",	"CVB-RT SPK";
218*5862ae43SMohan Kumar
219*5862ae43SMohan Kumar		routing = /* I2S4 <-> RT5640 */
220*5862ae43SMohan Kumar			  "CVB-RT AIF1 Playback",	"I2S4 DAP-Playback",
221*5862ae43SMohan Kumar			  "I2S4 DAP-Capture",		"CVB-RT AIF1 Capture",
222*5862ae43SMohan Kumar			  /* RT5640 codec controls */
223*5862ae43SMohan Kumar			  "CVB-RT HP Jack",		"CVB-RT HPOL",
224*5862ae43SMohan Kumar			  "CVB-RT HP Jack",		"CVB-RT HPOR",
225*5862ae43SMohan Kumar			  "CVB-RT IN1P",		"CVB-RT MIC Jack",
226*5862ae43SMohan Kumar			  "CVB-RT IN2P",		"CVB-RT MIC Jack",
227*5862ae43SMohan Kumar			  "CVB-RT IN2N",		"CVB-RT MIC Jack",
228*5862ae43SMohan Kumar			  "CVB-RT IN3P",		"CVB-RT MIC Jack",
229*5862ae43SMohan Kumar			  "CVB-RT SPK",			"CVB-RT SPOLP",
230*5862ae43SMohan Kumar			  "CVB-RT SPK",			"CVB-RT SPORP",
231*5862ae43SMohan Kumar			  "CVB-RT SPK",			"CVB-RT LOUTL",
232*5862ae43SMohan Kumar			  "CVB-RT SPK",			"CVB-RT LOUTR",
233*5862ae43SMohan Kumar			  "CVB-RT DMIC1",		"CVB-RT MIC",
234*5862ae43SMohan Kumar			  "CVB-RT DMIC2",		"CVB-RT MIC";
235*5862ae43SMohan Kumar	};
236c95711d7SShubhi Garg};
237