1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/linux-event-codes.h> 5#include <dt-bindings/input/gpio-keys.h> 6 7#include "tegra234-p3701-0000.dtsi" 8#include "tegra234-p3737-0000.dtsi" 9 10/ { 11 model = "NVIDIA Jetson AGX Orin Developer Kit"; 12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234"; 13 14 aliases { 15 mmc3 = "/bus@0/mmc@3460000"; 16 serial0 = &tcu; 17 serial1 = &uarta; 18 }; 19 20 bus@0 { 21 aconnect@2900000 { 22 status = "okay"; 23 24 ahub@2900800 { 25 status = "okay"; 26 27 ports { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 port@0 { 32 reg = <0x0>; 33 34 xbar_admaif0: endpoint { 35 remote-endpoint = <&admaif0>; 36 }; 37 }; 38 39 port@1 { 40 reg = <0x1>; 41 42 xbar_admaif1: endpoint { 43 remote-endpoint = <&admaif1>; 44 }; 45 }; 46 47 port@2 { 48 reg = <0x2>; 49 50 xbar_admaif2: endpoint { 51 remote-endpoint = <&admaif2>; 52 }; 53 }; 54 55 port@3 { 56 reg = <0x3>; 57 58 xbar_admaif3: endpoint { 59 remote-endpoint = <&admaif3>; 60 }; 61 }; 62 63 port@4 { 64 reg = <0x4>; 65 66 xbar_admaif4: endpoint { 67 remote-endpoint = <&admaif4>; 68 }; 69 }; 70 71 port@5 { 72 reg = <0x5>; 73 74 xbar_admaif5: endpoint { 75 remote-endpoint = <&admaif5>; 76 }; 77 }; 78 79 port@6 { 80 reg = <0x6>; 81 82 xbar_admaif6: endpoint { 83 remote-endpoint = <&admaif6>; 84 }; 85 }; 86 87 port@7 { 88 reg = <0x7>; 89 90 xbar_admaif7: endpoint { 91 remote-endpoint = <&admaif7>; 92 }; 93 }; 94 95 port@8 { 96 reg = <0x8>; 97 98 xbar_admaif8: endpoint { 99 remote-endpoint = <&admaif8>; 100 }; 101 }; 102 103 port@9 { 104 reg = <0x9>; 105 106 xbar_admaif9: endpoint { 107 remote-endpoint = <&admaif9>; 108 }; 109 }; 110 111 port@a { 112 reg = <0xa>; 113 114 xbar_admaif10: endpoint { 115 remote-endpoint = <&admaif10>; 116 }; 117 }; 118 119 port@b { 120 reg = <0xb>; 121 122 xbar_admaif11: endpoint { 123 remote-endpoint = <&admaif11>; 124 }; 125 }; 126 127 port@c { 128 reg = <0xc>; 129 130 xbar_admaif12: endpoint { 131 remote-endpoint = <&admaif12>; 132 }; 133 }; 134 135 port@d { 136 reg = <0xd>; 137 138 xbar_admaif13: endpoint { 139 remote-endpoint = <&admaif13>; 140 }; 141 }; 142 143 port@e { 144 reg = <0xe>; 145 146 xbar_admaif14: endpoint { 147 remote-endpoint = <&admaif14>; 148 }; 149 }; 150 151 port@f { 152 reg = <0xf>; 153 154 xbar_admaif15: endpoint { 155 remote-endpoint = <&admaif15>; 156 }; 157 }; 158 159 port@10 { 160 reg = <0x10>; 161 162 xbar_admaif16: endpoint { 163 remote-endpoint = <&admaif16>; 164 }; 165 }; 166 167 port@11 { 168 reg = <0x11>; 169 170 xbar_admaif17: endpoint { 171 remote-endpoint = <&admaif17>; 172 }; 173 }; 174 175 port@12 { 176 reg = <0x12>; 177 178 xbar_admaif18: endpoint { 179 remote-endpoint = <&admaif18>; 180 }; 181 }; 182 183 port@13 { 184 reg = <0x13>; 185 186 xbar_admaif19: endpoint { 187 remote-endpoint = <&admaif19>; 188 }; 189 }; 190 191 xbar_i2s1_port: port@14 { 192 reg = <0x14>; 193 194 xbar_i2s1: endpoint { 195 remote-endpoint = <&i2s1_cif>; 196 }; 197 }; 198 199 xbar_i2s2_port: port@15 { 200 reg = <0x15>; 201 202 xbar_i2s2: endpoint { 203 remote-endpoint = <&i2s2_cif>; 204 }; 205 }; 206 207 xbar_i2s4_port: port@17 { 208 reg = <0x17>; 209 210 xbar_i2s4: endpoint { 211 remote-endpoint = <&i2s4_cif>; 212 }; 213 }; 214 215 xbar_i2s6_port: port@19 { 216 reg = <0x19>; 217 218 xbar_i2s6: endpoint { 219 remote-endpoint = <&i2s6_cif>; 220 }; 221 }; 222 223 xbar_dmic3_port: port@1c { 224 reg = <0x1c>; 225 226 xbar_dmic3: endpoint { 227 remote-endpoint = <&dmic3_cif>; 228 }; 229 }; 230 231 xbar_sfc1_in_port: port@20 { 232 reg = <0x20>; 233 234 xbar_sfc1_in: endpoint { 235 remote-endpoint = <&sfc1_cif_in>; 236 }; 237 }; 238 239 port@21 { 240 reg = <0x21>; 241 242 xbar_sfc1_out: endpoint { 243 remote-endpoint = <&sfc1_cif_out>; 244 }; 245 }; 246 247 xbar_sfc2_in_port: port@22 { 248 reg = <0x22>; 249 250 xbar_sfc2_in: endpoint { 251 remote-endpoint = <&sfc2_cif_in>; 252 }; 253 }; 254 255 port@23 { 256 reg = <0x23>; 257 258 xbar_sfc2_out: endpoint { 259 remote-endpoint = <&sfc2_cif_out>; 260 }; 261 }; 262 263 xbar_sfc3_in_port: port@24 { 264 reg = <0x24>; 265 266 xbar_sfc3_in: endpoint { 267 remote-endpoint = <&sfc3_cif_in>; 268 }; 269 }; 270 271 port@25 { 272 reg = <0x25>; 273 274 xbar_sfc3_out: endpoint { 275 remote-endpoint = <&sfc3_cif_out>; 276 }; 277 }; 278 279 xbar_sfc4_in_port: port@26 { 280 reg = <0x26>; 281 282 xbar_sfc4_in: endpoint { 283 remote-endpoint = <&sfc4_cif_in>; 284 }; 285 }; 286 287 port@27 { 288 reg = <0x27>; 289 290 xbar_sfc4_out: endpoint { 291 remote-endpoint = <&sfc4_cif_out>; 292 }; 293 }; 294 295 xbar_mvc1_in_port: port@28 { 296 reg = <0x28>; 297 298 xbar_mvc1_in: endpoint { 299 remote-endpoint = <&mvc1_cif_in>; 300 }; 301 }; 302 303 port@29 { 304 reg = <0x29>; 305 306 xbar_mvc1_out: endpoint { 307 remote-endpoint = <&mvc1_cif_out>; 308 }; 309 }; 310 311 xbar_mvc2_in_port: port@2a { 312 reg = <0x2a>; 313 314 xbar_mvc2_in: endpoint { 315 remote-endpoint = <&mvc2_cif_in>; 316 }; 317 }; 318 319 port@2b { 320 reg = <0x2b>; 321 322 xbar_mvc2_out: endpoint { 323 remote-endpoint = <&mvc2_cif_out>; 324 }; 325 }; 326 327 xbar_amx1_in1_port: port@2c { 328 reg = <0x2c>; 329 330 xbar_amx1_in1: endpoint { 331 remote-endpoint = <&amx1_in1>; 332 }; 333 }; 334 335 xbar_amx1_in2_port: port@2d { 336 reg = <0x2d>; 337 338 xbar_amx1_in2: endpoint { 339 remote-endpoint = <&amx1_in2>; 340 }; 341 }; 342 343 xbar_amx1_in3_port: port@2e { 344 reg = <0x2e>; 345 346 xbar_amx1_in3: endpoint { 347 remote-endpoint = <&amx1_in3>; 348 }; 349 }; 350 351 xbar_amx1_in4_port: port@2f { 352 reg = <0x2f>; 353 354 xbar_amx1_in4: endpoint { 355 remote-endpoint = <&amx1_in4>; 356 }; 357 }; 358 359 port@30 { 360 reg = <0x30>; 361 362 xbar_amx1_out: endpoint { 363 remote-endpoint = <&amx1_out>; 364 }; 365 }; 366 367 xbar_amx2_in1_port: port@31 { 368 reg = <0x31>; 369 370 xbar_amx2_in1: endpoint { 371 remote-endpoint = <&amx2_in1>; 372 }; 373 }; 374 375 xbar_amx2_in2_port: port@32 { 376 reg = <0x32>; 377 378 xbar_amx2_in2: endpoint { 379 remote-endpoint = <&amx2_in2>; 380 }; 381 }; 382 383 xbar_amx2_in3_port: port@33 { 384 reg = <0x33>; 385 386 xbar_amx2_in3: endpoint { 387 remote-endpoint = <&amx2_in3>; 388 }; 389 }; 390 391 xbar_amx2_in4_port: port@34 { 392 reg = <0x34>; 393 394 xbar_amx2_in4: endpoint { 395 remote-endpoint = <&amx2_in4>; 396 }; 397 }; 398 399 port@35 { 400 reg = <0x35>; 401 402 xbar_amx2_out: endpoint { 403 remote-endpoint = <&amx2_out>; 404 }; 405 }; 406 407 xbar_amx3_in1_port: port@36 { 408 reg = <0x36>; 409 410 xbar_amx3_in1: endpoint { 411 remote-endpoint = <&amx3_in1>; 412 }; 413 }; 414 415 xbar_amx3_in2_port: port@37 { 416 reg = <0x37>; 417 418 xbar_amx3_in2: endpoint { 419 remote-endpoint = <&amx3_in2>; 420 }; 421 }; 422 423 xbar_amx3_in3_port: port@38 { 424 reg = <0x38>; 425 426 xbar_amx3_in3: endpoint { 427 remote-endpoint = <&amx3_in3>; 428 }; 429 }; 430 431 xbar_amx3_in4_port: port@39 { 432 reg = <0x39>; 433 434 xbar_amx3_in4: endpoint { 435 remote-endpoint = <&amx3_in4>; 436 }; 437 }; 438 439 port@3a { 440 reg = <0x3a>; 441 442 xbar_amx3_out: endpoint { 443 remote-endpoint = <&amx3_out>; 444 }; 445 }; 446 447 xbar_amx4_in1_port: port@3b { 448 reg = <0x3b>; 449 450 xbar_amx4_in1: endpoint { 451 remote-endpoint = <&amx4_in1>; 452 }; 453 }; 454 455 xbar_amx4_in2_port: port@3c { 456 reg = <0x3c>; 457 458 xbar_amx4_in2: endpoint { 459 remote-endpoint = <&amx4_in2>; 460 }; 461 }; 462 463 xbar_amx4_in3_port: port@3d { 464 reg = <0x3d>; 465 466 xbar_amx4_in3: endpoint { 467 remote-endpoint = <&amx4_in3>; 468 }; 469 }; 470 471 xbar_amx4_in4_port: port@3e { 472 reg = <0x3e>; 473 474 xbar_amx4_in4: endpoint { 475 remote-endpoint = <&amx4_in4>; 476 }; 477 }; 478 479 port@3f { 480 reg = <0x3f>; 481 482 xbar_amx4_out: endpoint { 483 remote-endpoint = <&amx4_out>; 484 }; 485 }; 486 487 xbar_adx1_in_port: port@40 { 488 reg = <0x40>; 489 490 xbar_adx1_in: endpoint { 491 remote-endpoint = <&adx1_in>; 492 }; 493 }; 494 495 port@41 { 496 reg = <0x41>; 497 498 xbar_adx1_out1: endpoint { 499 remote-endpoint = <&adx1_out1>; 500 }; 501 }; 502 503 port@42 { 504 reg = <0x42>; 505 506 xbar_adx1_out2: endpoint { 507 remote-endpoint = <&adx1_out2>; 508 }; 509 }; 510 511 port@43 { 512 reg = <0x43>; 513 514 xbar_adx1_out3: endpoint { 515 remote-endpoint = <&adx1_out3>; 516 }; 517 }; 518 519 port@44 { 520 reg = <0x44>; 521 522 xbar_adx1_out4: endpoint { 523 remote-endpoint = <&adx1_out4>; 524 }; 525 }; 526 527 xbar_adx2_in_port: port@45 { 528 reg = <0x45>; 529 530 xbar_adx2_in: endpoint { 531 remote-endpoint = <&adx2_in>; 532 }; 533 }; 534 535 port@46 { 536 reg = <0x46>; 537 538 xbar_adx2_out1: endpoint { 539 remote-endpoint = <&adx2_out1>; 540 }; 541 }; 542 543 port@47 { 544 reg = <0x47>; 545 546 xbar_adx2_out2: endpoint { 547 remote-endpoint = <&adx2_out2>; 548 }; 549 }; 550 551 port@48 { 552 reg = <0x48>; 553 554 xbar_adx2_out3: endpoint { 555 remote-endpoint = <&adx2_out3>; 556 }; 557 }; 558 559 port@49 { 560 reg = <0x49>; 561 562 xbar_adx2_out4: endpoint { 563 remote-endpoint = <&adx2_out4>; 564 }; 565 }; 566 567 xbar_adx3_in_port: port@4a { 568 reg = <0x4a>; 569 570 xbar_adx3_in: endpoint { 571 remote-endpoint = <&adx3_in>; 572 }; 573 }; 574 575 port@4b { 576 reg = <0x4b>; 577 578 xbar_adx3_out1: endpoint { 579 remote-endpoint = <&adx3_out1>; 580 }; 581 }; 582 583 port@4c { 584 reg = <0x4c>; 585 586 xbar_adx3_out2: endpoint { 587 remote-endpoint = <&adx3_out2>; 588 }; 589 }; 590 591 port@4d { 592 reg = <0x4d>; 593 594 xbar_adx3_out3: endpoint { 595 remote-endpoint = <&adx3_out3>; 596 }; 597 }; 598 599 port@4e { 600 reg = <0x4e>; 601 602 xbar_adx3_out4: endpoint { 603 remote-endpoint = <&adx3_out4>; 604 }; 605 }; 606 607 xbar_adx4_in_port: port@4f { 608 reg = <0x4f>; 609 610 xbar_adx4_in: endpoint { 611 remote-endpoint = <&adx4_in>; 612 }; 613 }; 614 615 port@50 { 616 reg = <0x50>; 617 618 xbar_adx4_out1: endpoint { 619 remote-endpoint = <&adx4_out1>; 620 }; 621 }; 622 623 port@51 { 624 reg = <0x51>; 625 626 xbar_adx4_out2: endpoint { 627 remote-endpoint = <&adx4_out2>; 628 }; 629 }; 630 631 port@52 { 632 reg = <0x52>; 633 634 xbar_adx4_out3: endpoint { 635 remote-endpoint = <&adx4_out3>; 636 }; 637 }; 638 639 port@53 { 640 reg = <0x53>; 641 642 xbar_adx4_out4: endpoint { 643 remote-endpoint = <&adx4_out4>; 644 }; 645 }; 646 647 xbar_mix_in1_port: port@54 { 648 reg = <0x54>; 649 650 xbar_mix_in1: endpoint { 651 remote-endpoint = <&mix_in1>; 652 }; 653 }; 654 655 xbar_mix_in2_port: port@55 { 656 reg = <0x55>; 657 658 xbar_mix_in2: endpoint { 659 remote-endpoint = <&mix_in2>; 660 }; 661 }; 662 663 xbar_mix_in3_port: port@56 { 664 reg = <0x56>; 665 666 xbar_mix_in3: endpoint { 667 remote-endpoint = <&mix_in3>; 668 }; 669 }; 670 671 xbar_mix_in4_port: port@57 { 672 reg = <0x57>; 673 674 xbar_mix_in4: endpoint { 675 remote-endpoint = <&mix_in4>; 676 }; 677 }; 678 679 xbar_mix_in5_port: port@58 { 680 reg = <0x58>; 681 682 xbar_mix_in5: endpoint { 683 remote-endpoint = <&mix_in5>; 684 }; 685 }; 686 687 xbar_mix_in6_port: port@59 { 688 reg = <0x59>; 689 690 xbar_mix_in6: endpoint { 691 remote-endpoint = <&mix_in6>; 692 }; 693 }; 694 695 xbar_mix_in7_port: port@5a { 696 reg = <0x5a>; 697 698 xbar_mix_in7: endpoint { 699 remote-endpoint = <&mix_in7>; 700 }; 701 }; 702 703 xbar_mix_in8_port: port@5b { 704 reg = <0x5b>; 705 706 xbar_mix_in8: endpoint { 707 remote-endpoint = <&mix_in8>; 708 }; 709 }; 710 711 xbar_mix_in9_port: port@5c { 712 reg = <0x5c>; 713 714 xbar_mix_in9: endpoint { 715 remote-endpoint = <&mix_in9>; 716 }; 717 }; 718 719 xbar_mix_in10_port: port@5d { 720 reg = <0x5d>; 721 722 xbar_mix_in10: endpoint { 723 remote-endpoint = <&mix_in10>; 724 }; 725 }; 726 727 port@5e { 728 reg = <0x5e>; 729 730 xbar_mix_out1: endpoint { 731 remote-endpoint = <&mix_out1>; 732 }; 733 }; 734 735 port@5f { 736 reg = <0x5f>; 737 738 xbar_mix_out2: endpoint { 739 remote-endpoint = <&mix_out2>; 740 }; 741 }; 742 743 port@60 { 744 reg = <0x60>; 745 746 xbar_mix_out3: endpoint { 747 remote-endpoint = <&mix_out3>; 748 }; 749 }; 750 751 port@61 { 752 reg = <0x61>; 753 754 xbar_mix_out4: endpoint { 755 remote-endpoint = <&mix_out4>; 756 }; 757 }; 758 759 port@62 { 760 reg = <0x62>; 761 762 xbar_mix_out5: endpoint { 763 remote-endpoint = <&mix_out5>; 764 }; 765 }; 766 767 xbar_asrc_in1_port: port@63 { 768 reg = <0x63>; 769 770 xbar_asrc_in1_ep: endpoint { 771 remote-endpoint = <&asrc_in1_ep>; 772 }; 773 }; 774 775 port@64 { 776 reg = <0x64>; 777 778 xbar_asrc_out1_ep: endpoint { 779 remote-endpoint = <&asrc_out1_ep>; 780 }; 781 }; 782 783 xbar_asrc_in2_port: port@65 { 784 reg = <0x65>; 785 786 xbar_asrc_in2_ep: endpoint { 787 remote-endpoint = <&asrc_in2_ep>; 788 }; 789 }; 790 791 port@66 { 792 reg = <0x66>; 793 794 xbar_asrc_out2_ep: endpoint { 795 remote-endpoint = <&asrc_out2_ep>; 796 }; 797 }; 798 799 xbar_asrc_in3_port: port@67 { 800 reg = <0x67>; 801 802 xbar_asrc_in3_ep: endpoint { 803 remote-endpoint = <&asrc_in3_ep>; 804 }; 805 }; 806 807 port@68 { 808 reg = <0x68>; 809 810 xbar_asrc_out3_ep: endpoint { 811 remote-endpoint = <&asrc_out3_ep>; 812 }; 813 }; 814 815 xbar_asrc_in4_port: port@69 { 816 reg = <0x69>; 817 818 xbar_asrc_in4_ep: endpoint { 819 remote-endpoint = <&asrc_in4_ep>; 820 }; 821 }; 822 823 port@6a { 824 reg = <0x6a>; 825 826 xbar_asrc_out4_ep: endpoint { 827 remote-endpoint = <&asrc_out4_ep>; 828 }; 829 }; 830 831 xbar_asrc_in5_port: port@6b { 832 reg = <0x6b>; 833 834 xbar_asrc_in5_ep: endpoint { 835 remote-endpoint = <&asrc_in5_ep>; 836 }; 837 }; 838 839 port@6c { 840 reg = <0x6c>; 841 842 xbar_asrc_out5_ep: endpoint { 843 remote-endpoint = <&asrc_out5_ep>; 844 }; 845 }; 846 847 xbar_asrc_in6_port: port@6d { 848 reg = <0x6d>; 849 850 xbar_asrc_in6_ep: endpoint { 851 remote-endpoint = <&asrc_in6_ep>; 852 }; 853 }; 854 855 port@6e { 856 reg = <0x6e>; 857 858 xbar_asrc_out6_ep: endpoint { 859 remote-endpoint = <&asrc_out6_ep>; 860 }; 861 }; 862 863 xbar_asrc_in7_port: port@6f { 864 reg = <0x6f>; 865 866 xbar_asrc_in7_ep: endpoint { 867 remote-endpoint = <&asrc_in7_ep>; 868 }; 869 }; 870 871 xbar_ope1_in_port: port@70 { 872 reg = <0x70>; 873 874 xbar_ope1_in_ep: endpoint { 875 remote-endpoint = <&ope1_cif_in_ep>; 876 }; 877 }; 878 879 port@71 { 880 reg = <0x71>; 881 882 xbar_ope1_out_ep: endpoint { 883 remote-endpoint = <&ope1_cif_out_ep>; 884 }; 885 }; 886 }; 887 888 i2s@2901000 { 889 status = "okay"; 890 891 ports { 892 #address-cells = <1>; 893 #size-cells = <0>; 894 895 port@0 { 896 reg = <0>; 897 898 i2s1_cif: endpoint { 899 remote-endpoint = <&xbar_i2s1>; 900 }; 901 }; 902 903 i2s1_port: port@1 { 904 reg = <1>; 905 906 i2s1_dap: endpoint { 907 dai-format = "i2s"; 908 /* placeholder for external codec */ 909 }; 910 }; 911 }; 912 }; 913 914 i2s@2901100 { 915 status = "okay"; 916 917 ports { 918 #address-cells = <1>; 919 #size-cells = <0>; 920 921 port@0 { 922 reg = <0>; 923 924 i2s2_cif: endpoint { 925 remote-endpoint = <&xbar_i2s2>; 926 }; 927 }; 928 929 i2s2_port: port@1 { 930 reg = <1>; 931 932 i2s2_dap: endpoint { 933 dai-format = "i2s"; 934 /* placeholder for external codec */ 935 }; 936 }; 937 }; 938 }; 939 940 i2s@2901300 { 941 status = "okay"; 942 943 ports { 944 #address-cells = <1>; 945 #size-cells = <0>; 946 947 port@0 { 948 reg = <0>; 949 950 i2s4_cif: endpoint { 951 remote-endpoint = <&xbar_i2s4>; 952 }; 953 }; 954 955 i2s4_port: port@1 { 956 reg = <1>; 957 958 i2s4_dap: endpoint { 959 dai-format = "i2s"; 960 /* placeholder for external codec */ 961 }; 962 }; 963 }; 964 }; 965 966 i2s@2901500 { 967 status = "okay"; 968 969 ports { 970 #address-cells = <1>; 971 #size-cells = <0>; 972 973 port@0 { 974 reg = <0>; 975 976 i2s6_cif: endpoint { 977 remote-endpoint = <&xbar_i2s6>; 978 }; 979 }; 980 981 i2s6_port: port@1 { 982 reg = <1>; 983 984 i2s6_dap: endpoint { 985 dai-format = "i2s"; 986 /* placeholder for external codec */ 987 }; 988 }; 989 }; 990 }; 991 992 sfc@2902000 { 993 status = "okay"; 994 995 ports { 996 #address-cells = <1>; 997 #size-cells = <0>; 998 999 port@0 { 1000 reg = <0>; 1001 1002 sfc1_cif_in: endpoint { 1003 remote-endpoint = <&xbar_sfc1_in>; 1004 }; 1005 }; 1006 1007 sfc1_out_port: port@1 { 1008 reg = <1>; 1009 1010 sfc1_cif_out: endpoint { 1011 remote-endpoint = <&xbar_sfc1_out>; 1012 }; 1013 }; 1014 }; 1015 }; 1016 1017 sfc@2902200 { 1018 status = "okay"; 1019 1020 ports { 1021 #address-cells = <1>; 1022 #size-cells = <0>; 1023 1024 port@0 { 1025 reg = <0>; 1026 1027 sfc2_cif_in: endpoint { 1028 remote-endpoint = <&xbar_sfc2_in>; 1029 }; 1030 }; 1031 1032 sfc2_out_port: port@1 { 1033 reg = <1>; 1034 1035 sfc2_cif_out: endpoint { 1036 remote-endpoint = <&xbar_sfc2_out>; 1037 }; 1038 }; 1039 }; 1040 }; 1041 1042 sfc@2902400 { 1043 status = "okay"; 1044 1045 ports { 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 1049 port@0 { 1050 reg = <0>; 1051 1052 sfc3_cif_in: endpoint { 1053 remote-endpoint = <&xbar_sfc3_in>; 1054 }; 1055 }; 1056 1057 sfc3_out_port: port@1 { 1058 reg = <1>; 1059 1060 sfc3_cif_out: endpoint { 1061 remote-endpoint = <&xbar_sfc3_out>; 1062 }; 1063 }; 1064 }; 1065 }; 1066 1067 sfc@2902600 { 1068 status = "okay"; 1069 1070 ports { 1071 #address-cells = <1>; 1072 #size-cells = <0>; 1073 1074 port@0 { 1075 reg = <0>; 1076 1077 sfc4_cif_in: endpoint { 1078 remote-endpoint = <&xbar_sfc4_in>; 1079 }; 1080 }; 1081 1082 sfc4_out_port: port@1 { 1083 reg = <1>; 1084 1085 sfc4_cif_out: endpoint { 1086 remote-endpoint = <&xbar_sfc4_out>; 1087 }; 1088 }; 1089 }; 1090 }; 1091 1092 amx@2903000 { 1093 status = "okay"; 1094 1095 ports { 1096 #address-cells = <1>; 1097 #size-cells = <0>; 1098 1099 port@0 { 1100 reg = <0>; 1101 1102 amx1_in1: endpoint { 1103 remote-endpoint = <&xbar_amx1_in1>; 1104 }; 1105 }; 1106 1107 port@1 { 1108 reg = <1>; 1109 1110 amx1_in2: endpoint { 1111 remote-endpoint = <&xbar_amx1_in2>; 1112 }; 1113 }; 1114 1115 port@2 { 1116 reg = <2>; 1117 1118 amx1_in3: endpoint { 1119 remote-endpoint = <&xbar_amx1_in3>; 1120 }; 1121 }; 1122 1123 port@3 { 1124 reg = <3>; 1125 1126 amx1_in4: endpoint { 1127 remote-endpoint = <&xbar_amx1_in4>; 1128 }; 1129 }; 1130 1131 amx1_out_port: port@4 { 1132 reg = <4>; 1133 1134 amx1_out: endpoint { 1135 remote-endpoint = <&xbar_amx1_out>; 1136 }; 1137 }; 1138 }; 1139 }; 1140 1141 amx@2903100 { 1142 status = "okay"; 1143 1144 ports { 1145 #address-cells = <1>; 1146 #size-cells = <0>; 1147 1148 port@0 { 1149 reg = <0>; 1150 1151 amx2_in1: endpoint { 1152 remote-endpoint = <&xbar_amx2_in1>; 1153 }; 1154 }; 1155 1156 port@1 { 1157 reg = <1>; 1158 1159 amx2_in2: endpoint { 1160 remote-endpoint = <&xbar_amx2_in2>; 1161 }; 1162 }; 1163 1164 port@2 { 1165 reg = <2>; 1166 1167 amx2_in3: endpoint { 1168 remote-endpoint = <&xbar_amx2_in3>; 1169 }; 1170 }; 1171 1172 port@3 { 1173 reg = <3>; 1174 1175 amx2_in4: endpoint { 1176 remote-endpoint = <&xbar_amx2_in4>; 1177 }; 1178 }; 1179 1180 amx2_out_port: port@4 { 1181 reg = <4>; 1182 1183 amx2_out: endpoint { 1184 remote-endpoint = <&xbar_amx2_out>; 1185 }; 1186 }; 1187 }; 1188 }; 1189 1190 amx@2903200 { 1191 status = "okay"; 1192 1193 ports { 1194 #address-cells = <1>; 1195 #size-cells = <0>; 1196 1197 port@0 { 1198 reg = <0>; 1199 1200 amx3_in1: endpoint { 1201 remote-endpoint = <&xbar_amx3_in1>; 1202 }; 1203 }; 1204 1205 port@1 { 1206 reg = <1>; 1207 1208 amx3_in2: endpoint { 1209 remote-endpoint = <&xbar_amx3_in2>; 1210 }; 1211 }; 1212 1213 port@2 { 1214 reg = <2>; 1215 1216 amx3_in3: endpoint { 1217 remote-endpoint = <&xbar_amx3_in3>; 1218 }; 1219 }; 1220 1221 port@3 { 1222 reg = <3>; 1223 1224 amx3_in4: endpoint { 1225 remote-endpoint = <&xbar_amx3_in4>; 1226 }; 1227 }; 1228 1229 amx3_out_port: port@4 { 1230 reg = <4>; 1231 1232 amx3_out: endpoint { 1233 remote-endpoint = <&xbar_amx3_out>; 1234 }; 1235 }; 1236 }; 1237 }; 1238 1239 amx@2903300 { 1240 status = "okay"; 1241 1242 ports { 1243 #address-cells = <1>; 1244 #size-cells = <0>; 1245 1246 port@0 { 1247 reg = <0>; 1248 1249 amx4_in1: endpoint { 1250 remote-endpoint = <&xbar_amx4_in1>; 1251 }; 1252 }; 1253 1254 port@1 { 1255 reg = <1>; 1256 1257 amx4_in2: endpoint { 1258 remote-endpoint = <&xbar_amx4_in2>; 1259 }; 1260 }; 1261 1262 port@2 { 1263 reg = <2>; 1264 1265 amx4_in3: endpoint { 1266 remote-endpoint = <&xbar_amx4_in3>; 1267 }; 1268 }; 1269 1270 port@3 { 1271 reg = <3>; 1272 1273 amx4_in4: endpoint { 1274 remote-endpoint = <&xbar_amx4_in4>; 1275 }; 1276 }; 1277 1278 amx4_out_port: port@4 { 1279 reg = <4>; 1280 1281 amx4_out: endpoint { 1282 remote-endpoint = <&xbar_amx4_out>; 1283 }; 1284 }; 1285 }; 1286 }; 1287 1288 adx@2903800 { 1289 status = "okay"; 1290 1291 ports { 1292 #address-cells = <1>; 1293 #size-cells = <0>; 1294 1295 port@0 { 1296 reg = <0>; 1297 1298 adx1_in: endpoint { 1299 remote-endpoint = <&xbar_adx1_in>; 1300 }; 1301 }; 1302 1303 adx1_out1_port: port@1 { 1304 reg = <1>; 1305 1306 adx1_out1: endpoint { 1307 remote-endpoint = <&xbar_adx1_out1>; 1308 }; 1309 }; 1310 1311 adx1_out2_port: port@2 { 1312 reg = <2>; 1313 1314 adx1_out2: endpoint { 1315 remote-endpoint = <&xbar_adx1_out2>; 1316 }; 1317 }; 1318 1319 adx1_out3_port: port@3 { 1320 reg = <3>; 1321 1322 adx1_out3: endpoint { 1323 remote-endpoint = <&xbar_adx1_out3>; 1324 }; 1325 }; 1326 1327 adx1_out4_port: port@4 { 1328 reg = <4>; 1329 1330 adx1_out4: endpoint { 1331 remote-endpoint = <&xbar_adx1_out4>; 1332 }; 1333 }; 1334 }; 1335 }; 1336 1337 adx@2903900 { 1338 status = "okay"; 1339 1340 ports { 1341 #address-cells = <1>; 1342 #size-cells = <0>; 1343 1344 port@0 { 1345 reg = <0>; 1346 1347 adx2_in: endpoint { 1348 remote-endpoint = <&xbar_adx2_in>; 1349 }; 1350 }; 1351 1352 adx2_out1_port: port@1 { 1353 reg = <1>; 1354 1355 adx2_out1: endpoint { 1356 remote-endpoint = <&xbar_adx2_out1>; 1357 }; 1358 }; 1359 1360 adx2_out2_port: port@2 { 1361 reg = <2>; 1362 1363 adx2_out2: endpoint { 1364 remote-endpoint = <&xbar_adx2_out2>; 1365 }; 1366 }; 1367 1368 adx2_out3_port: port@3 { 1369 reg = <3>; 1370 1371 adx2_out3: endpoint { 1372 remote-endpoint = <&xbar_adx2_out3>; 1373 }; 1374 }; 1375 1376 adx2_out4_port: port@4 { 1377 reg = <4>; 1378 1379 adx2_out4: endpoint { 1380 remote-endpoint = <&xbar_adx2_out4>; 1381 }; 1382 }; 1383 }; 1384 }; 1385 1386 adx@2903a00 { 1387 status = "okay"; 1388 1389 ports { 1390 #address-cells = <1>; 1391 #size-cells = <0>; 1392 1393 port@0 { 1394 reg = <0>; 1395 1396 adx3_in: endpoint { 1397 remote-endpoint = <&xbar_adx3_in>; 1398 }; 1399 }; 1400 1401 adx3_out1_port: port@1 { 1402 reg = <1>; 1403 1404 adx3_out1: endpoint { 1405 remote-endpoint = <&xbar_adx3_out1>; 1406 }; 1407 }; 1408 1409 adx3_out2_port: port@2 { 1410 reg = <2>; 1411 1412 adx3_out2: endpoint { 1413 remote-endpoint = <&xbar_adx3_out2>; 1414 }; 1415 }; 1416 1417 adx3_out3_port: port@3 { 1418 reg = <3>; 1419 1420 adx3_out3: endpoint { 1421 remote-endpoint = <&xbar_adx3_out3>; 1422 }; 1423 }; 1424 1425 adx3_out4_port: port@4 { 1426 reg = <4>; 1427 1428 adx3_out4: endpoint { 1429 remote-endpoint = <&xbar_adx3_out4>; 1430 }; 1431 }; 1432 }; 1433 }; 1434 1435 adx@2903b00 { 1436 status = "okay"; 1437 1438 ports { 1439 #address-cells = <1>; 1440 #size-cells = <0>; 1441 1442 port@0 { 1443 reg = <0>; 1444 1445 adx4_in: endpoint { 1446 remote-endpoint = <&xbar_adx4_in>; 1447 }; 1448 }; 1449 1450 adx4_out1_port: port@1 { 1451 reg = <1>; 1452 1453 adx4_out1: endpoint { 1454 remote-endpoint = <&xbar_adx4_out1>; 1455 }; 1456 }; 1457 1458 adx4_out2_port: port@2 { 1459 reg = <2>; 1460 1461 adx4_out2: endpoint { 1462 remote-endpoint = <&xbar_adx4_out2>; 1463 }; 1464 }; 1465 1466 adx4_out3_port: port@3 { 1467 reg = <3>; 1468 1469 adx4_out3: endpoint { 1470 remote-endpoint = <&xbar_adx4_out3>; 1471 }; 1472 }; 1473 1474 adx4_out4_port: port@4 { 1475 reg = <4>; 1476 1477 adx4_out4: endpoint { 1478 remote-endpoint = <&xbar_adx4_out4>; 1479 }; 1480 }; 1481 }; 1482 }; 1483 1484 dmic@2904200 { 1485 status = "okay"; 1486 1487 ports { 1488 #address-cells = <1>; 1489 #size-cells = <0>; 1490 1491 port@0 { 1492 reg = <0>; 1493 1494 dmic3_cif: endpoint { 1495 remote-endpoint = <&xbar_dmic3>; 1496 }; 1497 }; 1498 1499 dmic3_port: port@1 { 1500 reg = <1>; 1501 1502 dmic3_dap: endpoint { 1503 /* placeholder for external codec */ 1504 }; 1505 }; 1506 }; 1507 }; 1508 1509 processing-engine@2908000 { 1510 status = "okay"; 1511 1512 ports { 1513 #address-cells = <1>; 1514 #size-cells = <0>; 1515 1516 port@0 { 1517 reg = <0x0>; 1518 1519 ope1_cif_in_ep: endpoint { 1520 remote-endpoint = <&xbar_ope1_in_ep>; 1521 }; 1522 }; 1523 1524 ope1_out_port: port@1 { 1525 reg = <0x1>; 1526 1527 ope1_cif_out_ep: endpoint { 1528 remote-endpoint = <&xbar_ope1_out_ep>; 1529 }; 1530 }; 1531 }; 1532 }; 1533 1534 mvc@290a000 { 1535 status = "okay"; 1536 1537 ports { 1538 #address-cells = <1>; 1539 #size-cells = <0>; 1540 1541 port@0 { 1542 reg = <0>; 1543 1544 mvc1_cif_in: endpoint { 1545 remote-endpoint = <&xbar_mvc1_in>; 1546 }; 1547 }; 1548 1549 mvc1_out_port: port@1 { 1550 reg = <1>; 1551 1552 mvc1_cif_out: endpoint { 1553 remote-endpoint = <&xbar_mvc1_out>; 1554 }; 1555 }; 1556 }; 1557 }; 1558 1559 mvc@290a200 { 1560 status = "okay"; 1561 1562 ports { 1563 #address-cells = <1>; 1564 #size-cells = <0>; 1565 1566 port@0 { 1567 reg = <0>; 1568 1569 mvc2_cif_in: endpoint { 1570 remote-endpoint = <&xbar_mvc2_in>; 1571 }; 1572 }; 1573 1574 mvc2_out_port: port@1 { 1575 reg = <1>; 1576 1577 mvc2_cif_out: endpoint { 1578 remote-endpoint = <&xbar_mvc2_out>; 1579 }; 1580 }; 1581 }; 1582 }; 1583 1584 amixer@290bb00 { 1585 status = "okay"; 1586 1587 ports { 1588 #address-cells = <1>; 1589 #size-cells = <0>; 1590 1591 port@0 { 1592 reg = <0x0>; 1593 1594 mix_in1: endpoint { 1595 remote-endpoint = <&xbar_mix_in1>; 1596 }; 1597 }; 1598 1599 port@1 { 1600 reg = <0x1>; 1601 1602 mix_in2: endpoint { 1603 remote-endpoint = <&xbar_mix_in2>; 1604 }; 1605 }; 1606 1607 port@2 { 1608 reg = <0x2>; 1609 1610 mix_in3: endpoint { 1611 remote-endpoint = <&xbar_mix_in3>; 1612 }; 1613 }; 1614 1615 port@3 { 1616 reg = <0x3>; 1617 1618 mix_in4: endpoint { 1619 remote-endpoint = <&xbar_mix_in4>; 1620 }; 1621 }; 1622 1623 port@4 { 1624 reg = <0x4>; 1625 1626 mix_in5: endpoint { 1627 remote-endpoint = <&xbar_mix_in5>; 1628 }; 1629 }; 1630 1631 port@5 { 1632 reg = <0x5>; 1633 1634 mix_in6: endpoint { 1635 remote-endpoint = <&xbar_mix_in6>; 1636 }; 1637 }; 1638 1639 port@6 { 1640 reg = <0x6>; 1641 1642 mix_in7: endpoint { 1643 remote-endpoint = <&xbar_mix_in7>; 1644 }; 1645 }; 1646 1647 port@7 { 1648 reg = <0x7>; 1649 1650 mix_in8: endpoint { 1651 remote-endpoint = <&xbar_mix_in8>; 1652 }; 1653 }; 1654 1655 port@8 { 1656 reg = <0x8>; 1657 1658 mix_in9: endpoint { 1659 remote-endpoint = <&xbar_mix_in9>; 1660 }; 1661 }; 1662 1663 port@9 { 1664 reg = <0x9>; 1665 1666 mix_in10: endpoint { 1667 remote-endpoint = <&xbar_mix_in10>; 1668 }; 1669 }; 1670 1671 mix_out1_port: port@a { 1672 reg = <0xa>; 1673 1674 mix_out1: endpoint { 1675 remote-endpoint = <&xbar_mix_out1>; 1676 }; 1677 }; 1678 1679 mix_out2_port: port@b { 1680 reg = <0xb>; 1681 1682 mix_out2: endpoint { 1683 remote-endpoint = <&xbar_mix_out2>; 1684 }; 1685 }; 1686 1687 mix_out3_port: port@c { 1688 reg = <0xc>; 1689 1690 mix_out3: endpoint { 1691 remote-endpoint = <&xbar_mix_out3>; 1692 }; 1693 }; 1694 1695 mix_out4_port: port@d { 1696 reg = <0xd>; 1697 1698 mix_out4: endpoint { 1699 remote-endpoint = <&xbar_mix_out4>; 1700 }; 1701 }; 1702 1703 mix_out5_port: port@e { 1704 reg = <0xe>; 1705 1706 mix_out5: endpoint { 1707 remote-endpoint = <&xbar_mix_out5>; 1708 }; 1709 }; 1710 }; 1711 }; 1712 1713 admaif@290f000 { 1714 status = "okay"; 1715 1716 ports { 1717 #address-cells = <1>; 1718 #size-cells = <0>; 1719 1720 admaif0_port: port@0 { 1721 reg = <0x0>; 1722 1723 admaif0: endpoint { 1724 remote-endpoint = <&xbar_admaif0>; 1725 }; 1726 }; 1727 1728 admaif1_port: port@1 { 1729 reg = <0x1>; 1730 1731 admaif1: endpoint { 1732 remote-endpoint = <&xbar_admaif1>; 1733 }; 1734 }; 1735 1736 admaif2_port: port@2 { 1737 reg = <0x2>; 1738 1739 admaif2: endpoint { 1740 remote-endpoint = <&xbar_admaif2>; 1741 }; 1742 }; 1743 1744 admaif3_port: port@3 { 1745 reg = <0x3>; 1746 1747 admaif3: endpoint { 1748 remote-endpoint = <&xbar_admaif3>; 1749 }; 1750 }; 1751 1752 admaif4_port: port@4 { 1753 reg = <0x4>; 1754 1755 admaif4: endpoint { 1756 remote-endpoint = <&xbar_admaif4>; 1757 }; 1758 }; 1759 1760 admaif5_port: port@5 { 1761 reg = <0x5>; 1762 1763 admaif5: endpoint { 1764 remote-endpoint = <&xbar_admaif5>; 1765 }; 1766 }; 1767 1768 admaif6_port: port@6 { 1769 reg = <0x6>; 1770 1771 admaif6: endpoint { 1772 remote-endpoint = <&xbar_admaif6>; 1773 }; 1774 }; 1775 1776 admaif7_port: port@7 { 1777 reg = <0x7>; 1778 1779 admaif7: endpoint { 1780 remote-endpoint = <&xbar_admaif7>; 1781 }; 1782 }; 1783 1784 admaif8_port: port@8 { 1785 reg = <0x8>; 1786 1787 admaif8: endpoint { 1788 remote-endpoint = <&xbar_admaif8>; 1789 }; 1790 }; 1791 1792 admaif9_port: port@9 { 1793 reg = <0x9>; 1794 1795 admaif9: endpoint { 1796 remote-endpoint = <&xbar_admaif9>; 1797 }; 1798 }; 1799 1800 admaif10_port: port@a { 1801 reg = <0xa>; 1802 1803 admaif10: endpoint { 1804 remote-endpoint = <&xbar_admaif10>; 1805 }; 1806 }; 1807 1808 admaif11_port: port@b { 1809 reg = <0xb>; 1810 1811 admaif11: endpoint { 1812 remote-endpoint = <&xbar_admaif11>; 1813 }; 1814 }; 1815 1816 admaif12_port: port@c { 1817 reg = <0xc>; 1818 1819 admaif12: endpoint { 1820 remote-endpoint = <&xbar_admaif12>; 1821 }; 1822 }; 1823 1824 admaif13_port: port@d { 1825 reg = <0xd>; 1826 1827 admaif13: endpoint { 1828 remote-endpoint = <&xbar_admaif13>; 1829 }; 1830 }; 1831 1832 admaif14_port: port@e { 1833 reg = <0xe>; 1834 1835 admaif14: endpoint { 1836 remote-endpoint = <&xbar_admaif14>; 1837 }; 1838 }; 1839 1840 admaif15_port: port@f { 1841 reg = <0xf>; 1842 1843 admaif15: endpoint { 1844 remote-endpoint = <&xbar_admaif15>; 1845 }; 1846 }; 1847 1848 admaif16_port: port@10 { 1849 reg = <0x10>; 1850 1851 admaif16: endpoint { 1852 remote-endpoint = <&xbar_admaif16>; 1853 }; 1854 }; 1855 1856 admaif17_port: port@11 { 1857 reg = <0x11>; 1858 1859 admaif17: endpoint { 1860 remote-endpoint = <&xbar_admaif17>; 1861 }; 1862 }; 1863 1864 admaif18_port: port@12 { 1865 reg = <0x12>; 1866 1867 admaif18: endpoint { 1868 remote-endpoint = <&xbar_admaif18>; 1869 }; 1870 }; 1871 1872 admaif19_port: port@13 { 1873 reg = <0x13>; 1874 1875 admaif19: endpoint { 1876 remote-endpoint = <&xbar_admaif19>; 1877 }; 1878 }; 1879 }; 1880 }; 1881 1882 asrc@2910000 { 1883 status = "okay"; 1884 1885 ports { 1886 #address-cells = <1>; 1887 #size-cells = <0>; 1888 1889 port@0 { 1890 reg = <0x0>; 1891 1892 asrc_in1_ep: endpoint { 1893 remote-endpoint = <&xbar_asrc_in1_ep>; 1894 }; 1895 }; 1896 1897 port@1 { 1898 reg = <0x1>; 1899 1900 asrc_in2_ep: endpoint { 1901 remote-endpoint = <&xbar_asrc_in2_ep>; 1902 }; 1903 }; 1904 1905 port@2 { 1906 reg = <0x2>; 1907 1908 asrc_in3_ep: endpoint { 1909 remote-endpoint = <&xbar_asrc_in3_ep>; 1910 }; 1911 }; 1912 1913 port@3 { 1914 reg = <0x3>; 1915 1916 asrc_in4_ep: endpoint { 1917 remote-endpoint = <&xbar_asrc_in4_ep>; 1918 }; 1919 }; 1920 1921 port@4 { 1922 reg = <0x4>; 1923 1924 asrc_in5_ep: endpoint { 1925 remote-endpoint = <&xbar_asrc_in5_ep>; 1926 }; 1927 }; 1928 1929 port@5 { 1930 reg = <0x5>; 1931 1932 asrc_in6_ep: endpoint { 1933 remote-endpoint = <&xbar_asrc_in6_ep>; 1934 }; 1935 }; 1936 1937 port@6 { 1938 reg = <0x6>; 1939 1940 asrc_in7_ep: endpoint { 1941 remote-endpoint = <&xbar_asrc_in7_ep>; 1942 }; 1943 }; 1944 1945 asrc_out1_port: port@7 { 1946 reg = <0x7>; 1947 1948 asrc_out1_ep: endpoint { 1949 remote-endpoint = <&xbar_asrc_out1_ep>; 1950 }; 1951 }; 1952 1953 asrc_out2_port: port@8 { 1954 reg = <0x8>; 1955 1956 asrc_out2_ep: endpoint { 1957 remote-endpoint = <&xbar_asrc_out2_ep>; 1958 }; 1959 }; 1960 1961 asrc_out3_port: port@9 { 1962 reg = <0x9>; 1963 1964 asrc_out3_ep: endpoint { 1965 remote-endpoint = <&xbar_asrc_out3_ep>; 1966 }; 1967 }; 1968 1969 asrc_out4_port: port@a { 1970 reg = <0xa>; 1971 1972 asrc_out4_ep: endpoint { 1973 remote-endpoint = <&xbar_asrc_out4_ep>; 1974 }; 1975 }; 1976 1977 asrc_out5_port: port@b { 1978 reg = <0xb>; 1979 1980 asrc_out5_ep: endpoint { 1981 remote-endpoint = <&xbar_asrc_out5_ep>; 1982 }; 1983 }; 1984 1985 asrc_out6_port: port@c { 1986 reg = <0xc>; 1987 1988 asrc_out6_ep: endpoint { 1989 remote-endpoint = <&xbar_asrc_out6_ep>; 1990 }; 1991 }; 1992 }; 1993 }; 1994 }; 1995 1996 dma-controller@2930000 { 1997 status = "okay"; 1998 }; 1999 2000 interrupt-controller@2a40000 { 2001 status = "okay"; 2002 }; 2003 }; 2004 2005 serial@3100000 { 2006 compatible = "nvidia,tegra194-hsuart"; 2007 status = "okay"; 2008 }; 2009 2010 serial@31d0000 { 2011 current-speed = <115200>; 2012 status = "okay"; 2013 }; 2014 2015 pwm@32a0000 { 2016 assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>; 2017 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; 2018 status = "okay"; 2019 }; 2020 2021 hda@3510000 { 2022 nvidia,model = "NVIDIA Jetson AGX Orin HDA"; 2023 status = "okay"; 2024 }; 2025 }; 2026 2027 chosen { 2028 bootargs = "console=ttyTCU0,115200n8"; 2029 stdout-path = "serial0:115200n8"; 2030 }; 2031 2032 bus@0 { 2033 ethernet@6800000 { 2034 status = "okay"; 2035 2036 phy-handle = <&mgbe0_phy>; 2037 phy-mode = "usxgmii"; 2038 2039 mdio { 2040 #address-cells = <1>; 2041 #size-cells = <0>; 2042 2043 mgbe0_phy: phy@0 { 2044 compatible = "ethernet-phy-ieee802.3-c45"; 2045 reg = <0x0>; 2046 2047 #phy-cells = <0>; 2048 }; 2049 }; 2050 }; 2051 }; 2052 2053 gpio-keys { 2054 compatible = "gpio-keys"; 2055 status = "okay"; 2056 2057 key-force-recovery { 2058 label = "Force Recovery"; 2059 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>; 2060 linux,input-type = <EV_KEY>; 2061 linux,code = <BTN_1>; 2062 }; 2063 2064 key-power { 2065 label = "Power"; 2066 gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>; 2067 linux,input-type = <EV_KEY>; 2068 linux,code = <KEY_POWER>; 2069 wakeup-event-action = <EV_ACT_ASSERTED>; 2070 wakeup-source; 2071 }; 2072 2073 key-suspend { 2074 label = "Suspend"; 2075 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>; 2076 linux,input-type = <EV_KEY>; 2077 linux,code = <KEY_SLEEP>; 2078 }; 2079 }; 2080 2081 serial { 2082 status = "okay"; 2083 }; 2084 2085 sound { 2086 status = "okay"; 2087 2088 compatible = "nvidia,tegra186-audio-graph-card"; 2089 2090 dais = /* ADMAIF (FE) Ports */ 2091 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 2092 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, 2093 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, 2094 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, 2095 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, 2096 /* XBAR Ports */ 2097 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>, 2098 <&xbar_i2s6_port>, <&xbar_dmic3_port>, 2099 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 2100 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 2101 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 2102 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 2103 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 2104 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 2105 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 2106 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, 2107 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, 2108 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, 2109 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, 2110 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 2111 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, 2112 <&xbar_mix_in1_port>, <&xbar_mix_in2_port>, 2113 <&xbar_mix_in3_port>, <&xbar_mix_in4_port>, 2114 <&xbar_mix_in5_port>, <&xbar_mix_in6_port>, 2115 <&xbar_mix_in7_port>, <&xbar_mix_in8_port>, 2116 <&xbar_mix_in9_port>, <&xbar_mix_in10_port>, 2117 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>, 2118 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2119 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2120 <&xbar_asrc_in7_port>, 2121 <&xbar_ope1_in_port>, 2122 /* HW accelerators */ 2123 <&sfc1_out_port>, <&sfc2_out_port>, 2124 <&sfc3_out_port>, <&sfc4_out_port>, 2125 <&mvc1_out_port>, <&mvc2_out_port>, 2126 <&amx1_out_port>, <&amx2_out_port>, 2127 <&amx3_out_port>, <&amx4_out_port>, 2128 <&adx1_out1_port>, <&adx1_out2_port>, 2129 <&adx1_out3_port>, <&adx1_out4_port>, 2130 <&adx2_out1_port>, <&adx2_out2_port>, 2131 <&adx2_out3_port>, <&adx2_out4_port>, 2132 <&adx3_out1_port>, <&adx3_out2_port>, 2133 <&adx3_out3_port>, <&adx3_out4_port>, 2134 <&adx4_out1_port>, <&adx4_out2_port>, 2135 <&adx4_out3_port>, <&adx4_out4_port>, 2136 <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>, 2137 <&mix_out4_port>, <&mix_out5_port>, 2138 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2139 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2140 <&ope1_out_port>, 2141 /* BE I/O Ports */ 2142 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>, 2143 <&dmic3_port>; 2144 2145 label = "NVIDIA Jetson AGX Orin APE"; 2146 }; 2147 2148 pcie@14100000 { 2149 status = "okay"; 2150 2151 vddio-pex-ctl-supply = <&vdd_1v8_ao>; 2152 2153 phys = <&p2u_hsio_3>; 2154 phy-names = "p2u-0"; 2155 }; 2156 2157 pcie@14160000 { 2158 status = "okay"; 2159 2160 vddio-pex-ctl-supply = <&vdd_1v8_ao>; 2161 2162 phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, 2163 <&p2u_hsio_7>; 2164 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; 2165 }; 2166 2167 pcie@141a0000 { 2168 status = "okay"; 2169 2170 vddio-pex-ctl-supply = <&vdd_1v8_ls>; 2171 vpcie3v3-supply = <&vdd_3v3_pcie>; 2172 vpcie12v-supply = <&vdd_12v_pcie>; 2173 2174 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2175 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2176 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2177 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2178 "p2u-5", "p2u-6", "p2u-7"; 2179 }; 2180 2181 pcie-ep@141a0000 { 2182 status = "disabled"; 2183 2184 vddio-pex-ctl-supply = <&vdd_1v8_ls>; 2185 2186 reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>; 2187 2188 nvidia,refclk-select-gpios = <&gpio_aon 2189 TEGRA234_AON_GPIO(AA, 4) 2190 GPIO_ACTIVE_HIGH>; 2191 2192 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2193 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2194 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2195 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2196 "p2u-5", "p2u-6", "p2u-7"; 2197 }; 2198 2199 pwm-fan { 2200 compatible = "pwm-fan"; 2201 pwms = <&pwm3 0 45334>; 2202 2203 cooling-levels = <0 95 178 255>; 2204 #cooling-cells = <2>; 2205 }; 2206}; 2207