1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/linux-event-codes.h> 5#include <dt-bindings/input/gpio-keys.h> 6 7#include "tegra234-p3701-0000.dtsi" 8#include "tegra234-p3737-0000.dtsi" 9 10/ { 11 model = "NVIDIA Jetson AGX Orin Developer Kit"; 12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234"; 13 14 aliases { 15 mmc3 = "/bus@0/mmc@3460000"; 16 serial0 = &tcu; 17 serial1 = &uarta; 18 }; 19 20 chosen { 21 bootargs = "console=ttyTCU0,115200n8"; 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 bus@0 { 26 aconnect@2900000 { 27 status = "okay"; 28 29 ahub@2900800 { 30 status = "okay"; 31 32 i2s@2901000 { 33 status = "okay"; 34 35 ports { 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 port@0 { 40 reg = <0>; 41 42 i2s1_cif: endpoint { 43 remote-endpoint = <&xbar_i2s1>; 44 }; 45 }; 46 47 i2s1_port: port@1 { 48 reg = <1>; 49 50 i2s1_dap: endpoint { 51 dai-format = "i2s"; 52 /* placeholder for external codec */ 53 }; 54 }; 55 }; 56 }; 57 58 i2s@2901100 { 59 status = "okay"; 60 61 ports { 62 #address-cells = <1>; 63 #size-cells = <0>; 64 65 port@0 { 66 reg = <0>; 67 68 i2s2_cif: endpoint { 69 remote-endpoint = <&xbar_i2s2>; 70 }; 71 }; 72 73 i2s2_port: port@1 { 74 reg = <1>; 75 76 i2s2_dap: endpoint { 77 dai-format = "i2s"; 78 /* placeholder for external codec */ 79 }; 80 }; 81 }; 82 }; 83 84 i2s@2901300 { 85 status = "okay"; 86 87 ports { 88 #address-cells = <1>; 89 #size-cells = <0>; 90 91 port@0 { 92 reg = <0>; 93 94 i2s4_cif: endpoint { 95 remote-endpoint = <&xbar_i2s4>; 96 }; 97 }; 98 99 i2s4_port: port@1 { 100 reg = <1>; 101 102 i2s4_dap: endpoint { 103 dai-format = "i2s"; 104 /* placeholder for external codec */ 105 }; 106 }; 107 }; 108 }; 109 110 i2s@2901500 { 111 status = "okay"; 112 113 ports { 114 #address-cells = <1>; 115 #size-cells = <0>; 116 117 port@0 { 118 reg = <0>; 119 120 i2s6_cif: endpoint { 121 remote-endpoint = <&xbar_i2s6>; 122 }; 123 }; 124 125 i2s6_port: port@1 { 126 reg = <1>; 127 128 i2s6_dap: endpoint { 129 dai-format = "i2s"; 130 /* placeholder for external codec */ 131 }; 132 }; 133 }; 134 }; 135 136 sfc@2902000 { 137 status = "okay"; 138 139 ports { 140 #address-cells = <1>; 141 #size-cells = <0>; 142 143 port@0 { 144 reg = <0>; 145 146 sfc1_cif_in: endpoint { 147 remote-endpoint = <&xbar_sfc1_in>; 148 }; 149 }; 150 151 sfc1_out_port: port@1 { 152 reg = <1>; 153 154 sfc1_cif_out: endpoint { 155 remote-endpoint = <&xbar_sfc1_out>; 156 }; 157 }; 158 }; 159 }; 160 161 sfc@2902200 { 162 status = "okay"; 163 164 ports { 165 #address-cells = <1>; 166 #size-cells = <0>; 167 168 port@0 { 169 reg = <0>; 170 171 sfc2_cif_in: endpoint { 172 remote-endpoint = <&xbar_sfc2_in>; 173 }; 174 }; 175 176 sfc2_out_port: port@1 { 177 reg = <1>; 178 179 sfc2_cif_out: endpoint { 180 remote-endpoint = <&xbar_sfc2_out>; 181 }; 182 }; 183 }; 184 }; 185 186 sfc@2902400 { 187 status = "okay"; 188 189 ports { 190 #address-cells = <1>; 191 #size-cells = <0>; 192 193 port@0 { 194 reg = <0>; 195 196 sfc3_cif_in: endpoint { 197 remote-endpoint = <&xbar_sfc3_in>; 198 }; 199 }; 200 201 sfc3_out_port: port@1 { 202 reg = <1>; 203 204 sfc3_cif_out: endpoint { 205 remote-endpoint = <&xbar_sfc3_out>; 206 }; 207 }; 208 }; 209 }; 210 211 sfc@2902600 { 212 status = "okay"; 213 214 ports { 215 #address-cells = <1>; 216 #size-cells = <0>; 217 218 port@0 { 219 reg = <0>; 220 221 sfc4_cif_in: endpoint { 222 remote-endpoint = <&xbar_sfc4_in>; 223 }; 224 }; 225 226 sfc4_out_port: port@1 { 227 reg = <1>; 228 229 sfc4_cif_out: endpoint { 230 remote-endpoint = <&xbar_sfc4_out>; 231 }; 232 }; 233 }; 234 }; 235 236 amx@2903000 { 237 status = "okay"; 238 239 ports { 240 #address-cells = <1>; 241 #size-cells = <0>; 242 243 port@0 { 244 reg = <0>; 245 246 amx1_in1: endpoint { 247 remote-endpoint = <&xbar_amx1_in1>; 248 }; 249 }; 250 251 port@1 { 252 reg = <1>; 253 254 amx1_in2: endpoint { 255 remote-endpoint = <&xbar_amx1_in2>; 256 }; 257 }; 258 259 port@2 { 260 reg = <2>; 261 262 amx1_in3: endpoint { 263 remote-endpoint = <&xbar_amx1_in3>; 264 }; 265 }; 266 267 port@3 { 268 reg = <3>; 269 270 amx1_in4: endpoint { 271 remote-endpoint = <&xbar_amx1_in4>; 272 }; 273 }; 274 275 amx1_out_port: port@4 { 276 reg = <4>; 277 278 amx1_out: endpoint { 279 remote-endpoint = <&xbar_amx1_out>; 280 }; 281 }; 282 }; 283 }; 284 285 amx@2903100 { 286 status = "okay"; 287 288 ports { 289 #address-cells = <1>; 290 #size-cells = <0>; 291 292 port@0 { 293 reg = <0>; 294 295 amx2_in1: endpoint { 296 remote-endpoint = <&xbar_amx2_in1>; 297 }; 298 }; 299 300 port@1 { 301 reg = <1>; 302 303 amx2_in2: endpoint { 304 remote-endpoint = <&xbar_amx2_in2>; 305 }; 306 }; 307 308 port@2 { 309 reg = <2>; 310 311 amx2_in3: endpoint { 312 remote-endpoint = <&xbar_amx2_in3>; 313 }; 314 }; 315 316 port@3 { 317 reg = <3>; 318 319 amx2_in4: endpoint { 320 remote-endpoint = <&xbar_amx2_in4>; 321 }; 322 }; 323 324 amx2_out_port: port@4 { 325 reg = <4>; 326 327 amx2_out: endpoint { 328 remote-endpoint = <&xbar_amx2_out>; 329 }; 330 }; 331 }; 332 }; 333 334 amx@2903200 { 335 status = "okay"; 336 337 ports { 338 #address-cells = <1>; 339 #size-cells = <0>; 340 341 port@0 { 342 reg = <0>; 343 344 amx3_in1: endpoint { 345 remote-endpoint = <&xbar_amx3_in1>; 346 }; 347 }; 348 349 port@1 { 350 reg = <1>; 351 352 amx3_in2: endpoint { 353 remote-endpoint = <&xbar_amx3_in2>; 354 }; 355 }; 356 357 port@2 { 358 reg = <2>; 359 360 amx3_in3: endpoint { 361 remote-endpoint = <&xbar_amx3_in3>; 362 }; 363 }; 364 365 port@3 { 366 reg = <3>; 367 368 amx3_in4: endpoint { 369 remote-endpoint = <&xbar_amx3_in4>; 370 }; 371 }; 372 373 amx3_out_port: port@4 { 374 reg = <4>; 375 376 amx3_out: endpoint { 377 remote-endpoint = <&xbar_amx3_out>; 378 }; 379 }; 380 }; 381 }; 382 383 amx@2903300 { 384 status = "okay"; 385 386 ports { 387 #address-cells = <1>; 388 #size-cells = <0>; 389 390 port@0 { 391 reg = <0>; 392 393 amx4_in1: endpoint { 394 remote-endpoint = <&xbar_amx4_in1>; 395 }; 396 }; 397 398 port@1 { 399 reg = <1>; 400 401 amx4_in2: endpoint { 402 remote-endpoint = <&xbar_amx4_in2>; 403 }; 404 }; 405 406 port@2 { 407 reg = <2>; 408 409 amx4_in3: endpoint { 410 remote-endpoint = <&xbar_amx4_in3>; 411 }; 412 }; 413 414 port@3 { 415 reg = <3>; 416 417 amx4_in4: endpoint { 418 remote-endpoint = <&xbar_amx4_in4>; 419 }; 420 }; 421 422 amx4_out_port: port@4 { 423 reg = <4>; 424 425 amx4_out: endpoint { 426 remote-endpoint = <&xbar_amx4_out>; 427 }; 428 }; 429 }; 430 }; 431 432 adx@2903800 { 433 status = "okay"; 434 435 ports { 436 #address-cells = <1>; 437 #size-cells = <0>; 438 439 port@0 { 440 reg = <0>; 441 442 adx1_in: endpoint { 443 remote-endpoint = <&xbar_adx1_in>; 444 }; 445 }; 446 447 adx1_out1_port: port@1 { 448 reg = <1>; 449 450 adx1_out1: endpoint { 451 remote-endpoint = <&xbar_adx1_out1>; 452 }; 453 }; 454 455 adx1_out2_port: port@2 { 456 reg = <2>; 457 458 adx1_out2: endpoint { 459 remote-endpoint = <&xbar_adx1_out2>; 460 }; 461 }; 462 463 adx1_out3_port: port@3 { 464 reg = <3>; 465 466 adx1_out3: endpoint { 467 remote-endpoint = <&xbar_adx1_out3>; 468 }; 469 }; 470 471 adx1_out4_port: port@4 { 472 reg = <4>; 473 474 adx1_out4: endpoint { 475 remote-endpoint = <&xbar_adx1_out4>; 476 }; 477 }; 478 }; 479 }; 480 481 adx@2903900 { 482 status = "okay"; 483 484 ports { 485 #address-cells = <1>; 486 #size-cells = <0>; 487 488 port@0 { 489 reg = <0>; 490 491 adx2_in: endpoint { 492 remote-endpoint = <&xbar_adx2_in>; 493 }; 494 }; 495 496 adx2_out1_port: port@1 { 497 reg = <1>; 498 499 adx2_out1: endpoint { 500 remote-endpoint = <&xbar_adx2_out1>; 501 }; 502 }; 503 504 adx2_out2_port: port@2 { 505 reg = <2>; 506 507 adx2_out2: endpoint { 508 remote-endpoint = <&xbar_adx2_out2>; 509 }; 510 }; 511 512 adx2_out3_port: port@3 { 513 reg = <3>; 514 515 adx2_out3: endpoint { 516 remote-endpoint = <&xbar_adx2_out3>; 517 }; 518 }; 519 520 adx2_out4_port: port@4 { 521 reg = <4>; 522 523 adx2_out4: endpoint { 524 remote-endpoint = <&xbar_adx2_out4>; 525 }; 526 }; 527 }; 528 }; 529 530 adx@2903a00 { 531 status = "okay"; 532 533 ports { 534 #address-cells = <1>; 535 #size-cells = <0>; 536 537 port@0 { 538 reg = <0>; 539 540 adx3_in: endpoint { 541 remote-endpoint = <&xbar_adx3_in>; 542 }; 543 }; 544 545 adx3_out1_port: port@1 { 546 reg = <1>; 547 548 adx3_out1: endpoint { 549 remote-endpoint = <&xbar_adx3_out1>; 550 }; 551 }; 552 553 adx3_out2_port: port@2 { 554 reg = <2>; 555 556 adx3_out2: endpoint { 557 remote-endpoint = <&xbar_adx3_out2>; 558 }; 559 }; 560 561 adx3_out3_port: port@3 { 562 reg = <3>; 563 564 adx3_out3: endpoint { 565 remote-endpoint = <&xbar_adx3_out3>; 566 }; 567 }; 568 569 adx3_out4_port: port@4 { 570 reg = <4>; 571 572 adx3_out4: endpoint { 573 remote-endpoint = <&xbar_adx3_out4>; 574 }; 575 }; 576 }; 577 }; 578 579 adx@2903b00 { 580 status = "okay"; 581 582 ports { 583 #address-cells = <1>; 584 #size-cells = <0>; 585 586 port@0 { 587 reg = <0>; 588 589 adx4_in: endpoint { 590 remote-endpoint = <&xbar_adx4_in>; 591 }; 592 }; 593 594 adx4_out1_port: port@1 { 595 reg = <1>; 596 597 adx4_out1: endpoint { 598 remote-endpoint = <&xbar_adx4_out1>; 599 }; 600 }; 601 602 adx4_out2_port: port@2 { 603 reg = <2>; 604 605 adx4_out2: endpoint { 606 remote-endpoint = <&xbar_adx4_out2>; 607 }; 608 }; 609 610 adx4_out3_port: port@3 { 611 reg = <3>; 612 613 adx4_out3: endpoint { 614 remote-endpoint = <&xbar_adx4_out3>; 615 }; 616 }; 617 618 adx4_out4_port: port@4 { 619 reg = <4>; 620 621 adx4_out4: endpoint { 622 remote-endpoint = <&xbar_adx4_out4>; 623 }; 624 }; 625 }; 626 }; 627 628 dmic@2904200 { 629 status = "okay"; 630 631 ports { 632 #address-cells = <1>; 633 #size-cells = <0>; 634 635 port@0 { 636 reg = <0>; 637 638 dmic3_cif: endpoint { 639 remote-endpoint = <&xbar_dmic3>; 640 }; 641 }; 642 643 dmic3_port: port@1 { 644 reg = <1>; 645 646 dmic3_dap: endpoint { 647 /* placeholder for external codec */ 648 }; 649 }; 650 }; 651 }; 652 653 processing-engine@2908000 { 654 status = "okay"; 655 656 ports { 657 #address-cells = <1>; 658 #size-cells = <0>; 659 660 port@0 { 661 reg = <0x0>; 662 663 ope1_cif_in_ep: endpoint { 664 remote-endpoint = <&xbar_ope1_in_ep>; 665 }; 666 }; 667 668 ope1_out_port: port@1 { 669 reg = <0x1>; 670 671 ope1_cif_out_ep: endpoint { 672 remote-endpoint = <&xbar_ope1_out_ep>; 673 }; 674 }; 675 }; 676 }; 677 678 mvc@290a000 { 679 status = "okay"; 680 681 ports { 682 #address-cells = <1>; 683 #size-cells = <0>; 684 685 port@0 { 686 reg = <0>; 687 688 mvc1_cif_in: endpoint { 689 remote-endpoint = <&xbar_mvc1_in>; 690 }; 691 }; 692 693 mvc1_out_port: port@1 { 694 reg = <1>; 695 696 mvc1_cif_out: endpoint { 697 remote-endpoint = <&xbar_mvc1_out>; 698 }; 699 }; 700 }; 701 }; 702 703 mvc@290a200 { 704 status = "okay"; 705 706 ports { 707 #address-cells = <1>; 708 #size-cells = <0>; 709 710 port@0 { 711 reg = <0>; 712 713 mvc2_cif_in: endpoint { 714 remote-endpoint = <&xbar_mvc2_in>; 715 }; 716 }; 717 718 mvc2_out_port: port@1 { 719 reg = <1>; 720 721 mvc2_cif_out: endpoint { 722 remote-endpoint = <&xbar_mvc2_out>; 723 }; 724 }; 725 }; 726 }; 727 728 amixer@290bb00 { 729 status = "okay"; 730 731 ports { 732 #address-cells = <1>; 733 #size-cells = <0>; 734 735 port@0 { 736 reg = <0x0>; 737 738 mix_in1: endpoint { 739 remote-endpoint = <&xbar_mix_in1>; 740 }; 741 }; 742 743 port@1 { 744 reg = <0x1>; 745 746 mix_in2: endpoint { 747 remote-endpoint = <&xbar_mix_in2>; 748 }; 749 }; 750 751 port@2 { 752 reg = <0x2>; 753 754 mix_in3: endpoint { 755 remote-endpoint = <&xbar_mix_in3>; 756 }; 757 }; 758 759 port@3 { 760 reg = <0x3>; 761 762 mix_in4: endpoint { 763 remote-endpoint = <&xbar_mix_in4>; 764 }; 765 }; 766 767 port@4 { 768 reg = <0x4>; 769 770 mix_in5: endpoint { 771 remote-endpoint = <&xbar_mix_in5>; 772 }; 773 }; 774 775 port@5 { 776 reg = <0x5>; 777 778 mix_in6: endpoint { 779 remote-endpoint = <&xbar_mix_in6>; 780 }; 781 }; 782 783 port@6 { 784 reg = <0x6>; 785 786 mix_in7: endpoint { 787 remote-endpoint = <&xbar_mix_in7>; 788 }; 789 }; 790 791 port@7 { 792 reg = <0x7>; 793 794 mix_in8: endpoint { 795 remote-endpoint = <&xbar_mix_in8>; 796 }; 797 }; 798 799 port@8 { 800 reg = <0x8>; 801 802 mix_in9: endpoint { 803 remote-endpoint = <&xbar_mix_in9>; 804 }; 805 }; 806 807 port@9 { 808 reg = <0x9>; 809 810 mix_in10: endpoint { 811 remote-endpoint = <&xbar_mix_in10>; 812 }; 813 }; 814 815 mix_out1_port: port@a { 816 reg = <0xa>; 817 818 mix_out1: endpoint { 819 remote-endpoint = <&xbar_mix_out1>; 820 }; 821 }; 822 823 mix_out2_port: port@b { 824 reg = <0xb>; 825 826 mix_out2: endpoint { 827 remote-endpoint = <&xbar_mix_out2>; 828 }; 829 }; 830 831 mix_out3_port: port@c { 832 reg = <0xc>; 833 834 mix_out3: endpoint { 835 remote-endpoint = <&xbar_mix_out3>; 836 }; 837 }; 838 839 mix_out4_port: port@d { 840 reg = <0xd>; 841 842 mix_out4: endpoint { 843 remote-endpoint = <&xbar_mix_out4>; 844 }; 845 }; 846 847 mix_out5_port: port@e { 848 reg = <0xe>; 849 850 mix_out5: endpoint { 851 remote-endpoint = <&xbar_mix_out5>; 852 }; 853 }; 854 }; 855 }; 856 857 admaif@290f000 { 858 status = "okay"; 859 860 ports { 861 #address-cells = <1>; 862 #size-cells = <0>; 863 864 admaif0_port: port@0 { 865 reg = <0x0>; 866 867 admaif0: endpoint { 868 remote-endpoint = <&xbar_admaif0>; 869 }; 870 }; 871 872 admaif1_port: port@1 { 873 reg = <0x1>; 874 875 admaif1: endpoint { 876 remote-endpoint = <&xbar_admaif1>; 877 }; 878 }; 879 880 admaif2_port: port@2 { 881 reg = <0x2>; 882 883 admaif2: endpoint { 884 remote-endpoint = <&xbar_admaif2>; 885 }; 886 }; 887 888 admaif3_port: port@3 { 889 reg = <0x3>; 890 891 admaif3: endpoint { 892 remote-endpoint = <&xbar_admaif3>; 893 }; 894 }; 895 896 admaif4_port: port@4 { 897 reg = <0x4>; 898 899 admaif4: endpoint { 900 remote-endpoint = <&xbar_admaif4>; 901 }; 902 }; 903 904 admaif5_port: port@5 { 905 reg = <0x5>; 906 907 admaif5: endpoint { 908 remote-endpoint = <&xbar_admaif5>; 909 }; 910 }; 911 912 admaif6_port: port@6 { 913 reg = <0x6>; 914 915 admaif6: endpoint { 916 remote-endpoint = <&xbar_admaif6>; 917 }; 918 }; 919 920 admaif7_port: port@7 { 921 reg = <0x7>; 922 923 admaif7: endpoint { 924 remote-endpoint = <&xbar_admaif7>; 925 }; 926 }; 927 928 admaif8_port: port@8 { 929 reg = <0x8>; 930 931 admaif8: endpoint { 932 remote-endpoint = <&xbar_admaif8>; 933 }; 934 }; 935 936 admaif9_port: port@9 { 937 reg = <0x9>; 938 939 admaif9: endpoint { 940 remote-endpoint = <&xbar_admaif9>; 941 }; 942 }; 943 944 admaif10_port: port@a { 945 reg = <0xa>; 946 947 admaif10: endpoint { 948 remote-endpoint = <&xbar_admaif10>; 949 }; 950 }; 951 952 admaif11_port: port@b { 953 reg = <0xb>; 954 955 admaif11: endpoint { 956 remote-endpoint = <&xbar_admaif11>; 957 }; 958 }; 959 960 admaif12_port: port@c { 961 reg = <0xc>; 962 963 admaif12: endpoint { 964 remote-endpoint = <&xbar_admaif12>; 965 }; 966 }; 967 968 admaif13_port: port@d { 969 reg = <0xd>; 970 971 admaif13: endpoint { 972 remote-endpoint = <&xbar_admaif13>; 973 }; 974 }; 975 976 admaif14_port: port@e { 977 reg = <0xe>; 978 979 admaif14: endpoint { 980 remote-endpoint = <&xbar_admaif14>; 981 }; 982 }; 983 984 admaif15_port: port@f { 985 reg = <0xf>; 986 987 admaif15: endpoint { 988 remote-endpoint = <&xbar_admaif15>; 989 }; 990 }; 991 992 admaif16_port: port@10 { 993 reg = <0x10>; 994 995 admaif16: endpoint { 996 remote-endpoint = <&xbar_admaif16>; 997 }; 998 }; 999 1000 admaif17_port: port@11 { 1001 reg = <0x11>; 1002 1003 admaif17: endpoint { 1004 remote-endpoint = <&xbar_admaif17>; 1005 }; 1006 }; 1007 1008 admaif18_port: port@12 { 1009 reg = <0x12>; 1010 1011 admaif18: endpoint { 1012 remote-endpoint = <&xbar_admaif18>; 1013 }; 1014 }; 1015 1016 admaif19_port: port@13 { 1017 reg = <0x13>; 1018 1019 admaif19: endpoint { 1020 remote-endpoint = <&xbar_admaif19>; 1021 }; 1022 }; 1023 }; 1024 }; 1025 1026 asrc@2910000 { 1027 status = "okay"; 1028 1029 ports { 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 1033 port@0 { 1034 reg = <0x0>; 1035 1036 asrc_in1_ep: endpoint { 1037 remote-endpoint = <&xbar_asrc_in1_ep>; 1038 }; 1039 }; 1040 1041 port@1 { 1042 reg = <0x1>; 1043 1044 asrc_in2_ep: endpoint { 1045 remote-endpoint = <&xbar_asrc_in2_ep>; 1046 }; 1047 }; 1048 1049 port@2 { 1050 reg = <0x2>; 1051 1052 asrc_in3_ep: endpoint { 1053 remote-endpoint = <&xbar_asrc_in3_ep>; 1054 }; 1055 }; 1056 1057 port@3 { 1058 reg = <0x3>; 1059 1060 asrc_in4_ep: endpoint { 1061 remote-endpoint = <&xbar_asrc_in4_ep>; 1062 }; 1063 }; 1064 1065 port@4 { 1066 reg = <0x4>; 1067 1068 asrc_in5_ep: endpoint { 1069 remote-endpoint = <&xbar_asrc_in5_ep>; 1070 }; 1071 }; 1072 1073 port@5 { 1074 reg = <0x5>; 1075 1076 asrc_in6_ep: endpoint { 1077 remote-endpoint = <&xbar_asrc_in6_ep>; 1078 }; 1079 }; 1080 1081 port@6 { 1082 reg = <0x6>; 1083 1084 asrc_in7_ep: endpoint { 1085 remote-endpoint = <&xbar_asrc_in7_ep>; 1086 }; 1087 }; 1088 1089 asrc_out1_port: port@7 { 1090 reg = <0x7>; 1091 1092 asrc_out1_ep: endpoint { 1093 remote-endpoint = <&xbar_asrc_out1_ep>; 1094 }; 1095 }; 1096 1097 asrc_out2_port: port@8 { 1098 reg = <0x8>; 1099 1100 asrc_out2_ep: endpoint { 1101 remote-endpoint = <&xbar_asrc_out2_ep>; 1102 }; 1103 }; 1104 1105 asrc_out3_port: port@9 { 1106 reg = <0x9>; 1107 1108 asrc_out3_ep: endpoint { 1109 remote-endpoint = <&xbar_asrc_out3_ep>; 1110 }; 1111 }; 1112 1113 asrc_out4_port: port@a { 1114 reg = <0xa>; 1115 1116 asrc_out4_ep: endpoint { 1117 remote-endpoint = <&xbar_asrc_out4_ep>; 1118 }; 1119 }; 1120 1121 asrc_out5_port: port@b { 1122 reg = <0xb>; 1123 1124 asrc_out5_ep: endpoint { 1125 remote-endpoint = <&xbar_asrc_out5_ep>; 1126 }; 1127 }; 1128 1129 asrc_out6_port: port@c { 1130 reg = <0xc>; 1131 1132 asrc_out6_ep: endpoint { 1133 remote-endpoint = <&xbar_asrc_out6_ep>; 1134 }; 1135 }; 1136 }; 1137 }; 1138 1139 ports { 1140 #address-cells = <1>; 1141 #size-cells = <0>; 1142 1143 port@0 { 1144 reg = <0x0>; 1145 1146 xbar_admaif0: endpoint { 1147 remote-endpoint = <&admaif0>; 1148 }; 1149 }; 1150 1151 port@1 { 1152 reg = <0x1>; 1153 1154 xbar_admaif1: endpoint { 1155 remote-endpoint = <&admaif1>; 1156 }; 1157 }; 1158 1159 port@2 { 1160 reg = <0x2>; 1161 1162 xbar_admaif2: endpoint { 1163 remote-endpoint = <&admaif2>; 1164 }; 1165 }; 1166 1167 port@3 { 1168 reg = <0x3>; 1169 1170 xbar_admaif3: endpoint { 1171 remote-endpoint = <&admaif3>; 1172 }; 1173 }; 1174 1175 port@4 { 1176 reg = <0x4>; 1177 1178 xbar_admaif4: endpoint { 1179 remote-endpoint = <&admaif4>; 1180 }; 1181 }; 1182 1183 port@5 { 1184 reg = <0x5>; 1185 1186 xbar_admaif5: endpoint { 1187 remote-endpoint = <&admaif5>; 1188 }; 1189 }; 1190 1191 port@6 { 1192 reg = <0x6>; 1193 1194 xbar_admaif6: endpoint { 1195 remote-endpoint = <&admaif6>; 1196 }; 1197 }; 1198 1199 port@7 { 1200 reg = <0x7>; 1201 1202 xbar_admaif7: endpoint { 1203 remote-endpoint = <&admaif7>; 1204 }; 1205 }; 1206 1207 port@8 { 1208 reg = <0x8>; 1209 1210 xbar_admaif8: endpoint { 1211 remote-endpoint = <&admaif8>; 1212 }; 1213 }; 1214 1215 port@9 { 1216 reg = <0x9>; 1217 1218 xbar_admaif9: endpoint { 1219 remote-endpoint = <&admaif9>; 1220 }; 1221 }; 1222 1223 port@a { 1224 reg = <0xa>; 1225 1226 xbar_admaif10: endpoint { 1227 remote-endpoint = <&admaif10>; 1228 }; 1229 }; 1230 1231 port@b { 1232 reg = <0xb>; 1233 1234 xbar_admaif11: endpoint { 1235 remote-endpoint = <&admaif11>; 1236 }; 1237 }; 1238 1239 port@c { 1240 reg = <0xc>; 1241 1242 xbar_admaif12: endpoint { 1243 remote-endpoint = <&admaif12>; 1244 }; 1245 }; 1246 1247 port@d { 1248 reg = <0xd>; 1249 1250 xbar_admaif13: endpoint { 1251 remote-endpoint = <&admaif13>; 1252 }; 1253 }; 1254 1255 port@e { 1256 reg = <0xe>; 1257 1258 xbar_admaif14: endpoint { 1259 remote-endpoint = <&admaif14>; 1260 }; 1261 }; 1262 1263 port@f { 1264 reg = <0xf>; 1265 1266 xbar_admaif15: endpoint { 1267 remote-endpoint = <&admaif15>; 1268 }; 1269 }; 1270 1271 port@10 { 1272 reg = <0x10>; 1273 1274 xbar_admaif16: endpoint { 1275 remote-endpoint = <&admaif16>; 1276 }; 1277 }; 1278 1279 port@11 { 1280 reg = <0x11>; 1281 1282 xbar_admaif17: endpoint { 1283 remote-endpoint = <&admaif17>; 1284 }; 1285 }; 1286 1287 port@12 { 1288 reg = <0x12>; 1289 1290 xbar_admaif18: endpoint { 1291 remote-endpoint = <&admaif18>; 1292 }; 1293 }; 1294 1295 port@13 { 1296 reg = <0x13>; 1297 1298 xbar_admaif19: endpoint { 1299 remote-endpoint = <&admaif19>; 1300 }; 1301 }; 1302 1303 xbar_i2s1_port: port@14 { 1304 reg = <0x14>; 1305 1306 xbar_i2s1: endpoint { 1307 remote-endpoint = <&i2s1_cif>; 1308 }; 1309 }; 1310 1311 xbar_i2s2_port: port@15 { 1312 reg = <0x15>; 1313 1314 xbar_i2s2: endpoint { 1315 remote-endpoint = <&i2s2_cif>; 1316 }; 1317 }; 1318 1319 xbar_i2s4_port: port@17 { 1320 reg = <0x17>; 1321 1322 xbar_i2s4: endpoint { 1323 remote-endpoint = <&i2s4_cif>; 1324 }; 1325 }; 1326 1327 xbar_i2s6_port: port@19 { 1328 reg = <0x19>; 1329 1330 xbar_i2s6: endpoint { 1331 remote-endpoint = <&i2s6_cif>; 1332 }; 1333 }; 1334 1335 xbar_dmic3_port: port@1c { 1336 reg = <0x1c>; 1337 1338 xbar_dmic3: endpoint { 1339 remote-endpoint = <&dmic3_cif>; 1340 }; 1341 }; 1342 1343 xbar_sfc1_in_port: port@20 { 1344 reg = <0x20>; 1345 1346 xbar_sfc1_in: endpoint { 1347 remote-endpoint = <&sfc1_cif_in>; 1348 }; 1349 }; 1350 1351 port@21 { 1352 reg = <0x21>; 1353 1354 xbar_sfc1_out: endpoint { 1355 remote-endpoint = <&sfc1_cif_out>; 1356 }; 1357 }; 1358 1359 xbar_sfc2_in_port: port@22 { 1360 reg = <0x22>; 1361 1362 xbar_sfc2_in: endpoint { 1363 remote-endpoint = <&sfc2_cif_in>; 1364 }; 1365 }; 1366 1367 port@23 { 1368 reg = <0x23>; 1369 1370 xbar_sfc2_out: endpoint { 1371 remote-endpoint = <&sfc2_cif_out>; 1372 }; 1373 }; 1374 1375 xbar_sfc3_in_port: port@24 { 1376 reg = <0x24>; 1377 1378 xbar_sfc3_in: endpoint { 1379 remote-endpoint = <&sfc3_cif_in>; 1380 }; 1381 }; 1382 1383 port@25 { 1384 reg = <0x25>; 1385 1386 xbar_sfc3_out: endpoint { 1387 remote-endpoint = <&sfc3_cif_out>; 1388 }; 1389 }; 1390 1391 xbar_sfc4_in_port: port@26 { 1392 reg = <0x26>; 1393 1394 xbar_sfc4_in: endpoint { 1395 remote-endpoint = <&sfc4_cif_in>; 1396 }; 1397 }; 1398 1399 port@27 { 1400 reg = <0x27>; 1401 1402 xbar_sfc4_out: endpoint { 1403 remote-endpoint = <&sfc4_cif_out>; 1404 }; 1405 }; 1406 1407 xbar_mvc1_in_port: port@28 { 1408 reg = <0x28>; 1409 1410 xbar_mvc1_in: endpoint { 1411 remote-endpoint = <&mvc1_cif_in>; 1412 }; 1413 }; 1414 1415 port@29 { 1416 reg = <0x29>; 1417 1418 xbar_mvc1_out: endpoint { 1419 remote-endpoint = <&mvc1_cif_out>; 1420 }; 1421 }; 1422 1423 xbar_mvc2_in_port: port@2a { 1424 reg = <0x2a>; 1425 1426 xbar_mvc2_in: endpoint { 1427 remote-endpoint = <&mvc2_cif_in>; 1428 }; 1429 }; 1430 1431 port@2b { 1432 reg = <0x2b>; 1433 1434 xbar_mvc2_out: endpoint { 1435 remote-endpoint = <&mvc2_cif_out>; 1436 }; 1437 }; 1438 1439 xbar_amx1_in1_port: port@2c { 1440 reg = <0x2c>; 1441 1442 xbar_amx1_in1: endpoint { 1443 remote-endpoint = <&amx1_in1>; 1444 }; 1445 }; 1446 1447 xbar_amx1_in2_port: port@2d { 1448 reg = <0x2d>; 1449 1450 xbar_amx1_in2: endpoint { 1451 remote-endpoint = <&amx1_in2>; 1452 }; 1453 }; 1454 1455 xbar_amx1_in3_port: port@2e { 1456 reg = <0x2e>; 1457 1458 xbar_amx1_in3: endpoint { 1459 remote-endpoint = <&amx1_in3>; 1460 }; 1461 }; 1462 1463 xbar_amx1_in4_port: port@2f { 1464 reg = <0x2f>; 1465 1466 xbar_amx1_in4: endpoint { 1467 remote-endpoint = <&amx1_in4>; 1468 }; 1469 }; 1470 1471 port@30 { 1472 reg = <0x30>; 1473 1474 xbar_amx1_out: endpoint { 1475 remote-endpoint = <&amx1_out>; 1476 }; 1477 }; 1478 1479 xbar_amx2_in1_port: port@31 { 1480 reg = <0x31>; 1481 1482 xbar_amx2_in1: endpoint { 1483 remote-endpoint = <&amx2_in1>; 1484 }; 1485 }; 1486 1487 xbar_amx2_in2_port: port@32 { 1488 reg = <0x32>; 1489 1490 xbar_amx2_in2: endpoint { 1491 remote-endpoint = <&amx2_in2>; 1492 }; 1493 }; 1494 1495 xbar_amx2_in3_port: port@33 { 1496 reg = <0x33>; 1497 1498 xbar_amx2_in3: endpoint { 1499 remote-endpoint = <&amx2_in3>; 1500 }; 1501 }; 1502 1503 xbar_amx2_in4_port: port@34 { 1504 reg = <0x34>; 1505 1506 xbar_amx2_in4: endpoint { 1507 remote-endpoint = <&amx2_in4>; 1508 }; 1509 }; 1510 1511 port@35 { 1512 reg = <0x35>; 1513 1514 xbar_amx2_out: endpoint { 1515 remote-endpoint = <&amx2_out>; 1516 }; 1517 }; 1518 1519 xbar_amx3_in1_port: port@36 { 1520 reg = <0x36>; 1521 1522 xbar_amx3_in1: endpoint { 1523 remote-endpoint = <&amx3_in1>; 1524 }; 1525 }; 1526 1527 xbar_amx3_in2_port: port@37 { 1528 reg = <0x37>; 1529 1530 xbar_amx3_in2: endpoint { 1531 remote-endpoint = <&amx3_in2>; 1532 }; 1533 }; 1534 1535 xbar_amx3_in3_port: port@38 { 1536 reg = <0x38>; 1537 1538 xbar_amx3_in3: endpoint { 1539 remote-endpoint = <&amx3_in3>; 1540 }; 1541 }; 1542 1543 xbar_amx3_in4_port: port@39 { 1544 reg = <0x39>; 1545 1546 xbar_amx3_in4: endpoint { 1547 remote-endpoint = <&amx3_in4>; 1548 }; 1549 }; 1550 1551 port@3a { 1552 reg = <0x3a>; 1553 1554 xbar_amx3_out: endpoint { 1555 remote-endpoint = <&amx3_out>; 1556 }; 1557 }; 1558 1559 xbar_amx4_in1_port: port@3b { 1560 reg = <0x3b>; 1561 1562 xbar_amx4_in1: endpoint { 1563 remote-endpoint = <&amx4_in1>; 1564 }; 1565 }; 1566 1567 xbar_amx4_in2_port: port@3c { 1568 reg = <0x3c>; 1569 1570 xbar_amx4_in2: endpoint { 1571 remote-endpoint = <&amx4_in2>; 1572 }; 1573 }; 1574 1575 xbar_amx4_in3_port: port@3d { 1576 reg = <0x3d>; 1577 1578 xbar_amx4_in3: endpoint { 1579 remote-endpoint = <&amx4_in3>; 1580 }; 1581 }; 1582 1583 xbar_amx4_in4_port: port@3e { 1584 reg = <0x3e>; 1585 1586 xbar_amx4_in4: endpoint { 1587 remote-endpoint = <&amx4_in4>; 1588 }; 1589 }; 1590 1591 port@3f { 1592 reg = <0x3f>; 1593 1594 xbar_amx4_out: endpoint { 1595 remote-endpoint = <&amx4_out>; 1596 }; 1597 }; 1598 1599 xbar_adx1_in_port: port@40 { 1600 reg = <0x40>; 1601 1602 xbar_adx1_in: endpoint { 1603 remote-endpoint = <&adx1_in>; 1604 }; 1605 }; 1606 1607 port@41 { 1608 reg = <0x41>; 1609 1610 xbar_adx1_out1: endpoint { 1611 remote-endpoint = <&adx1_out1>; 1612 }; 1613 }; 1614 1615 port@42 { 1616 reg = <0x42>; 1617 1618 xbar_adx1_out2: endpoint { 1619 remote-endpoint = <&adx1_out2>; 1620 }; 1621 }; 1622 1623 port@43 { 1624 reg = <0x43>; 1625 1626 xbar_adx1_out3: endpoint { 1627 remote-endpoint = <&adx1_out3>; 1628 }; 1629 }; 1630 1631 port@44 { 1632 reg = <0x44>; 1633 1634 xbar_adx1_out4: endpoint { 1635 remote-endpoint = <&adx1_out4>; 1636 }; 1637 }; 1638 1639 xbar_adx2_in_port: port@45 { 1640 reg = <0x45>; 1641 1642 xbar_adx2_in: endpoint { 1643 remote-endpoint = <&adx2_in>; 1644 }; 1645 }; 1646 1647 port@46 { 1648 reg = <0x46>; 1649 1650 xbar_adx2_out1: endpoint { 1651 remote-endpoint = <&adx2_out1>; 1652 }; 1653 }; 1654 1655 port@47 { 1656 reg = <0x47>; 1657 1658 xbar_adx2_out2: endpoint { 1659 remote-endpoint = <&adx2_out2>; 1660 }; 1661 }; 1662 1663 port@48 { 1664 reg = <0x48>; 1665 1666 xbar_adx2_out3: endpoint { 1667 remote-endpoint = <&adx2_out3>; 1668 }; 1669 }; 1670 1671 port@49 { 1672 reg = <0x49>; 1673 1674 xbar_adx2_out4: endpoint { 1675 remote-endpoint = <&adx2_out4>; 1676 }; 1677 }; 1678 1679 xbar_adx3_in_port: port@4a { 1680 reg = <0x4a>; 1681 1682 xbar_adx3_in: endpoint { 1683 remote-endpoint = <&adx3_in>; 1684 }; 1685 }; 1686 1687 port@4b { 1688 reg = <0x4b>; 1689 1690 xbar_adx3_out1: endpoint { 1691 remote-endpoint = <&adx3_out1>; 1692 }; 1693 }; 1694 1695 port@4c { 1696 reg = <0x4c>; 1697 1698 xbar_adx3_out2: endpoint { 1699 remote-endpoint = <&adx3_out2>; 1700 }; 1701 }; 1702 1703 port@4d { 1704 reg = <0x4d>; 1705 1706 xbar_adx3_out3: endpoint { 1707 remote-endpoint = <&adx3_out3>; 1708 }; 1709 }; 1710 1711 port@4e { 1712 reg = <0x4e>; 1713 1714 xbar_adx3_out4: endpoint { 1715 remote-endpoint = <&adx3_out4>; 1716 }; 1717 }; 1718 1719 xbar_adx4_in_port: port@4f { 1720 reg = <0x4f>; 1721 1722 xbar_adx4_in: endpoint { 1723 remote-endpoint = <&adx4_in>; 1724 }; 1725 }; 1726 1727 port@50 { 1728 reg = <0x50>; 1729 1730 xbar_adx4_out1: endpoint { 1731 remote-endpoint = <&adx4_out1>; 1732 }; 1733 }; 1734 1735 port@51 { 1736 reg = <0x51>; 1737 1738 xbar_adx4_out2: endpoint { 1739 remote-endpoint = <&adx4_out2>; 1740 }; 1741 }; 1742 1743 port@52 { 1744 reg = <0x52>; 1745 1746 xbar_adx4_out3: endpoint { 1747 remote-endpoint = <&adx4_out3>; 1748 }; 1749 }; 1750 1751 port@53 { 1752 reg = <0x53>; 1753 1754 xbar_adx4_out4: endpoint { 1755 remote-endpoint = <&adx4_out4>; 1756 }; 1757 }; 1758 1759 xbar_mix_in1_port: port@54 { 1760 reg = <0x54>; 1761 1762 xbar_mix_in1: endpoint { 1763 remote-endpoint = <&mix_in1>; 1764 }; 1765 }; 1766 1767 xbar_mix_in2_port: port@55 { 1768 reg = <0x55>; 1769 1770 xbar_mix_in2: endpoint { 1771 remote-endpoint = <&mix_in2>; 1772 }; 1773 }; 1774 1775 xbar_mix_in3_port: port@56 { 1776 reg = <0x56>; 1777 1778 xbar_mix_in3: endpoint { 1779 remote-endpoint = <&mix_in3>; 1780 }; 1781 }; 1782 1783 xbar_mix_in4_port: port@57 { 1784 reg = <0x57>; 1785 1786 xbar_mix_in4: endpoint { 1787 remote-endpoint = <&mix_in4>; 1788 }; 1789 }; 1790 1791 xbar_mix_in5_port: port@58 { 1792 reg = <0x58>; 1793 1794 xbar_mix_in5: endpoint { 1795 remote-endpoint = <&mix_in5>; 1796 }; 1797 }; 1798 1799 xbar_mix_in6_port: port@59 { 1800 reg = <0x59>; 1801 1802 xbar_mix_in6: endpoint { 1803 remote-endpoint = <&mix_in6>; 1804 }; 1805 }; 1806 1807 xbar_mix_in7_port: port@5a { 1808 reg = <0x5a>; 1809 1810 xbar_mix_in7: endpoint { 1811 remote-endpoint = <&mix_in7>; 1812 }; 1813 }; 1814 1815 xbar_mix_in8_port: port@5b { 1816 reg = <0x5b>; 1817 1818 xbar_mix_in8: endpoint { 1819 remote-endpoint = <&mix_in8>; 1820 }; 1821 }; 1822 1823 xbar_mix_in9_port: port@5c { 1824 reg = <0x5c>; 1825 1826 xbar_mix_in9: endpoint { 1827 remote-endpoint = <&mix_in9>; 1828 }; 1829 }; 1830 1831 xbar_mix_in10_port: port@5d { 1832 reg = <0x5d>; 1833 1834 xbar_mix_in10: endpoint { 1835 remote-endpoint = <&mix_in10>; 1836 }; 1837 }; 1838 1839 port@5e { 1840 reg = <0x5e>; 1841 1842 xbar_mix_out1: endpoint { 1843 remote-endpoint = <&mix_out1>; 1844 }; 1845 }; 1846 1847 port@5f { 1848 reg = <0x5f>; 1849 1850 xbar_mix_out2: endpoint { 1851 remote-endpoint = <&mix_out2>; 1852 }; 1853 }; 1854 1855 port@60 { 1856 reg = <0x60>; 1857 1858 xbar_mix_out3: endpoint { 1859 remote-endpoint = <&mix_out3>; 1860 }; 1861 }; 1862 1863 port@61 { 1864 reg = <0x61>; 1865 1866 xbar_mix_out4: endpoint { 1867 remote-endpoint = <&mix_out4>; 1868 }; 1869 }; 1870 1871 port@62 { 1872 reg = <0x62>; 1873 1874 xbar_mix_out5: endpoint { 1875 remote-endpoint = <&mix_out5>; 1876 }; 1877 }; 1878 1879 xbar_asrc_in1_port: port@63 { 1880 reg = <0x63>; 1881 1882 xbar_asrc_in1_ep: endpoint { 1883 remote-endpoint = <&asrc_in1_ep>; 1884 }; 1885 }; 1886 1887 port@64 { 1888 reg = <0x64>; 1889 1890 xbar_asrc_out1_ep: endpoint { 1891 remote-endpoint = <&asrc_out1_ep>; 1892 }; 1893 }; 1894 1895 xbar_asrc_in2_port: port@65 { 1896 reg = <0x65>; 1897 1898 xbar_asrc_in2_ep: endpoint { 1899 remote-endpoint = <&asrc_in2_ep>; 1900 }; 1901 }; 1902 1903 port@66 { 1904 reg = <0x66>; 1905 1906 xbar_asrc_out2_ep: endpoint { 1907 remote-endpoint = <&asrc_out2_ep>; 1908 }; 1909 }; 1910 1911 xbar_asrc_in3_port: port@67 { 1912 reg = <0x67>; 1913 1914 xbar_asrc_in3_ep: endpoint { 1915 remote-endpoint = <&asrc_in3_ep>; 1916 }; 1917 }; 1918 1919 port@68 { 1920 reg = <0x68>; 1921 1922 xbar_asrc_out3_ep: endpoint { 1923 remote-endpoint = <&asrc_out3_ep>; 1924 }; 1925 }; 1926 1927 xbar_asrc_in4_port: port@69 { 1928 reg = <0x69>; 1929 1930 xbar_asrc_in4_ep: endpoint { 1931 remote-endpoint = <&asrc_in4_ep>; 1932 }; 1933 }; 1934 1935 port@6a { 1936 reg = <0x6a>; 1937 1938 xbar_asrc_out4_ep: endpoint { 1939 remote-endpoint = <&asrc_out4_ep>; 1940 }; 1941 }; 1942 1943 xbar_asrc_in5_port: port@6b { 1944 reg = <0x6b>; 1945 1946 xbar_asrc_in5_ep: endpoint { 1947 remote-endpoint = <&asrc_in5_ep>; 1948 }; 1949 }; 1950 1951 port@6c { 1952 reg = <0x6c>; 1953 1954 xbar_asrc_out5_ep: endpoint { 1955 remote-endpoint = <&asrc_out5_ep>; 1956 }; 1957 }; 1958 1959 xbar_asrc_in6_port: port@6d { 1960 reg = <0x6d>; 1961 1962 xbar_asrc_in6_ep: endpoint { 1963 remote-endpoint = <&asrc_in6_ep>; 1964 }; 1965 }; 1966 1967 port@6e { 1968 reg = <0x6e>; 1969 1970 xbar_asrc_out6_ep: endpoint { 1971 remote-endpoint = <&asrc_out6_ep>; 1972 }; 1973 }; 1974 1975 xbar_asrc_in7_port: port@6f { 1976 reg = <0x6f>; 1977 1978 xbar_asrc_in7_ep: endpoint { 1979 remote-endpoint = <&asrc_in7_ep>; 1980 }; 1981 }; 1982 1983 xbar_ope1_in_port: port@70 { 1984 reg = <0x70>; 1985 1986 xbar_ope1_in_ep: endpoint { 1987 remote-endpoint = <&ope1_cif_in_ep>; 1988 }; 1989 }; 1990 1991 port@71 { 1992 reg = <0x71>; 1993 1994 xbar_ope1_out_ep: endpoint { 1995 remote-endpoint = <&ope1_cif_out_ep>; 1996 }; 1997 }; 1998 }; 1999 }; 2000 2001 dma-controller@2930000 { 2002 status = "okay"; 2003 }; 2004 2005 interrupt-controller@2a40000 { 2006 status = "okay"; 2007 }; 2008 }; 2009 2010 serial@3100000 { 2011 compatible = "nvidia,tegra194-hsuart"; 2012 status = "okay"; 2013 }; 2014 2015 serial@31d0000 { 2016 current-speed = <115200>; 2017 status = "okay"; 2018 }; 2019 2020 pwm@32a0000 { 2021 assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>; 2022 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; 2023 status = "okay"; 2024 }; 2025 2026 hda@3510000 { 2027 nvidia,model = "NVIDIA Jetson AGX Orin HDA"; 2028 status = "okay"; 2029 }; 2030 2031 padctl@3520000 { 2032 status = "okay"; 2033 2034 pads { 2035 usb2 { 2036 lanes { 2037 usb2-0 { 2038 status = "okay"; 2039 }; 2040 2041 usb2-1 { 2042 status = "okay"; 2043 }; 2044 2045 usb2-2 { 2046 status = "okay"; 2047 }; 2048 2049 usb2-3 { 2050 status = "okay"; 2051 }; 2052 }; 2053 }; 2054 2055 usb3 { 2056 lanes { 2057 usb3-0 { 2058 status = "okay"; 2059 }; 2060 2061 usb3-1 { 2062 status = "okay"; 2063 }; 2064 2065 usb3-2 { 2066 status = "okay"; 2067 }; 2068 }; 2069 }; 2070 }; 2071 2072 ports { 2073 usb2-0 { 2074 mode = "host"; 2075 status = "okay"; 2076 }; 2077 2078 usb2-1 { 2079 mode = "host"; 2080 status = "okay"; 2081 }; 2082 2083 usb2-2 { 2084 mode = "host"; 2085 status = "okay"; 2086 }; 2087 2088 usb2-3 { 2089 mode = "host"; 2090 status = "okay"; 2091 }; 2092 2093 usb3-0 { 2094 nvidia,usb2-companion = <1>; 2095 status = "okay"; 2096 }; 2097 2098 usb3-1 { 2099 nvidia,usb2-companion = <0>; 2100 status = "okay"; 2101 }; 2102 2103 usb3-2 { 2104 nvidia,usb2-companion = <3>; 2105 status = "okay"; 2106 }; 2107 }; 2108 }; 2109 2110 usb@3610000 { 2111 status = "okay"; 2112 2113 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>, 2114 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>, 2115 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>, 2116 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>, 2117 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>, 2118 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>, 2119 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>; 2120 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", 2121 "usb3-0", "usb3-1", "usb3-2"; 2122 }; 2123 2124 ethernet@6800000 { 2125 status = "okay"; 2126 2127 phy-handle = <&mgbe0_phy>; 2128 phy-mode = "usxgmii"; 2129 2130 mdio { 2131 #address-cells = <1>; 2132 #size-cells = <0>; 2133 2134 mgbe0_phy: phy@0 { 2135 compatible = "ethernet-phy-ieee802.3-c45"; 2136 reg = <0x0>; 2137 2138 #phy-cells = <0>; 2139 }; 2140 }; 2141 }; 2142 2143 pcie@14100000 { 2144 status = "okay"; 2145 2146 vddio-pex-ctl-supply = <&vdd_1v8_ao>; 2147 2148 phys = <&p2u_hsio_3>; 2149 phy-names = "p2u-0"; 2150 }; 2151 2152 pcie@14160000 { 2153 status = "okay"; 2154 2155 vddio-pex-ctl-supply = <&vdd_1v8_ao>; 2156 2157 phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, 2158 <&p2u_hsio_7>; 2159 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; 2160 }; 2161 2162 pcie@141a0000 { 2163 status = "okay"; 2164 2165 vddio-pex-ctl-supply = <&vdd_1v8_ls>; 2166 vpcie3v3-supply = <&vdd_3v3_pcie>; 2167 vpcie12v-supply = <&vdd_12v_pcie>; 2168 2169 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2170 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2171 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2172 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2173 "p2u-5", "p2u-6", "p2u-7"; 2174 }; 2175 2176 pcie-ep@141a0000 { 2177 status = "disabled"; 2178 2179 vddio-pex-ctl-supply = <&vdd_1v8_ls>; 2180 2181 reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>; 2182 2183 nvidia,refclk-select-gpios = <&gpio_aon 2184 TEGRA234_AON_GPIO(AA, 4) 2185 GPIO_ACTIVE_HIGH>; 2186 2187 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 2188 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 2189 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 2190 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 2191 "p2u-5", "p2u-6", "p2u-7"; 2192 }; 2193 }; 2194 2195 gpio-keys { 2196 compatible = "gpio-keys"; 2197 status = "okay"; 2198 2199 key-force-recovery { 2200 label = "Force Recovery"; 2201 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>; 2202 linux,input-type = <EV_KEY>; 2203 linux,code = <BTN_1>; 2204 }; 2205 2206 key-power { 2207 label = "Power"; 2208 gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>; 2209 linux,input-type = <EV_KEY>; 2210 linux,code = <KEY_POWER>; 2211 wakeup-event-action = <EV_ACT_ASSERTED>; 2212 wakeup-source; 2213 }; 2214 2215 key-suspend { 2216 label = "Suspend"; 2217 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>; 2218 linux,input-type = <EV_KEY>; 2219 linux,code = <KEY_SLEEP>; 2220 }; 2221 }; 2222 2223 pwm-fan { 2224 compatible = "pwm-fan"; 2225 pwms = <&pwm3 0 45334>; 2226 2227 cooling-levels = <0 95 178 255>; 2228 #cooling-cells = <2>; 2229 }; 2230 2231 serial { 2232 status = "okay"; 2233 }; 2234 2235 sound { 2236 status = "okay"; 2237 2238 compatible = "nvidia,tegra186-audio-graph-card"; 2239 2240 dais = /* ADMAIF (FE) Ports */ 2241 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 2242 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, 2243 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, 2244 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, 2245 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, 2246 /* XBAR Ports */ 2247 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>, 2248 <&xbar_i2s6_port>, <&xbar_dmic3_port>, 2249 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 2250 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 2251 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 2252 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 2253 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 2254 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 2255 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 2256 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, 2257 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, 2258 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, 2259 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, 2260 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 2261 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, 2262 <&xbar_mix_in1_port>, <&xbar_mix_in2_port>, 2263 <&xbar_mix_in3_port>, <&xbar_mix_in4_port>, 2264 <&xbar_mix_in5_port>, <&xbar_mix_in6_port>, 2265 <&xbar_mix_in7_port>, <&xbar_mix_in8_port>, 2266 <&xbar_mix_in9_port>, <&xbar_mix_in10_port>, 2267 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>, 2268 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2269 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2270 <&xbar_asrc_in7_port>, 2271 <&xbar_ope1_in_port>, 2272 /* HW accelerators */ 2273 <&sfc1_out_port>, <&sfc2_out_port>, 2274 <&sfc3_out_port>, <&sfc4_out_port>, 2275 <&mvc1_out_port>, <&mvc2_out_port>, 2276 <&amx1_out_port>, <&amx2_out_port>, 2277 <&amx3_out_port>, <&amx4_out_port>, 2278 <&adx1_out1_port>, <&adx1_out2_port>, 2279 <&adx1_out3_port>, <&adx1_out4_port>, 2280 <&adx2_out1_port>, <&adx2_out2_port>, 2281 <&adx2_out3_port>, <&adx2_out4_port>, 2282 <&adx3_out1_port>, <&adx3_out2_port>, 2283 <&adx3_out3_port>, <&adx3_out4_port>, 2284 <&adx4_out1_port>, <&adx4_out2_port>, 2285 <&adx4_out3_port>, <&adx4_out4_port>, 2286 <&mix_out1_port>, <&mix_out2_port>, <&mix_out3_port>, 2287 <&mix_out4_port>, <&mix_out5_port>, 2288 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2289 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2290 <&ope1_out_port>, 2291 /* BE I/O Ports */ 2292 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>, 2293 <&dmic3_port>; 2294 2295 label = "NVIDIA Jetson AGX Orin APE"; 2296 }; 2297}; 2298