1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/gpio-keys.h>
5#include <dt-bindings/input/linux-event-codes.h>
6#include <dt-bindings/mfd/max77620.h>
7
8#include "tegra210.dtsi"
9
10/ {
11	model = "NVIDIA Jetson Nano Developer Kit";
12	compatible = "nvidia,p3450-0000", "nvidia,tegra210";
13
14	aliases {
15		ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
16		rtc0 = "/i2c@7000d000/pmic@3c";
17		rtc1 = "/rtc@7000e000";
18		serial0 = &uarta;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	memory {
26		device_type = "memory";
27		reg = <0x0 0x80000000 0x1 0x0>;
28	};
29
30	pcie@1003000 {
31		status = "okay";
32
33		avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
34		hvddio-pex-supply = <&vdd_1v8>;
35		dvddio-pex-supply = <&vdd_pex_1v05>;
36		dvdd-pex-pll-supply = <&vdd_pex_1v05>;
37		hvdd-pex-pll-e-supply = <&vdd_1v8>;
38		vddio-pex-ctl-supply = <&vdd_1v8>;
39
40		pci@1,0 {
41			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
42			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
43			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>,
44			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
45			phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
46			nvidia,num-lanes = <4>;
47			status = "okay";
48		};
49
50		pci@2,0 {
51			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
52			phy-names = "pcie-0";
53			status = "okay";
54
55			ethernet@0,0 {
56				reg = <0x000000 0 0 0 0>;
57				local-mac-address = [ 00 00 00 00 00 00 ];
58			};
59		};
60	};
61
62	host1x@50000000 {
63		dpaux@54040000 {
64			status = "okay";
65		};
66
67		sor@54540000 {
68			status = "okay";
69
70			avdd-io-hdmi-dp-supply = <&avdd_io_edp_1v05>;
71			vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
72
73			nvidia,xbar-cfg = <2 1 0 3 4>;
74			nvidia,dpaux = <&dpaux>;
75		};
76
77		sor@54580000 {
78			status = "okay";
79
80			avdd-io-supply = <&avdd_1v05>;
81			vdd-pll-supply = <&vdd_1v8>;
82			hdmi-supply = <&vdd_hdmi>;
83
84			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
85			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
86					   GPIO_ACTIVE_LOW>;
87			nvidia,xbar-cfg = <0 1 2 3 4>;
88		};
89
90		dpaux@545c0000 {
91			status = "okay";
92		};
93	};
94
95	gpu@57000000 {
96		vdd-supply = <&vdd_gpu>;
97		status = "okay";
98	};
99
100	/* debug port */
101	serial@70006000 {
102		status = "okay";
103	};
104
105	pwm@7000a000 {
106		status = "okay";
107	};
108
109	i2c@7000c500 {
110		status = "okay";
111		clock-frequency = <100000>;
112
113		eeprom@50 {
114			compatible = "atmel,24c02";
115			reg = <0x50>;
116
117			address-bits = <8>;
118			page-size = <8>;
119			size = <256>;
120			read-only;
121		};
122
123		eeprom@57 {
124			compatible = "atmel,24c02";
125			reg = <0x57>;
126
127			address-bits = <8>;
128			page-size = <8>;
129			size = <256>;
130			read-only;
131		};
132	};
133
134	hdmi_ddc: i2c@7000c700 {
135		status = "okay";
136		clock-frequency = <100000>;
137	};
138
139	i2c@7000d000 {
140		status = "okay";
141		clock-frequency = <400000>;
142
143		pmic: pmic@3c {
144			compatible = "maxim,max77620";
145			reg = <0x3c>;
146			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
147
148			#interrupt-cells = <2>;
149			interrupt-controller;
150
151			#gpio-cells = <2>;
152			gpio-controller;
153
154			pinctrl-names = "default";
155			pinctrl-0 = <&max77620_default>;
156
157			max77620_default: pinmux {
158				gpio0 {
159					pins = "gpio0";
160					function = "gpio";
161				};
162
163				gpio1 {
164					pins = "gpio1";
165					function = "fps-out";
166					drive-push-pull = <1>;
167					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
168					maxim,active-fps-power-up-slot = <0>;
169					maxim,active-fps-power-down-slot = <7>;
170				};
171
172				gpio2 {
173					pins = "gpio2";
174					function = "fps-out";
175					drive-open-drain = <1>;
176					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
177					maxim,active-fps-power-up-slot = <0>;
178					maxim,active-fps-power-down-slot = <7>;
179				};
180
181				gpio3 {
182					pins = "gpio3";
183					function = "fps-out";
184					drive-open-drain = <1>;
185					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
186					maxim,active-fps-power-up-slot = <4>;
187					maxim,active-fps-power-down-slot = <3>;
188				};
189
190				gpio4 {
191					pins = "gpio4";
192					function = "32k-out1";
193				};
194
195				gpio5_6_7 {
196					pins = "gpio5", "gpio6", "gpio7";
197					function = "gpio";
198					drive-push-pull = <1>;
199				};
200			};
201
202			fps {
203				fps0 {
204					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
205					maxim,suspend-fps-time-period-us = <5120>;
206				};
207
208				fps1 {
209					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
210					maxim,suspend-fps-time-period-us = <5120>;
211				};
212
213				fps2 {
214					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
215				};
216			};
217
218			regulators {
219				in-ldo0-1-supply = <&vdd_pre>;
220				in-ldo2-supply = <&vdd_3v3_sys>;
221				in-ldo3-5-supply = <&vdd_1v8>;
222				in-ldo4-6-supply = <&vdd_5v0_sys>;
223				in-ldo7-8-supply = <&vdd_pre>;
224				in-sd0-supply = <&vdd_5v0_sys>;
225				in-sd1-supply = <&vdd_5v0_sys>;
226				in-sd2-supply = <&vdd_5v0_sys>;
227				in-sd3-supply = <&vdd_5v0_sys>;
228
229				vdd_soc: sd0 {
230					regulator-name = "VDD_SOC";
231					regulator-min-microvolt = <1000000>;
232					regulator-max-microvolt = <1170000>;
233					regulator-enable-ramp-delay = <146>;
234					regulator-disable-ramp-delay = <4080>;
235					regulator-ramp-delay = <27500>;
236					regulator-ramp-delay-scale = <300>;
237					regulator-always-on;
238					regulator-boot-on;
239
240					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
241					maxim,active-fps-power-up-slot = <1>;
242					maxim,active-fps-power-down-slot = <6>;
243				};
244
245				vdd_ddr: sd1 {
246					regulator-name = "VDD_DDR_1V1_PMIC";
247					regulator-min-microvolt = <1150000>;
248					regulator-max-microvolt = <1150000>;
249					regulator-enable-ramp-delay = <176>;
250					regulator-disable-ramp-delay = <145800>;
251					regulator-ramp-delay = <27500>;
252					regulator-ramp-delay-scale = <300>;
253					regulator-always-on;
254					regulator-boot-on;
255
256					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
257					maxim,active-fps-power-up-slot = <5>;
258					maxim,active-fps-power-down-slot = <2>;
259				};
260
261				vdd_pre: sd2 {
262					regulator-name = "VDD_PRE_REG_1V35";
263					regulator-min-microvolt = <1350000>;
264					regulator-max-microvolt = <1350000>;
265					regulator-enable-ramp-delay = <176>;
266					regulator-disable-ramp-delay = <32000>;
267					regulator-ramp-delay = <27500>;
268					regulator-ramp-delay-scale = <350>;
269					regulator-always-on;
270					regulator-boot-on;
271
272					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
273					maxim,active-fps-power-up-slot = <2>;
274					maxim,active-fps-power-down-slot = <5>;
275				};
276
277				vdd_1v8: sd3 {
278					regulator-name = "VDD_1V8";
279					regulator-min-microvolt = <1800000>;
280					regulator-max-microvolt = <1800000>;
281					regulator-enable-ramp-delay = <242>;
282					regulator-disable-ramp-delay = <118000>;
283					regulator-ramp-delay = <27500>;
284					regulator-ramp-delay-scale = <360>;
285					regulator-always-on;
286					regulator-boot-on;
287
288					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
289					maxim,active-fps-power-up-slot = <3>;
290					maxim,active-fps-power-down-slot = <4>;
291				};
292
293				vdd_sys_1v2: ldo0 {
294					regulator-name = "AVDD_SYS_1V2";
295					regulator-min-microvolt = <1200000>;
296					regulator-max-microvolt = <1200000>;
297					regulator-enable-ramp-delay = <26>;
298					regulator-disable-ramp-delay = <626>;
299					regulator-ramp-delay = <100000>;
300					regulator-ramp-delay-scale = <200>;
301					regulator-always-on;
302					regulator-boot-on;
303
304					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
305					maxim,active-fps-power-up-slot = <0>;
306					maxim,active-fps-power-down-slot = <7>;
307				};
308
309				vdd_pex_1v05: ldo1 {
310					regulator-name = "VDD_PEX_1V05";
311					regulator-min-microvolt = <1050000>;
312					regulator-max-microvolt = <1050000>;
313					regulator-enable-ramp-delay = <22>;
314					regulator-disable-ramp-delay = <650>;
315					regulator-ramp-delay = <100000>;
316					regulator-ramp-delay-scale = <200>;
317
318					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
319					maxim,active-fps-power-up-slot = <0>;
320					maxim,active-fps-power-down-slot = <7>;
321				};
322
323				vddio_sdmmc: ldo2 {
324					regulator-name = "VDDIO_SDMMC";
325					regulator-min-microvolt = <1800000>;
326					regulator-max-microvolt = <3300000>;
327					regulator-enable-ramp-delay = <62>;
328					regulator-disable-ramp-delay = <650>;
329					regulator-ramp-delay = <100000>;
330					regulator-ramp-delay-scale = <200>;
331
332					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
333					maxim,active-fps-power-up-slot = <0>;
334					maxim,active-fps-power-down-slot = <7>;
335				};
336
337				ldo3 {
338					status = "disabled";
339				};
340
341				vdd_rtc: ldo4 {
342					regulator-name = "VDD_RTC";
343					regulator-min-microvolt = <850000>;
344					regulator-max-microvolt = <1100000>;
345					regulator-enable-ramp-delay = <22>;
346					regulator-disable-ramp-delay = <610>;
347					regulator-ramp-delay = <100000>;
348					regulator-ramp-delay-scale = <200>;
349					regulator-disable-active-discharge;
350					regulator-always-on;
351					regulator-boot-on;
352
353					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
354					maxim,active-fps-power-up-slot = <1>;
355					maxim,active-fps-power-down-slot = <6>;
356				};
357
358				ldo5 {
359					status = "disabled";
360				};
361
362				ldo6 {
363					status = "disabled";
364				};
365
366				avdd_1v05_pll: ldo7 {
367					regulator-name = "AVDD_1V05_PLL";
368					regulator-min-microvolt = <1050000>;
369					regulator-max-microvolt = <1050000>;
370					regulator-enable-ramp-delay = <24>;
371					regulator-disable-ramp-delay = <2768>;
372					regulator-ramp-delay = <100000>;
373					regulator-ramp-delay-scale = <200>;
374
375					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
376					maxim,active-fps-power-up-slot = <3>;
377					maxim,active-fps-power-down-slot = <4>;
378				};
379
380				avdd_1v05: ldo8 {
381					regulator-name = "AVDD_SATA_HDMI_DP_1V05";
382					regulator-min-microvolt = <1050000>;
383					regulator-max-microvolt = <1050000>;
384					regulator-enable-ramp-delay = <22>;
385					regulator-disable-ramp-delay = <1160>;
386					regulator-ramp-delay = <100000>;
387					regulator-ramp-delay-scale = <200>;
388
389					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
390					maxim,active-fps-power-up-slot = <6>;
391					maxim,active-fps-power-down-slot = <1>;
392				};
393			};
394		};
395	};
396
397	pmc@7000e400 {
398		nvidia,invert-interrupt;
399		nvidia,suspend-mode = <0>;
400		nvidia,cpu-pwr-good-time = <0>;
401		nvidia,cpu-pwr-off-time = <0>;
402		nvidia,core-pwr-good-time = <4587 3876>;
403		nvidia,core-pwr-off-time = <39065>;
404		nvidia,core-power-req-active-high;
405		nvidia,sys-clock-req-active-high;
406	};
407
408	hda@70030000 {
409		nvidia,model = "jetson-nano-hda";
410
411		status = "okay";
412	};
413
414	usb@70090000 {
415		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
416		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
417		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
418		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>;
419		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
420
421		avdd-usb-supply = <&vdd_3v3_sys>;
422		dvddio-pex-supply = <&vdd_pex_1v05>;
423		hvddio-pex-supply = <&vdd_1v8>;
424		/* these really belong to the XUSB pad controller */
425		avdd-pll-utmip-supply = <&vdd_1v8>;
426		avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
427		dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
428		hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
429
430		status = "okay";
431	};
432
433	padctl@7009f000 {
434		status = "okay";
435
436		avdd-pll-utmip-supply = <&vdd_1v8>;
437		avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
438		dvdd-pex-pll-supply = <&vdd_pex_1v05>;
439		hvdd-pex-pll-e-supply = <&vdd_1v8>;
440
441		pads {
442			usb2 {
443				status = "okay";
444
445				lanes {
446					usb2-0 {
447						nvidia,function = "xusb";
448						status = "okay";
449					};
450
451					usb2-1 {
452						nvidia,function = "xusb";
453						status = "okay";
454					};
455
456					usb2-2 {
457						nvidia,function = "xusb";
458						status = "okay";
459					};
460				};
461			};
462
463			pcie {
464				status = "okay";
465
466				lanes {
467					pcie-0 {
468						nvidia,function = "pcie-x1";
469						status = "okay";
470					};
471
472					pcie-1 {
473						nvidia,function = "pcie-x4";
474						status = "okay";
475					};
476
477					pcie-2 {
478						nvidia,function = "pcie-x4";
479						status = "okay";
480					};
481
482					pcie-3 {
483						nvidia,function = "pcie-x4";
484						status = "okay";
485					};
486
487					pcie-4 {
488						nvidia,function = "pcie-x4";
489						status = "okay";
490					};
491
492					pcie-5 {
493						nvidia,function = "usb3-ss";
494						status = "okay";
495					};
496
497					pcie-6 {
498						nvidia,function = "usb3-ss";
499						status = "okay";
500					};
501				};
502			};
503		};
504
505		ports {
506			usb2-0 {
507				status = "okay";
508				mode = "otg";
509			};
510
511			usb2-1 {
512				status = "okay";
513				mode = "host";
514			};
515
516			usb2-2 {
517				status = "okay";
518				mode = "host";
519			};
520
521			usb3-0 {
522				status = "okay";
523				nvidia,usb2-companion = <1>;
524				vbus-supply = <&vdd_hub_3v3>;
525			};
526		};
527	};
528
529	sdhci@700b0000 {
530		status = "okay";
531		bus-width = <4>;
532
533		cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
534
535		vqmmc-supply = <&vddio_sdmmc>;
536		vmmc-supply = <&vdd_3v3_sd>;
537	};
538
539	clocks {
540		compatible = "simple-bus";
541		#address-cells = <1>;
542		#size-cells = <0>;
543
544		clk32k_in: clock@0 {
545			compatible = "fixed-clock";
546			reg = <0>;
547			#clock-cells = <0>;
548			clock-frequency = <32768>;
549		};
550	};
551
552	cpus {
553		cpu@0 {
554			enable-method = "psci";
555		};
556
557		cpu@1 {
558			enable-method = "psci";
559		};
560
561		cpu@2 {
562			enable-method = "psci";
563		};
564
565		cpu@3 {
566			enable-method = "psci";
567		};
568
569		idle-states {
570			cpu-sleep {
571				status = "okay";
572			};
573		};
574	};
575
576	gpio-keys {
577		compatible = "gpio-keys";
578
579		power {
580			label = "Power";
581			gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
582			linux,input-type = <EV_KEY>;
583			linux,code = <KEY_POWER>;
584			debounce-interval = <30>;
585			wakeup-event-action = <EV_ACT_ASSERTED>;
586			wakeup-source;
587		};
588
589		force-recovery {
590			label = "Force Recovery";
591			gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
592			linux,input-type = <EV_KEY>;
593			linux,code = <BTN_1>;
594			debounce-interval = <30>;
595		};
596	};
597
598	psci {
599		compatible = "arm,psci-1.0";
600		method = "smc";
601	};
602
603	regulators {
604		compatible = "simple-bus";
605		#address-cells = <1>;
606		#size-cells = <0>;
607
608		vdd_5v0_sys: regulator@0 {
609			compatible = "regulator-fixed";
610			reg = <0>;
611
612			regulator-name = "VDD_5V0_SYS";
613			regulator-min-microvolt = <5000000>;
614			regulator-max-microvolt = <5000000>;
615			regulator-always-on;
616			regulator-boot-on;
617		};
618
619		vdd_3v3_sys: regulator@1 {
620			compatible = "regulator-fixed";
621			reg = <1>;
622			regulator-name = "VDD_3V3_SYS";
623			regulator-min-microvolt = <3300000>;
624			regulator-max-microvolt = <3300000>;
625			regulator-enable-ramp-delay = <240>;
626			regulator-disable-ramp-delay = <11340>;
627			regulator-always-on;
628			regulator-boot-on;
629
630			gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
631			enable-active-high;
632
633			vin-supply = <&vdd_5v0_sys>;
634		};
635
636		vdd_3v3_sd: regulator@2 {
637			compatible = "regulator-fixed";
638			reg = <2>;
639
640			regulator-name = "VDD_3V3_SD";
641			regulator-min-microvolt = <3300000>;
642			regulator-max-microvolt = <3300000>;
643
644			gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
645			enable-active-high;
646
647			vin-supply = <&vdd_3v3_sys>;
648		};
649
650		vdd_hdmi: regulator@3 {
651			compatible = "regulator-fixed";
652			reg = <3>;
653
654			regulator-name = "VDD_HDMI_5V0";
655			regulator-min-microvolt = <5000000>;
656			regulator-max-microvolt = <5000000>;
657
658			vin-supply = <&vdd_5v0_sys>;
659		};
660
661		vdd_hub_3v3: regulator@4 {
662			compatible = "regulator-fixed";
663			reg = <4>;
664
665			regulator-name = "VDD_HUB_3V3";
666			regulator-min-microvolt = <3300000>;
667			regulator-max-microvolt = <3300000>;
668
669			gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
670			enable-active-high;
671
672			vin-supply = <&vdd_5v0_sys>;
673		};
674
675		vdd_cpu: regulator@5 {
676			compatible = "regulator-fixed";
677			reg = <5>;
678
679			regulator-name = "VDD_CPU";
680			regulator-min-microvolt = <5000000>;
681			regulator-max-microvolt = <5000000>;
682			regulator-always-on;
683			regulator-boot-on;
684
685			gpio = <&pmic 5 GPIO_ACTIVE_HIGH>;
686			enable-active-high;
687
688			vin-supply = <&vdd_5v0_sys>;
689		};
690
691		vdd_gpu: regulator@6 {
692			compatible = "pwm-regulator";
693			reg = <6>;
694			pwms = <&pwm 1 4880>;
695			regulator-name = "VDD_GPU";
696			regulator-min-microvolt = <710000>;
697			regulator-max-microvolt = <1320000>;
698			regulator-ramp-delay = <80>;
699			regulator-enable-ramp-delay = <2000>;
700			regulator-settling-time-us = <160>;
701			enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
702			vin-supply = <&vdd_5v0_sys>;
703		};
704
705		avdd_io_edp_1v05: regulator@7 {
706			compatible = "regulator-fixed";
707			reg = <7>;
708
709			regulator-name = "AVDD_IO_EDP_1V05";
710			regulator-min-microvolt = <1050000>;
711			regulator-max-microvolt = <1050000>;
712
713			gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
714			enable-active-high;
715
716			vin-supply = <&avdd_1v05_pll>;
717		};
718	};
719};
720