1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/gpio-keys.h> 5#include <dt-bindings/input/linux-event-codes.h> 6#include <dt-bindings/mfd/max77620.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "NVIDIA Jetson Nano Developer Kit"; 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 13 14 aliases { 15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 16 rtc0 = "/i2c@7000d000/pmic@3c"; 17 rtc1 = "/rtc@7000e000"; 18 serial0 = &uarta; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x80000000 0x1 0x0>; 28 }; 29 30 pcie@1003000 { 31 status = "okay"; 32 33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 34 hvddio-pex-supply = <&vdd_1v8>; 35 dvddio-pex-supply = <&vdd_pex_1v05>; 36 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 37 hvdd-pex-pll-e-supply = <&vdd_1v8>; 38 vddio-pex-ctl-supply = <&vdd_1v8>; 39 40 pci@1,0 { 41 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 42 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 43 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>, 44 <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 45 phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 46 nvidia,num-lanes = <4>; 47 status = "okay"; 48 }; 49 50 pci@2,0 { 51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; 52 phy-names = "pcie-0"; 53 status = "okay"; 54 55 ethernet@0,0 { 56 reg = <0x000000 0 0 0 0>; 57 local-mac-address = [ 00 00 00 00 00 00 ]; 58 }; 59 }; 60 }; 61 62 host1x@50000000 { 63 dpaux@54040000 { 64 status = "okay"; 65 }; 66 67 sor@54580000 { 68 status = "okay"; 69 70 avdd-io-supply = <&avdd_1v05>; 71 vdd-pll-supply = <&vdd_1v8>; 72 hdmi-supply = <&vdd_hdmi>; 73 74 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 75 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) 76 GPIO_ACTIVE_LOW>; 77 nvidia,xbar-cfg = <0 1 2 3 4>; 78 }; 79 }; 80 81 gpu@57000000 { 82 vdd-supply = <&vdd_gpu>; 83 status = "okay"; 84 }; 85 86 /* debug port */ 87 serial@70006000 { 88 status = "okay"; 89 }; 90 91 pwm@7000a000 { 92 status = "okay"; 93 }; 94 95 i2c@7000c500 { 96 status = "okay"; 97 clock-frequency = <100000>; 98 99 eeprom@50 { 100 compatible = "atmel,24c02"; 101 reg = <0x50>; 102 103 address-bits = <8>; 104 page-size = <8>; 105 size = <256>; 106 read-only; 107 }; 108 109 eeprom@57 { 110 compatible = "atmel,24c02"; 111 reg = <0x57>; 112 113 address-bits = <8>; 114 page-size = <8>; 115 size = <256>; 116 read-only; 117 }; 118 }; 119 120 hdmi_ddc: i2c@7000c700 { 121 status = "okay"; 122 clock-frequency = <100000>; 123 }; 124 125 i2c@7000d000 { 126 status = "okay"; 127 clock-frequency = <400000>; 128 129 pmic: pmic@3c { 130 compatible = "maxim,max77620"; 131 reg = <0x3c>; 132 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 133 134 #interrupt-cells = <2>; 135 interrupt-controller; 136 137 #gpio-cells = <2>; 138 gpio-controller; 139 140 pinctrl-names = "default"; 141 pinctrl-0 = <&max77620_default>; 142 143 max77620_default: pinmux { 144 gpio0 { 145 pins = "gpio0"; 146 function = "gpio"; 147 }; 148 149 gpio1 { 150 pins = "gpio1"; 151 function = "fps-out"; 152 drive-push-pull = <1>; 153 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 154 maxim,active-fps-power-up-slot = <0>; 155 maxim,active-fps-power-down-slot = <7>; 156 }; 157 158 gpio2 { 159 pins = "gpio2"; 160 function = "fps-out"; 161 drive-open-drain = <1>; 162 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 163 maxim,active-fps-power-up-slot = <0>; 164 maxim,active-fps-power-down-slot = <7>; 165 }; 166 167 gpio3 { 168 pins = "gpio3"; 169 function = "fps-out"; 170 drive-open-drain = <1>; 171 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 172 maxim,active-fps-power-up-slot = <4>; 173 maxim,active-fps-power-down-slot = <3>; 174 }; 175 176 gpio4 { 177 pins = "gpio4"; 178 function = "32k-out1"; 179 }; 180 181 gpio5_6_7 { 182 pins = "gpio5", "gpio6", "gpio7"; 183 function = "gpio"; 184 drive-push-pull = <1>; 185 }; 186 }; 187 188 fps { 189 fps0 { 190 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 191 maxim,suspend-fps-time-period-us = <5120>; 192 }; 193 194 fps1 { 195 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 196 maxim,suspend-fps-time-period-us = <5120>; 197 }; 198 199 fps2 { 200 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 201 }; 202 }; 203 204 regulators { 205 in-ldo0-1-supply = <&vdd_pre>; 206 in-ldo2-supply = <&vdd_3v3_sys>; 207 in-ldo3-5-supply = <&vdd_1v8>; 208 in-ldo4-6-supply = <&vdd_5v0_sys>; 209 in-ldo7-8-supply = <&vdd_pre>; 210 in-sd0-supply = <&vdd_5v0_sys>; 211 in-sd1-supply = <&vdd_5v0_sys>; 212 in-sd2-supply = <&vdd_5v0_sys>; 213 in-sd3-supply = <&vdd_5v0_sys>; 214 215 vdd_soc: sd0 { 216 regulator-name = "VDD_SOC"; 217 regulator-min-microvolt = <1000000>; 218 regulator-max-microvolt = <1170000>; 219 regulator-enable-ramp-delay = <146>; 220 regulator-disable-ramp-delay = <4080>; 221 regulator-ramp-delay = <27500>; 222 regulator-ramp-delay-scale = <300>; 223 regulator-always-on; 224 regulator-boot-on; 225 226 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 227 maxim,active-fps-power-up-slot = <1>; 228 maxim,active-fps-power-down-slot = <6>; 229 }; 230 231 vdd_ddr: sd1 { 232 regulator-name = "VDD_DDR_1V1_PMIC"; 233 regulator-min-microvolt = <1150000>; 234 regulator-max-microvolt = <1150000>; 235 regulator-enable-ramp-delay = <176>; 236 regulator-disable-ramp-delay = <145800>; 237 regulator-ramp-delay = <27500>; 238 regulator-ramp-delay-scale = <300>; 239 regulator-always-on; 240 regulator-boot-on; 241 242 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 243 maxim,active-fps-power-up-slot = <5>; 244 maxim,active-fps-power-down-slot = <2>; 245 }; 246 247 vdd_pre: sd2 { 248 regulator-name = "VDD_PRE_REG_1V35"; 249 regulator-min-microvolt = <1350000>; 250 regulator-max-microvolt = <1350000>; 251 regulator-enable-ramp-delay = <176>; 252 regulator-disable-ramp-delay = <32000>; 253 regulator-ramp-delay = <27500>; 254 regulator-ramp-delay-scale = <350>; 255 regulator-always-on; 256 regulator-boot-on; 257 258 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 259 maxim,active-fps-power-up-slot = <2>; 260 maxim,active-fps-power-down-slot = <5>; 261 }; 262 263 vdd_1v8: sd3 { 264 regulator-name = "VDD_1V8"; 265 regulator-min-microvolt = <1800000>; 266 regulator-max-microvolt = <1800000>; 267 regulator-enable-ramp-delay = <242>; 268 regulator-disable-ramp-delay = <118000>; 269 regulator-ramp-delay = <27500>; 270 regulator-ramp-delay-scale = <360>; 271 regulator-always-on; 272 regulator-boot-on; 273 274 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 275 maxim,active-fps-power-up-slot = <3>; 276 maxim,active-fps-power-down-slot = <4>; 277 }; 278 279 vdd_sys_1v2: ldo0 { 280 regulator-name = "AVDD_SYS_1V2"; 281 regulator-min-microvolt = <1200000>; 282 regulator-max-microvolt = <1200000>; 283 regulator-enable-ramp-delay = <26>; 284 regulator-disable-ramp-delay = <626>; 285 regulator-ramp-delay = <100000>; 286 regulator-ramp-delay-scale = <200>; 287 regulator-always-on; 288 regulator-boot-on; 289 290 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 291 maxim,active-fps-power-up-slot = <0>; 292 maxim,active-fps-power-down-slot = <7>; 293 }; 294 295 vdd_pex_1v05: ldo1 { 296 regulator-name = "VDD_PEX_1V05"; 297 regulator-min-microvolt = <1050000>; 298 regulator-max-microvolt = <1050000>; 299 regulator-enable-ramp-delay = <22>; 300 regulator-disable-ramp-delay = <650>; 301 regulator-ramp-delay = <100000>; 302 regulator-ramp-delay-scale = <200>; 303 304 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 305 maxim,active-fps-power-up-slot = <0>; 306 maxim,active-fps-power-down-slot = <7>; 307 }; 308 309 vddio_sdmmc: ldo2 { 310 regulator-name = "VDDIO_SDMMC"; 311 regulator-min-microvolt = <1800000>; 312 regulator-max-microvolt = <3300000>; 313 regulator-enable-ramp-delay = <62>; 314 regulator-disable-ramp-delay = <650>; 315 regulator-ramp-delay = <100000>; 316 regulator-ramp-delay-scale = <200>; 317 318 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 319 maxim,active-fps-power-up-slot = <0>; 320 maxim,active-fps-power-down-slot = <7>; 321 }; 322 323 ldo3 { 324 status = "disabled"; 325 }; 326 327 vdd_rtc: ldo4 { 328 regulator-name = "VDD_RTC"; 329 regulator-min-microvolt = <850000>; 330 regulator-max-microvolt = <1100000>; 331 regulator-enable-ramp-delay = <22>; 332 regulator-disable-ramp-delay = <610>; 333 regulator-ramp-delay = <100000>; 334 regulator-ramp-delay-scale = <200>; 335 regulator-disable-active-discharge; 336 regulator-always-on; 337 regulator-boot-on; 338 339 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 340 maxim,active-fps-power-up-slot = <1>; 341 maxim,active-fps-power-down-slot = <6>; 342 }; 343 344 ldo5 { 345 status = "disabled"; 346 }; 347 348 ldo6 { 349 status = "disabled"; 350 }; 351 352 avdd_1v05_pll: ldo7 { 353 regulator-name = "AVDD_1V05_PLL"; 354 regulator-min-microvolt = <1050000>; 355 regulator-max-microvolt = <1050000>; 356 regulator-enable-ramp-delay = <24>; 357 regulator-disable-ramp-delay = <2768>; 358 regulator-ramp-delay = <100000>; 359 regulator-ramp-delay-scale = <200>; 360 361 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 362 maxim,active-fps-power-up-slot = <3>; 363 maxim,active-fps-power-down-slot = <4>; 364 }; 365 366 avdd_1v05: ldo8 { 367 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 368 regulator-min-microvolt = <1050000>; 369 regulator-max-microvolt = <1050000>; 370 regulator-enable-ramp-delay = <22>; 371 regulator-disable-ramp-delay = <1160>; 372 regulator-ramp-delay = <100000>; 373 regulator-ramp-delay-scale = <200>; 374 375 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 376 maxim,active-fps-power-up-slot = <6>; 377 maxim,active-fps-power-down-slot = <1>; 378 }; 379 }; 380 }; 381 }; 382 383 pmc@7000e400 { 384 nvidia,invert-interrupt; 385 }; 386 387 hda@70030000 { 388 nvidia,model = "jetson-nano-hda"; 389 390 status = "okay"; 391 }; 392 393 usb@70090000 { 394 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 395 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, 396 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, 397 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 398 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0"; 399 400 avdd-usb-supply = <&vdd_3v3_sys>; 401 dvddio-pex-supply = <&vdd_pex_1v05>; 402 hvddio-pex-supply = <&vdd_1v8>; 403 /* these really belong to the XUSB pad controller */ 404 avdd-pll-utmip-supply = <&vdd_1v8>; 405 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 406 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; 407 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; 408 409 status = "okay"; 410 }; 411 412 padctl@7009f000 { 413 status = "okay"; 414 415 avdd-pll-utmip-supply = <&vdd_1v8>; 416 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 417 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 418 hvdd-pex-pll-e-supply = <&vdd_1v8>; 419 420 pads { 421 usb2 { 422 status = "okay"; 423 424 lanes { 425 usb2-0 { 426 nvidia,function = "xusb"; 427 status = "okay"; 428 }; 429 430 usb2-1 { 431 nvidia,function = "xusb"; 432 status = "okay"; 433 }; 434 435 usb2-2 { 436 nvidia,function = "xusb"; 437 status = "okay"; 438 }; 439 }; 440 }; 441 442 pcie { 443 status = "okay"; 444 445 lanes { 446 pcie-0 { 447 nvidia,function = "pcie-x1"; 448 status = "okay"; 449 }; 450 451 pcie-1 { 452 nvidia,function = "pcie-x4"; 453 status = "okay"; 454 }; 455 456 pcie-2 { 457 nvidia,function = "pcie-x4"; 458 status = "okay"; 459 }; 460 461 pcie-3 { 462 nvidia,function = "pcie-x4"; 463 status = "okay"; 464 }; 465 466 pcie-4 { 467 nvidia,function = "pcie-x4"; 468 status = "okay"; 469 }; 470 471 pcie-5 { 472 nvidia,function = "usb3-ss"; 473 status = "okay"; 474 }; 475 476 pcie-6 { 477 nvidia,function = "usb3-ss"; 478 status = "okay"; 479 }; 480 }; 481 }; 482 }; 483 484 ports { 485 usb2-0 { 486 status = "okay"; 487 mode = "otg"; 488 }; 489 490 usb2-1 { 491 status = "okay"; 492 mode = "host"; 493 }; 494 495 usb2-2 { 496 status = "okay"; 497 mode = "host"; 498 }; 499 500 usb3-0 { 501 status = "okay"; 502 nvidia,usb2-companion = <1>; 503 vbus-supply = <&vdd_hub_3v3>; 504 }; 505 }; 506 }; 507 508 sdhci@700b0000 { 509 status = "okay"; 510 bus-width = <4>; 511 512 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 513 514 vqmmc-supply = <&vddio_sdmmc>; 515 vmmc-supply = <&vdd_3v3_sd>; 516 }; 517 518 clocks { 519 compatible = "simple-bus"; 520 #address-cells = <1>; 521 #size-cells = <0>; 522 523 clk32k_in: clock@0 { 524 compatible = "fixed-clock"; 525 reg = <0>; 526 #clock-cells = <0>; 527 clock-frequency = <32768>; 528 }; 529 }; 530 531 cpus { 532 cpu@0 { 533 enable-method = "psci"; 534 }; 535 536 cpu@1 { 537 enable-method = "psci"; 538 }; 539 540 cpu@2 { 541 enable-method = "psci"; 542 }; 543 544 cpu@3 { 545 enable-method = "psci"; 546 }; 547 548 idle-states { 549 cpu-sleep { 550 status = "okay"; 551 }; 552 }; 553 }; 554 555 gpio-keys { 556 compatible = "gpio-keys"; 557 558 power { 559 label = "Power"; 560 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 561 linux,input-type = <EV_KEY>; 562 linux,code = <KEY_POWER>; 563 debounce-interval = <30>; 564 wakeup-event-action = <EV_ACT_ASSERTED>; 565 wakeup-source; 566 }; 567 568 force-recovery { 569 label = "Force Recovery"; 570 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 571 linux,input-type = <EV_KEY>; 572 linux,code = <BTN_1>; 573 debounce-interval = <30>; 574 }; 575 }; 576 577 psci { 578 compatible = "arm,psci-1.0"; 579 method = "smc"; 580 }; 581 582 regulators { 583 compatible = "simple-bus"; 584 #address-cells = <1>; 585 #size-cells = <0>; 586 587 vdd_5v0_sys: regulator@0 { 588 compatible = "regulator-fixed"; 589 reg = <0>; 590 591 regulator-name = "VDD_5V0_SYS"; 592 regulator-min-microvolt = <5000000>; 593 regulator-max-microvolt = <5000000>; 594 regulator-always-on; 595 regulator-boot-on; 596 }; 597 598 vdd_3v3_sys: regulator@1 { 599 compatible = "regulator-fixed"; 600 reg = <1>; 601 regulator-name = "VDD_3V3_SYS"; 602 regulator-min-microvolt = <3300000>; 603 regulator-max-microvolt = <3300000>; 604 regulator-enable-ramp-delay = <240>; 605 regulator-disable-ramp-delay = <11340>; 606 regulator-always-on; 607 regulator-boot-on; 608 609 gpio = <&pmic 3 GPIO_ACTIVE_HIGH>; 610 enable-active-high; 611 612 vin-supply = <&vdd_5v0_sys>; 613 }; 614 615 vdd_3v3_sd: regulator@2 { 616 compatible = "regulator-fixed"; 617 reg = <2>; 618 619 regulator-name = "VDD_3V3_SD"; 620 regulator-min-microvolt = <3300000>; 621 regulator-max-microvolt = <3300000>; 622 623 gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 624 enable-active-high; 625 626 vin-supply = <&vdd_3v3_sys>; 627 }; 628 629 vdd_hdmi: regulator@3 { 630 compatible = "regulator-fixed"; 631 reg = <3>; 632 633 regulator-name = "VDD_HDMI_5V0"; 634 regulator-min-microvolt = <5000000>; 635 regulator-max-microvolt = <5000000>; 636 637 vin-supply = <&vdd_5v0_sys>; 638 }; 639 640 vdd_hub_3v3: regulator@4 { 641 compatible = "regulator-fixed"; 642 reg = <4>; 643 644 regulator-name = "VDD_HUB_3V3"; 645 regulator-min-microvolt = <3300000>; 646 regulator-max-microvolt = <3300000>; 647 648 gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 649 enable-active-high; 650 651 vin-supply = <&vdd_5v0_sys>; 652 }; 653 654 vdd_cpu: regulator@5 { 655 compatible = "regulator-fixed"; 656 reg = <5>; 657 658 regulator-name = "VDD_CPU"; 659 regulator-min-microvolt = <5000000>; 660 regulator-max-microvolt = <5000000>; 661 regulator-always-on; 662 regulator-boot-on; 663 664 gpio = <&pmic 5 GPIO_ACTIVE_HIGH>; 665 enable-active-high; 666 667 vin-supply = <&vdd_5v0_sys>; 668 }; 669 670 vdd_gpu: regulator@6 { 671 compatible = "pwm-regulator"; 672 reg = <6>; 673 pwms = <&pwm 1 4880>; 674 regulator-name = "VDD_GPU"; 675 regulator-min-microvolt = <710000>; 676 regulator-max-microvolt = <1320000>; 677 regulator-ramp-delay = <80>; 678 regulator-enable-ramp-delay = <2000>; 679 regulator-settling-time-us = <160>; 680 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 681 vin-supply = <&vdd_5v0_sys>; 682 }; 683 }; 684}; 685