1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "tegra210-p2180.dtsi"
5#include "tegra210-p2597.dtsi"
6
7/ {
8	model = "NVIDIA Jetson TX1 Developer Kit";
9	compatible = "nvidia,p2371-2180", "nvidia,tegra210";
10
11	pcie@1003000 {
12		status = "okay";
13
14		hvddio-pex-supply = <&vdd_1v8>;
15		dvddio-pex-supply = <&vdd_pex_1v05>;
16		vddio-pex-ctl-supply = <&vdd_1v8>;
17
18		pci@1,0 {
19			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
21			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
22			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
23			phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
24			status = "okay";
25		};
26
27		pci@2,0 {
28			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
29			phy-names = "pcie-0";
30			status = "okay";
31		};
32	};
33
34	host1x@50000000 {
35		dsi@54300000 {
36			status = "okay";
37
38			avdd-dsi-csi-supply = <&vdd_dsi_csi>;
39
40			panel@0 {
41				compatible = "auo,b080uan01";
42				reg = <0>;
43
44				enable-gpios = <&gpio TEGRA_GPIO(V, 2)
45						GPIO_ACTIVE_HIGH>;
46				power-supply = <&vdd_5v0_io>;
47				backlight = <&backlight>;
48			};
49		};
50	};
51
52	i2c@7000c400 {
53		backlight: backlight@2c {
54			compatible = "ti,lp8557";
55			reg = <0x2c>;
56			power-supply = <&vdd_3v3_sys>;
57
58			dev-ctrl = /bits/ 8 <0x80>;
59			init-brt = /bits/ 8 <0xff>;
60
61			pwms = <&pwm 0 29334>;
62			pwm-names = "lp8557";
63
64			/* boost frequency 1 MHz */
65			rom-13h {
66				rom-addr = /bits/ 8 <0x13>;
67				rom-val = /bits/ 8 <0x01>;
68			};
69
70			/* 3 LED string */
71			rom-14h {
72				rom-addr = /bits/ 8 <0x14>;
73				rom-val = /bits/ 8 <0x87>;
74			};
75		};
76	};
77
78	i2c@7000c500 {
79		/* carrier board ID EEPROM */
80		eeprom@57 {
81			compatible = "atmel,24c02";
82			reg = <0x57>;
83
84			label = "system";
85			vcc-supply = <&vdd_1v8>;
86			address-width = <8>;
87			pagesize = <8>;
88			size = <256>;
89			read-only;
90		};
91	};
92
93	clock@70110000 {
94		status = "okay";
95
96		nvidia,cf = <6>;
97		nvidia,ci = <0>;
98		nvidia,cg = <2>;
99		nvidia,droop-ctrl = <0x00000f00>;
100		nvidia,force-mode = <1>;
101		nvidia,sample-rate = <25000>;
102
103		nvidia,pwm-min-microvolts = <708000>;
104		nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
105		nvidia,pwm-to-pmic;
106		nvidia,pwm-tristate-microvolts = <1000000>;
107		nvidia,pwm-voltage-step-microvolts = <19200>;
108
109		pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
110		pinctrl-0 = <&dvfs_pwm_active_state>;
111		pinctrl-1 = <&dvfs_pwm_inactive_state>;
112	};
113
114	aconnect@702c0000 {
115		status = "okay";
116
117		ahub@702d0800 {
118			status = "okay";
119
120			admaif@702d0000 {
121				status = "okay";
122			};
123
124			i2s@702d1000 {
125				status = "okay";
126
127				ports {
128					#address-cells = <1>;
129					#size-cells = <0>;
130
131					port@0 {
132						reg = <0>;
133
134						i2s1_cif_ep: endpoint {
135							remote-endpoint = <&xbar_i2s1_ep>;
136						};
137					};
138
139					i2s1_port: port@1 {
140						reg = <1>;
141
142						i2s1_dap_ep: endpoint {
143							dai-format = "i2s";
144							/* Placeholder for external Codec */
145						};
146					};
147				};
148			};
149
150			i2s@702d1100 {
151				status = "okay";
152
153				ports {
154					#address-cells = <1>;
155					#size-cells = <0>;
156
157					port@0 {
158						reg = <0>;
159
160						i2s2_cif_ep: endpoint {
161							remote-endpoint = <&xbar_i2s2_ep>;
162						};
163					};
164
165					i2s2_port: port@1 {
166						reg = <1>;
167
168						i2s2_dap_ep: endpoint {
169							dai-format = "i2s";
170							/* Placeholder for external Codec */
171						};
172					};
173				};
174			};
175
176			i2s@702d1200 {
177				status = "okay";
178
179				ports {
180					#address-cells = <1>;
181					#size-cells = <0>;
182
183					port@0 {
184						reg = <0>;
185
186						i2s3_cif_ep: endpoint {
187							remote-endpoint = <&xbar_i2s3_ep>;
188						};
189					};
190
191					i2s3_port: port@1 {
192						reg = <1>;
193
194						i2s3_dap_ep: endpoint {
195							dai-format = "i2s";
196							/* Placeholder for external Codec */
197						};
198					};
199				};
200			};
201
202			i2s@702d1300 {
203				status = "okay";
204
205				ports {
206					#address-cells = <1>;
207					#size-cells = <0>;
208
209					port@0 {
210						reg = <0>;
211
212						i2s4_cif_ep: endpoint {
213							remote-endpoint = <&xbar_i2s4_ep>;
214						};
215					};
216
217					i2s4_port: port@1 {
218						reg = <1>;
219
220						i2s4_dap_ep: endpoint {
221							dai-format = "i2s";
222							/* Placeholder for external Codec */
223						};
224					};
225				};
226			};
227
228			i2s@702d1400 {
229				status = "okay";
230
231				ports {
232					#address-cells = <1>;
233					#size-cells = <0>;
234
235					port@0 {
236						reg = <0>;
237
238						i2s5_cif_ep: endpoint {
239							remote-endpoint = <&xbar_i2s5_ep>;
240						};
241					};
242
243					i2s5_port: port@1 {
244						reg = <1>;
245
246						i2s5_dap_ep: endpoint {
247							dai-format = "i2s";
248							/* Placeholder for external Codec */
249						};
250					};
251				};
252			};
253
254			sfc@702d2000 {
255				status = "okay";
256
257				ports {
258					#address-cells = <1>;
259					#size-cells = <0>;
260
261					port@0 {
262						reg = <0>;
263
264						sfc1_cif_in_ep: endpoint {
265							remote-endpoint = <&xbar_sfc1_in_ep>;
266						};
267					};
268
269					sfc1_out_port: port@1 {
270						reg = <1>;
271
272						sfc1_cif_out_ep: endpoint {
273							remote-endpoint = <&xbar_sfc1_out_ep>;
274						};
275					};
276				};
277			};
278
279			sfc@702d2200 {
280				status = "okay";
281
282				ports {
283					#address-cells = <1>;
284					#size-cells = <0>;
285
286					port@0 {
287						reg = <0>;
288
289						sfc2_cif_in_ep: endpoint {
290							remote-endpoint = <&xbar_sfc2_in_ep>;
291						};
292					};
293
294					sfc2_out_port: port@1 {
295						reg = <1>;
296
297						sfc2_cif_out_ep: endpoint {
298							remote-endpoint = <&xbar_sfc2_out_ep>;
299						};
300					};
301				};
302			};
303
304			sfc@702d2400 {
305				status = "okay";
306
307				ports {
308					#address-cells = <1>;
309					#size-cells = <0>;
310
311					port@0 {
312						reg = <0>;
313
314						sfc3_cif_in_ep: endpoint {
315							remote-endpoint = <&xbar_sfc3_in_ep>;
316						};
317					};
318
319					sfc3_out_port: port@1 {
320						reg = <1>;
321
322						sfc3_cif_out_ep: endpoint {
323							remote-endpoint = <&xbar_sfc3_out_ep>;
324						};
325					};
326				};
327			};
328
329			sfc@702d2600 {
330				status = "okay";
331
332				ports {
333					#address-cells = <1>;
334					#size-cells = <0>;
335
336					port@0 {
337						reg = <0>;
338
339						sfc4_cif_in_ep: endpoint {
340							remote-endpoint = <&xbar_sfc4_in_ep>;
341						};
342					};
343
344					sfc4_out_port: port@1 {
345						reg = <1>;
346
347						sfc4_cif_out_ep: endpoint {
348							remote-endpoint = <&xbar_sfc4_out_ep>;
349						};
350					};
351				};
352			};
353
354			amx@702d3000 {
355				status = "okay";
356
357				ports {
358					#address-cells = <1>;
359					#size-cells = <0>;
360
361					port@0 {
362						reg = <0>;
363
364						amx1_in1_ep: endpoint {
365							remote-endpoint = <&xbar_amx1_in1_ep>;
366						};
367					};
368
369					port@1 {
370						reg = <1>;
371
372						amx1_in2_ep: endpoint {
373							remote-endpoint = <&xbar_amx1_in2_ep>;
374						};
375					};
376
377					port@2 {
378						reg = <2>;
379
380						amx1_in3_ep: endpoint {
381							remote-endpoint = <&xbar_amx1_in3_ep>;
382						};
383					};
384
385					port@3 {
386						reg = <3>;
387
388						amx1_in4_ep: endpoint {
389							remote-endpoint = <&xbar_amx1_in4_ep>;
390						};
391					};
392
393					amx1_out_port: port@4 {
394						reg = <4>;
395
396						amx1_out_ep: endpoint {
397							remote-endpoint = <&xbar_amx1_out_ep>;
398						};
399					};
400				};
401			};
402
403			amx@702d3100 {
404				status = "okay";
405
406				ports {
407					#address-cells = <1>;
408					#size-cells = <0>;
409
410					port@0 {
411						reg = <0>;
412
413						amx2_in1_ep: endpoint {
414							remote-endpoint = <&xbar_amx2_in1_ep>;
415						};
416					};
417
418					port@1 {
419						reg = <1>;
420
421						amx2_in2_ep: endpoint {
422							remote-endpoint = <&xbar_amx2_in2_ep>;
423						};
424					};
425
426					amx2_in3_port: port@2 {
427						reg = <2>;
428
429						amx2_in3_ep: endpoint {
430							remote-endpoint = <&xbar_amx2_in3_ep>;
431						};
432					};
433
434					amx2_in4_port: port@3 {
435						reg = <3>;
436
437						amx2_in4_ep: endpoint {
438							remote-endpoint = <&xbar_amx2_in4_ep>;
439						};
440					};
441
442					amx2_out_port: port@4 {
443						reg = <4>;
444
445						amx2_out_ep: endpoint {
446							remote-endpoint = <&xbar_amx2_out_ep>;
447						};
448					};
449				};
450			};
451
452			adx@702d3800 {
453				status = "okay";
454
455				ports {
456					#address-cells = <1>;
457					#size-cells = <0>;
458
459					port@0 {
460						reg = <0>;
461
462						adx1_in_ep: endpoint {
463							remote-endpoint = <&xbar_adx1_in_ep>;
464						};
465					};
466
467					adx1_out1_port: port@1 {
468						reg = <1>;
469
470						adx1_out1_ep: endpoint {
471							remote-endpoint = <&xbar_adx1_out1_ep>;
472						};
473					};
474
475					adx1_out2_port: port@2 {
476						reg = <2>;
477
478						adx1_out2_ep: endpoint {
479							remote-endpoint = <&xbar_adx1_out2_ep>;
480						};
481					};
482
483					adx1_out3_port: port@3 {
484						reg = <3>;
485
486						adx1_out3_ep: endpoint {
487							remote-endpoint = <&xbar_adx1_out3_ep>;
488						};
489					};
490
491					adx1_out4_port: port@4 {
492						reg = <4>;
493
494						adx1_out4_ep: endpoint {
495							remote-endpoint = <&xbar_adx1_out4_ep>;
496						};
497					};
498				};
499			};
500
501			adx@702d3900 {
502				status = "okay";
503
504				ports {
505					#address-cells = <1>;
506					#size-cells = <0>;
507
508					port@0 {
509						reg = <0>;
510
511						adx2_in_ep: endpoint {
512							remote-endpoint = <&xbar_adx2_in_ep>;
513						};
514					};
515
516					adx2_out1_port: port@1 {
517						reg = <1>;
518
519						adx2_out1_ep: endpoint {
520							remote-endpoint = <&xbar_adx2_out1_ep>;
521						};
522					};
523
524					adx2_out2_port: port@2 {
525						reg = <2>;
526
527						adx2_out2_ep: endpoint {
528							remote-endpoint = <&xbar_adx2_out2_ep>;
529						};
530					};
531
532					adx2_out3_port: port@3 {
533						reg = <3>;
534
535						adx2_out3_ep: endpoint {
536							remote-endpoint = <&xbar_adx2_out3_ep>;
537						};
538					};
539
540					adx2_out4_port: port@4 {
541						reg = <4>;
542
543						adx2_out4_ep: endpoint {
544							remote-endpoint = <&xbar_adx2_out4_ep>;
545						};
546					};
547				};
548			};
549
550			dmic@702d4000 {
551				status = "okay";
552
553				ports {
554					#address-cells = <1>;
555					#size-cells = <0>;
556
557					port@0 {
558						reg = <0>;
559
560						dmic1_cif_ep: endpoint {
561							remote-endpoint = <&xbar_dmic1_ep>;
562						};
563					};
564
565					dmic1_port: port@1 {
566						reg = <1>;
567
568						dmic1_dap_ep: endpoint {
569							/* Placeholder for external Codec */
570						};
571					};
572				};
573			};
574
575			dmic@702d4100 {
576				status = "okay";
577
578				ports {
579					#address-cells = <1>;
580					#size-cells = <0>;
581
582					port@0 {
583						reg = <0>;
584
585						dmic2_cif_ep: endpoint {
586							remote-endpoint = <&xbar_dmic2_ep>;
587						};
588					};
589
590					dmic2_port: port@1 {
591						reg = <1>;
592
593						dmic2_dap_ep: endpoint {
594							/* Placeholder for external Codec */
595						};
596					};
597				};
598			};
599
600			dmic@702d4200 {
601				status = "okay";
602
603				ports {
604					#address-cells = <1>;
605					#size-cells = <0>;
606
607					port@0 {
608						reg = <0>;
609
610						dmic3_cif_ep: endpoint {
611							remote-endpoint = <&xbar_dmic3_ep>;
612						};
613					};
614
615					dmic3_port: port@1 {
616						reg = <1>;
617
618						dmic3_dap_ep: endpoint {
619							/* Placeholder for external Codec */
620						};
621					};
622				};
623			};
624
625			processing-engine@702d8000 {
626				status = "okay";
627
628				ports {
629					#address-cells = <1>;
630					#size-cells = <0>;
631
632					port@0 {
633						reg = <0x0>;
634
635						ope1_cif_in_ep: endpoint {
636							remote-endpoint = <&xbar_ope1_in_ep>;
637						};
638					};
639
640					ope1_out_port: port@1 {
641						reg = <0x1>;
642
643						ope1_cif_out_ep: endpoint {
644							remote-endpoint = <&xbar_ope1_out_ep>;
645						};
646					};
647				};
648			};
649
650			processing-engine@702d8400 {
651				status = "okay";
652
653				ports {
654					#address-cells = <1>;
655					#size-cells = <0>;
656
657					port@0 {
658						reg = <0x0>;
659
660						ope2_cif_in_ep: endpoint {
661							remote-endpoint = <&xbar_ope2_in_ep>;
662						};
663					};
664
665					ope2_out_port: port@1 {
666						reg = <0x1>;
667
668						ope2_cif_out_ep: endpoint {
669							remote-endpoint = <&xbar_ope2_out_ep>;
670						};
671					};
672				};
673			};
674
675			mvc@702da000 {
676				status = "okay";
677
678				ports {
679					#address-cells = <1>;
680					#size-cells = <0>;
681
682					port@0 {
683						reg = <0>;
684
685						mvc1_cif_in_ep: endpoint {
686							remote-endpoint = <&xbar_mvc1_in_ep>;
687						};
688					};
689
690					mvc1_out_port: port@1 {
691						reg = <1>;
692
693						mvc1_cif_out_ep: endpoint {
694							remote-endpoint = <&xbar_mvc1_out_ep>;
695						};
696					};
697				};
698			};
699
700			mvc@702da200 {
701				status = "okay";
702
703				ports {
704					#address-cells = <1>;
705					#size-cells = <0>;
706
707					port@0 {
708						reg = <0>;
709
710						mvc2_cif_in_ep: endpoint {
711							remote-endpoint = <&xbar_mvc2_in_ep>;
712						};
713					};
714
715					mvc2_out_port: port@1 {
716						reg = <1>;
717
718						mvc2_cif_out_ep: endpoint {
719							remote-endpoint = <&xbar_mvc2_out_ep>;
720						};
721					};
722				};
723			};
724
725			amixer@702dbb00 {
726				status = "okay";
727
728				ports {
729					#address-cells = <1>;
730					#size-cells = <0>;
731
732					port@0 {
733						reg = <0x0>;
734
735						mixer_in1_ep: endpoint {
736							remote-endpoint = <&xbar_mixer_in1_ep>;
737						};
738					};
739
740					port@1 {
741						reg = <0x1>;
742
743						mixer_in2_ep: endpoint {
744							remote-endpoint = <&xbar_mixer_in2_ep>;
745						};
746					};
747
748					port@2 {
749						reg = <0x2>;
750
751						mixer_in3_ep: endpoint {
752							remote-endpoint = <&xbar_mixer_in3_ep>;
753						};
754					};
755
756					port@3 {
757						reg = <0x3>;
758
759						mixer_in4_ep: endpoint {
760							remote-endpoint = <&xbar_mixer_in4_ep>;
761						};
762					};
763
764					port@4 {
765						reg = <0x4>;
766
767						mixer_in5_ep: endpoint {
768							remote-endpoint = <&xbar_mixer_in5_ep>;
769						};
770					};
771
772					port@5 {
773						reg = <0x5>;
774
775						mixer_in6_ep: endpoint {
776							remote-endpoint = <&xbar_mixer_in6_ep>;
777						};
778					};
779
780					port@6 {
781						reg = <0x6>;
782
783						mixer_in7_ep: endpoint {
784							remote-endpoint = <&xbar_mixer_in7_ep>;
785						};
786					};
787
788					port@7 {
789						reg = <0x7>;
790
791						mixer_in8_ep: endpoint {
792							remote-endpoint = <&xbar_mixer_in8_ep>;
793						};
794					};
795
796					port@8 {
797						reg = <0x8>;
798
799						mixer_in9_ep: endpoint {
800							remote-endpoint = <&xbar_mixer_in9_ep>;
801						};
802					};
803
804					port@9 {
805						reg = <0x9>;
806
807						mixer_in10_ep: endpoint {
808							remote-endpoint = <&xbar_mixer_in10_ep>;
809						};
810					};
811
812					mixer_out1_port: port@a {
813						reg = <0xa>;
814
815						mixer_out1_ep: endpoint {
816							remote-endpoint = <&xbar_mixer_out1_ep>;
817						};
818					};
819
820					mixer_out2_port: port@b {
821						reg = <0xb>;
822
823						mixer_out2_ep: endpoint {
824							remote-endpoint = <&xbar_mixer_out2_ep>;
825						};
826					};
827
828					mixer_out3_port: port@c {
829						reg = <0xc>;
830
831						mixer_out3_ep: endpoint {
832							remote-endpoint = <&xbar_mixer_out3_ep>;
833						};
834					};
835
836					mixer_out4_port: port@d {
837						reg = <0xd>;
838
839						mixer_out4_ep: endpoint {
840							remote-endpoint = <&xbar_mixer_out4_ep>;
841						};
842					};
843
844					mixer_out5_port: port@e {
845						reg = <0xe>;
846
847						mixer_out5_ep: endpoint {
848							remote-endpoint = <&xbar_mixer_out5_ep>;
849						};
850					};
851				};
852			};
853
854			ports {
855				xbar_i2s1_port: port@a {
856					reg = <0xa>;
857
858					xbar_i2s1_ep: endpoint {
859						remote-endpoint = <&i2s1_cif_ep>;
860					};
861				};
862
863				xbar_i2s2_port: port@b {
864					reg = <0xb>;
865
866					xbar_i2s2_ep: endpoint {
867						remote-endpoint = <&i2s2_cif_ep>;
868					};
869				};
870
871				xbar_i2s3_port: port@c {
872					reg = <0xc>;
873
874					xbar_i2s3_ep: endpoint {
875						remote-endpoint = <&i2s3_cif_ep>;
876					};
877				};
878
879				xbar_i2s4_port: port@d {
880					reg = <0xd>;
881
882					xbar_i2s4_ep: endpoint {
883						remote-endpoint = <&i2s4_cif_ep>;
884					};
885				};
886
887				xbar_i2s5_port: port@e {
888					reg = <0xe>;
889
890					xbar_i2s5_ep: endpoint {
891						remote-endpoint = <&i2s5_cif_ep>;
892					};
893				};
894
895				xbar_dmic1_port: port@f {
896					reg = <0xf>;
897
898					xbar_dmic1_ep: endpoint {
899						remote-endpoint = <&dmic1_cif_ep>;
900					};
901				};
902
903				xbar_dmic2_port: port@10 {
904					reg = <0x10>;
905
906					xbar_dmic2_ep: endpoint {
907						remote-endpoint = <&dmic2_cif_ep>;
908					};
909				};
910
911				xbar_dmic3_port: port@11 {
912					reg = <0x11>;
913
914					xbar_dmic3_ep: endpoint {
915						remote-endpoint = <&dmic3_cif_ep>;
916					};
917				};
918
919				xbar_sfc1_in_port: port@12 {
920					reg = <0x12>;
921
922					xbar_sfc1_in_ep: endpoint {
923						remote-endpoint = <&sfc1_cif_in_ep>;
924					};
925				};
926
927				port@13 {
928					reg = <0x13>;
929
930					xbar_sfc1_out_ep: endpoint {
931						remote-endpoint = <&sfc1_cif_out_ep>;
932					};
933				};
934
935				xbar_sfc2_in_port: port@14 {
936					reg = <0x14>;
937
938					xbar_sfc2_in_ep: endpoint {
939						remote-endpoint = <&sfc2_cif_in_ep>;
940					};
941				};
942
943				port@15 {
944					reg = <0x15>;
945
946					xbar_sfc2_out_ep: endpoint {
947						remote-endpoint = <&sfc2_cif_out_ep>;
948					};
949				};
950
951				xbar_sfc3_in_port: port@16 {
952					reg = <0x16>;
953
954					xbar_sfc3_in_ep: endpoint {
955						remote-endpoint = <&sfc3_cif_in_ep>;
956					};
957				};
958
959				port@17 {
960					reg = <0x17>;
961
962					xbar_sfc3_out_ep: endpoint {
963						remote-endpoint = <&sfc3_cif_out_ep>;
964					};
965				};
966
967				xbar_sfc4_in_port: port@18 {
968					reg = <0x18>;
969
970					xbar_sfc4_in_ep: endpoint {
971						remote-endpoint = <&sfc4_cif_in_ep>;
972					};
973				};
974
975				port@19 {
976					reg = <0x19>;
977
978					xbar_sfc4_out_ep: endpoint {
979						remote-endpoint = <&sfc4_cif_out_ep>;
980					};
981				};
982
983				xbar_mvc1_in_port: port@1a {
984					reg = <0x1a>;
985
986					xbar_mvc1_in_ep: endpoint {
987						remote-endpoint = <&mvc1_cif_in_ep>;
988					};
989				};
990
991				port@1b {
992					reg = <0x1b>;
993
994					xbar_mvc1_out_ep: endpoint {
995						remote-endpoint = <&mvc1_cif_out_ep>;
996					};
997				};
998
999				xbar_mvc2_in_port: port@1c {
1000					reg = <0x1c>;
1001
1002					xbar_mvc2_in_ep: endpoint {
1003						remote-endpoint = <&mvc2_cif_in_ep>;
1004					};
1005				};
1006
1007				port@1d {
1008					reg = <0x1d>;
1009
1010					xbar_mvc2_out_ep: endpoint {
1011						remote-endpoint = <&mvc2_cif_out_ep>;
1012					};
1013				};
1014
1015				xbar_amx1_in1_port: port@1e {
1016					reg = <0x1e>;
1017
1018					xbar_amx1_in1_ep: endpoint {
1019						remote-endpoint = <&amx1_in1_ep>;
1020					};
1021				};
1022
1023				xbar_amx1_in2_port: port@1f {
1024					reg = <0x1f>;
1025
1026					xbar_amx1_in2_ep: endpoint {
1027						remote-endpoint = <&amx1_in2_ep>;
1028					};
1029				};
1030
1031				xbar_amx1_in3_port: port@20 {
1032					reg = <0x20>;
1033
1034					xbar_amx1_in3_ep: endpoint {
1035						remote-endpoint = <&amx1_in3_ep>;
1036					};
1037				};
1038
1039				xbar_amx1_in4_port: port@21 {
1040					reg = <0x21>;
1041
1042					xbar_amx1_in4_ep: endpoint {
1043						remote-endpoint = <&amx1_in4_ep>;
1044					};
1045				};
1046
1047				port@22 {
1048					reg = <0x22>;
1049
1050					xbar_amx1_out_ep: endpoint {
1051						remote-endpoint = <&amx1_out_ep>;
1052					};
1053				};
1054
1055				xbar_amx2_in1_port: port@23 {
1056					reg = <0x23>;
1057
1058					xbar_amx2_in1_ep: endpoint {
1059						remote-endpoint = <&amx2_in1_ep>;
1060					};
1061				};
1062
1063				xbar_amx2_in2_port: port@24 {
1064					reg = <0x24>;
1065
1066					xbar_amx2_in2_ep: endpoint {
1067						remote-endpoint = <&amx2_in2_ep>;
1068					};
1069				};
1070
1071				xbar_amx2_in3_port: port@25 {
1072					reg = <0x25>;
1073
1074					xbar_amx2_in3_ep: endpoint {
1075						remote-endpoint = <&amx2_in3_ep>;
1076					};
1077				};
1078
1079				xbar_amx2_in4_port: port@26 {
1080					reg = <0x26>;
1081
1082					xbar_amx2_in4_ep: endpoint {
1083						remote-endpoint = <&amx2_in4_ep>;
1084					};
1085				};
1086
1087				port@27 {
1088					reg = <0x27>;
1089
1090					xbar_amx2_out_ep: endpoint {
1091						remote-endpoint = <&amx2_out_ep>;
1092					};
1093				};
1094
1095				xbar_adx1_in_port: port@28 {
1096					reg = <0x28>;
1097
1098					xbar_adx1_in_ep: endpoint {
1099						remote-endpoint = <&adx1_in_ep>;
1100					};
1101				};
1102
1103				port@29 {
1104					reg = <0x29>;
1105
1106					xbar_adx1_out1_ep: endpoint {
1107						remote-endpoint = <&adx1_out1_ep>;
1108					};
1109				};
1110
1111				port@2a {
1112					reg = <0x2a>;
1113
1114					xbar_adx1_out2_ep: endpoint {
1115						remote-endpoint = <&adx1_out2_ep>;
1116					};
1117				};
1118
1119				port@2b {
1120					reg = <0x2b>;
1121
1122					xbar_adx1_out3_ep: endpoint {
1123						remote-endpoint = <&adx1_out3_ep>;
1124					};
1125				};
1126
1127				port@2c {
1128					reg = <0x2c>;
1129
1130					xbar_adx1_out4_ep: endpoint {
1131						remote-endpoint = <&adx1_out4_ep>;
1132					};
1133				};
1134
1135				xbar_adx2_in_port: port@2d {
1136					reg = <0x2d>;
1137
1138					xbar_adx2_in_ep: endpoint {
1139						remote-endpoint = <&adx2_in_ep>;
1140					};
1141				};
1142
1143				port@2e {
1144					reg = <0x2e>;
1145
1146					xbar_adx2_out1_ep: endpoint {
1147						remote-endpoint = <&adx2_out1_ep>;
1148					};
1149				};
1150
1151				port@2f {
1152					reg = <0x2f>;
1153
1154					xbar_adx2_out2_ep: endpoint {
1155						remote-endpoint = <&adx2_out2_ep>;
1156					};
1157				};
1158
1159				port@30 {
1160					reg = <0x30>;
1161
1162					xbar_adx2_out3_ep: endpoint {
1163						remote-endpoint = <&adx2_out3_ep>;
1164					};
1165				};
1166
1167				port@31 {
1168					reg = <0x31>;
1169
1170					xbar_adx2_out4_ep: endpoint {
1171						remote-endpoint = <&adx2_out4_ep>;
1172					};
1173				};
1174
1175				xbar_mixer_in1_port: port@32 {
1176					reg = <0x32>;
1177
1178					xbar_mixer_in1_ep: endpoint {
1179						remote-endpoint = <&mixer_in1_ep>;
1180					};
1181				};
1182
1183				xbar_mixer_in2_port: port@33 {
1184					reg = <0x33>;
1185
1186					xbar_mixer_in2_ep: endpoint {
1187						remote-endpoint = <&mixer_in2_ep>;
1188					};
1189				};
1190
1191				xbar_mixer_in3_port: port@34 {
1192					reg = <0x34>;
1193
1194					xbar_mixer_in3_ep: endpoint {
1195						remote-endpoint = <&mixer_in3_ep>;
1196					};
1197				};
1198
1199				xbar_mixer_in4_port: port@35 {
1200					reg = <0x35>;
1201
1202					xbar_mixer_in4_ep: endpoint {
1203						remote-endpoint = <&mixer_in4_ep>;
1204					};
1205				};
1206
1207				xbar_mixer_in5_port: port@36 {
1208					reg = <0x36>;
1209
1210					xbar_mixer_in5_ep: endpoint {
1211						remote-endpoint = <&mixer_in5_ep>;
1212					};
1213				};
1214
1215				xbar_mixer_in6_port: port@37 {
1216					reg = <0x37>;
1217
1218					xbar_mixer_in6_ep: endpoint {
1219						remote-endpoint = <&mixer_in6_ep>;
1220					};
1221				};
1222
1223				xbar_mixer_in7_port: port@38 {
1224					reg = <0x38>;
1225
1226					xbar_mixer_in7_ep: endpoint {
1227						remote-endpoint = <&mixer_in7_ep>;
1228					};
1229				};
1230
1231				xbar_mixer_in8_port: port@39 {
1232					reg = <0x39>;
1233
1234					xbar_mixer_in8_ep: endpoint {
1235						remote-endpoint = <&mixer_in8_ep>;
1236					};
1237				};
1238
1239				xbar_mixer_in9_port: port@3a {
1240					reg = <0x3a>;
1241
1242					xbar_mixer_in9_ep: endpoint {
1243						remote-endpoint = <&mixer_in9_ep>;
1244					};
1245				};
1246
1247				xbar_mixer_in10_port: port@3b {
1248					reg = <0x3b>;
1249
1250					xbar_mixer_in10_ep: endpoint {
1251						remote-endpoint = <&mixer_in10_ep>;
1252					};
1253				};
1254
1255				port@3c {
1256					reg = <0x3c>;
1257
1258					xbar_mixer_out1_ep: endpoint {
1259						remote-endpoint = <&mixer_out1_ep>;
1260					};
1261				};
1262
1263				port@3d {
1264					reg = <0x3d>;
1265
1266					xbar_mixer_out2_ep: endpoint {
1267						remote-endpoint = <&mixer_out2_ep>;
1268					};
1269				};
1270
1271				port@3e {
1272					reg = <0x3e>;
1273
1274					xbar_mixer_out3_ep: endpoint {
1275						remote-endpoint = <&mixer_out3_ep>;
1276					};
1277				};
1278
1279				port@3f {
1280					reg = <0x3f>;
1281
1282					xbar_mixer_out4_ep: endpoint {
1283						remote-endpoint = <&mixer_out4_ep>;
1284					};
1285				};
1286
1287				port@40 {
1288					reg = <0x40>;
1289
1290					xbar_mixer_out5_ep: endpoint {
1291						remote-endpoint = <&mixer_out5_ep>;
1292					};
1293				};
1294
1295				xbar_ope1_in_port: port@41 {
1296					reg = <0x41>;
1297
1298					xbar_ope1_in_ep: endpoint {
1299						remote-endpoint = <&ope1_cif_in_ep>;
1300					};
1301				};
1302
1303				port@42 {
1304					reg = <0x42>;
1305
1306					xbar_ope1_out_ep: endpoint {
1307						remote-endpoint = <&ope1_cif_out_ep>;
1308					};
1309				};
1310
1311				xbar_ope2_in_port: port@43 {
1312					reg = <0x43>;
1313
1314					xbar_ope2_in_ep: endpoint {
1315						remote-endpoint = <&ope2_cif_in_ep>;
1316					};
1317				};
1318
1319				port@44 {
1320					reg = <0x44>;
1321
1322					xbar_ope2_out_ep: endpoint {
1323						remote-endpoint = <&ope2_cif_out_ep>;
1324					};
1325				};
1326			};
1327		};
1328
1329		dma-controller@702e2000 {
1330			status = "okay";
1331		};
1332
1333		interrupt-controller@702f9000 {
1334			status = "okay";
1335		};
1336	};
1337
1338	sound {
1339		compatible = "nvidia,tegra210-audio-graph-card";
1340		status = "okay";
1341
1342		dais = /* FE */
1343		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
1344		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
1345		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
1346		       <&admaif10_port>,
1347		       /* Router */
1348		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
1349		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>,
1350		       <&xbar_dmic2_port>, <&xbar_dmic3_port>,
1351		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
1352		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
1353		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
1354		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
1355		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
1356		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
1357		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
1358		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
1359		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
1360		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
1361		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
1362		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
1363		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
1364		       <&xbar_ope1_in_port>, <&xbar_ope2_in_port>,
1365		       /* HW accelerators */
1366		       <&sfc1_out_port>, <&sfc2_out_port>,
1367		       <&sfc3_out_port>, <&sfc4_out_port>,
1368		       <&mvc1_out_port>, <&mvc2_out_port>,
1369		       <&amx1_out_port>, <&amx2_out_port>,
1370		       <&adx1_out1_port>, <&adx1_out2_port>,
1371		       <&adx1_out3_port>, <&adx1_out4_port>,
1372		       <&adx2_out1_port>, <&adx2_out2_port>,
1373		       <&adx2_out3_port>, <&adx2_out4_port>,
1374		       <&mixer_out1_port>, <&mixer_out2_port>,
1375		       <&mixer_out3_port>, <&mixer_out4_port>,
1376		       <&mixer_out5_port>,
1377		       <&ope1_out_port>, <&ope2_out_port>,
1378		       /* I/O DAP Ports */
1379		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
1380		       <&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
1381
1382		label = "NVIDIA Jetson TX1 APE";
1383	};
1384};
1385