1// SPDX-License-Identifier: GPL-2.0
2#include <dt-bindings/mfd/max77620.h>
3
4#include "tegra210.dtsi"
5
6/ {
7	model = "NVIDIA Jetson TX1";
8	compatible = "nvidia,p2180", "nvidia,tegra210";
9
10	aliases {
11		rtc0 = "/i2c@7000d000/pmic@3c";
12		rtc1 = "/rtc@7000e000";
13		serial0 = &uarta;
14	};
15
16	chosen {
17		stdout-path = "serial0:115200n8";
18	};
19
20	memory {
21		device_type = "memory";
22		reg = <0x0 0x80000000 0x1 0x0>;
23	};
24
25	gpu@57000000 {
26		vdd-supply = <&vdd_gpu>;
27	};
28
29	/* debug port */
30	serial@70006000 {
31		status = "okay";
32	};
33
34	i2c@7000d000 {
35		status = "okay";
36		clock-frequency = <400000>;
37
38		pmic: pmic@3c {
39			compatible = "maxim,max77620";
40			reg = <0x3c>;
41			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
42
43			#interrupt-cells = <2>;
44			interrupt-controller;
45
46			#gpio-cells = <2>;
47			gpio-controller;
48
49			pinctrl-names = "default";
50			pinctrl-0 = <&max77620_default>;
51
52			max77620_default: pinmux {
53				gpio0 {
54					pins = "gpio0";
55					function = "gpio";
56				};
57
58				gpio1 {
59					pins = "gpio1";
60					function = "fps-out";
61					drive-push-pull = <1>;
62					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
63					maxim,active-fps-power-up-slot = <7>;
64					maxim,active-fps-power-down-slot = <0>;
65				};
66
67				gpio2_3 {
68					pins = "gpio2", "gpio3";
69					function = "fps-out";
70					drive-open-drain = <1>;
71					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
72				};
73
74				gpio4 {
75					pins = "gpio4";
76					function = "32k-out1";
77				};
78
79				gpio5_6_7 {
80					pins = "gpio5", "gpio6", "gpio7";
81					function = "gpio";
82					drive-push-pull = <1>;
83				};
84			};
85
86			fps {
87				fps0 {
88					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
89					maxim,suspend-fps-time-period-us = <1280>;
90				};
91
92				fps1 {
93					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
94					maxim,suspend-fps-time-period-us = <1280>;
95				};
96
97				fps2 {
98					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
99				};
100			};
101
102			regulators {
103				in-ldo0-1-supply = <&vdd_pre>;
104				in-ldo7-8-supply = <&vdd_pre>;
105				in-sd3-supply = <&vdd_5v0_sys>;
106
107				vdd_soc: sd0 {
108					regulator-name = "VDD_SOC";
109					regulator-min-microvolt = <600000>;
110					regulator-max-microvolt = <1400000>;
111					regulator-always-on;
112					regulator-boot-on;
113
114					regulator-enable-ramp-delay = <146>;
115					regulator-ramp-delay = <27500>;
116
117					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
118				};
119
120				vdd_ddr: sd1 {
121					regulator-name = "VDD_DDR_1V1_PMIC";
122					regulator-always-on;
123					regulator-boot-on;
124
125					regulator-enable-ramp-delay = <130>;
126					regulator-ramp-delay = <27500>;
127
128					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
129				};
130
131				vdd_pre: sd2 {
132					regulator-name = "VDD_PRE_REG_1V35";
133					regulator-min-microvolt = <1350000>;
134					regulator-max-microvolt = <1350000>;
135
136					regulator-enable-ramp-delay = <176>;
137					regulator-ramp-delay = <27500>;
138
139					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
140				};
141
142				vdd_1v8: sd3 {
143					regulator-name = "VDD_1V8";
144					regulator-min-microvolt = <1800000>;
145					regulator-max-microvolt = <1800000>;
146					regulator-always-on;
147					regulator-boot-on;
148
149					regulator-enable-ramp-delay = <242>;
150					regulator-ramp-delay = <27500>;
151
152					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
153				};
154
155				vdd_sys_1v2: ldo0 {
156					regulator-name = "AVDD_SYS_1V2";
157					regulator-min-microvolt = <1200000>;
158					regulator-max-microvolt = <1200000>;
159					regulator-always-on;
160					regulator-boot-on;
161
162					regulator-enable-ramp-delay = <26>;
163					regulator-ramp-delay = <100000>;
164
165					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
166				};
167
168				vdd_pex_1v05: ldo1 {
169					regulator-name = "VDD_PEX_1V05";
170					regulator-min-microvolt = <1050000>;
171					regulator-max-microvolt = <1050000>;
172
173					regulator-enable-ramp-delay = <22>;
174					regulator-ramp-delay = <100000>;
175
176					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
177				};
178
179				vddio_sdmmc: ldo2 {
180					regulator-name = "VDDIO_SDMMC";
181					regulator-min-microvolt = <1800000>;
182					regulator-max-microvolt = <3300000>;
183					regulator-always-on;
184					regulator-boot-on;
185
186					regulator-enable-ramp-delay = <62>;
187					regulator-ramp-delay = <100000>;
188
189					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
190				};
191
192				vdd_cam_hv: ldo3 {
193					regulator-name = "VDD_CAM_HV";
194					regulator-min-microvolt = <2800000>;
195					regulator-max-microvolt = <2800000>;
196
197					regulator-enable-ramp-delay = <50>;
198					regulator-ramp-delay = <100000>;
199
200					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
201				};
202
203				vdd_rtc: ldo4 {
204					regulator-name = "VDD_RTC";
205					regulator-min-microvolt = <850000>;
206					regulator-max-microvolt = <850000>;
207					regulator-always-on;
208					regulator-boot-on;
209
210					regulator-enable-ramp-delay = <22>;
211					regulator-ramp-delay = <100000>;
212
213					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
214				};
215
216				vdd_ts_hv: ldo5 {
217					regulator-name = "VDD_TS_HV";
218					regulator-min-microvolt = <3300000>;
219					regulator-max-microvolt = <3300000>;
220
221					regulator-enable-ramp-delay = <62>;
222					regulator-ramp-delay = <100000>;
223
224					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
225				};
226
227				vdd_ts: ldo6 {
228					regulator-name = "VDD_TS_1V8";
229					regulator-min-microvolt = <1800000>;
230					regulator-max-microvolt = <1800000>;
231
232					regulator-enable-ramp-delay = <36>;
233					regulator-ramp-delay = <100000>;
234
235					maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
236					maxim,active-fps-power-up-slot = <7>;
237					maxim,active-fps-power-down-slot = <0>;
238				};
239
240				avdd_1v05_pll: ldo7 {
241					regulator-name = "AVDD_1V05_PLL";
242					regulator-min-microvolt = <1050000>;
243					regulator-max-microvolt = <1050000>;
244					regulator-always-on;
245					regulator-boot-on;
246
247					regulator-enable-ramp-delay = <24>;
248					regulator-ramp-delay = <100000>;
249
250					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
251				};
252
253				avdd_1v05: ldo8 {
254					regulator-name = "AVDD_SATA_HDMI_DP_1V05";
255					regulator-min-microvolt = <1050000>;
256					regulator-max-microvolt = <1050000>;
257
258					regulator-enable-ramp-delay = <22>;
259					regulator-ramp-delay = <100000>;
260
261					maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
262				};
263			};
264		};
265	};
266
267	pmc@7000e400 {
268		nvidia,invert-interrupt;
269	};
270
271	/* eMMC */
272	sdhci@700b0600 {
273		status = "okay";
274		bus-width = <8>;
275		non-removable;
276		vqmmc-supply = <&vdd_1v8>;
277	};
278
279	clocks {
280		compatible = "simple-bus";
281		#address-cells = <1>;
282		#size-cells = <0>;
283
284		clk32k_in: clock@0 {
285			compatible = "fixed-clock";
286			reg = <0>;
287			#clock-cells = <0>;
288			clock-frequency = <32768>;
289		};
290	};
291
292	cpus {
293		cpu@0 {
294			enable-method = "psci";
295		};
296
297		cpu@1 {
298			enable-method = "psci";
299		};
300
301		cpu@2 {
302			enable-method = "psci";
303		};
304
305		cpu@3 {
306			enable-method = "psci";
307		};
308	};
309
310	psci {
311		compatible = "arm,psci-0.2";
312		method = "smc";
313	};
314
315	regulators {
316		vdd_gpu: regulator@100 {
317			compatible = "pwm-regulator";
318			reg = <100>;
319			pwms = <&pwm 1 4880>;
320			regulator-name = "VDD_GPU";
321			regulator-min-microvolt = <710000>;
322			regulator-max-microvolt = <1320000>;
323			enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
324			regulator-ramp-delay = <80>;
325			regulator-enable-ramp-delay = <1000>;
326		};
327	};
328};
329