1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/linux-event-codes.h>
5#include <dt-bindings/input/gpio-keys.h>
6
7#include "tegra194-p2888.dtsi"
8
9/ {
10	model = "NVIDIA Jetson AGX Xavier Developer Kit";
11	compatible = "nvidia,p2972-0000", "nvidia,tegra194";
12
13	bus@0 {
14		aconnect@2900000 {
15			status = "okay";
16
17			dma-controller@2930000 {
18				status = "okay";
19			};
20
21			interrupt-controller@2a40000 {
22				status = "okay";
23			};
24
25			ahub@2900800 {
26				status = "okay";
27
28				ports {
29					#address-cells = <1>;
30					#size-cells = <0>;
31
32					port@0 {
33						reg = <0x0>;
34
35						xbar_admaif0_ep: endpoint {
36							remote-endpoint = <&admaif0_ep>;
37						};
38					};
39
40					port@1 {
41						reg = <0x1>;
42
43						xbar_admaif1_ep: endpoint {
44							remote-endpoint = <&admaif1_ep>;
45						};
46					};
47
48					port@2 {
49						reg = <0x2>;
50
51						xbar_admaif2_ep: endpoint {
52							remote-endpoint = <&admaif2_ep>;
53						};
54					};
55
56					port@3 {
57						reg = <0x3>;
58
59						xbar_admaif3_ep: endpoint {
60							remote-endpoint = <&admaif3_ep>;
61						};
62					};
63
64					port@4 {
65						reg = <0x4>;
66
67						xbar_admaif4_ep: endpoint {
68							remote-endpoint = <&admaif4_ep>;
69						};
70					};
71
72					port@5 {
73						reg = <0x5>;
74
75						xbar_admaif5_ep: endpoint {
76							remote-endpoint = <&admaif5_ep>;
77						};
78					};
79
80					port@6 {
81						reg = <0x6>;
82
83						xbar_admaif6_ep: endpoint {
84							remote-endpoint = <&admaif6_ep>;
85						};
86					};
87
88					port@7 {
89						reg = <0x7>;
90
91						xbar_admaif7_ep: endpoint {
92							remote-endpoint = <&admaif7_ep>;
93						};
94					};
95
96					port@8 {
97						reg = <0x8>;
98
99						xbar_admaif8_ep: endpoint {
100							remote-endpoint = <&admaif8_ep>;
101						};
102					};
103
104					port@9 {
105						reg = <0x9>;
106
107						xbar_admaif9_ep: endpoint {
108							remote-endpoint = <&admaif9_ep>;
109						};
110					};
111
112					port@a {
113						reg = <0xa>;
114
115						xbar_admaif10_ep: endpoint {
116							remote-endpoint = <&admaif10_ep>;
117						};
118					};
119
120					port@b {
121						reg = <0xb>;
122
123						xbar_admaif11_ep: endpoint {
124							remote-endpoint = <&admaif11_ep>;
125						};
126					};
127
128					port@c {
129						reg = <0xc>;
130
131						xbar_admaif12_ep: endpoint {
132							remote-endpoint = <&admaif12_ep>;
133						};
134					};
135
136					port@d {
137						reg = <0xd>;
138
139						xbar_admaif13_ep: endpoint {
140							remote-endpoint = <&admaif13_ep>;
141						};
142					};
143
144					port@e {
145						reg = <0xe>;
146
147						xbar_admaif14_ep: endpoint {
148							remote-endpoint = <&admaif14_ep>;
149						};
150					};
151
152					port@f {
153						reg = <0xf>;
154
155						xbar_admaif15_ep: endpoint {
156							remote-endpoint = <&admaif15_ep>;
157						};
158					};
159
160					port@10 {
161						reg = <0x10>;
162
163						xbar_admaif16_ep: endpoint {
164							remote-endpoint = <&admaif16_ep>;
165						};
166					};
167
168					port@11 {
169						reg = <0x11>;
170
171						xbar_admaif17_ep: endpoint {
172							remote-endpoint = <&admaif17_ep>;
173						};
174					};
175
176					port@12 {
177						reg = <0x12>;
178
179						xbar_admaif18_ep: endpoint {
180							remote-endpoint = <&admaif18_ep>;
181						};
182					};
183
184					port@13 {
185						reg = <0x13>;
186
187						xbar_admaif19_ep: endpoint {
188							remote-endpoint = <&admaif19_ep>;
189						};
190					};
191
192					xbar_i2s1_port: port@14 {
193						reg = <0x14>;
194
195						xbar_i2s1_ep: endpoint {
196							remote-endpoint = <&i2s1_cif_ep>;
197						};
198					};
199
200					xbar_i2s2_port: port@15 {
201						reg = <0x15>;
202
203						xbar_i2s2_ep: endpoint {
204							remote-endpoint = <&i2s2_cif_ep>;
205						};
206					};
207
208					xbar_i2s4_port: port@17 {
209						reg = <0x17>;
210
211						xbar_i2s4_ep: endpoint {
212							remote-endpoint = <&i2s4_cif_ep>;
213						};
214					};
215
216					xbar_i2s6_port: port@19 {
217						reg = <0x19>;
218
219						xbar_i2s6_ep: endpoint {
220							remote-endpoint = <&i2s6_cif_ep>;
221						};
222					};
223
224					xbar_dmic3_port: port@1c {
225						reg = <0x1c>;
226
227						xbar_dmic3_ep: endpoint {
228							remote-endpoint = <&dmic3_cif_ep>;
229						};
230					};
231				};
232
233				admaif@290f000 {
234					status = "okay";
235
236					ports {
237						#address-cells = <1>;
238						#size-cells = <0>;
239
240						admaif0_port: port@0 {
241							reg = <0x0>;
242
243							admaif0_ep: endpoint {
244								remote-endpoint = <&xbar_admaif0_ep>;
245							};
246						};
247
248						admaif1_port: port@1 {
249							reg = <0x1>;
250
251							admaif1_ep: endpoint {
252								remote-endpoint = <&xbar_admaif1_ep>;
253							};
254						};
255
256						admaif2_port: port@2 {
257							reg = <0x2>;
258
259							admaif2_ep: endpoint {
260								remote-endpoint = <&xbar_admaif2_ep>;
261							};
262						};
263
264						admaif3_port: port@3 {
265							reg = <0x3>;
266
267							admaif3_ep: endpoint {
268								remote-endpoint = <&xbar_admaif3_ep>;
269							};
270						};
271
272						admaif4_port: port@4 {
273							reg = <0x4>;
274
275							admaif4_ep: endpoint {
276								remote-endpoint = <&xbar_admaif4_ep>;
277							};
278						};
279
280						admaif5_port: port@5 {
281							reg = <0x5>;
282
283							admaif5_ep: endpoint {
284								remote-endpoint = <&xbar_admaif5_ep>;
285							};
286						};
287
288						admaif6_port: port@6 {
289							reg = <0x6>;
290
291							admaif6_ep: endpoint {
292								remote-endpoint = <&xbar_admaif6_ep>;
293							};
294						};
295
296						admaif7_port: port@7 {
297							reg = <0x7>;
298
299							admaif7_ep: endpoint {
300								remote-endpoint = <&xbar_admaif7_ep>;
301							};
302						};
303
304						admaif8_port: port@8 {
305							reg = <0x8>;
306
307							admaif8_ep: endpoint {
308								remote-endpoint = <&xbar_admaif8_ep>;
309							};
310						};
311
312						admaif9_port: port@9 {
313							reg = <0x9>;
314
315							admaif9_ep: endpoint {
316								remote-endpoint = <&xbar_admaif9_ep>;
317							};
318						};
319
320						admaif10_port: port@a {
321							reg = <0xa>;
322
323							admaif10_ep: endpoint {
324								remote-endpoint = <&xbar_admaif10_ep>;
325							};
326						};
327
328						admaif11_port: port@b {
329							reg = <0xb>;
330
331							admaif11_ep: endpoint {
332								remote-endpoint = <&xbar_admaif11_ep>;
333							};
334						};
335
336						admaif12_port: port@c {
337							reg = <0xc>;
338
339							admaif12_ep: endpoint {
340								remote-endpoint = <&xbar_admaif12_ep>;
341							};
342						};
343
344						admaif13_port: port@d {
345							reg = <0xd>;
346
347							admaif13_ep: endpoint {
348								remote-endpoint = <&xbar_admaif13_ep>;
349							};
350						};
351
352						admaif14_port: port@e {
353							reg = <0xe>;
354
355							admaif14_ep: endpoint {
356								remote-endpoint = <&xbar_admaif14_ep>;
357							};
358						};
359
360						admaif15_port: port@f {
361							reg = <0xf>;
362
363							admaif15_ep: endpoint {
364								remote-endpoint = <&xbar_admaif15_ep>;
365							};
366						};
367
368						admaif16_port: port@10 {
369							reg = <0x10>;
370
371							admaif16_ep: endpoint {
372								remote-endpoint = <&xbar_admaif16_ep>;
373							};
374						};
375
376						admaif17_port: port@11 {
377							reg = <0x11>;
378
379							admaif17_ep: endpoint {
380								remote-endpoint = <&xbar_admaif17_ep>;
381							};
382						};
383
384						admaif18_port: port@12 {
385							reg = <0x12>;
386
387							admaif18_ep: endpoint {
388								remote-endpoint = <&xbar_admaif18_ep>;
389							};
390						};
391
392						admaif19_port: port@13 {
393							reg = <0x13>;
394
395							admaif19_ep: endpoint {
396								remote-endpoint = <&xbar_admaif19_ep>;
397							};
398						};
399					};
400				};
401
402				i2s@2901000 {
403					status = "okay";
404
405					ports {
406						#address-cells = <1>;
407						#size-cells = <0>;
408
409						port@0 {
410							reg = <0>;
411
412							i2s1_cif_ep: endpoint {
413								remote-endpoint = <&xbar_i2s1_ep>;
414							};
415						};
416
417						i2s1_port: port@1 {
418							reg = <1>;
419
420							i2s1_dap_ep: endpoint {
421								dai-format = "i2s";
422								remote-endpoint = <&rt5658_ep>;
423							};
424						};
425					};
426				};
427
428				i2s@2901100 {
429					status = "okay";
430
431					ports {
432						#address-cells = <1>;
433						#size-cells = <0>;
434
435						port@0 {
436							reg = <0>;
437
438							i2s2_cif_ep: endpoint {
439								remote-endpoint = <&xbar_i2s2_ep>;
440							};
441						};
442
443						i2s2_port: port@1 {
444							reg = <1>;
445
446							i2s2_dap_ep: endpoint {
447								dai-format = "i2s";
448								/* Place holder for external Codec */
449							};
450						};
451					};
452				};
453
454				i2s@2901300 {
455					status = "okay";
456
457					ports {
458						#address-cells = <1>;
459						#size-cells = <0>;
460
461						port@0 {
462							reg = <0>;
463
464							i2s4_cif_ep: endpoint {
465								remote-endpoint = <&xbar_i2s4_ep>;
466							};
467						};
468
469						i2s4_port: port@1 {
470							reg = <1>;
471
472							i2s4_dap_ep: endpoint {
473								dai-format = "i2s";
474								/* Place holder for external Codec */
475							};
476						};
477					};
478				};
479
480				i2s@2901500 {
481					status = "okay";
482
483					ports {
484						#address-cells = <1>;
485						#size-cells = <0>;
486
487						port@0 {
488							reg = <0>;
489
490							i2s6_cif_ep: endpoint {
491								remote-endpoint = <&xbar_i2s6_ep>;
492							};
493						};
494
495						i2s6_port: port@1 {
496							reg = <1>;
497
498							i2s6_dap_ep: endpoint@0 {
499								dai-format = "i2s";
500								/* Place holder for external Codec */
501							};
502						};
503					};
504				};
505
506				dmic@2904200 {
507					status = "okay";
508
509					ports {
510						#address-cells = <1>;
511						#size-cells = <0>;
512
513						port@0 {
514							reg = <0>;
515
516							dmic3_cif_ep: endpoint {
517								remote-endpoint = <&xbar_dmic3_ep>;
518							};
519						};
520
521						dmic3_port: port@1 {
522							reg = <1>;
523
524							dmic3_dap_ep: endpoint {
525								/* Place holder for external Codec */
526							};
527						};
528					};
529				};
530			};
531		};
532
533		i2c@3160000 {
534			eeprom@56 {
535				compatible = "atmel,24c02";
536				reg = <0x56>;
537
538				label = "system";
539				vcc-supply = <&vdd_1v8ls>;
540				address-width = <8>;
541				pagesize = <8>;
542				size = <256>;
543				read-only;
544			};
545		};
546
547		ddc: i2c@31c0000 {
548			status = "okay";
549		};
550
551		/* SDMMC1 (SD/MMC) */
552		mmc@3400000 {
553			status = "okay";
554		};
555
556		hda@3510000 {
557			nvidia,model = "jetson-xavier-hda";
558			status = "okay";
559		};
560
561		padctl@3520000 {
562			status = "okay";
563
564			pads {
565				usb2 {
566					lanes {
567						usb2-0 {
568							status = "okay";
569						};
570
571						usb2-1 {
572							status = "okay";
573						};
574
575						usb2-3 {
576							status = "okay";
577						};
578					};
579				};
580
581				usb3 {
582					lanes {
583						usb3-0 {
584							status = "okay";
585						};
586
587						usb3-2 {
588							status = "okay";
589						};
590
591						usb3-3 {
592							status = "okay";
593						};
594					};
595				};
596			};
597
598			ports {
599				usb2-0 {
600					mode = "host";
601					status = "okay";
602				};
603
604				usb2-1 {
605					mode = "host";
606					status = "okay";
607				};
608
609				usb2-3 {
610					mode = "host";
611					status = "okay";
612				};
613
614				usb3-0 {
615					nvidia,usb2-companion = <1>;
616					status = "okay";
617				};
618
619				usb3-2 {
620					nvidia,usb2-companion = <0>;
621					status = "okay";
622				};
623
624				usb3-3 {
625					nvidia,usb2-companion = <3>;
626					maximum-speed = "super-speed";
627					status = "okay";
628				};
629			};
630		};
631
632		usb@3610000 {
633			status = "okay";
634
635			phys =	<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
636				<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
637				<&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
638				<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
639				<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>,
640				<&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
641			phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
642		};
643
644		i2c@c250000 {
645			status = "okay";
646
647			rt5658: audio-codec@1a {
648				status = "okay";
649
650				compatible = "realtek,rt5658";
651				reg = <0x1a>;
652				interrupt-parent = <&gpio>;
653				interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;
654				clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
655				clock-names = "mclk";
656				realtek,jd-src = <2>;
657				sound-name-prefix = "CVB-RT";
658
659				port {
660					rt5658_ep: endpoint {
661						remote-endpoint = <&i2s1_dap_ep>;
662						mclk-fs = <256>;
663					};
664				};
665			};
666		};
667
668		pwm@c340000 {
669			status = "okay";
670		};
671
672		host1x@13e00000 {
673			display-hub@15200000 {
674				status = "okay";
675			};
676
677			dpaux@155c0000 {
678				status = "okay";
679			};
680
681			dpaux@155d0000 {
682				status = "okay";
683			};
684
685			dpaux@155e0000 {
686				status = "okay";
687			};
688
689			/* DP0 */
690			sor@15b00000 {
691				status = "okay";
692
693				avdd-io-hdmi-dp-supply = <&vdd_1v0>;
694				vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
695
696				nvidia,dpaux = <&dpaux0>;
697			};
698
699			/* DP1 */
700			sor@15b40000 {
701				status = "okay";
702
703				avdd-io-hdmi-dp-supply = <&vdd_1v0>;
704				vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
705
706				nvidia,dpaux = <&dpaux1>;
707			};
708
709			/* HDMI */
710			sor@15b80000 {
711				status = "okay";
712
713				avdd-io-hdmi-dp-supply = <&vdd_1v0>;
714				vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
715				hdmi-supply = <&vdd_hdmi>;
716
717				nvidia,ddc-i2c-bus = <&ddc>;
718				nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2)
719							 GPIO_ACTIVE_LOW>;
720			};
721		};
722	};
723
724	pcie@14100000 {
725		status = "okay";
726
727		vddio-pex-ctl-supply = <&vdd_1v8ao>;
728
729		phys = <&p2u_hsio_0>;
730		phy-names = "p2u-0";
731	};
732
733	pcie@14140000 {
734		status = "okay";
735
736		vddio-pex-ctl-supply = <&vdd_1v8ao>;
737
738		phys = <&p2u_hsio_7>;
739		phy-names = "p2u-0";
740	};
741
742	pcie@14180000 {
743		status = "okay";
744
745		vddio-pex-ctl-supply = <&vdd_1v8ao>;
746
747		phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
748		       <&p2u_hsio_5>;
749		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
750	};
751
752	pcie@141a0000 {
753		status = "okay";
754
755		vddio-pex-ctl-supply = <&vdd_1v8ao>;
756		vpcie3v3-supply = <&vdd_3v3_pcie>;
757		vpcie12v-supply = <&vdd_12v_pcie>;
758
759		phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
760		       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
761		       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
762
763		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
764			    "p2u-5", "p2u-6", "p2u-7";
765	};
766
767	pcie_ep@141a0000 {
768		status = "disabled";
769
770		vddio-pex-ctl-supply = <&vdd_1v8ao>;
771
772		reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
773
774		nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
775					      GPIO_ACTIVE_HIGH>;
776
777		phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
778		       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
779		       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
780
781		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
782			    "p2u-5", "p2u-6", "p2u-7";
783	};
784
785	fan: fan {
786		compatible = "pwm-fan";
787		pwms = <&pwm4 0 45334>;
788
789		cooling-levels = <0 64 128 255>;
790		#cooling-cells = <2>;
791	};
792
793	gpio-keys {
794		compatible = "gpio-keys";
795
796		force-recovery {
797			label = "Force Recovery";
798			gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
799				       GPIO_ACTIVE_LOW>;
800			linux,input-type = <EV_KEY>;
801			linux,code = <KEY_SLEEP>;
802			debounce-interval = <10>;
803		};
804
805		power {
806			label = "Power";
807			gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
808					   GPIO_ACTIVE_LOW>;
809			linux,input-type = <EV_KEY>;
810			linux,code = <KEY_POWER>;
811			debounce-interval = <10>;
812			wakeup-event-action = <EV_ACT_ASSERTED>;
813			wakeup-source;
814		};
815	};
816
817	sound {
818		compatible = "nvidia,tegra186-audio-graph-card";
819		status = "okay";
820
821		dais = /* ADMAIF (FE) Ports */
822		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
823		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
824		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
825		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
826		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
827		       /* XBAR Ports */
828		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
829		       <&xbar_i2s6_port>, <&xbar_dmic3_port>,
830		       /* BE I/O Ports */
831		       <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
832		       <&dmic3_port>;
833
834		label = "jetson-xavier-ape";
835
836		widgets =
837			"Microphone",	"CVB-RT MIC Jack",
838			"Microphone",	"CVB-RT MIC",
839			"Headphone",	"CVB-RT HP Jack",
840			"Speaker",	"CVB-RT SPK";
841
842		routing =
843			/* I2S1 <-> RT5658 */
844			"CVB-RT AIF1 Playback",	"I2S1 DAP-Playback",
845			"I2S1 DAP-Capture",	"CVB-RT AIF1 Capture",
846			/* RT5658 Codec controls */
847			"CVB-RT HP Jack",	"CVB-RT HPO L Playback",
848			"CVB-RT HP Jack",	"CVB-RT HPO R Playback",
849			"CVB-RT IN1P",		"CVB-RT MIC Jack",
850			"CVB-RT IN2P",		"CVB-RT MIC Jack",
851			"CVB-RT SPK",		"CVB-RT SPO Playback",
852			"CVB-RT DMIC L1",	"CVB-RT MIC",
853			"CVB-RT DMIC L2",	"CVB-RT MIC",
854			"CVB-RT DMIC R1",	"CVB-RT MIC",
855			"CVB-RT DMIC R2",	"CVB-RT MIC";
856	};
857
858	thermal-zones {
859		cpu {
860			polling-delay = <0>;
861			polling-delay-passive = <500>;
862			status = "okay";
863
864			trips {
865				cpu_trip_critical: critical {
866					temperature = <96500>;
867					hysteresis = <0>;
868					type = "critical";
869				};
870
871				cpu_trip_hot: hot {
872					temperature = <70000>;
873					hysteresis = <2000>;
874					type = "hot";
875				};
876
877				cpu_trip_active: active {
878					temperature = <50000>;
879					hysteresis = <2000>;
880					type = "active";
881				};
882
883				cpu_trip_passive: passive {
884					temperature = <30000>;
885					hysteresis = <2000>;
886					type = "passive";
887				};
888			};
889
890			cooling-maps {
891				cpu-critical {
892					cooling-device = <&fan 3 3>;
893					trip = <&cpu_trip_critical>;
894				};
895
896				cpu-hot {
897					cooling-device = <&fan 2 2>;
898					trip = <&cpu_trip_hot>;
899				};
900
901				cpu-active {
902					cooling-device = <&fan 1 1>;
903					trip = <&cpu_trip_active>;
904				};
905
906				cpu-passive {
907					cooling-device = <&fan 0 0>;
908					trip = <&cpu_trip_passive>;
909				};
910			};
911		};
912
913		gpu {
914			polling-delay = <0>;
915			polling-delay-passive = <500>;
916			status = "okay";
917
918			trips {
919				gpu_alert0: critical {
920					temperature = <99000>;
921					hysteresis = <0>;
922					type = "critical";
923				};
924			};
925		};
926
927		aux {
928			polling-delay = <0>;
929			polling-delay-passive = <500>;
930			status = "okay";
931
932			trips {
933				aux_alert0: critical {
934					temperature = <90000>;
935					hysteresis = <0>;
936					type = "critical";
937				};
938			};
939		};
940	};
941};
942