1// SPDX-License-Identifier: GPL-2.0 2#include "tegra186.dtsi" 3 4#include <dt-bindings/mfd/max77620.h> 5 6/ { 7 model = "NVIDIA Tegra186 P3310 Processor Module"; 8 compatible = "nvidia,p3310", "nvidia,tegra186"; 9 10 aliases { 11 sdhci0 = "/sdhci@3460000"; 12 sdhci1 = "/sdhci@3400000"; 13 serial0 = &uarta; 14 i2c0 = "/bpmp/i2c"; 15 i2c1 = "/i2c@3160000"; 16 i2c2 = "/i2c@c240000"; 17 i2c3 = "/i2c@3180000"; 18 i2c4 = "/i2c@3190000"; 19 i2c5 = "/i2c@31c0000"; 20 i2c6 = "/i2c@c250000"; 21 i2c7 = "/i2c@31e0000"; 22 }; 23 24 chosen { 25 bootargs = "earlycon console=ttyS0,115200n8"; 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 memory { 30 device_type = "memory"; 31 reg = <0x0 0x80000000 0x2 0x00000000>; 32 }; 33 34 ethernet@2490000 { 35 status = "okay"; 36 37 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; 38 phy-handle = <&phy>; 39 phy-mode = "rgmii"; 40 41 mdio { 42 #address-cells = <1>; 43 #size-cells = <0>; 44 45 phy: phy@0 { 46 compatible = "ethernet-phy-ieee802.3-c22"; 47 reg = <0x0>; 48 interrupt-parent = <&gpio>; 49 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>; 50 }; 51 }; 52 }; 53 54 memory-controller@2c00000 { 55 status = "okay"; 56 }; 57 58 serial@3100000 { 59 status = "okay"; 60 }; 61 62 i2c@3160000 { 63 status = "okay"; 64 65 power-monitor@40 { 66 compatible = "ti,ina3221"; 67 reg = <0x40>; 68 }; 69 70 power-monitor@41 { 71 compatible = "ti,ina3221"; 72 reg = <0x41>; 73 }; 74 }; 75 76 i2c@3180000 { 77 status = "okay"; 78 }; 79 80 ddc: i2c@3190000 { 81 status = "okay"; 82 }; 83 84 i2c@31c0000 { 85 status = "okay"; 86 }; 87 88 i2c@31e0000 { 89 status = "okay"; 90 }; 91 92 /* SDMMC1 (SD/MMC) */ 93 sdhci@3400000 { 94 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; 95 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 96 97 vqmmc-supply = <&vddio_sdmmc1>; 98 }; 99 100 /* SDMMC3 (SDIO) */ 101 sdhci@3440000 { 102 status = "okay"; 103 }; 104 105 /* SDMMC4 (eMMC) */ 106 sdhci@3460000 { 107 status = "okay"; 108 bus-width = <8>; 109 non-removable; 110 111 vqmmc-supply = <&vdd_1v8_ap>; 112 vmmc-supply = <&vdd_3v3_sys>; 113 }; 114 115 hsp@3c00000 { 116 status = "okay"; 117 }; 118 119 i2c@c240000 { 120 status = "okay"; 121 }; 122 123 i2c@c250000 { 124 status = "okay"; 125 }; 126 127 rtc@c2a0000 { 128 status = "okay"; 129 }; 130 131 pmc@c360000 { 132 nvidia,invert-interrupt; 133 }; 134 135 cpus { 136 cpu@0 { 137 enable-method = "psci"; 138 }; 139 140 cpu@1 { 141 enable-method = "psci"; 142 }; 143 144 cpu@2 { 145 enable-method = "psci"; 146 }; 147 148 cpu@3 { 149 enable-method = "psci"; 150 }; 151 152 cpu@4 { 153 enable-method = "psci"; 154 }; 155 156 cpu@5 { 157 enable-method = "psci"; 158 }; 159 }; 160 161 bpmp { 162 i2c { 163 status = "okay"; 164 165 pmic: pmic@3c { 166 compatible = "maxim,max77620"; 167 reg = <0x3c>; 168 169 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; 170 #interrupt-cells = <2>; 171 interrupt-controller; 172 173 #gpio-cells = <2>; 174 gpio-controller; 175 176 pinctrl-names = "default"; 177 pinctrl-0 = <&max77620_default>; 178 179 max77620_default: pinmux { 180 gpio0 { 181 pins = "gpio0"; 182 function = "gpio"; 183 }; 184 185 gpio1 { 186 pins = "gpio1"; 187 function = "fps-out"; 188 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 189 }; 190 191 gpio2 { 192 pins = "gpio2"; 193 function = "fps-out"; 194 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 195 }; 196 197 gpio3 { 198 pins = "gpio3"; 199 function = "fps-out"; 200 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 201 }; 202 203 gpio4 { 204 pins = "gpio4"; 205 function = "32k-out1"; 206 drive-push-pull = <1>; 207 }; 208 209 gpio5 { 210 pins = "gpio5"; 211 function = "gpio"; 212 drive-push-pull = <0>; 213 }; 214 215 gpio6 { 216 pins = "gpio6"; 217 function = "gpio"; 218 drive-push-pull = <1>; 219 }; 220 221 gpio7 { 222 pins = "gpio7"; 223 function = "gpio"; 224 drive-push-pull = <0>; 225 }; 226 }; 227 228 fps { 229 fps0 { 230 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 231 maxim,shutdown-fps-time-period-us = <640>; 232 }; 233 234 fps1 { 235 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 236 maxim,shutdown-fps-time-period-us = <640>; 237 }; 238 239 fps2 { 240 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 241 maxim,shutdown-fps-time-period-us = <640>; 242 }; 243 }; 244 245 regulators { 246 in-sd0-supply = <&vdd_5v0_sys>; 247 in-sd1-supply = <&vdd_5v0_sys>; 248 in-sd2-supply = <&vdd_5v0_sys>; 249 in-sd3-supply = <&vdd_5v0_sys>; 250 251 in-ldo0-1-supply = <&vdd_5v0_sys>; 252 in-ldo2-supply = <&vdd_5v0_sys>; 253 in-ldo3-5-supply = <&vdd_5v0_sys>; 254 in-ldo4-6-supply = <&vdd_1v8>; 255 in-ldo7-8-supply = <&avdd_dsi_csi>; 256 257 sd0 { 258 regulator-name = "VDD_DDR_1V1_PMIC"; 259 regulator-min-microvolt = <1100000>; 260 regulator-max-microvolt = <1100000>; 261 regulator-always-on; 262 regulator-boot-on; 263 }; 264 265 avdd_dsi_csi: sd1 { 266 regulator-name = "AVDD_DSI_CSI_1V2"; 267 regulator-min-microvolt = <1200000>; 268 regulator-max-microvolt = <1200000>; 269 /* XXX */ 270 regulator-always-on; 271 regulator-boot-on; 272 }; 273 274 vdd_1v8: sd2 { 275 regulator-name = "VDD_1V8"; 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <1800000>; 278 /* XXX */ 279 regulator-always-on; 280 regulator-boot-on; 281 }; 282 283 vdd_3v3_sys: sd3 { 284 regulator-name = "VDD_3V3_SYS"; 285 regulator-min-microvolt = <3300000>; 286 regulator-max-microvolt = <3300000>; 287 /* XXX */ 288 regulator-always-on; 289 regulator-boot-on; 290 }; 291 292 ldo0 { 293 regulator-name = "VDD_1V8_AP_PLL"; 294 regulator-min-microvolt = <1800000>; 295 regulator-max-microvolt = <1800000>; 296 /* XXX */ 297 regulator-always-on; 298 regulator-boot-on; 299 }; 300 301 ldo2 { 302 regulator-name = "VDDIO_3V3_AOHV"; 303 regulator-min-microvolt = <3300000>; 304 regulator-max-microvolt = <3300000>; 305 /* XXX */ 306 regulator-always-on; 307 regulator-boot-on; 308 }; 309 310 vddio_sdmmc1: ldo3 { 311 regulator-name = "VDDIO_SDMMC1_AP"; 312 regulator-min-microvolt = <1800000>; 313 regulator-max-microvolt = <3300000>; 314 }; 315 316 ldo4 { 317 regulator-name = "VDD_RTC"; 318 regulator-min-microvolt = <1000000>; 319 regulator-max-microvolt = <1000000>; 320 }; 321 322 vddio_sdmmc3: ldo5 { 323 regulator-name = "VDDIO_SDMMC3_AP"; 324 regulator-min-microvolt = <2800000>; 325 regulator-max-microvolt = <2800000>; 326 }; 327 328 vdd_hdmi_1v05: ldo7 { 329 regulator-name = "VDD_HDMI_1V05"; 330 regulator-min-microvolt = <1050000>; 331 regulator-max-microvolt = <1050000>; 332 /* XXX */ 333 regulator-always-on; 334 regulator-boot-on; 335 }; 336 337 vdd_pex: ldo8 { 338 regulator-name = "VDD_PEX_1V05"; 339 regulator-min-microvolt = <1050000>; 340 regulator-max-microvolt = <1050000>; 341 /* XXX */ 342 regulator-always-on; 343 regulator-boot-on; 344 }; 345 }; 346 }; 347 }; 348 }; 349 350 psci { 351 compatible = "arm,psci-1.0"; 352 status = "okay"; 353 method = "smc"; 354 }; 355 356 regulators { 357 compatible = "simple-bus"; 358 #address-cells = <1>; 359 #size-cells = <0>; 360 361 vdd_5v0_sys: regulator@0 { 362 compatible = "regulator-fixed"; 363 reg = <0>; 364 365 regulator-name = "VDD_5V0_SYS"; 366 regulator-min-microvolt = <5000000>; 367 regulator-max-microvolt = <5000000>; 368 regulator-always-on; 369 regulator-boot-on; 370 }; 371 372 vdd_1v8_ap: regulator@1 { 373 compatible = "regulator-fixed"; 374 reg = <1>; 375 376 regulator-name = "VDD_1V8_AP"; 377 regulator-min-microvolt = <1800000>; 378 regulator-max-microvolt = <1800000>; 379 380 /* XXX */ 381 regulator-always-on; 382 regulator-boot-on; 383 384 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 385 enable-active-high; 386 387 vin-supply = <&vdd_1v8>; 388 }; 389 }; 390}; 391